This source file includes following definitions.
- update_apu
- update_cpts
- update_data_1
- update_data_2
- update_data_3
- update_data_4
- update_data_5
- update_data_6
- update_data_7
- update_data_scroll
- update_data
- update_display
- lwrite
- send_lamp_data
- set_message
- time_handler
- update_port
- scraperThreadMain
- panelScraperInit
- panelScraperStart
- panelScraperStop
- panelScraperMsg
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33 #include <termios.h>
34 #include <fcntl.h>
35 #include <stdio.h>
36 #include <stdlib.h>
37 #include <unistd.h>
38 #include <poll.h>
39 #include <errno.h>
40
41 #include "panelScraper.h"
42
43 #include "../font8x8/font8x8.h"
44
45 #include "dps8.h"
46 #include "dps8_sys.h"
47 #include "dps8_cpu.h"
48
49 #undef cpu
50 static cpu_state_t * volatile panel_cpup;
51 #define cpu (* panel_cpup)
52
53 #include <pthread.h>
54 #include <sys/types.h>
55 #include <sys/stat.h>
56 #include <fcntl.h>
57 #include <unistd.h>
58 #if defined(__MINGW64__) || defined(__MINGW32__)
59 # define FD HANDLE
60 #else
61 # include <poll.h>
62 # define FD int
63 #endif
64
65 #if !defined MIN
66 # define MIN(X,Y) ((X) < (Y) ? (X) : (Y))
67 #endif
68
69 static pthread_t scraperThread;
70
71 static int scraperThreadArg;
72
73 #define msgLen 4096
74 static char message [msgLen];
75 static int c_offset = 0;
76
77
78
79 #define nrows 16
80 #define ncols 40
81 static bool banks [nrows] [ncols];
82 #define bank_a banks [ 0]
83 #define bank_b banks [ 1]
84 #define bank_c banks [ 2]
85 #define bank_d banks [ 3]
86 #define bank_e banks [ 4]
87 #define bank_f banks [ 5]
88 #define bank_g banks [ 6]
89 #define bank_h banks [ 7]
90 #define bank_i banks [ 8]
91 #define bank_j banks [ 9]
92 #define bank_k banks [10]
93 #define bank_l banks [11]
94 #define bank_m banks [12]
95 #define bank_n banks [13]
96 #define bank_o banks [14]
97 #define bank_p banks [15]
98
99 #define SETL(lights, light_os, from, n) \
100 for (uint i = 0; i < (n); i ++) \
101 lights [(light_os) + i] = !! ((from) & (1llu << ((n) - i - 1)));
102
103 #define SETLA(lights, light_os, from, n) \
104 for (uint i = 0; i < (n); i ++) \
105 lights [(light_os) + i] = !! from [i];
106
107 #define SETL1(lights, light_os, from) \
108 lights [(light_os)] = !! (from);
109
110 static void update_apu (void)
111 {
112 uint n = cpu.APU_panel_scroll_select_n_sw;
113
114 switch (cpu.APU_panel_scroll_wheel_sw)
115 {
116
117 case 0:
118 {
119 if (cpu.APU_panel_scroll_select_ul_sw)
120 {
121
122
123
124
125 SETL (bank_a, 0+3, cpu.PTWAM[n].POINTER, 15);
126 SETL (bank_a, 15+3, cpu.PTWAM[n].PAGENO, 12);
127 SETL1 (bank_a, 27+3, cpu.PTWAM[n].FE);
128 SETL (bank_a, 32+3, cpu.PTWAM[n].USE, 4);
129 }
130 else
131 {
132
133 }
134 }
135 break;
136
137
138 case 1:
139 {
140 if (cpu.APU_panel_scroll_select_ul_sw)
141 {
142
143
144 SETL (bank_a, 0+3, cpu.PTWAM[n].ADDR, 18);
145 SETL1 (bank_a, 29+3, cpu.PTWAM[n].M);
146 }
147 else
148 {
149
150 }
151 }
152 break;
153
154
155 case 2:
156 {
157 if (cpu.APU_panel_scroll_select_ul_sw)
158 {
159
160
161
162 SETL (bank_a, 0+3, cpu.SDWAM[n].POINTER, 15);
163 SETL1 (bank_a, 27+3, cpu.SDWAM[n].FE);
164 SETL (bank_a, 32+3, cpu.SDWAM[n].USE, 4);
165 }
166 else
167 {
168
169 }
170 }
171 break;
172
173
174 case 3:
175 {
176 if (cpu.APU_panel_scroll_select_ul_sw)
177 {
178
179
180
181
182 SETL (bank_a, 0+3, cpu.SDWAM[n].ADDR, 24);
183 SETL (bank_a, 24+3, cpu.SDWAM[n].R1, 3);
184 SETL (bank_a, 27+3, cpu.SDWAM[n].R2, 3);
185 SETL (bank_a, 30+3, cpu.SDWAM[n].R2, 3);
186 }
187 else
188 {
189
190
191
192
193
194
195
196
197 SETL (bank_a, 1+3, cpu.SDWAM[n].BOUND, 14);
198 SETL1 (bank_a, 15+3, cpu.SDWAM[n].R);
199 SETL1 (bank_a, 16+3, cpu.SDWAM[n].E);
200 SETL1 (bank_a, 17+3, cpu.SDWAM[n].W);
201 SETL1 (bank_a, 18+3, cpu.SDWAM[n].P);
202 SETL1 (bank_a, 19+3, cpu.SDWAM[n].U);
203 SETL1 (bank_a, 20+3, cpu.SDWAM[n].G);
204 SETL (bank_a, 22+3, cpu.SDWAM[n].EB, 14);
205 }
206 }
207 break;
208
209
210 case 4:
211 {
212 if (cpu.APU_panel_scroll_select_ul_sw)
213 {
214
215
216 SETL (bank_a, 0+3, cpu.lastPTWOffset, 18);
217 SETL1 (bank_a, 26+3, cpu.lastPTWIsDS);
218 }
219 else
220 {
221
222
223
224
225
226
227
228
229 SETL (bank_a, 1+3, cpu.SDWAM[n].BOUND, 14);
230 SETL1 (bank_a, 15+3, cpu.SDWAM[n].R);
231 SETL1 (bank_a, 16+3, cpu.SDWAM[n].E);
232 SETL1 (bank_a, 17+3, cpu.SDWAM[n].W);
233 SETL1 (bank_a, 18+3, cpu.SDWAM[n].P);
234 SETL1 (bank_a, 19+3, cpu.SDWAM[n].U);
235 SETL1 (bank_a, 20+3, cpu.SDWAM[n].G);
236 SETL (bank_a, 22+3, cpu.SDWAM[n].EB, 14);
237 }
238 }
239 break;
240
241
242 case 5:
243 {
244 if (cpu.APU_panel_scroll_select_ul_sw)
245 {
246
247 SETL (bank_a, 0+3, cpu.DSBR.ADDR, 24);
248 }
249 else
250 {
251 SETL (bank_a, 1+3, cpu.SDWAM[n].BOUND, 14);
252 SETL1 (bank_a, 15+3, cpu.SDWAM[n].R);
253 SETL1 (bank_a, 16+3, cpu.SDWAM[n].E);
254 SETL1 (bank_a, 17+3, cpu.SDWAM[n].W);
255 SETL1 (bank_a, 18+3, cpu.SDWAM[n].P);
256 SETL1 (bank_a, 19+3, cpu.SDWAM[n].U);
257 SETL1 (bank_a, 20+3, cpu.SDWAM[n].G);
258 SETL (bank_a, 22+3, cpu.SDWAM[n].EB, 14);
259 }
260 }
261 break;
262
263
264 case 6:
265 {
266 if (cpu.APU_panel_scroll_select_ul_sw)
267 {
268
269
270
271
272 SETL (bank_a, 0+3, cpu.SDW0.ADDR, 24);
273 SETL (bank_a, 24+3, cpu.SDW0.R1, 3);
274 SETL (bank_a, 27+3, cpu.SDW0.R2, 3);
275 SETL (bank_a, 30+3, cpu.SDW0.R2, 3);
276 }
277 else
278 {
279
280
281
282
283
284
285
286
287 SETL (bank_a, 1+3, cpu.SDW0.BOUND, 14);
288 SETL1 (bank_a, 15+3, cpu.SDW0.R);
289 SETL1 (bank_a, 16+3, cpu.SDW0.E);
290 SETL1 (bank_a, 17+3, cpu.SDW0.W);
291 SETL1 (bank_a, 18+3, cpu.SDW0.P);
292 SETL1 (bank_a, 19+3, cpu.SDW0.U);
293 SETL1 (bank_a, 20+3, cpu.SDW0.G);
294 SETL (bank_a, 22+3, cpu.SDW0.EB, 14);
295 }
296 }
297 break;
298
299
300
301 case 7:
302 {
303 if (cpu.APU_panel_scroll_select_ul_sw)
304 {
305
306
307 SETL (bank_a, 0+3, cpu.APUDataBusOffset, 18);
308
309 }
310 else
311 {
312
313
314 SETL (bank_a, 0+3, cpu.APUDataBusAddr, 24);
315 }
316 }
317 break;
318
319
320 case 8:
321 {
322 if (cpu.APU_panel_scroll_select_ul_sw)
323 {
324
325
326 SETL (bank_a, 0+3, cpu.APUMemAddr, 24);
327 SETL (bank_a, 24+3, cpu.rRALR, 3);
328 }
329 else
330 {
331
332
333
334
335 word16 flts = (word16) cpu.acvFaults;
336 SETL (bank_a, 3+3, flts, 16);
337
338
339 word11 cyc = (cpu.cu.APUCycleBits >> 3) & MASK11;
340 SETL (bank_a, 18+3, cyc, 11);
341 }
342 }
343 break;
344
345
346 case 9:
347 {
348 if (cpu.APU_panel_scroll_select_ul_sw)
349 {
350
351
352
353 n &= 7;
354 SETL (bank_a, 3+3, cpu.PAR[n].SNR, 15);
355 SETL (bank_a, 18+3, cpu.PAR[n].RNR, 3);
356 SETL (bank_a, 33+3, cpu.RSDWH_R1, 3);
357 }
358 else
359 {
360
361
362
363
364
365
366 SETL1 (bank_a, 0+3, cpu.SDW0.DF);
367 SETL (bank_a, 1+3, cpu.SDW0.FC, 2);
368
369
370 word16 flts = (word16) cpu.acvFaults;
371 SETL (bank_a, 3+3, flts, 16);
372 SETL (bank_a, 30+3, cpu.TPR.TBR, 6);
373 }
374 }
375 break;
376
377
378 case 10:
379 {
380 if (cpu.APU_panel_scroll_select_ul_sw)
381 {
382
383 SETL (bank_a, 0+3, cpu.PPR.PRR, 3);
384 SETL (bank_a, 3+3, cpu.PPR.PSR, 15);
385 SETL1 (bank_a, 18+3, cpu.PPR.P);
386 SETL1 (bank_a, 19+3, cpu.cu.XSF);
387 SETL1 (bank_a, 20+3, cpu.cu.SDWAMM);
388 SETL1 (bank_a, 21+3, cpu.cu.SD_ON);
389 SETL1 (bank_a, 22+3, cpu.cu.PTWAMM);
390 SETL1 (bank_a, 23+3, cpu.cu.PT_ON);
391 SETL (bank_a, 24+3, cpu.cu.APUCycleBits, 12);
392 }
393 else
394 {
395
396 SETL1 (bank_a, 0+3, cpu.cu.IRO_ISN);
397 SETL1 (bank_a, 1+3, cpu.cu.OEB_IOC);
398 SETL1 (bank_a, 2+3, cpu.cu.EOFF_IAIM);
399 SETL1 (bank_a, 3+3, cpu.cu.ORB_ISP);
400 SETL1 (bank_a, 4+3, cpu.cu.ROFF_IPR);
401 SETL1 (bank_a, 5+3, cpu.cu.OWB_NEA);
402 SETL1 (bank_a, 6+3, cpu.cu.WOFF_OOB);
403 SETL1 (bank_a, 7+3, cpu.cu.NO_GA);
404 SETL1 (bank_a, 8+3, cpu.cu.OCB);
405 SETL1 (bank_a, 9+3, cpu.cu.OCALL);
406 SETL1 (bank_a, 10+3, cpu.cu.BOC);
407 SETL1 (bank_a, 11+3, cpu.cu.PTWAM_ER);
408 SETL1 (bank_a, 12+3, cpu.cu.CRT);
409 SETL1 (bank_a, 13+3, cpu.cu.RALR);
410 SETL1 (bank_a, 14+3, cpu.cu.SDWAM_ER);
411 SETL1 (bank_a, 15+3, cpu.cu.OOSB);
412 SETL1 (bank_a, 16+3, cpu.cu.PARU);
413 SETL1 (bank_a, 17+3, cpu.cu.PARL);
414 SETL1 (bank_a, 18+3, cpu.cu.ONC1);
415 SETL1 (bank_a, 19+3, cpu.cu.ONC2);
416 SETL (bank_a, 20+3, cpu.cu.IA, 4);
417 SETL (bank_a, 24+3, cpu.cu.IACHN, 3);
418 SETL (bank_a, 27+3, cpu.cu.CNCHN, 3);
419 SETL (bank_a, 30+3, cpu.cu.FI_ADDR, 5);
420 word1 fi = cpu.cycle == INTERRUPT_cycle ? 0 : 1;
421 SETL1 (bank_a, 35+3, fi);
422 }
423 }
424 break;
425
426
427 case 11:
428 {
429 if (cpu.APU_panel_scroll_select_ul_sw)
430 {
431
432 SETL (bank_a, 0+3, cpu.TPR.TRR, 3);
433 SETL (bank_a, 3+3, cpu.TPR.TSR, 15);
434 SETL (bank_a, 27+3, (word3) cpu.switches.cpu_num, 3);
435 SETL (bank_a, 30+3, cpu.cu.delta, 6);
436 }
437 else
438 {
439
440
441
442
443
444
445
446 SETL (bank_a, 30+3, cpu.TPR.TBR, 6);
447
448 }
449 }
450 break;
451
452
453 case 12:
454 {
455 if (cpu.APU_panel_scroll_select_ul_sw)
456 {
457
458 }
459 else
460 {
461
462 SETL (bank_a, 0+3, cpu.TPR.CA, 18);
463 SETL1 (bank_a, 18+3, cpu.cu.repeat_first);
464 SETL1 (bank_a, 19+3, cpu.cu.rpt);
465 SETL1 (bank_a, 20+3, cpu.cu.rd);
466 SETL1 (bank_a, 21+3, cpu.cu.rl);
467 SETL1 (bank_a, 22+3, cpu.cu.pot);
468
469 SETL1 (bank_a, 24+3, cpu.cu.xde);
470 SETL1 (bank_a, 25+3, cpu.cu.xdo);
471
472 SETL1 (bank_a, 27+3, cpu.cu.rfi);
473
474 SETL1 (bank_a, 29+3, cpu.cu.FIF);
475 SETL (bank_a, 30+3, cpu.cu.CT_HOLD, 6);
476 }
477 }
478 break;
479
480
481
482
483
484 case 15:
485 {
486 if (cpu.APU_panel_scroll_select_ul_sw)
487 {
488
489 SETL (bank_a, 0+3, cpu.cu.IWB, 36);
490 }
491 else
492 {
493
494 SETL (bank_a, 0+3, cpu.cu.IRODD, 36);
495 }
496 }
497 break;
498
499 default:
500 {
501 time_t t = time (NULL);
502 SETL (bank_a, 0+3, (word36) t, 36);
503 }
504 break;
505 }
506 }
507
508 static void update_cpts (void)
509 {
510
511
512 switch (cpu.CP_panel_wheel_sw)
513 {
514 case 0:
515 SETLA (bank_b, 0+3, cpu.cpt [0], 36);
516 SETLA (bank_c, 0+3, cpu.cpt [1], 36);
517 break;
518 case 1:
519 SETLA (bank_b, 0+3, cpu.cpt [2], 36);
520 SETLA (bank_c, 0+3, cpu.cpt [3], 36);
521 break;
522 case 2:
523 SETLA (bank_b, 0+3, cpu.cpt [4], 36);
524 SETLA (bank_c, 0+3, cpu.cpt [5], 36);
525 break;
526 case 3:
527 SETLA (bank_b, 0+3, cpu.cpt [6], 36);
528 SETLA (bank_c, 0+3, cpu.cpt [7], 36);
529 break;
530 case 4:
531 SETLA (bank_b, 0+3, cpu.cpt [8], 36);
532 SETLA (bank_c, 0+3, cpu.cpt [9], 36);
533 break;
534 case 5:
535 SETLA (bank_b, 0+3, cpu.cpt [10], 36);
536 SETLA (bank_c, 0+3, cpu.cpt [11], 36);
537 break;
538 case 6:
539 SETLA (bank_b, 0+3, cpu.cpt [12], 36);
540 SETLA (bank_c, 0+3, cpu.cpt [13], 36);
541 break;
542 case 7:
543 SETLA (bank_b, 0+3, cpu.cpt [14], 36);
544 SETLA (bank_c, 0+3, cpu.cpt [15], 36);
545 break;
546 case 8:
547 SETLA (bank_b, 0+3, cpu.cpt [16], 36);
548 SETLA (bank_c, 0+3, cpu.cpt [17], 36);
549 break;
550 case 9:
551 SETLA (bank_b, 0+3, cpu.cpt [18], 36);
552 SETLA (bank_c, 0+3, cpu.cpt [19], 36);
553 break;
554 case 10:
555 SETLA (bank_b, 0+3, cpu.cpt [20], 36);
556 SETLA (bank_c, 0+3, cpu.cpt [21], 36);
557 break;
558 case 11:
559 SETLA (bank_b, 0+3, cpu.cpt [22], 36);
560 SETLA (bank_c, 0+3, cpu.cpt [23], 36);
561 break;
562 case 12:
563 SETLA (bank_b, 0+3, cpu.cpt [24], 36);
564 SETLA (bank_c, 0+3, cpu.cpt [25], 36);
565 break;
566 case 13:
567 SETLA (bank_b, 0+3, cpu.cpt [26], 36);
568 SETLA (bank_c, 0+3, cpu.cpt [27], 36);
569 break;
570 }
571
572 SETL1 (bank_b, 36+3, cpu.panel4_red_ready_light_state);
573
574 SETL1 (bank_c, 36+3, cpu.panel7_enabled_light_state);
575 }
576
577 static void update_data_1 (void)
578 {
579
580 SETL (bank_d, 0+3, cpu.portAddr [cpu.DATA_panel_d1_sw], 24);
581 SETL (bank_e, 0+3, cpu.portData [cpu.DATA_panel_d1_sw], 36);
582 }
583
584 static void update_data_2 (void)
585 {
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600 SETL (bank_d, 0+3, cpu.PAR[cpu.DATA_panel_d2_sw].PR_BITNO, 6);
601 SETL (bank_d, 6+3, cpu.PAR[cpu.DATA_panel_d2_sw].SNR, 15);
602 SETL (bank_d, 18+3, cpu.PAR[cpu.DATA_panel_d2_sw].WORDNO, 18);
603
604 SETL (bank_e, 0+3, cpu.PAR[cpu.DATA_panel_d2_sw].WORDNO, 18);
605 SETL (bank_e, 18+3, cpu.PAR[cpu.DATA_panel_d2_sw].AR_CHAR, 2);
606 SETL (bank_e, 20+3, cpu.PAR[cpu.DATA_panel_d2_sw].AR_BITNO, 4);
607 }
608
609 static void update_data_3 (void)
610 {
611
612
613 switch (cpu.DATA_panel_d3_sw)
614 {
615 case 0:
616
617
618
619 SETL (bank_d, 0+3, cpu.du.D1_PTR_W, 18);
620
621
622
623 break;
624 case 1:
625
626
627
628 SETL (bank_d, 0+3, cpu.du.D2_PTR_W, 18);
629
630
631
632 break;
633 case 2:
634
635
636
637 SETL (bank_d, 0+3, cpu.du.D3_PTR_W, 18);
638
639
640
641 break;
642 case 3:
643
644 break;
645 case 4:
646
647 break;
648 case 5:
649
650 break;
651 case 6:
652
653
654 SETL (bank_e, 0+3, cpu.rTR, 27);
655 break;
656 case 7:
657
658 break;
659 case 8:
660
661
662 SETL (bank_d, 0+3, IWB_IRODD, 36);
663 SETL (bank_e, 0+3, cpu.PPR.IC, 18);
664 break;
665 case 9:
666
667 SETL (bank_e, 0+3, cpu.AM_tally, 12);
668 break;
669 }
670 }
671
672 static void update_data_4 (void)
673 {
674
675 }
676
677 static void update_data_5 (void)
678 {
679 switch (cpu.DATA_panel_d3_sw)
680 {
681 case 0:
682
683 break;
684 case 1:
685
686 break;
687 case 2:
688
689 break;
690 case 3:
691
692 break;
693 case 4:
694
695 break;
696 case 5:
697
698 break;
699 case 6:
700
701 break;
702 case 7:
703 SETL (bank_d, 0+3, cpu.du.CHTALLY, 24);
704 break;
705 case 8:
706
707 break;
708 }
709 }
710
711 static void update_data_6 (void)
712 {
713
714 }
715
716 static void update_data_7 (void)
717 {
718
719 }
720
721 static void update_data_scroll (void)
722 {
723 switch (cpu.DATA_panel_wheel_sw)
724 {
725 case 0:
726 {
727 SETL (bank_d, 0+3, cpu.rA, 36);
728 SETL (bank_e, 0+3, cpu.rQ, 36);
729 }
730 break;
731
732 case 1:
733 {
734 SETL (bank_d, 0+3, cpu.rX[0], 18);
735 SETL (bank_d, 18+3, cpu.rX[1], 18);
736 SETL (bank_e, 0+3, cpu.rX[2], 18);
737 SETL (bank_e, 18+3, cpu.rX[3], 18);
738 }
739 break;
740
741 case 2:
742 {
743 SETL (bank_d, 0+3, cpu.rX[4], 18);
744 SETL (bank_d, 18+3, cpu.rX[5], 18);
745 SETL (bank_e, 0+3, cpu.rX[6], 18);
746 SETL (bank_e, 18+3, cpu.rX[7], 18);
747 }
748 break;
749
750 case 3:
751 {
752 SETL (bank_d, 0+3, cpu.rE, 8);
753 SETL (bank_d, 8+3, cpu.rA >> 8, 36 - 8);
754 SETL (bank_e, 0+3, cpu.rA, 8);
755 SETL (bank_e, 0+3, cpu.rQ >> 8, 36 - 8);
756 }
757 break;
758
759 case 4:
760 {
761
762 SETL (bank_d, 0+3, cpu.rE, 8);
763 }
764 break;
765
766 case 5:
767 {
768
769 }
770 break;
771
772 case 6:
773 {
774
775
776 SETL (bank_d, 0+3, cpu.history[L68_APU_HIST_REG][cpu.DATA_panel_hr_sel_sw][0], 36);
777 SETL (bank_e, 0+3, cpu.history[L68_APU_HIST_REG][cpu.DATA_panel_hr_sel_sw][1], 36);
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821 }
822 break;
823
824 case 7:
825 {
826
827
828 SETL (bank_e, 0+3, cpu.ou.directOperand, 36);
829
830 }
831 break;
832
833 case 8:
834 {
835
836 SETL (bank_d, 0+3, cpu.faultRegister [0] & 0777777777760LLU, 36);
837
838 }
839 break;
840
841 case 9:
842 {
843
844 SETL (bank_d, 0+3, cpu.MR.r, 36);
845 memcpy (bank_e, bank_d, sizeof (bank_e));
846 }
847 break;
848
849 case 10:
850 {
851
852 SETL (bank_d, 0+3, cpu.history[CU_HIST_REG][cpu.DATA_panel_hr_sel_sw][0], 36);
853 SETL (bank_e, 0+3, cpu.history[CU_HIST_REG][cpu.DATA_panel_hr_sel_sw][1], 36);
854 }
855 break;
856
857 case 11:
858 {
859
860 SETL (bank_d, 0+3, cpu.history[L68_OU_HIST_REG][cpu.DATA_panel_hr_sel_sw][0], 36);
861 SETL (bank_e, 0+3, cpu.history[L68_OU_HIST_REG][cpu.DATA_panel_hr_sel_sw][1], 36);
862 }
863 break;
864
865 case 12:
866 {
867
868 SETL (bank_d, 0+3, cpu.history[L68_DU_HIST_REG][cpu.DATA_panel_hr_sel_sw][0], 36);
869 SETL (bank_e, 0+3, cpu.history[L68_DU_HIST_REG][cpu.DATA_panel_hr_sel_sw][1], 36);
870 }
871 break;
872
873 case 13:
874 {
875
876 SETL (bank_d, 0+3, cpu.cu.IWB, 36);
877 SETL (bank_e, 0+3, cpu.cu.IRODD, 36);
878 }
879 break;
880 }
881 }
882
883 static void update_data (void)
884 {
885 switch (cpu.DATA_panel_ds_sw)
886 {
887 case 0:
888 update_data_1 ();
889 break;
890 case 1:
891 update_data_2 ();
892 break;
893 case 2:
894 update_data_3 ();
895 break;
896 case 3:
897 update_data_scroll ();
898 break;
899 case 4:
900 update_data_4 ();
901 break;
902 case 5:
903 update_data_5 ();
904 break;
905 case 6:
906 update_data_6 ();
907 break;
908 case 7:
909 update_data_7 ();
910 break;
911 default:
912 break;
913 }
914 }
915
916 static void update_display (void)
917 {
918 SETL (bank_f, 0, cpu.cu.IR, 18);
919 SETL (bank_f, 18, cpu.history_cyclic [0], 4);
920 SETL (bank_f, 22, cpu.history_cyclic [1], 4);
921 SETL (bank_f, 26, cpu.history_cyclic [2], 4);
922 SETL (bank_f, 30, cpu.history_cyclic [3], 4);
923 SETL (bank_g, 0, cpu.PPR.IC, 18);
924
925
926 SETL (bank_g, 18, cpu.portSelect == 0 ? 1 : 0, 1);
927 SETL (bank_g, 19, cpu.portSelect == 1 ? 1 : 0, 1);
928 SETL (bank_g, 20, cpu.portSelect == 2 ? 1 : 0, 1);
929 SETL (bank_g, 21, cpu.portSelect == 3 ? 1 : 0, 1);
930
931
932
933
934 bool exc_int = cpu.cycle == INTERRUPT_cycle ||
935 cpu.cycle == INTERRUPT_EXEC_cycle
936 ;
937 SETL (bank_g, 34, exc_int ? 1 : 0, 1);
938
939
940 bool ins_fch = cpu.cycle == INTERRUPT_cycle ||
941 cpu.cycle == FAULT_cycle ||
942 cpu.cycle == FETCH_cycle;
943 SETL (bank_g, 35, ins_fch ? 1 : 0, 1);
944
945
946
947
948
949
950
951 SETL (bank_h, 3, cpu.cu.IWB, 36);
952
953
954 SETL (bank_i, 3, cpu.IWRAddr, 36);
955
956
957 SETL (bank_j, 3, cpu.PPR.IC, 18);
958
959
960
961 word2 pia_poa = cpu.prepare_state >> 6;
962 SETL (bank_j, 21, pia_poa, 2);
963 SETL (bank_j, 23, cpu.du.POL, 2);
964 SETL (bank_j, 24, cpu.du.POP, 1);
965 SETL (bank_j, 25, cpu.prepare_state, 6);
966
967 SETL (bank_j, 31, cpu.wasXfer, 1);
968 SETL (bank_j, 32, cpu.cu.xde, 1);
969 SETL (bank_j, 33, cpu.cu.xdo, 1);
970 SETL1 (bank_j, 34, USE_IRODD);
971 SETL (bank_j, 35, cpu.cu.rpt, 1);
972 SETL (bank_j, 36, cpu.cu.rl, 1);
973 SETL (bank_j, 37, cpu.cu.rd, 1);
974
975 SETL (bank_j, 38, TSTF (cpu.cu.IR, I_NBAR), 1);
976
977
978
979
980
981 SETL (bank_k, 21, cpu.dataMode, 7);
982
983
984
985
986
987
988
989
990
991 SETL (bank_l, 3, cpu.TPR.CA, 18);
992
993 SETL (bank_m, 3, cpu.ou.RS, 9);
994 SETL (bank_m, 12, cpu.ou.characterOperandSize ? 1 : 0, 1);
995 SETL (bank_m, 13, cpu.ou.characterOperandOffset & MASK3, 3);
996 SETL (bank_m, 16, cpu.ou.crflag, 1);
997 SETL (bank_m, 17, cpu.ou.directOperandFlag ? 1 : 0, 1);
998 SETL (bank_m, 18, cpu.ou.RS, 9);
999 SETL (bank_m, 27, cpu.ou.cycle, 9);
1000 SETL (bank_m, 36, cpu.ou.RB1_FULL, 1);
1001 SETL (bank_m, 37, cpu.ou.RP_FULL, 1);
1002 SETL (bank_m, 38, cpu.ou.RS_FULL, 1);
1003
1004
1005
1006 SETL1 (bank_n, 3, cpu.du.cycle2 & du2_DUD);
1007
1008
1009
1010
1011 SETL1 (bank_n, 7, cpu.du.cycle1 & du1_FA_I1);
1012
1013
1014
1015 SETL1 (bank_n, 10, cpu.du.cycle2 & du2_DGDB);
1016
1017 SETL1 (bank_n, 11, cpu.du.cycle2 & du2_DGBD);
1018
1019
1020
1021 SETL1 (bank_n, 14, cpu.du.cycle1 & du1_FA_I2);
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036 SETL1 (bank_n, 28, cpu.du.cycle1 & du1_FA_I3);
1037
1038
1039
1040 SETL1 (bank_n, 31, cpu.du.cycle2 & du2_GSTR);
1041
1042
1043 SETL1 (bank_n, 32, cpu.du.cycle2 & du2_ANSTR);
1044
1045
1046
1047
1048
1049
1050 SETL1 (bank_n, 39, cpu.du.cycle2 & du2_FRND);
1051
1052
1053 SETL1 (bank_o, 3, cpu.du.cycle2 & du2_ANLD1);
1054
1055 SETL1 (bank_o, 4, cpu.du.cycle2 & du2_ANLD2);
1056
1057 SETL1 (bank_o, 5, cpu.du.cycle2 & du2_NLD1);
1058
1059 SETL1 (bank_o, 6, cpu.du.cycle2 & du2_NLD2);
1060
1061 SETL1 (bank_o, 7, cpu.du.cycle2 & du2_LDWRT1);
1062
1063 SETL1 (bank_o, 8, cpu.du.cycle2 & du2_LDWRT2);
1064
1065
1066
1067
1068 SETL1 (bank_o, 12, cpu.du.cycle2 & du2_FEXOP);
1069
1070 SETL1 (bank_o, 13, cpu.du.cycle2 & du2_FBLNK);
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089 SETL1 (bank_o, 31, !(cpu.du.cycle2 & du2_nFLEN_128));
1090
1091 SETL1 (bank_o, 32, !(cpu.du.cycle2 & du2_nFEND_SEQ));
1092
1093
1094
1095
1096
1097
1098
1099
1100 SETL (bank_p, 3, cpu.apu.state, 34);
1101
1102
1103 }
1104
1105 #define Z(z) memset (z, 0, sizeof (z))
1106 #define O(z) memset (z, 1, sizeof (z))
1107
1108 #define nibble(bank, n) \
1109 '@' + \
1110 (bank [n + 0] ? 020 : 0) + \
1111 (bank [n + 1] ? 010 : 0) + \
1112 (bank [n + 2] ? 004 : 0) + \
1113 (bank [n + 3] ? 002 : 0) + \
1114 (bank [n + 4] ? 001 : 0)
1115
1116 #define nibbles(bank) nibble (bank, 0), nibble (bank, 5), \
1117 nibble (bank, 10), nibble (bank, 15), \
1118 nibble (bank, 20), nibble (bank, 25), \
1119 nibble (bank, 30), nibble (bank, 35)
1120
1121 static void lwrite (FD fd, const void * buf, size_t count)
1122 {
1123 #if defined(__MINGW64__) || defined(__MINGW32__)
1124 DWORD bytes_written;
1125 if(!WriteFile(fd, buf, count, &bytes_written, NULL))
1126 {
1127 fprintf(stderr, "Error\n");
1128 CloseHandle(fd);
1129 exit (1);
1130 }
1131 #else
1132 write (fd, buf, count);
1133 #endif
1134 }
1135
1136 static void send_lamp_data (FD fd)
1137 {
1138 char buf [129];
1139 sprintf (buf, "0%c%c%c%c%c%c%c%c\n", nibbles (bank_a));
1140 lwrite (fd, buf, 10);
1141 sprintf (buf, "1%c%c%c%c%c%c%c%c\n", nibbles (bank_b));
1142 lwrite (fd, buf, 10);
1143 sprintf (buf, "2%c%c%c%c%c%c%c%c\n", nibbles (bank_c));
1144 lwrite (fd, buf, 10);
1145 sprintf (buf, "3%c%c%c%c%c%c%c%c\n", nibbles (bank_d));
1146 lwrite (fd, buf, 10);
1147 sprintf (buf, "4%c%c%c%c%c%c%c%c\n", nibbles (bank_e));
1148 lwrite (fd, buf, 10);
1149 sprintf (buf, "5%c%c%c%c%c%c%c%c\n", nibbles (bank_f));
1150 lwrite (fd, buf, 10);
1151 sprintf (buf, "6%c%c%c%c%c%c%c%c\n", nibbles (bank_g));
1152 lwrite (fd, buf, 10);
1153 sprintf (buf, "7%c%c%c%c%c%c%c%c\n", nibbles (bank_h));
1154 lwrite (fd, buf, 10);
1155 sprintf (buf, "8%c%c%c%c%c%c%c%c\n", nibbles (bank_i));
1156 lwrite (fd, buf, 10);
1157 sprintf (buf, "9%c%c%c%c%c%c%c%c\n", nibbles (bank_j));
1158 lwrite (fd, buf, 10);
1159 sprintf (buf, ":%c%c%c%c%c%c%c%c\n", nibbles (bank_k));
1160 lwrite (fd, buf, 10);
1161 sprintf (buf, ";%c%c%c%c%c%c%c%c\n", nibbles (bank_l));
1162 lwrite (fd, buf, 10);
1163 sprintf (buf, "<%c%c%c%c%c%c%c%c\n", nibbles (bank_m));
1164 lwrite (fd, buf, 10);
1165 sprintf (buf, "=%c%c%c%c%c%c%c%c\n", nibbles (bank_n));
1166 lwrite (fd, buf, 10);
1167 sprintf (buf, ">%c%c%c%c%c%c%c%c\n", nibbles (bank_o));
1168 lwrite (fd, buf, 10);
1169 sprintf (buf, "?%c%c%c%c%c%c%c%c\n", nibbles (bank_p));
1170 lwrite (fd, buf, 10);
1171 #if defined(__MINGW64__) || defined(__MINGW32__)
1172 #else
1173 syncfs (fd);
1174 #endif
1175 }
1176
1177 static void set_message (void)
1178 {
1179 int nchars = (int) strlen (message);
1180 int nbits = nchars * 8;
1181 int r, c;
1182
1183 #define start_row 7
1184 for (r = 0; r < 0 + 8; r ++)
1185 {
1186 for (c = 0; c < ncols; c ++)
1187 {
1188 int c2 = (c + c_offset) % nbits;
1189 int char2 = c2 / 8;
1190 unsigned char fontbits = font8x8_basic [(unsigned int) message [(unsigned int) char2]] [r];
1191 int whichbit = c2 % 8;
1192 unsigned char bit1 = fontbits & (1 << ( whichbit));
1193 banks [r + start_row] [c] = !!bit1;
1194
1195 }
1196 }
1197 c_offset = (c_offset + 1) % nbits;
1198 }
1199
1200 static int time_handler (FD fd)
1201 {
1202
1203 if (0)
1204 {
1205 int sec1 = (int) (clock () / CLOCKS_PER_SEC) & 1;
1206 if (sec1)
1207 {
1208 Z (bank_a);
1209 Z (bank_b);
1210 Z (bank_c);
1211 Z (bank_d);
1212 Z (bank_e);
1213 Z (bank_f);
1214 Z (bank_g);
1215 Z (bank_h);
1216 Z (bank_i);
1217 Z (bank_j);
1218 Z (bank_k);
1219 Z (bank_l);
1220 Z (bank_m);
1221 Z (bank_n);
1222 Z (bank_o);
1223 Z (bank_p);
1224 }
1225 else
1226 {
1227 O (bank_a);
1228 O (bank_b);
1229 O (bank_c);
1230 O (bank_d);
1231 O (bank_e);
1232 O (bank_f);
1233 O (bank_g);
1234 O (bank_h);
1235 O (bank_i);
1236 O (bank_j);
1237 O (bank_k);
1238 O (bank_l);
1239 O (bank_m);
1240 O (bank_n);
1241 O (bank_o);
1242 O (bank_p);
1243 }
1244 send_lamp_data (fd);
1245 return TRUE;
1246 }
1247
1248 Z (bank_a);
1249 Z (bank_b);
1250 Z (bank_c);
1251 Z (bank_d);
1252 Z (bank_e);
1253 Z (bank_f);
1254 Z (bank_g);
1255 Z (bank_h);
1256 Z (bank_i);
1257 Z (bank_j);
1258 Z (bank_k);
1259 Z (bank_l);
1260 Z (bank_m);
1261 Z (bank_n);
1262 Z (bank_o);
1263 Z (bank_p);
1264
1265 update_apu ();
1266 update_cpts ();
1267 update_data ();
1268 update_display ();
1269 if (message [0])
1270 set_message ();
1271 send_lamp_data (fd);
1272 return TRUE;
1273 }
1274
1275 static unsigned char port_buf [9];
1276 static bool port_data [40];
1277 static int port_state = 0;
1278
1279 static void update_port (FD port_fd)
1280 {
1281 more:;
1282 #if !defined(__MINGW64__)
1283 # if !defined(__MINGW32__)
1284 if (poll (& (struct pollfd) { .fd = port_fd, .events = POLLIN }, 1, 0) == 1)
1285 # endif
1286 #endif
1287 {
1288 unsigned char ch;
1289 #if defined(__MINGW64__) || defined(__MINGW32__)
1290 DWORD bytes_read;
1291 ReadFile(port_fd, &ch, 1, &bytes_read, NULL);
1292 ssize_t nr = bytes_read;
1293 #else
1294 ssize_t nr = read (port_fd, & ch, 1);
1295 #endif
1296 if (nr != 1)
1297 {
1298 static int first = 1;
1299 if (first)
1300 {
1301 perror ("read");
1302 first = 0;
1303 }
1304 port_state = 0;
1305 return;
1306
1307 }
1308
1309 if (ch & 040)
1310 {
1311 port_state = 0;
1312 }
1313 if (port_state < 0 || port_state > 8)
1314 {
1315
1316 port_state = 0;
1317 return;
1318 }
1319 port_buf [port_state ++] = ch;
1320 if (port_state < 9)
1321 goto more;
1322
1323
1324
1325
1326
1327
1328
1329 port_data [ 0] = !! (port_buf [1] & 020);
1330 port_data [ 1] = !! (port_buf [1] & 010);
1331 port_data [ 2] = !! (port_buf [1] & 004);
1332 port_data [ 3] = !! (port_buf [1] & 002);
1333 port_data [ 4] = !! (port_buf [1] & 001);
1334
1335 port_data [ 5] = !! (port_buf [2] & 020);
1336 port_data [ 6] = !! (port_buf [2] & 010);
1337 port_data [ 7] = !! (port_buf [2] & 004);
1338 port_data [ 8] = !! (port_buf [2] & 002);
1339 port_data [ 9] = !! (port_buf [2] & 001);
1340
1341 port_data [10] = !! (port_buf [3] & 020);
1342 port_data [11] = !! (port_buf [3] & 010);
1343 port_data [12] = !! (port_buf [3] & 004);
1344 port_data [13] = !! (port_buf [3] & 002);
1345 port_data [14] = !! (port_buf [3] & 001);
1346
1347 port_data [15] = !! (port_buf [4] & 020);
1348 port_data [16] = !! (port_buf [4] & 010);
1349 port_data [17] = !! (port_buf [4] & 004);
1350 port_data [18] = !! (port_buf [4] & 002);
1351 port_data [19] = !! (port_buf [4] & 001);
1352
1353 port_data [20] = !! (port_buf [5] & 020);
1354 port_data [21] = !! (port_buf [5] & 010);
1355 port_data [22] = !! (port_buf [5] & 004);
1356 port_data [23] = !! (port_buf [5] & 002);
1357 port_data [24] = !! (port_buf [5] & 001);
1358
1359 port_data [25] = !! (port_buf [6] & 020);
1360 port_data [26] = !! (port_buf [6] & 010);
1361 port_data [27] = !! (port_buf [6] & 004);
1362 port_data [28] = !! (port_buf [6] & 002);
1363 port_data [29] = !! (port_buf [6] & 001);
1364
1365 port_data [30] = !! (port_buf [7] & 020);
1366 port_data [31] = !! (port_buf [7] & 010);
1367 port_data [32] = !! (port_buf [7] & 004);
1368 port_data [33] = !! (port_buf [7] & 002);
1369 port_data [34] = !! (port_buf [7] & 001);
1370
1371 port_data [35] = !! (port_buf [8] & 020);
1372 port_data [36] = !! (port_buf [8] & 010);
1373 port_data [37] = !! (port_buf [8] & 004);
1374 port_data [38] = !! (port_buf [8] & 002);
1375 port_data [39] = !! (port_buf [8] & 001);
1376
1377
1378
1379
1380
1381 port_state = 0;
1382
1383 #define SETS(word, data, from, n) \
1384 for (uint i = 0; i < (n); i ++) \
1385 if (data [from + i]) \
1386 (word) |= 1llu << ((n) - 1 - i); \
1387 else \
1388 (word) &= ~ (1llu << ((n) - 1 - i))
1389
1390 switch (port_buf [0])
1391 {
1392 case '0':
1393 SETS (cpu.APU_panel_segno_sw, port_data, 0, 15);
1394 SETS (cpu.APU_panel_enable_match_ptw_sw, port_data, 15, 1);
1395 SETS (cpu.APU_panel_enable_match_sdw_sw, port_data, 16, 1);
1396 SETS (cpu.APU_panel_scroll_select_ul_sw, port_data, 17, 1);
1397 SETS (cpu.APU_panel_scroll_select_n_sw, port_data, 18, 4);
1398 SETS (cpu.APU_panel_scroll_wheel_sw, port_data, 22, 4);
1399 break;
1400
1401 case '1':
1402 SETS (cpu.switches.data_switches, port_data, 0, 36);
1403 break;
1404
1405 case '2':
1406 SETS (cpu.switches.addr_switches, port_data, 0, 18);
1407 SETS (cpu.APU_panel_enter_sw, port_data, 18, 1);
1408 SETS (cpu.APU_panel_display_sw, port_data, 19, 1);
1409 SETS (cpu.panelInitialize, port_data, 20, 1);
1410 SETS (cpu.CP_panel_wheel_sw, port_data, 21, 4);
1411 break;
1412
1413 case '3':
1414 SETS (cpu.DATA_panel_ds_sw, port_data, 0, 4);
1415
1416
1417
1418
1419 switch (cpu.DATA_panel_ds_sw)
1420 {
1421 case 0:
1422 SETS (cpu.DATA_panel_d1_sw, port_data, 4, 4);
1423 break;
1424 case 1:
1425 SETS (cpu.DATA_panel_d2_sw, port_data, 4, 4);
1426 break;
1427 case 2:
1428 SETS (cpu.DATA_panel_d3_sw, port_data, 4, 4);
1429 break;
1430 case 3:
1431 SETS (cpu.DATA_panel_wheel_sw, port_data, 4, 4);
1432 break;
1433 case 4:
1434 SETS (cpu.DATA_panel_d4_sw, port_data, 4, 4);
1435 break;
1436 case 5:
1437 SETS (cpu.DATA_panel_d5_sw, port_data, 4, 4);
1438 break;
1439 case 6:
1440 SETS (cpu.DATA_panel_d6_sw, port_data, 4, 4);
1441 break;
1442 case 7:
1443 SETS (cpu.DATA_panel_d7_sw, port_data, 4, 4);
1444 break;
1445 }
1446 SETS (cpu.DATA_panel_addr_stop_sw, port_data, 8, 4);
1447 SETS (cpu.DATA_panel_enable_sw, port_data, 12, 1);
1448 SETS (cpu.DATA_panel_validate_sw, port_data, 13, 1);
1449 SETS (cpu.DATA_panel_auto_fast_sw, port_data, 14, 1);
1450 SETS (cpu.DATA_panel_auto_slow_sw, port_data, 15, 1);
1451 SETS (cpu.DATA_panel_cycle_sw, port_data, 16, 3);
1452 SETS (cpu.DATA_panel_step_sw, port_data, 19, 1);
1453 SETS (cpu.DATA_panel_s_trig_sw, port_data, 20, 1);
1454 SETS (cpu.DATA_panel_execute_sw, port_data, 21, 1);
1455 SETS (cpu.DATA_panel_scope_sw, port_data, 22, 1);
1456 SETS (cpu.DATA_panel_init_sw, port_data, 23, 1);
1457 SETS (cpu.DATA_panel_exec_sw, port_data, 24, 1);
1458 SETS (cpu.DATA_panel_hr_sel_sw, port_data, 25, 4);
1459 SETS (cpu.DATA_panel_trackers_sw, port_data, 29, 4);
1460 break;
1461 }
1462 goto more;
1463 }
1464 }
1465
1466 static volatile bool scraperRunning = false;
1467 static volatile bool scraperCancel = false;
1468
1469 static void * scraperThreadMain (void * arg)
1470 {
1471 sim_printf ("panel scraper\n");
1472 uint cpuNum = (uint) * (int *) arg;
1473 panel_cpup = cpus + cpuNum;
1474
1475 const char *device = "/dev/ttyUSB1";
1476
1477 struct termios config;
1478 int fd = open(device, O_RDWR | O_NOCTTY | O_NDELAY);
1479 if(fd == -1)
1480 {
1481 printf( "failed to open port\n" );
1482 goto die;
1483 }
1484 if(tcgetattr(fd, &config) < 0)
1485 {
1486 printf ("can't get\n");
1487 close (fd);
1488 goto die;
1489 }
1490
1491
1492
1493
1494
1495
1496
1497
1498 config.c_iflag &= ~(unsigned int) (IGNBRK | BRKINT | ICRNL |
1499 INLCR | PARMRK | INPCK | ISTRIP | IXON);
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511 config.c_oflag = 0;
1512
1513
1514
1515
1516
1517
1518
1519 config.c_lflag &= ~(unsigned int) (ECHO | ECHONL | ICANON | IEXTEN | ISIG);
1520
1521
1522
1523
1524
1525
1526
1527 config.c_cflag &= ~(unsigned int) (CSIZE | PARENB);
1528 config.c_cflag |= CS8;
1529
1530
1531
1532
1533
1534 config.c_cc[VMIN] = 1;
1535 config.c_cc[VTIME] = 0;
1536
1537
1538
1539
1540
1541 if(cfsetispeed(&config, B38400) < 0 || cfsetospeed(&config, B38400) < 0)
1542 {
1543 printf ("can't set speed\n");
1544 close (fd);
1545 goto die;
1546 }
1547
1548
1549
1550
1551 if(tcsetattr(fd, TCSAFLUSH, &config) < 0)
1552 {
1553 printf ("can't set %d\n", errno);
1554 close (fd);
1555 goto die;
1556 }
1557
1558 while (1)
1559 {
1560 if (scraperCancel)
1561 goto die;
1562 time_handler (fd);
1563 update_port (fd);
1564
1565
1566 sim_usleep (80000);
1567 }
1568
1569 die:;
1570 if (fd != -1)
1571 close (fd);
1572 fd = -1;
1573 scraperRunning = false;
1574 return NULL;
1575 }
1576
1577 void panelScraperInit (void)
1578 {
1579 scraperRunning = false;
1580 scraperCancel = false;
1581 }
1582
1583 int panelScraperStart (void)
1584 {
1585 if (scraperRunning)
1586 {
1587 sim_printf ("scraper already running\n");
1588 return SCPE_ARG;
1589 }
1590
1591 scraperCancel = false;
1592
1593
1594 scraperThreadArg = 0;
1595
1596 int rc = pthread_create (& scraperThread, NULL, scraperThreadMain,
1597 & scraperThreadArg);
1598 if (rc == 0)
1599 scraperRunning = true;
1600 else
1601 {
1602 sim_printf ("pthread_create returned %d\n", rc);
1603 return SCPE_ARG;
1604 }
1605 return SCPE_OK;
1606 }
1607
1608 int panelScraperStop (void)
1609 {
1610 if (! scraperRunning)
1611 {
1612 sim_printf ("scraper not running\n");
1613 return SCPE_ARG;
1614 }
1615
1616 scraperCancel = true;
1617
1618 sim_printf ("scraper signaled\n");
1619 return SCPE_OK;
1620 }
1621
1622 int panelScraperMsg (const char * msg)
1623 {
1624 c_offset = 0;
1625
1626 if (msg)
1627 {
1628 strncpy (message, msg, sizeof (message));
1629 message [msgLen - 1] = 0;
1630 }
1631 else
1632 message [0] = 0;
1633 return SCPE_OK;
1634 }
1635