PSR 26 src/dps8/doAppendCycleABSA.h DBGAPP ("doAppendCycleABSA(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PSR 154 src/dps8/doAppendCycleABSA.h if (cpu.PPR.PSR != cpu.TPR.TSR) { PSR 280 src/dps8/doAppendCycleABSA.h DBGAPP ("doAppendCycleABSA (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 24 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("doAppendCycleAPUDataRMW(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PSR 168 src/dps8/doAppendCycleAPUDataRMW.h if (cpu.PPR.PSR != cpu.TPR.TSR) { PSR 186 src/dps8/doAppendCycleAPUDataRMW.h if (cpu.TPR.TSR == cpu.PPR.PSR) PSR 347 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("doAppendCycleAPUDataRMW (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 24 src/dps8/doAppendCycleAPUDataRead.h DBGAPP ("doAppendCycleAPUDataRead(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PSR 163 src/dps8/doAppendCycleAPUDataRead.h if (cpu.PPR.PSR != cpu.TPR.TSR) { PSR 298 src/dps8/doAppendCycleAPUDataRead.h DBGAPP ("doAppendCycleAPUDataRead (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 24 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("doAppendCycleAPUDataStore(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PSR 151 src/dps8/doAppendCycleAPUDataStore.h if (cpu.TPR.TSR == cpu.PPR.PSR) PSR 300 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("doAppendCycleAPUDataStore (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 60 src/dps8/doAppendCycleIndirectWordFetch.h DBGAPP ("doAppendCycleIndirectWordFetch(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PSR 259 src/dps8/doAppendCycleIndirectWordFetch.h if (cpu.PPR.PSR != cpu.TPR.TSR) { PSR 469 src/dps8/doAppendCycleIndirectWordFetch.h cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 71 src/dps8/doAppendCycleInstructionFetch.h DBGAPP ("doAppendCycleInstructionFetch(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PSR 633 src/dps8/doAppendCycleInstructionFetch.h cpu.PPR.PSR = cpu.TPR.TSR; PSR 658 src/dps8/doAppendCycleInstructionFetch.h cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 24 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("doAppendCycleOperandRMW(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PSR 168 src/dps8/doAppendCycleOperandRMW.h if (cpu.PPR.PSR != cpu.TPR.TSR) { PSR 186 src/dps8/doAppendCycleOperandRMW.h if (cpu.TPR.TSR == cpu.PPR.PSR) PSR 351 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("doAppendCycleOperandRMW (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 66 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PSR 331 src/dps8/doAppendCycleOperandRead.h if (cpu.PPR.PSR != cpu.TPR.TSR) { PSR 387 src/dps8/doAppendCycleOperandRead.h cpu.SDW->E, cpu.SDW->G, cpu.PPR.PSR, cpu.TPR.TSR, cpu.TPR.CA, cpu.SDW->EB, PSR 405 src/dps8/doAppendCycleOperandRead.h if (cpu.PPR.PSR == cpu.TPR.TSR && ! TST_I_ABS) PSR 741 src/dps8/doAppendCycleOperandRead.h cpu.PR[n].SNR = cpu.PPR.PSR; PSR 753 src/dps8/doAppendCycleOperandRead.h cpu.PPR.PSR = cpu.TPR.TSR; PSR 800 src/dps8/doAppendCycleOperandRead.h cpu.PPR.PSR = cpu.TPR.TSR; PSR 813 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 24 src/dps8/doAppendCycleOperandStore.h DBGAPP ("doAppendCycleOperandStore(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PSR 146 src/dps8/doAppendCycleOperandStore.h if (cpu.TPR.TSR == cpu.PPR.PSR) PSR 303 src/dps8/doAppendCycleOperandStore.h DBGAPP ("doAppendCycleOperandStore (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 24 src/dps8/doAppendCycleRTCDOperandFetch.h DBGAPP ("doAppendCycleRTCDOperandFetch(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PSR 192 src/dps8/doAppendCycleRTCDOperandFetch.h if (cpu.PPR.PSR != cpu.TPR.TSR) { PSR 364 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.PPR.PSR = cpu.TPR.TSR; PSR 390 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 1204 src/dps8/dps8_append.c cpu.PPR.PRR, cpu.PPR.PSR); PSR 1444 src/dps8/dps8_append.c if (cpu.PPR.PSR != cpu.TPR.TSR) PSR 1474 src/dps8/dps8_append.c if (cpu.TPR.TSR == cpu.PPR.PSR) PSR 1594 src/dps8/dps8_append.c cpu.SDW->E, cpu.SDW->G, cpu.PPR.PSR, cpu.TPR.TSR, cpu.TPR.CA, PSR 1614 src/dps8/dps8_append.c if (cpu.PPR.PSR == cpu.TPR.TSR && ! TST_I_ABS) PSR 2062 src/dps8/dps8_append.c cpu.PR[n].SNR = cpu.PPR.PSR; PSR 2110 src/dps8/dps8_append.c cpu.PPR.PSR = cpu.TPR.TSR; PSR 2164 src/dps8/dps8_append.c cpu.PPR.PSR = cpu.TPR.TSR; PSR 2212 src/dps8/dps8_append.c cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 943 src/dps8/dps8_cpu.c cpu.PPR.PSR = 0; PSR 1772 src/dps8/dps8_cpu.c ((((t_addr) cpu.PPR.PSR) & 037777) << 18), PSR 2644 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 2659 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 2681 src/dps8/dps8_cpu.c if (stall_points[i].segno && stall_points[i].segno == cpu.PPR.PSR && PSR 2727 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 3019 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 3516 src/dps8/dps8_cpu.c addr, cpu.PPR.PSR, cpu.PPR.IC, ctx); PSR 3523 src/dps8/dps8_cpu.c (long long unsigned int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, addr, PSR 3557 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); PSR 3600 src/dps8/dps8_cpu.c (long long unsigned int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PSR 3624 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); PSR 3640 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); PSR 3682 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PSR 3720 src/dps8/dps8_cpu.c addr, cpu.PPR.PSR, cpu.PPR.IC, ctx); PSR 3727 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PSR 3738 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); PSR 3757 src/dps8/dps8_cpu.c addr, cpu.PPR.PSR, cpu.PPR.IC, ctx); PSR 3764 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PSR 3775 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); PSR 3816 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PSR 3839 src/dps8/dps8_cpu.c (long long unsigned int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PSR 91 src/dps8/dps8_cpu.h word15 PSR; // The segment number of the procedure being executed. PSR 1649 src/dps8/dps8_cpu.h word15 PSR; PSR 590 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 660 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 827 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 889 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 380 src/dps8/dps8_faults.c sim_printf (" TRO PSR:IC %05o:%06o\r\n", cpu.PPR.PSR, cpu.PPR.IC); PSR 385 src/dps8/dps8_faults.c sim_printf (" ACV %012llo PSR:IC %05o:%06o\r\n", subFault.bits, cpu.PPR.PSR, cpu.PPR.IC); PSR 416 src/dps8/dps8_faults.c fault_psr = cpu . PPR.PSR; PSR 117 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 135 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) PSR 196 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 210 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { PSR 266 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 281 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { PSR 338 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 352 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { PSR 408 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 422 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { PSR 480 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 494 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { PSR 550 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 564 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { PSR 633 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 728 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 820 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 906 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 947 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1030 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1130 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1154 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) PSR 1254 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1279 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) PSR 1348 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1418 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1492 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1574 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1651 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1729 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1824 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1953 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 311 src/dps8/dps8_ins.c cpu.PR[n].SNR = cpu.PPR.PSR; PSR 323 src/dps8/dps8_ins.c __func__, cpu.PPR.PSR, cpu.PPR.IC); PSR 361 src/dps8/dps8_ins.c putbits36_15 (& words[0], 3, cpu.PPR.PSR); PSR 604 src/dps8/dps8_ins.c cpu.cu_data.PSR = cpu.PPR.PSR; PSR 637 src/dps8/dps8_ins.c cpu.PPR.PSR = getbits36_15 (words[0], 3); PSR 1222 src/dps8/dps8_ins.c char * where = lookup_address (cpu.PPR.PSR, cpu.PPR.IC, & compname, PSR 1244 src/dps8/dps8_ins.c cpu.PPR.PSR, PSR 1250 src/dps8/dps8_ins.c cpu.PPR.PSR, cpu.PPR.IC, where); PSR 1301 src/dps8/dps8_ins.c cpu.PPR.PSR, PSR 1320 src/dps8/dps8_ins.c cpu.PPR.PSR, PSR 1373 src/dps8/dps8_ins.c trk (cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, IWB_IRODD); PSR 1744 src/dps8/dps8_ins.c if (n_dbgevents && (dbgevt = (dbgevent_lookup (cpu.PPR.PSR, cpu.PPR.IC))) >= 0) { PSR 1911 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1987 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 2079 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 2321 src/dps8/dps8_ins.c cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 4011 src/dps8/dps8_ins.c putbits36_15 (& cpu.Ypair[0], 3, cpu.PPR.PSR); PSR 4021 src/dps8/dps8_ins.c putbits36_15 (& cpu.Ypair[0], 3, cpu.cu_data.PSR); PSR 6459 src/dps8/dps8_ins.c "call6 PRR %o PSR %o\n", cpu.PPR.PRR, cpu.PPR.PSR); PSR 7568 src/dps8/dps8_ins.c sim_printf (" ldt %d PSR:IC %05o:%06o\r\n", cpu.rTR, cpu.PPR.PSR, cpu.PPR.IC); PSR 7619 src/dps8/dps8_ins.c sim_printf (" RALR set to %o PSR:IC %05o:%06o\r\n", cpu.rRALR, cpu.PPR.PSR, cpu.PPR.IC); PSR 8702 src/dps8/dps8_ins.c if (cpu.PPR.PSR == 0430 && cpu.PPR.IC == 012) PSR 8722 src/dps8/dps8_ins.c PSR 8732 src/dps8/dps8_ins.c if (cpu.PPR.PSR == 034 && cpu.PPR.IC == 03535) PSR 9765 src/dps8/dps8_ins.c (cpu.Yblock8[0]>>18)&MASK15, (cpu.Yblock8[4]>>18)&MASK18, cpu.PPR.PSR, cpu.PPR.IC); PSR 3513 src/dps8/dps8_iom.c __func__, iomChar (iom_unit_idx), cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC); PSR 30 src/dps8/dps8_simh.h (! sim_deb_segno_on) || sim_deb_segno[cpu.PPR.PSR & (DEBUG_SEGNO_LIMIT - 1)]) && \ PSR 2725 src/dps8/dps8_sys.c word15 icSegno = cpu.PPR.PSR; PSR 4055 src/dps8/dps8_sys.c { "cpus[].PPR.PSR", SYM_STRUCT_OFFSET, SYM_UINT16_15, offsetof (struct ppr_s, PSR) }, PSR 169 src/dps8/hdbg.c if (filter && hdbgSegNum >= 0 && hdbgSegNum != cpu.PPR.PSR) \ PSR 193 src/dps8/hdbg.c hevents[p].trace.segno = cpu.PPR.PSR; PSR 384 src/dps8/panelScraper.c SETL (bank_a, 3+3, cpu.PPR.PSR, 15);