cu 50 src/dps8/doAppendCycleABSA.h DBGAPP ("doAppendCycleABSA(Entry) XSF %o\n", cpu.cu.XSF); cu 48 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("doAppendCycleAPUDataRMW(Entry) XSF %o\n", cpu.cu.XSF); cu 330 src/dps8/doAppendCycleAPUDataRMW.h cpu.cu.XSF = 1; cu 48 src/dps8/doAppendCycleAPUDataRead.h DBGAPP ("doAppendCycleAPUDataRead(Entry) XSF %o\n", cpu.cu.XSF); cu 286 src/dps8/doAppendCycleAPUDataRead.h cpu.cu.XSF = 1; cu 48 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("doAppendCycleAPUDataStore(Entry) XSF %o\n", cpu.cu.XSF); cu 290 src/dps8/doAppendCycleAPUDataStore.h cpu.cu.XSF = 1; cu 133 src/dps8/doAppendCycleIndirectWordFetch.h DBGAPP ("doAppendCycleIndirectWordFetch(Entry) XSF %o\n", cpu.cu.XSF); cu 401 src/dps8/doAppendCycleIndirectWordFetch.h cpu.cu.XSF = 1; cu 193 src/dps8/doAppendCycleInstructionFetch.h DBGAPP ("doAppendCycleInstructionFetch(Entry) XSF %o\n", cpu.cu.XSF); cu 580 src/dps8/doAppendCycleInstructionFetch.h cpu.cu.XSF = 1; cu 48 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("doAppendCycleOperandRMW(Entry) XSF %o\n", cpu.cu.XSF); cu 328 src/dps8/doAppendCycleOperandRMW.h cpu.cu.XSF = 1; cu 197 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead(Entry) XSF %o\n", cpu.cu.XSF); cu 700 src/dps8/doAppendCycleOperandRead.h cpu.cu.XSF = 1; cu 48 src/dps8/doAppendCycleOperandStore.h DBGAPP ("doAppendCycleOperandStore(Entry) XSF %o\n", cpu.cu.XSF); cu 288 src/dps8/doAppendCycleOperandStore.h cpu.cu.XSF = 1; cu 48 src/dps8/doAppendCycleRTCDOperandFetch.h DBGAPP ("doAppendCycleRTCDOperandFetch(Entry) XSF %o\n", cpu.cu.XSF); cu 84 src/dps8/doAppendCycleRTCDOperandFetch.h if (get_addr_mode(cpup) == ABSOLUTE_mode && ! (cpu.cu.XSF || cpu.currentInstruction.b29)) { cu 283 src/dps8/doAppendCycleRTCDOperandFetch.h if (get_addr_mode (cpup) == ABSOLUTE_mode && ! (cpu.cu.XSF || cpu.currentInstruction.b29)) { cu 325 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.cu.XSF = 1; cu 230 src/dps8/dps8_addrmods.c cpu.cu.itp = 1; cu 231 src/dps8/dps8_addrmods.c cpu.cu.TSN_PRNO[0] = n; cu 232 src/dps8/dps8_addrmods.c cpu.cu.TSN_VALID[0] = 1; cu 273 src/dps8/dps8_addrmods.c cpu.cu.its = 1; cu 314 src/dps8/dps8_addrmods.c cpu.cu.XSF = 1; cu 322 src/dps8/dps8_addrmods.c wb = & cpu.cu.IRODD; cu 324 src/dps8/dps8_addrmods.c wb = & cpu.cu.IWB; cu 379 src/dps8/dps8_addrmods.c __func__, cpu.cu.CT_HOLD); cu 411 src/dps8/dps8_addrmods.c if (cpu.cu.CT_HOLD) cu 415 src/dps8/dps8_addrmods.c __func__, cpu.cu.CT_HOLD); cu 418 src/dps8/dps8_addrmods.c GET_TM(cpu.cu.CT_HOLD) == TM_IT && GET_TD (cpu.cu.CT_HOLD) == IT_DIC && cu 419 src/dps8/dps8_addrmods.c cpu.cu.pot == 1 && GET_ADDR (IWB_IRODD) == cpu.TPR.CA) cu 426 src/dps8/dps8_addrmods.c cpu.cu.pot = 1; cu 432 src/dps8/dps8_addrmods.c cpu.cu.its = 0; cu 433 src/dps8/dps8_addrmods.c cpu.cu.itp = 0; cu 434 src/dps8/dps8_addrmods.c cpu.cu.pot = 0; cu 438 src/dps8/dps8_addrmods.c __func__, cpu.rTAG, get_mod_string (buf, cpu.rTAG), Tm, Td, cpu.cu.CT_HOLD); cu 482 src/dps8/dps8_addrmods.c if (cpu.cu.rpt || cpu.cu.rd | cpu.cu.rl) cu 529 src/dps8/dps8_addrmods.c if (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl) cu 558 src/dps8/dps8_addrmods.c if (GET_TM(cpu.cu.CT_HOLD) == TM_IR) cu 584 src/dps8/dps8_addrmods.c if (!(cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl)) cu 617 src/dps8/dps8_addrmods.c if (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl) cu 629 src/dps8/dps8_addrmods.c "IR_MOD: CT_HOLD=%o %o\n", cpu.cu.CT_HOLD, Td); cu 647 src/dps8/dps8_addrmods.c cpu.cu.CT_HOLD = cpu.rTAG; cu 668 src/dps8/dps8_addrmods.c "IR_MOD: CT_HOLD=%o\n", cpu.cu.CT_HOLD); cu 684 src/dps8/dps8_addrmods.c Td, cpu.cu.CT_HOLD); cu 719 src/dps8/dps8_addrmods.c word6 Td_hold = GET_TD (cpu.cu.CT_HOLD); cu 941 src/dps8/dps8_addrmods.c cpu.cu.pot = 1; cu 958 src/dps8/dps8_addrmods.c cpu.cu.pot = 0; cu 1360 src/dps8/dps8_addrmods.c cpu.cu.pot = 0; cu 1414 src/dps8/dps8_addrmods.c cpu.cu.CT_HOLD = cpu.rTAG; cu 1472 src/dps8/dps8_addrmods.c cpu.cu.pot = 0; cu 1528 src/dps8/dps8_addrmods.c cpu.cu.CT_HOLD = cpu.rTAG; cu 62 src/dps8/dps8_append.c cu 63 src/dps8/dps8_append.c cu 65 src/dps8/dps8_append.c cu 66 src/dps8/dps8_append.c cu 67 src/dps8/dps8_append.c cu 68 src/dps8/dps8_append.c cu 69 src/dps8/dps8_append.c cu 70 src/dps8/dps8_append.c cu 71 src/dps8/dps8_append.c cu 72 src/dps8/dps8_append.c cu 73 src/dps8/dps8_append.c cu 77 src/dps8/dps8_append.c cu 83 src/dps8/dps8_append.c cu 86 src/dps8/dps8_append.c cu 89 src/dps8/dps8_append.c cu 95 src/dps8/dps8_append.c cu 98 src/dps8/dps8_append.c cu 101 src/dps8/dps8_append.c cu 104 src/dps8/dps8_append.c cu 107 src/dps8/dps8_append.c cu 173 src/dps8/dps8_append.c if (cpu.cu.SD_ON) cu 186 src/dps8/dps8_append.c if (cpu.cu.PT_ON) cu 340 src/dps8/dps8_append.c if ((! cpu.tweaks.enable_wam || ! cpu.cu.SD_ON)) { cu 352 src/dps8/dps8_append.c cpu.cu.SDWAMM = 1; cu 387 src/dps8/dps8_append.c cpu.cu.SDWAMM = 1; cu 410 src/dps8/dps8_append.c cpu.cu.SDWAMM = 0; cu 595 src/dps8/dps8_append.c if (nomatch || (! cpu.tweaks.enable_wam) || (! cpu.cu.SD_ON)) cu 680 src/dps8/dps8_append.c if ((! cpu.tweaks.enable_wam) || (! cpu.cu.PT_ON)) cu 696 src/dps8/dps8_append.c cpu.cu.PTWAMM = 1; cu 736 src/dps8/dps8_append.c cpu.cu.PTWAMM = 1; cu 755 src/dps8/dps8_append.c cpu.cu.PTWAMM = 0; cu 830 src/dps8/dps8_append.c if (nomatch || (! cpu.tweaks.enable_wam) || (! cpu.cu.PT_ON)) cu 1233 src/dps8/dps8_append.c DBGAPP ("do_append_cycle(Entry) XSF %o\n", cpu.cu.XSF); cu 1272 src/dps8/dps8_append.c ! (cpu.cu.XSF || cpu.currentInstruction.b29) /*get_went_appending()*/) cu 1828 src/dps8/dps8_append.c ! (cpu.cu.XSF || cpu.currentInstruction.b29) /*get_went_appending ()*/) cu 1890 src/dps8/dps8_append.c cpu.cu.XSF = 1; cu 118 src/dps8/dps8_append.h word12 FCT = cpu.cu.APUCycleBits & MASK3; cu 119 src/dps8/dps8_append.h cpu.cu.APUCycleBits = (status & 07770) | FCT; cu 959 src/dps8/dps8_cpu.c cpu.cu.SD_ON = cpu.switches.sdwam_enable ? 1 : 0; cu 960 src/dps8/dps8_cpu.c cpu.cu.PT_ON = cpu.switches.ptwam_enable ? 1 : 0; cu 966 src/dps8/dps8_cpu.c cpu.cu.IWB = 0000000616000; //-V536 // Stuff DIS instruction in instruction buffer cu 1815 src/dps8/dps8_cpu.c cpu.cu.IWB = cpu.switches.data_switches; cu 2116 src/dps8/dps8_cpu.c cpu.cu.XSF = false; cu 2125 src/dps8/dps8_cpu.c return cpu.cu.XSF; cu 2358 src/dps8/dps8_cpu.c cpu.cu.FI_ADDR = (word5) (intr_pair_addr / 2); cu 2393 src/dps8/dps8_cpu.c & cpu.cu.IWB, & cpu.cu.IRODD, __func__); cu 2395 src/dps8/dps8_cpu.c HDBGMRead (intr_pair_addr, cpu.cu.IWB, "intr even"); cu 2396 src/dps8/dps8_cpu.c HDBGMRead (intr_pair_addr + 1, cpu.cu.IRODD, "intr odd"); cu 2398 src/dps8/dps8_cpu.c cpu.cu.xde = 1; cu 2399 src/dps8/dps8_cpu.c cpu.cu.xdo = 1; cu 2479 src/dps8/dps8_cpu.c !(is_dis && GET_I (cpu.cu.IWB) == 0); cu 2489 src/dps8/dps8_cpu.c else if (! (cpu.cu.xde | cpu.cu.xdo | cu 2490 src/dps8/dps8_cpu.c cpu.cu.rpt | cpu.cu.rd | cpu.cu.rl)) cu 2642 src/dps8/dps8_cpu.c cpu.cu.XSF = 0; cu 2643 src/dps8/dps8_cpu.c cpu.cu.TSN_VALID [0] = 0; cu 2656 src/dps8/dps8_cpu.c cpu.cu.XSF = 0; cu 2658 src/dps8/dps8_cpu.c cpu.cu.TSN_VALID [0] = 0; cu 2697 src/dps8/dps8_cpu.c if (GET_I (cpu.cu.IWB)) cu 2722 src/dps8/dps8_cpu.c if (cpu.cu.xdo) cu 2725 src/dps8/dps8_cpu.c cpu.cu.XSF = 0; cu 2726 src/dps8/dps8_cpu.c cpu.cu.TSN_VALID [0] = 0; cu 2735 src/dps8/dps8_cpu.c cpu.cu.xde = cpu.cu.xdo = 0; cu 2774 src/dps8/dps8_cpu.c if (TST_I_ABS && cpu.cu.XSF) cu 2956 src/dps8/dps8_cpu.c if ((! cpu.cu.repeat_first) && cu 2957 src/dps8/dps8_cpu.c (cpu.cu.rpt || cu 2958 src/dps8/dps8_cpu.c (cpu.cu.rd && (cpu.PPR.IC & 1)) || cu 2959 src/dps8/dps8_cpu.c cpu.cu.rl)) cu 2962 src/dps8/dps8_cpu.c if (cpu.cu.rd) cu 2971 src/dps8/dps8_cpu.c !cpu.cu.xde && cpu.cu.xdo) cu 2993 src/dps8/dps8_cpu.c !cpu.cu.xde && cpu.cu.xdo) cu 3010 src/dps8/dps8_cpu.c if (cpu.cu.xde && cpu.cu.xdo) cu 3013 src/dps8/dps8_cpu.c cpu.cu.IWB = cpu.cu.IRODD; cu 3014 src/dps8/dps8_cpu.c cpu.cu.xde = 0; cu 3017 src/dps8/dps8_cpu.c cpu.cu.XSF = 0; cu 3018 src/dps8/dps8_cpu.c cpu.cu.TSN_VALID [0] = 0; cu 3024 src/dps8/dps8_cpu.c if (cpu.cu.xde || cpu.cu.xdo) // we are in an XEC/XED cu 3026 src/dps8/dps8_cpu.c cpu.cu.xde = cpu.cu.xdo = 0; cu 3043 src/dps8/dps8_cpu.c cpu.cu.xde = cpu.cu.xdo = 0; cu 3058 src/dps8/dps8_cpu.c !cpu.cu.repeat_first && !cpu.cu.rpt && !cpu.cu.rd && !cpu.cu.rl && cu 3064 src/dps8/dps8_cpu.c cpu.cu.IWB = cpu.cu.IRODD; cu 3117 src/dps8/dps8_cpu.c if ((cpu.cu.APUCycleBits & 060) || cpu.secret_addressing_mode) cu 3130 src/dps8/dps8_cpu.c if (cpu.faultNumber != FAULT_TRB || cpu.cu.xde == 0) cu 3170 src/dps8/dps8_cpu.c core_read2 (cpup, addr, & cpu.cu.IWB, & cpu.cu.IRODD, __func__); cu 3172 src/dps8/dps8_cpu.c HDBGMRead (addr, cpu.cu.IWB, "fault even"); cu 3173 src/dps8/dps8_cpu.c HDBGMRead (addr + 1, cpu.cu.IRODD, "fault odd"); cu 3175 src/dps8/dps8_cpu.c cpu.cu.xde = 1; cu 3176 src/dps8/dps8_cpu.c cpu.cu.xdo = 1; cu 4199 src/dps8/dps8_cpu.c putbits36_1 (& w0, 9, cpu.cu.xde); cu 4201 src/dps8/dps8_cpu.c putbits36_1 (& w0, 10, cpu.cu.xdo); cu 4205 src/dps8/dps8_cpu.c putbits36_1 (& w0, 12, cpu.cu.rpt); cu 4214 src/dps8/dps8_cpu.c putbits36_1 (& w0, 17, TSTF (cpu.cu.IR, I_NBAR)?1:0); cu 4420 src/dps8/dps8_cpu.c putbits36_1 (& w0, 25, cpu.cu.SDWAMM); cu 4424 src/dps8/dps8_cpu.c putbits36_1 (& w0, 30, cpu.cu.PTWAMM); cu 1029 src/dps8/dps8_cpu.h #define USE_IRODD (cpu.cu.rd && ((cpu. PPR.IC & 1) != 0)) cu 1030 src/dps8/dps8_cpu.h #define IWB_IRODD (USE_IRODD ? cpu.cu.IRODD : cpu.cu.IWB) cu 1593 src/dps8/dps8_cpu.h ctl_unit_data_t cu; cu 565 src/dps8/dps8_eis.c cpu.cu.XSF = 0; cu 591 src/dps8/dps8_eis.c cpu.cu.XSF = 0; cu 642 src/dps8/dps8_eis.c cpu.cu.XSF = 0; cu 661 src/dps8/dps8_eis.c cpu.cu.XSF = 0; cu 805 src/dps8/dps8_eis.c cpu.cu.XSF = 0; cu 828 src/dps8/dps8_eis.c cpu.cu.XSF = 0; cu 867 src/dps8/dps8_eis.c cpu.cu.XSF = 0; cu 890 src/dps8/dps8_eis.c cpu.cu.XSF = 0; cu 1159 src/dps8/dps8_eis.c e -> MF1 = getbits36_7 (cpu.cu.IWB, 29); cu 1164 src/dps8/dps8_eis.c e -> MF2 = getbits36_7 (cpu.cu.IWB, 11); cu 1169 src/dps8/dps8_eis.c e -> MF3 = getbits36_7 (cpu.cu.IWB, 2); cu 1266 src/dps8/dps8_eis.c cpu.cu.TSN_PRNO[k-1] = n; cu 1267 src/dps8/dps8_eis.c cpu.cu.TSN_VALID[k-1] = 1; cu 1416 src/dps8/dps8_eis.c cpu.cu.TSN_PRNO[k-1] = n; cu 1417 src/dps8/dps8_eis.c cpu.cu.TSN_VALID[k-1] = 1; cu 1621 src/dps8/dps8_eis.c cpu.cu.TSN_PRNO[k-1] = n; cu 1622 src/dps8/dps8_eis.c cpu.cu.TSN_VALID[k-1] = 1; cu 1673 src/dps8/dps8_eis.c cpu.cu.TSN_PRNO[k-1] = n; cu 1674 src/dps8/dps8_eis.c cpu.cu.TSN_VALID[k-1] = 1; cu 1860 src/dps8/dps8_eis.c cpu.cu.TSN_PRNO[k-1] = n; cu 1861 src/dps8/dps8_eis.c cpu.cu.TSN_VALID[k-1] = 1; cu 1958 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); cu 1960 src/dps8/dps8_eis.c int32_t address = SIGNEXT15_32 (GET_OFFSET (cpu.cu.IWB)); cu 1964 src/dps8/dps8_eis.c word4 reg = GET_TD (cpu.cu.IWB); // 4-bit register modification (None except cu 1973 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) cu 2042 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); cu 2044 src/dps8/dps8_eis.c int32_t address = SIGNEXT15_32 (GET_OFFSET (cpu.cu.IWB)); cu 2045 src/dps8/dps8_eis.c word4 reg = GET_TD (cpu.cu.IWB); // 4-bit register modification (None except cu 2052 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) cu 2089 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); cu 2091 src/dps8/dps8_eis.c int32_t address = SIGNEXT15_32 (GET_OFFSET (cpu.cu.IWB)); cu 2092 src/dps8/dps8_eis.c word6 reg = GET_TD (cpu.cu.IWB); // 4-bit register modification (None except cu 2114 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) cu 2127 src/dps8/dps8_eis.c if (sz == 9 || GET_A (cpu.cu.IWB)) cu 2167 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); cu 2170 src/dps8/dps8_eis.c word18 address = SIGNEXT15_18 (GET_OFFSET (cpu.cu.IWB)); cu 2173 src/dps8/dps8_eis.c word4 reg = (word4) GET_TD (cpu.cu.IWB); cu 2188 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) cu 2230 src/dps8/dps8_eis.c cu 2232 src/dps8/dps8_eis.c cu 2239 src/dps8/dps8_eis.c cu 2259 src/dps8/dps8_eis.c cu 2283 src/dps8/dps8_eis.c cu 2377 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); cu 2379 src/dps8/dps8_eis.c int32_t address = SIGNEXT15_32 (GET_OFFSET (cpu.cu.IWB)); cu 2382 src/dps8/dps8_eis.c word4 reg = (word4) GET_TD (cpu.cu.IWB); cu 2393 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) cu 2424 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); cu 2426 src/dps8/dps8_eis.c word18 address = SIGNEXT15_18 (GET_OFFSET (cpu.cu.IWB)); cu 2427 src/dps8/dps8_eis.c word4 reg = (word4) GET_TD (cpu.cu.IWB); cu 2433 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) cu 2460 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); cu 2462 src/dps8/dps8_eis.c int32_t address = SIGNEXT15_32 (GET_OFFSET (cpu.cu.IWB)); cu 2465 src/dps8/dps8_eis.c word4 reg = (word4) GET_TD (cpu.cu.IWB); cu 2476 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) cu 2506 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); cu 2508 src/dps8/dps8_eis.c word18 address = SIGNEXT15_18 (GET_OFFSET (cpu.cu.IWB)); cu 2511 src/dps8/dps8_eis.c word4 reg = (word4) GET_TD (cpu.cu.IWB); cu 2520 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) cu 2792 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); cu 2793 src/dps8/dps8_eis.c uint address = SIGNEXT15_18 (GET_OFFSET (cpu.cu.IWB)); cu 2794 src/dps8/dps8_eis.c word4 reg = (word4) GET_TD (cpu.cu.IWB); // 4-bit register modification (None except cu 2828 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) cu 3064 src/dps8/dps8_eis.c word9 fill = getbits36_9 (cpu.cu.IWB, 0); cu 3584 src/dps8/dps8_eis.c uint mask = (uint) getbits36_9 (cpu.cu.IWB, 0); cu 3756 src/dps8/dps8_eis.c uint mask = (uint) getbits36_9 (cpu.cu.IWB, 0); cu 4418 src/dps8/dps8_eis.c word1 T = getbits36_1 (cpu.cu.IWB, 9); cu 4420 src/dps8/dps8_eis.c word9 fill = getbits36_9 (cpu.cu.IWB, 0); cu 4820 src/dps8/dps8_eis.c word1 T = getbits36_1 (cpu.cu.IWB, 9); cu 4822 src/dps8/dps8_eis.c word9 fill = getbits36_9 (cpu.cu.IWB, 0); cu 7218 src/dps8/dps8_eis.c word1 T = getbits36_1 (cpu.cu.IWB, 9); cu 7220 src/dps8/dps8_eis.c word9 fill = getbits36_9 (cpu.cu.IWB, 0); cu 7700 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character cu 7702 src/dps8/dps8_eis.c word1 T = getbits36_1 (cpu.cu.IWB, 9); cu 7703 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit cu 8073 src/dps8/dps8_eis.c bool F = getbits36_1 (cpu.cu.IWB, 0) != 0; // fill bit cu 8074 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // T (enablefault) bit cu 8076 src/dps8/dps8_eis.c uint BOLR = getbits36_4 (cpu.cu.IWB, 5); // T (enablefault) bit cu 8370 src/dps8/dps8_eis.c bool F = getbits36_1 (cpu.cu.IWB, 0) != 0; // fill bit cu 8371 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // T (enablefault) bit cu 8373 src/dps8/dps8_eis.c uint BOLR = getbits36_4 (cpu.cu.IWB, 5); // T (enablefault) bit cu 8557 src/dps8/dps8_eis.c bool F = getbits36_1 (cpu.cu.IWB, 0) != 0; // fill bit cu 8558 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // T (enablefault) bit cu 8560 src/dps8/dps8_eis.c uint BOLR = getbits36_4 (cpu.cu.IWB, 5); // T (enablefault) bit cu 8755 src/dps8/dps8_eis.c bool F = getbits36_1 (cpu.cu.IWB, 0) != 0; // fill bit cu 8756 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // T (enablefault) bit cu 8758 src/dps8/dps8_eis.c uint BOLR = getbits36_4 (cpu.cu.IWB, 5); // T (enablefault) bit cu 8938 src/dps8/dps8_eis.c bool F = getbits36_1 (cpu.cu.IWB, 0) != 0; // fill bit cu 9584 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control cu 10203 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control cu 10204 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // truncation bit cu 10205 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit cu 10564 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control cu 10565 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // truncation bit cu 10566 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit cu 10916 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control cu 10917 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // truncation bit cu 10918 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit cu 11235 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control cu 11236 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // truncation bit cu 11237 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit cu 11573 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control cu 11574 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // truncation bit cu 11575 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit cu 11853 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control cu 11854 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // truncation bit cu 11855 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit cu 12915 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control cu 12917 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit cu 13320 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control cu 13322 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit cu 441 src/dps8/dps8_faults.c word3 FCT = cpu.cu.APUCycleBits & MASK3; cu 443 src/dps8/dps8_faults.c cpu.cu.APUCycleBits = (word12) ((cpu.cu.APUCycleBits & 07770) | FCT); cu 500 src/dps8/dps8_faults.c cpu . cu . IRO_ISN = 0; cu 501 src/dps8/dps8_faults.c cpu . cu . OEB_IOC = 0; cu 502 src/dps8/dps8_faults.c cpu . cu . EOFF_IAIM = 0; cu 503 src/dps8/dps8_faults.c cpu . cu . ORB_ISP = 0; cu 504 src/dps8/dps8_faults.c cpu . cu . ROFF_IPR = 0; cu 505 src/dps8/dps8_faults.c cpu . cu . OWB_NEA = 0; cu 506 src/dps8/dps8_faults.c cpu . cu . WOFF_OOB = 0; cu 507 src/dps8/dps8_faults.c cpu . cu . NO_GA = 0; cu 508 src/dps8/dps8_faults.c cpu . cu . OCB = 0; cu 509 src/dps8/dps8_faults.c cpu . cu . OCALL = 0; cu 510 src/dps8/dps8_faults.c cpu . cu . BOC = 0; cu 511 src/dps8/dps8_faults.c DPS8M_ (cpu . cu . PTWAM_ER = 0;) cu 512 src/dps8/dps8_faults.c cpu . cu . CRT = 0; cu 513 src/dps8/dps8_faults.c cpu . cu . RALR = 0; cu 514 src/dps8/dps8_faults.c cpu . cu . SDWAM_ER = 0; cu 515 src/dps8/dps8_faults.c cpu . cu . OOSB = 0; cu 516 src/dps8/dps8_faults.c cpu . cu . PARU = 0; cu 517 src/dps8/dps8_faults.c cpu . cu . PARL = 0; cu 518 src/dps8/dps8_faults.c cpu . cu . ONC1 = 0; cu 519 src/dps8/dps8_faults.c cpu . cu . ONC2 = 0; cu 520 src/dps8/dps8_faults.c cpu . cu . IA = 0; cu 521 src/dps8/dps8_faults.c cpu . cu . IACHN = 0; cu 522 src/dps8/dps8_faults.c cpu . cu . CNCHN = (faultNumber == FAULT_CON) ? subFault.fault_con_subtype & MASK3 : 0; cu 525 src/dps8/dps8_faults.c cpu . cu . FIF = cpu . cycle == FETCH_cycle ? 1 : 0; cu 526 src/dps8/dps8_faults.c cpu . cu . FI_ADDR = (word5) faultNumber; cu 532 src/dps8/dps8_faults.c cpu . cu . rfi = 0; cu 566 src/dps8/dps8_faults.c cpu . cu . IRO_ISN = 1; cu 568 src/dps8/dps8_faults.c cpu . cu . OEB_IOC = 1; cu 570 src/dps8/dps8_faults.c cpu . cu . EOFF_IAIM = 1; cu 572 src/dps8/dps8_faults.c cpu . cu . ORB_ISP = 1; cu 574 src/dps8/dps8_faults.c cpu . cu . ROFF_IPR = 1; cu 576 src/dps8/dps8_faults.c cpu . cu . OWB_NEA = 1; cu 578 src/dps8/dps8_faults.c cpu . cu . WOFF_OOB = 1; cu 580 src/dps8/dps8_faults.c cpu . cu . NO_GA = 1; cu 582 src/dps8/dps8_faults.c cpu . cu . OCB = 1; cu 584 src/dps8/dps8_faults.c cpu . cu . OCALL = 1; cu 586 src/dps8/dps8_faults.c cpu . cu . BOC = 1; cu 588 src/dps8/dps8_faults.c cpu . cu . PTWAM_ER = 1; cu 590 src/dps8/dps8_faults.c cpu . cu . CRT = 1; cu 592 src/dps8/dps8_faults.c cpu . cu . RALR = 1; cu 594 src/dps8/dps8_faults.c cpu . cu . SDWAM_ER = 1; cu 596 src/dps8/dps8_faults.c cpu . cu . OOSB = 1; cu 601 src/dps8/dps8_faults.c cpu . cu . WOFF_OOB = 1; cu 605 src/dps8/dps8_faults.c cpu . cu . OWB_NEA = 1; cu 610 src/dps8/dps8_faults.c cpu . cu . OEB_IOC = 1; cu 612 src/dps8/dps8_faults.c cpu . cu . EOFF_IAIM = 1; cu 614 src/dps8/dps8_faults.c cpu . cu . ORB_ISP = 1; cu 616 src/dps8/dps8_faults.c cpu . cu . ROFF_IPR = 1; cu 621 src/dps8/dps8_faults.c cpu . cu . IA = 0; cu 623 src/dps8/dps8_faults.c cpu . cu . IA = 010; cu 676 src/dps8/dps8_faults.c cpu.cu.FI_ADDR = FAULT_TRB; cu 751 src/dps8/dps8_faults.c word3 FCT = cpu.cu.APUCycleBits & MASK3; cu 753 src/dps8/dps8_faults.c cpu.cu.APUCycleBits = (word12) ((cpu.cu.APUCycleBits & 07770) | FCT); cu 761 src/dps8/dps8_faults.c cpu.cu.IRO_ISN = 0; cu 762 src/dps8/dps8_faults.c cpu.cu.OEB_IOC = 0; cu 763 src/dps8/dps8_faults.c cpu.cu.EOFF_IAIM = 0; cu 764 src/dps8/dps8_faults.c cpu.cu.ORB_ISP = 0; cu 765 src/dps8/dps8_faults.c cpu.cu.ROFF_IPR = 0; cu 766 src/dps8/dps8_faults.c cpu.cu.OWB_NEA = 0; cu 767 src/dps8/dps8_faults.c cpu.cu.WOFF_OOB = 0; cu 768 src/dps8/dps8_faults.c cpu.cu.NO_GA = 0; cu 769 src/dps8/dps8_faults.c cpu.cu.OCB = 0; cu 770 src/dps8/dps8_faults.c cpu.cu.OCALL = 0; cu 771 src/dps8/dps8_faults.c cpu.cu.BOC = 0; cu 776 src/dps8/dps8_faults.c cpu.cu.CRT = 0; cu 777 src/dps8/dps8_faults.c cpu.cu.RALR = 0; cu 778 src/dps8/dps8_faults.c cpu.cu.SDWAM_ER = 0; cu 779 src/dps8/dps8_faults.c cpu.cu.OOSB = 0; cu 780 src/dps8/dps8_faults.c cpu.cu.PARU = 0; cu 781 src/dps8/dps8_faults.c cpu.cu.PARL = 0; cu 782 src/dps8/dps8_faults.c cpu.cu.ONC1 = 0; cu 783 src/dps8/dps8_faults.c cpu.cu.ONC2 = 0; cu 784 src/dps8/dps8_faults.c cpu.cu.IA = 0; cu 785 src/dps8/dps8_faults.c cpu.cu.IACHN = 0; cu 786 src/dps8/dps8_faults.c cpu.cu.CNCHN = 0; cu 789 src/dps8/dps8_faults.c cpu.cu.FIF = 0; cu 790 src/dps8/dps8_faults.c cpu.cu.FI_ADDR = (word5) fault_number & MASK5; cu 796 src/dps8/dps8_faults.c cpu.cu.rfi = 0; cu 822 src/dps8/dps8_faults.c cpu.cu.FI_ADDR = FAULT_TRB; cu 581 src/dps8/dps8_hw_consts.h # define CLR_I_ABS CLRF (cpu.cu.IR, I_ABS) cu 582 src/dps8/dps8_hw_consts.h # define CLR_I_MIF CLRF (cpu.cu.IR, I_MIF) cu 583 src/dps8/dps8_hw_consts.h # define CLR_I_TRUNC CLRF (cpu.cu.IR, I_TRUNC) cu 584 src/dps8/dps8_hw_consts.h # define CLR_I_NBAR CLRF (cpu.cu.IR, I_NBAR) cu 585 src/dps8/dps8_hw_consts.h # define CLR_I_TALLY CLRF (cpu.cu.IR, I_TALLY) cu 586 src/dps8/dps8_hw_consts.h # define CLR_I_PMASK CLRF (cpu.cu.IR, I_PMASK) cu 587 src/dps8/dps8_hw_consts.h # define CLR_I_EOFL CLRF (cpu.cu.IR, I_EOFL) cu 588 src/dps8/dps8_hw_consts.h # define CLR_I_EUFL CLRF (cpu.cu.IR, I_EUFL) cu 589 src/dps8/dps8_hw_consts.h # define CLR_I_OFLOW CLRF (cpu.cu.IR, I_OFLOW) cu 590 src/dps8/dps8_hw_consts.h # define CLR_I_CARRY CLRF (cpu.cu.IR, I_CARRY) cu 591 src/dps8/dps8_hw_consts.h # define CLR_I_NEG CLRF (cpu.cu.IR, I_NEG) cu 592 src/dps8/dps8_hw_consts.h # define CLR_I_ZERO CLRF (cpu.cu.IR, I_ZERO) cu 594 src/dps8/dps8_hw_consts.h # define SET_I_ABS SETF (cpu.cu.IR, I_ABS) cu 595 src/dps8/dps8_hw_consts.h # define SET_I_NBAR SETF (cpu.cu.IR, I_NBAR) cu 596 src/dps8/dps8_hw_consts.h # define SET_I_TRUNC SETF (cpu.cu.IR, I_TRUNC) cu 597 src/dps8/dps8_hw_consts.h # define SET_I_TALLY SETF (cpu.cu.IR, I_TALLY) cu 598 src/dps8/dps8_hw_consts.h # define SET_I_EOFL SETF (cpu.cu.IR, I_EOFL) cu 599 src/dps8/dps8_hw_consts.h # define SET_I_EUFL SETF (cpu.cu.IR, I_EUFL) cu 600 src/dps8/dps8_hw_consts.h # define SET_I_OFLOW SETF (cpu.cu.IR, I_OFLOW) cu 601 src/dps8/dps8_hw_consts.h # define SET_I_CARRY SETF (cpu.cu.IR, I_CARRY) cu 602 src/dps8/dps8_hw_consts.h # define SET_I_NEG SETF (cpu.cu.IR, I_NEG) cu 603 src/dps8/dps8_hw_consts.h # define SET_I_ZERO SETF (cpu.cu.IR, I_ZERO) cu 605 src/dps8/dps8_hw_consts.h # define TST_I_ABS TSTF (cpu.cu.IR, I_ABS) cu 606 src/dps8/dps8_hw_consts.h # define TST_I_MIF TSTF (cpu.cu.IR, I_MIF) cu 607 src/dps8/dps8_hw_consts.h # define TST_I_NBAR TSTF (cpu.cu.IR, I_NBAR) cu 608 src/dps8/dps8_hw_consts.h # define TST_I_PMASK TSTF (cpu.cu.IR, I_PMASK) cu 609 src/dps8/dps8_hw_consts.h # define TST_I_TRUNC TSTF (cpu.cu.IR, I_TRUNC) cu 610 src/dps8/dps8_hw_consts.h # define TST_I_TALLY TSTF (cpu.cu.IR, I_TALLY) cu 611 src/dps8/dps8_hw_consts.h # define TST_I_OMASK TSTF (cpu.cu.IR, I_OMASK) cu 612 src/dps8/dps8_hw_consts.h # define TST_I_EUFL TSTF (cpu.cu.IR, I_EUFL ) cu 613 src/dps8/dps8_hw_consts.h # define TST_I_EOFL TSTF (cpu.cu.IR, I_EOFL ) cu 614 src/dps8/dps8_hw_consts.h # define TST_I_OFLOW TSTF (cpu.cu.IR, I_OFLOW) cu 615 src/dps8/dps8_hw_consts.h # define TST_I_CARRY TSTF (cpu.cu.IR, I_CARRY) cu 616 src/dps8/dps8_hw_consts.h # define TST_I_NEG TSTF (cpu.cu.IR, I_NEG) cu 617 src/dps8/dps8_hw_consts.h # define TST_I_ZERO TSTF (cpu.cu.IR, I_ZERO) cu 618 src/dps8/dps8_hw_consts.h # define TST_I_HEX TSTF (cpu.cu.IR, I_HEX) cu 620 src/dps8/dps8_hw_consts.h # define SC_I_HEX(v) SCF (v, cpu.cu.IR, I_HEX) // DPS8M only cu 621 src/dps8/dps8_hw_consts.h # define SC_I_MIF(v) SCF (v, cpu.cu.IR, I_MIF) cu 622 src/dps8/dps8_hw_consts.h # define SC_I_TALLY(v) SCF (v, cpu.cu.IR, I_TALLY) cu 623 src/dps8/dps8_hw_consts.h # define SC_I_NEG(v) SCF (v, cpu.cu.IR, I_NEG) cu 624 src/dps8/dps8_hw_consts.h # define SC_I_ZERO(v) SCF (v, cpu.cu.IR, I_ZERO) cu 625 src/dps8/dps8_hw_consts.h # define SC_I_CARRY(v) SCF (v, cpu.cu.IR, I_CARRY); cu 626 src/dps8/dps8_hw_consts.h # define SC_I_OFLOW(v) SCF (v, cpu.cu.IR, I_OFLOW); cu 627 src/dps8/dps8_hw_consts.h # define SC_I_EOFL(v) SCF (v, cpu.cu.IR, I_EOFL); cu 628 src/dps8/dps8_hw_consts.h # define SC_I_EUFL(v) SCF (v, cpu.cu.IR, I_EUFL); cu 629 src/dps8/dps8_hw_consts.h # define SC_I_OMASK(v) SCF (v, cpu.cu.IR, I_OMASK); cu 630 src/dps8/dps8_hw_consts.h # define SC_I_PERR(v) SCF (v, cpu.cu.IR, I_PERR); cu 631 src/dps8/dps8_hw_consts.h # define SC_I_PMASK(v) SCF (v, cpu.cu.IR, I_PMASK); cu 632 src/dps8/dps8_hw_consts.h # define SC_I_TRUNC(v) SCF (v, cpu.cu.IR, I_TRUNC); cu 57 src/dps8/dps8_iefp.c if (cpu.cu.XSF || (cyctyp != INSTRUCTION_FETCH && cpu.currentInstruction.b29)) cu 159 src/dps8/dps8_iefp.c if (cpu.cu.XSF || cpu.currentInstruction.b29) cu 229 src/dps8/dps8_iefp.c if (cpu.cu.XSF || cpu.currentInstruction.b29) cu 301 src/dps8/dps8_iefp.c if (cpu.cu.XSF || cpu.currentInstruction.b29) cu 371 src/dps8/dps8_iefp.c if (cpu.cu.XSF || cpu.currentInstruction.b29) cu 443 src/dps8/dps8_iefp.c if (cpu.cu.XSF) cu 513 src/dps8/dps8_iefp.c if (cpu.cu.XSF || cpu.currentInstruction.b29) cu 586 src/dps8/dps8_iefp.c if (cpu.cu.XSF || (cyctyp != INSTRUCTION_FETCH && cpu.currentInstruction.b29) || cyctyp == RTCD_OPERAND_FETCH) // ISOLTS-886 cu 682 src/dps8/dps8_iefp.c if (cpu.cu.XSF || cpu.currentInstruction.b29) cu 774 src/dps8/dps8_iefp.c if (cpu.cu.XSF || cpu.currentInstruction.b29) cu 860 src/dps8/dps8_iefp.c if (cpu.cu.XSF) cu 984 src/dps8/dps8_iefp.c if (cpu.cu.XSF || cpu.currentInstruction.b29) cu 1071 src/dps8/dps8_iefp.c if (isAR || cpu.cu.XSF /*get_went_appending ()*/) cu 1195 src/dps8/dps8_iefp.c if (isAR || cpu.cu.XSF /*get_went_appending ()*/) cu 1307 src/dps8/dps8_iefp.c if (cpu.cu.XSF || (cyctyp != INSTRUCTION_FETCH && cpu.currentInstruction.b29)) cu 1381 src/dps8/dps8_iefp.c if (cpu.cu.XSF || cpu.currentInstruction.b29) cu 1449 src/dps8/dps8_iefp.c if (cpu.cu.XSF || cpu.currentInstruction.b29) cu 1525 src/dps8/dps8_iefp.c if (cpu.cu.XSF /*get_went_appending ()*/ || (cyctyp != INSTRUCTION_FETCH && cpu.currentInstruction.b29)) cu 1612 src/dps8/dps8_iefp.c if (cpu.cu.XSF || cpu.currentInstruction.b29) cu 1684 src/dps8/dps8_iefp.c if (isAR || cpu.cu.XSF /*get_went_appending ()*/) cu 1768 src/dps8/dps8_iefp.c if (isAR || cpu.cu.XSF /*get_went_appending ()*/) cu 1897 src/dps8/dps8_iefp.c if (isAR || cpu.cu.XSF /*get_went_appending ()*/) cu 132 src/dps8/dps8_ins.c rTAG = GET_TAG (cpu.cu.IWB); cu 213 src/dps8/dps8_ins.c rTAG = GET_TAG (cpu.cu.IWB); cu 292 src/dps8/dps8_ins.c if (! (get_addr_mode (cpup) == APPEND_mode || cpu.cu.TSN_VALID [0] || cu 293 src/dps8/dps8_ins.c cpu.cu.XSF || cpu.currentInstruction.b29 /*get_went_appending ()*/)) cu 326 src/dps8/dps8_ins.c cpu.cu.IWB = cpu.CY; cu 327 src/dps8/dps8_ins.c cpu.cu.IRODD = cpu.CY; cu 331 src/dps8/dps8_ins.c cpu.cu.IWB = cpu.Ypair[0]; cu 332 src/dps8/dps8_ins.c cpu.cu.IRODD = cpu.Ypair[1]; cu 363 src/dps8/dps8_ins.c putbits36_1 (& words[0], 19, cpu.cu.XSF); cu 365 src/dps8/dps8_ins.c putbits36_1 (& words[0], 21, cpu.cu.SD_ON); cu 367 src/dps8/dps8_ins.c putbits36_1 (& words[0], 23, cpu.cu.PT_ON); cu 369 src/dps8/dps8_ins.c cu 370 src/dps8/dps8_ins.c cu 371 src/dps8/dps8_ins.c cu 372 src/dps8/dps8_ins.c cu 373 src/dps8/dps8_ins.c cu 374 src/dps8/dps8_ins.c cu 375 src/dps8/dps8_ins.c cu 376 src/dps8/dps8_ins.c cu 377 src/dps8/dps8_ins.c cu 384 src/dps8/dps8_ins.c putbits36_12 (& words[0], 24, cpu.cu.APUCycleBits); cu 389 src/dps8/dps8_ins.c putbits36_1 (& words[1], 0, cpu.cu.IRO_ISN); cu 390 src/dps8/dps8_ins.c putbits36_1 (& words[1], 1, cpu.cu.OEB_IOC); cu 391 src/dps8/dps8_ins.c putbits36_1 (& words[1], 2, cpu.cu.EOFF_IAIM); cu 392 src/dps8/dps8_ins.c putbits36_1 (& words[1], 3, cpu.cu.ORB_ISP); cu 393 src/dps8/dps8_ins.c putbits36_1 (& words[1], 4, cpu.cu.ROFF_IPR); cu 394 src/dps8/dps8_ins.c putbits36_1 (& words[1], 5, cpu.cu.OWB_NEA); cu 395 src/dps8/dps8_ins.c putbits36_1 (& words[1], 6, cpu.cu.WOFF_OOB); cu 396 src/dps8/dps8_ins.c putbits36_1 (& words[1], 7, cpu.cu.NO_GA); cu 397 src/dps8/dps8_ins.c putbits36_1 (& words[1], 8, cpu.cu.OCB); cu 398 src/dps8/dps8_ins.c putbits36_1 (& words[1], 9, cpu.cu.OCALL); cu 399 src/dps8/dps8_ins.c putbits36_1 (& words[1], 10, cpu.cu.BOC); cu 400 src/dps8/dps8_ins.c putbits36_1 (& words[1], 11, cpu.cu.PTWAM_ER); cu 401 src/dps8/dps8_ins.c putbits36_1 (& words[1], 12, cpu.cu.CRT); cu 402 src/dps8/dps8_ins.c putbits36_1 (& words[1], 13, cpu.cu.RALR); cu 403 src/dps8/dps8_ins.c putbits36_1 (& words[1], 14, cpu.cu.SDWAM_ER); cu 404 src/dps8/dps8_ins.c putbits36_1 (& words[1], 15, cpu.cu.OOSB); cu 405 src/dps8/dps8_ins.c putbits36_1 (& words[1], 16, cpu.cu.PARU); cu 406 src/dps8/dps8_ins.c putbits36_1 (& words[1], 17, cpu.cu.PARL); cu 407 src/dps8/dps8_ins.c putbits36_1 (& words[1], 18, cpu.cu.ONC1); cu 408 src/dps8/dps8_ins.c putbits36_1 (& words[1], 19, cpu.cu.ONC2); cu 409 src/dps8/dps8_ins.c putbits36_4 (& words[1], 20, cpu.cu.IA); cu 410 src/dps8/dps8_ins.c putbits36_3 (& words[1], 24, cpu.cu.IACHN); cu 411 src/dps8/dps8_ins.c putbits36_3 (& words[1], 27, cpu.cu.CNCHN); cu 412 src/dps8/dps8_ins.c putbits36_5 (& words[1], 30, cpu.cu.FI_ADDR); cu 423 src/dps8/dps8_ins.c putbits36_6 (& words[2], 30, cpu.cu.delta); cu 427 src/dps8/dps8_ins.c putbits36_3 (& words[3], 18, cpu.cu.TSN_VALID[0] ? cpu.cu.TSN_PRNO[0] : 0); cu 428 src/dps8/dps8_ins.c putbits36_1 (& words[3], 21, cpu.cu.TSN_VALID[0]); cu 429 src/dps8/dps8_ins.c putbits36_3 (& words[3], 22, cpu.cu.TSN_VALID[1] ? cpu.cu.TSN_PRNO[1] : 0); cu 430 src/dps8/dps8_ins.c putbits36_1 (& words[3], 25, cpu.cu.TSN_VALID[1]); cu 431 src/dps8/dps8_ins.c putbits36_3 (& words[3], 26, cpu.cu.TSN_VALID[2] ? cpu.cu.TSN_PRNO[2] : 0); cu 432 src/dps8/dps8_ins.c putbits36_1 (& words[3], 29, cpu.cu.TSN_VALID[2]); cu 442 src/dps8/dps8_ins.c putbits36_18 (& words[4], 18, cpu.cu.IR); cu 480 src/dps8/dps8_ins.c putbits36 (& words[5], 18, 1, cpu.cu.repeat_first); cu 481 src/dps8/dps8_ins.c putbits36 (& words[5], 19, 1, cpu.cu.rpt); cu 482 src/dps8/dps8_ins.c putbits36 (& words[5], 20, 1, cpu.cu.rd); cu 483 src/dps8/dps8_ins.c putbits36 (& words[5], 21, 1, cpu.cu.rl); cu 484 src/dps8/dps8_ins.c putbits36 (& words[5], 22, 1, cpu.cu.pot); cu 486 src/dps8/dps8_ins.c putbits36_1 (& words[5], 24, cpu.cu.xde); cu 487 src/dps8/dps8_ins.c putbits36_1 (& words[5], 25, cpu.cu.xdo); cu 488 src/dps8/dps8_ins.c putbits36_1 (& words[5], 26, cpu.cu.itp); cu 489 src/dps8/dps8_ins.c putbits36_1 (& words[5], 27, cpu.cu.rfi); cu 490 src/dps8/dps8_ins.c putbits36_1 (& words[5], 28, cpu.cu.its); cu 491 src/dps8/dps8_ins.c putbits36_1 (& words[5], 29, cpu.cu.FIF); cu 492 src/dps8/dps8_ins.c putbits36_6 (& words[5], 30, cpu.cu.CT_HOLD); cu 496 src/dps8/dps8_ins.c words[6] = cpu.cu.IWB; cu 500 src/dps8/dps8_ins.c words[7] = cpu.cu.IRODD; cu 617 src/dps8/dps8_ins.c cpu.cu.delta = 0; cu 618 src/dps8/dps8_ins.c cpu.cu.repeat_first = false; cu 619 src/dps8/dps8_ins.c cpu.cu.rpt = false; cu 620 src/dps8/dps8_ins.c cpu.cu.rd = false; cu 621 src/dps8/dps8_ins.c cpu.cu.rl = false; cu 622 src/dps8/dps8_ins.c cpu.cu.pot = false; cu 623 src/dps8/dps8_ins.c cpu.cu.itp = false; cu 624 src/dps8/dps8_ins.c cpu.cu.its = false; cu 625 src/dps8/dps8_ins.c cpu.cu.xde = false; cu 626 src/dps8/dps8_ins.c cpu.cu.xdo = false; cu 639 src/dps8/dps8_ins.c cpu.cu.XSF = getbits36_1 (words[0], 19); cu 640 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "%s sets XSF to %o\n", __func__, cpu.cu.XSF); cu 659 src/dps8/dps8_ins.c cpu.cu.APUCycleBits = (word12) ((cpu.cu.APUCycleBits & 07770) | (word12) getbits36_3 (words[0], 33)); cu 664 src/dps8/dps8_ins.c cu 665 src/dps8/dps8_ins.c cu 666 src/dps8/dps8_ins.c cu 667 src/dps8/dps8_ins.c cu 668 src/dps8/dps8_ins.c cu 669 src/dps8/dps8_ins.c cu 670 src/dps8/dps8_ins.c cu 671 src/dps8/dps8_ins.c cu 672 src/dps8/dps8_ins.c cu 673 src/dps8/dps8_ins.c cu 674 src/dps8/dps8_ins.c cu 675 src/dps8/dps8_ins.c cu 676 src/dps8/dps8_ins.c cu 677 src/dps8/dps8_ins.c cu 678 src/dps8/dps8_ins.c cu 679 src/dps8/dps8_ins.c cu 680 src/dps8/dps8_ins.c cu 681 src/dps8/dps8_ins.c cu 682 src/dps8/dps8_ins.c cu 683 src/dps8/dps8_ins.c cu 684 src/dps8/dps8_ins.c cu 685 src/dps8/dps8_ins.c cu 686 src/dps8/dps8_ins.c cu 687 src/dps8/dps8_ins.c cu 688 src/dps8/dps8_ins.c cu 699 src/dps8/dps8_ins.c cpu.cu.delta = getbits36_6 (words[2], 30); cu 705 src/dps8/dps8_ins.c cpu.cu.TSN_PRNO[0] = getbits36_3 (words[3], 18); cu 706 src/dps8/dps8_ins.c cpu.cu.TSN_VALID[0] = getbits36_1 (words[3], 21); cu 707 src/dps8/dps8_ins.c cpu.cu.TSN_PRNO[1] = getbits36_3 (words[3], 22); cu 708 src/dps8/dps8_ins.c cpu.cu.TSN_VALID[1] = getbits36_1 (words[3], 25); cu 709 src/dps8/dps8_ins.c cpu.cu.TSN_PRNO[2] = getbits36_3 (words[3], 26); cu 710 src/dps8/dps8_ins.c cpu.cu.TSN_VALID[2] = getbits36_1 (words[3], 29); cu 715 src/dps8/dps8_ins.c cpu.cu.IR = getbits36_18 (words[4], 18); // HWR cu 722 src/dps8/dps8_ins.c cpu.cu.repeat_first = getbits36_1 (words[5], 18); cu 723 src/dps8/dps8_ins.c cpu.cu.rpt = getbits36_1 (words[5], 19); cu 724 src/dps8/dps8_ins.c cpu.cu.rd = getbits36_1 (words[5], 20); cu 725 src/dps8/dps8_ins.c cpu.cu.rl = getbits36_1 (words[5], 21); cu 726 src/dps8/dps8_ins.c cpu.cu.pot = getbits36_1 (words[5], 22); cu 728 src/dps8/dps8_ins.c cpu.cu.xde = getbits36_1 (words[5], 24); cu 729 src/dps8/dps8_ins.c cpu.cu.xdo = getbits36_1 (words[5], 25); cu 730 src/dps8/dps8_ins.c cpu.cu.itp = getbits36_1 (words[5], 26); cu 731 src/dps8/dps8_ins.c cpu.cu.rfi = getbits36_1 (words[5], 27); cu 732 src/dps8/dps8_ins.c cpu.cu.its = getbits36_1 (words[5], 28); cu 733 src/dps8/dps8_ins.c cpu.cu.FIF = getbits36_1 (words[5], 29); cu 734 src/dps8/dps8_ins.c cpu.cu.CT_HOLD = getbits36_6 (words[5], 30); cu 738 src/dps8/dps8_ins.c cpu.cu.IWB = words[6]; cu 742 src/dps8/dps8_ins.c cpu.cu.IRODD = words[7]; cu 1158 src/dps8/dps8_ins.c if (cpu.cu.rd && ((cpu.PPR.IC & 1) != 0)) cu 1160 src/dps8/dps8_ins.c if (cpu.cu.repeat_first) cu 1166 src/dps8/dps8_ins.c else if (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl) cu 1168 src/dps8/dps8_ins.c if (cpu.cu.repeat_first) cu 1172 src/dps8/dps8_ins.c ReadInstructionFetch (cpup, addr, & cpu.cu.IWB); cu 1179 src/dps8/dps8_ins.c cpu.cu.IWB = tmp[0]; cu 1180 src/dps8/dps8_ins.c cpu.cu.IRODD = tmp[1]; cu 1200 src/dps8/dps8_ins.c cpu.cu.IWB = tmp[0]; cu 1201 src/dps8/dps8_ins.c cpu.cu.IRODD = tmp[1]; cu 1205 src/dps8/dps8_ins.c ReadInstructionFetch (cpup, addr, & cpu.cu.IWB); cu 1206 src/dps8/dps8_ins.c cpu.cu.IRODD = cpu.cu.IWB; cu 1341 src/dps8/dps8_ins.c if (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl) cu 1357 src/dps8/dps8_ins.c if (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl) cu 1437 src/dps8/dps8_ins.c const bool restart = cpu.cu.rfi; // instruction is to be restarted cu 1438 src/dps8/dps8_ins.c cpu.cu.rfi = 0; cu 1485 src/dps8/dps8_ins.c cpu.cu.TSN_VALID[0] = 0; cu 1486 src/dps8/dps8_ins.c cpu.cu.TSN_VALID[1] = 0; cu 1487 src/dps8/dps8_ins.c cpu.cu.TSN_VALID[2] = 0; cu 1488 src/dps8/dps8_ins.c cpu.cu.TSN_PRNO[0] = 0; cu 1489 src/dps8/dps8_ins.c cpu.cu.TSN_PRNO[1] = 0; cu 1490 src/dps8/dps8_ins.c cpu.cu.TSN_PRNO[2] = 0; cu 1500 src/dps8/dps8_ins.c cpu.cu.XSF = 0; cu 1502 src/dps8/dps8_ins.c cpu.cu.pot = 0; cu 1503 src/dps8/dps8_ins.c cpu.cu.its = 0; cu 1504 src/dps8/dps8_ins.c cpu.cu.itp = 0; cu 1511 src/dps8/dps8_ins.c cpu.cu.APUCycleBits &= 07770; cu 1524 src/dps8/dps8_ins.c if (opcode == 0717 && !opcodeX && cpu.cu.xde && cpu.cu.xdo /* even instruction being executed */) cu 1531 src/dps8/dps8_ins.c if (cpu.cu.xde && cpu.cu.xdo /* even instr being executed */) cu 1536 src/dps8/dps8_ins.c if (!cpu.cu.xde && cpu.cu.xdo /* odd instr being executed */ && !(cpu.PPR.IC & 1)) cu 1543 src/dps8/dps8_ins.c if (opcode == 0560 && !opcodeX && cpu.cu.xde && !(cpu.PPR.IC & 1)) cu 1554 src/dps8/dps8_ins.c if (unlikely (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl)) { cu 1561 src/dps8/dps8_ins.c if (cpu.cu.rl) cu 1588 src/dps8/dps8_ins.c if (unlikely (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl)) { cu 1593 src/dps8/dps8_ins.c if (unlikely (cpu.cu.rl)) { cu 1776 src/dps8/dps8_ins.c if (unlikely (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl)) { cu 1837 src/dps8/dps8_ins.c cpu.cu.repeat_first, cpu.cu.rpt, cpu.cu.rd, cpu.PPR.IC & 1, cpu.rX[0], cu 1844 src/dps8/dps8_ins.c if (cpu.cu.repeat_first) { cu 1853 src/dps8/dps8_ins.c if (cpu.cu.rpt || (cpu.cu.rd && icOdd) || cpu.cu.rl) cu 1854 src/dps8/dps8_ins.c cpu.cu.repeat_first = false; cu 1859 src/dps8/dps8_ins.c if (cpu.cu.rpt || // rpt cu 1860 src/dps8/dps8_ins.c (cpu.cu.rd && icEven) || // rpd & even cu 1861 src/dps8/dps8_ins.c (cpu.cu.rd && icOdd) || // rpd & odd cu 1862 src/dps8/dps8_ins.c cpu.cu.rl) { // rl cu 1984 src/dps8/dps8_ins.c cpu.cu.TSN_VALID [0] = 0; cu 1996 src/dps8/dps8_ins.c cpu.cu.CT_HOLD = 0; // Clear interrupted IR mode flag cu 2018 src/dps8/dps8_ins.c if (cpu.cu.rl) { cu 2099 src/dps8/dps8_ins.c bool rf = cpu.cu.repeat_first; cu 2100 src/dps8/dps8_ins.c if (rf && cpu.cu.rd && icEven) cu 2103 src/dps8/dps8_ins.c if (unlikely ((! rf) && (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl))) { cu 2109 src/dps8/dps8_ins.c if (cpu.cu.rpt || cpu.cu.rd) { cu 2117 src/dps8/dps8_ins.c cpu.cu.repeat_first, rf, cpu.cu.rpt, cpu.cu.rd, icOdd, cpu.rX[0], rptA, rptB); cu 2119 src/dps8/dps8_ins.c if (cpu.cu.rpt) { // rpt cu 2121 src/dps8/dps8_ins.c uint Xn = (uint) getbits36_3 (cpu.cu.IWB, 36 - 3); cu 2122 src/dps8/dps8_ins.c cpu.TPR.CA = (cpu.rX[Xn] + cpu.cu.delta) & AMASK; cu 2134 src/dps8/dps8_ins.c if (cpu.cu.rd && icOdd && rptA) { // rpd, even instruction cu 2137 src/dps8/dps8_ins.c uint Xn = (uint) getbits36_3 (cpu.cu.IWB, 36 - 3); cu 2138 src/dps8/dps8_ins.c cpu.TPR.CA = (cpu.rX[Xn] + cpu.cu.delta) & AMASK; cu 2146 src/dps8/dps8_ins.c if (cpu.cu.rd && icOdd && rptB) { // rpdb, odd instruction cu 2149 src/dps8/dps8_ins.c uint Xn = (uint) getbits36_3 (cpu.cu.IRODD, 36 - 3); cu 2150 src/dps8/dps8_ins.c cpu.TPR.CA = (cpu.rX[Xn] + cpu.cu.delta) & AMASK; cu 2174 src/dps8/dps8_ins.c flt = (cpu.cu.rl || cpu.cu.rpt || cpu.cu.rd) && cpu.dlyFlt; // L68 cu 2176 src/dps8/dps8_ins.c flt = cpu.cu.rl && cpu.dlyFlt; cu 2186 src/dps8/dps8_ins.c if (cpu.cu.rpt || (cpu.cu.rd && icOdd) || cpu.cu.rl) { cu 2260 src/dps8/dps8_ins.c cpu.cu.rpt = false; cu 2261 src/dps8/dps8_ins.c cpu.cu.rd = false; cu 2262 src/dps8/dps8_ins.c cpu.cu.rl = false; cu 2268 src/dps8/dps8_ins.c if (cpu.cu.rl) { cu 2272 src/dps8/dps8_ins.c cpu.cu.rpt = false; cu 2273 src/dps8/dps8_ins.c cpu.cu.rd = false; cu 2274 src/dps8/dps8_ins.c cpu.cu.rl = false; cu 2278 src/dps8/dps8_ins.c uint Xn = (uint) getbits36_3 (cpu.cu.IWB, 36 - 3); cu 2303 src/dps8/dps8_ins.c cpu.rA, cpu.rQ, dump_flags (buf, cpu.cu.IR)); cu 2349 src/dps8/dps8_ins.c if (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl) cu 2832 src/dps8/dps8_ins.c cmp36 (cpup, cpu.rQ, cpu.CY, &cpu.cu.IR); cu 3044 src/dps8/dps8_ins.c cmp36 (cpup, cpu.rA, cpu.CY, &cpu.cu.IR); cu 3057 src/dps8/dps8_ins.c & cpu.cu.IR, & ovf); cu 3093 src/dps8/dps8_ins.c if (! (cpu.cu.IR & I_NEG) && ! (cpu.cu.IR & I_ZERO)) cu 3369 src/dps8/dps8_ins.c & cpu.cu.IR, & ovf); cu 3381 src/dps8/dps8_ins.c if (cpu.cu.IR & (I_NEG | I_ZERO)) cu 3556 src/dps8/dps8_ins.c DPS8M_ (cpu.CY = cpu.cu.IR & 0000000777770LL; ) cu 3558 src/dps8/dps8_ins.c L68_ (cpu.CY = cpu.cu.IR & 0000000777760LL;) cu 3561 src/dps8/dps8_ins.c cpu.CY = cpu.cu.IR & 0000000777600LL; cu 3607 src/dps8/dps8_ins.c cpu.rA = compl36 (cpup, cpu.CY, & cpu.cu.IR, & ovf); cu 3618 src/dps8/dps8_ins.c cpu.rQ = compl36 (cpup, cpu.CY, & cpu.cu.IR, & ovf); cu 3638 src/dps8/dps8_ins.c cpu.rX[n] = compl18 (cpup, GETHI (cpu.CY), & cpu.cu.IR, & ovf); cu 3935 src/dps8/dps8_ins.c DPS8M_ (SETLO (cpu.CY, cpu.cu.IR & 0777770);) cu 3936 src/dps8/dps8_ins.c L68_ (SETLO (cpu.CY, cpu.cu.IR & 0777760);) cu 4584 src/dps8/dps8_ins.c cpu.rA = Add36b (cpup, cpu.rA, cpu.CY, 0, I_ZNOC, & cpu.cu.IR, & ovf); cu 4603 src/dps8/dps8_ins.c tmp72, 0, I_ZNOC, & cpu.cu.IR, & ovf); cu 4624 src/dps8/dps8_ins.c tmp72, 0, I_ZNOC, & cpu.cu.IR, & ovf); cu 4649 src/dps8/dps8_ins.c tmp72, 0, I_ZNC, & cpu.cu.IR, & ovf); cu 4670 src/dps8/dps8_ins.c cpu.rA = Add36b (cpup, cpu.rA, cpu.CY, 0, I_ZNC, & cpu.cu.IR, & ovf); cu 4689 src/dps8/dps8_ins.c cpu.rQ = Add36b (cpup, cpu.rQ, cpu.CY, 0, I_ZNC, & cpu.cu.IR, & ovf); cu 4713 src/dps8/dps8_ins.c & cpu.cu.IR, & ovf); cu 4741 src/dps8/dps8_ins.c & cpu.cu.IR, & ovf); cu 4762 src/dps8/dps8_ins.c & cpu.cu.IR, & ovf); cu 4775 src/dps8/dps8_ins.c cpu.CY = Add36b (cpup, cpu.rQ, cpu.CY, 0, I_ZNOC, & cpu.cu.IR, & ovf); cu 4799 src/dps8/dps8_ins.c I_ZNOC, & cpu.cu.IR, & ovf); cu 4816 src/dps8/dps8_ins.c I_ZNOC, & cpu.cu.IR, & ovf); cu 4835 src/dps8/dps8_ins.c I_ZNOC, & cpu.cu.IR, & ovf); cu 4854 src/dps8/dps8_ins.c cpu.rA = Sub36b (cpup, cpu.rA, cpu.CY, 1, I_ZNOC, & cpu.cu.IR, & ovf); cu 4873 src/dps8/dps8_ins.c I_ZNOC, & cpu.cu.IR, cu 4893 src/dps8/dps8_ins.c cpu.rA = Sub36b (cpup, cpu.rA, cpu.CY, 1, I_ZNC, & cpu.cu.IR, & ovf); cu 4917 src/dps8/dps8_ins.c I_ZNC, & cpu.cu.IR, & ovf); cu 4934 src/dps8/dps8_ins.c cpu.rQ = Sub36b (cpup, cpu.rQ, cpu.CY, 1, I_ZNC, & cpu.cu.IR, & ovf); cu 4961 src/dps8/dps8_ins.c I_ZNC, & cpu.cu.IR, & ovf); cu 4976 src/dps8/dps8_ins.c cpu.rQ = Sub36b (cpup, cpu.rQ, cpu.CY, 1, I_ZNOC, & cpu.cu.IR, & ovf); cu 5004 src/dps8/dps8_ins.c I_ZNOC, & cpu.cu.IR, & ovf); cu 5021 src/dps8/dps8_ins.c cpu.CY = Sub36b (cpup, cpu.rA, cpu.CY, 1, I_ZNOC, & cpu.cu.IR, & ovf); cu 5035 src/dps8/dps8_ins.c cpu.CY = Sub36b (cpup, cpu.rQ, cpu.CY, 1, I_ZNOC, & cpu.cu.IR, & ovf); cu 5060 src/dps8/dps8_ins.c I_ZNOC, & cpu.cu.IR, & ovf); cu 5077 src/dps8/dps8_ins.c I_ZNOC, & cpu.cu.IR, & ovf); cu 5096 src/dps8/dps8_ins.c I_ZNOC, & cpu.cu.IR, & ovf); cu 5507 src/dps8/dps8_ins.c cmp72 (cpup, trAQ, tmp72, &cpu.cu.IR); cu 5530 src/dps8/dps8_ins.c cmp18 (cpup, cpu.rX[n], GETHI (cpu.CY), &cpu.cu.IR); cu 5546 src/dps8/dps8_ins.c cmp36wl (cpup, cpu.rA, cpu.CY, cpu.rQ, &cpu.cu.IR); cu 6519 src/dps8/dps8_ins.c cpu.cu.IR = tempIR; cu 7163 src/dps8/dps8_ins.c cpu.cu.xde = 1; cu 7164 src/dps8/dps8_ins.c cpu.cu.xdo = 0; cu 7168 src/dps8/dps8_ins.c cpu.cu.IWB = cpu.CY; cu 7207 src/dps8/dps8_ins.c cpu.cu.xde = 1; cu 7208 src/dps8/dps8_ins.c cpu.cu.xdo = 1; cu 7212 src/dps8/dps8_ins.c cpu.cu.IWB = cpu.Ypair[0]; cu 7213 src/dps8/dps8_ins.c cpu.cu.IRODD = cpu.Ypair[1]; cu 7267 src/dps8/dps8_ins.c cpu.cu.delta = i->tag; cu 7277 src/dps8/dps8_ins.c cpu.cu.rd = 1; cu 7278 src/dps8/dps8_ins.c cpu.cu.repeat_first = 1; cu 7285 src/dps8/dps8_ins.c cpu.cu.delta = i->tag; cu 7293 src/dps8/dps8_ins.c cpu.cu.rl = 1; cu 7294 src/dps8/dps8_ins.c cpu.cu.repeat_first = 1; cu 7301 src/dps8/dps8_ins.c cpu.cu.delta = i->tag; cu 7309 src/dps8/dps8_ins.c cpu.cu.rpt = 1; cu 7310 src/dps8/dps8_ins.c cpu.cu.repeat_first = 1; cu 7964 src/dps8/dps8_ins.c if (cpu.tweaks.l68_mode || cpu.cu.PT_ON) // only clear when enabled cu 7986 src/dps8/dps8_ins.c cpu.cu.PT_ON = 1; cu 7988 src/dps8/dps8_ins.c cpu.cu.PT_ON = 0; cu 8010 src/dps8/dps8_ins.c if (cpu.tweaks.l68_mode || cpu.cu.SD_ON) // only clear when enabled cu 8031 src/dps8/dps8_ins.c cpu.cu.SD_ON = 1; cu 8033 src/dps8/dps8_ins.c cpu.cu.SD_ON = 0; cu 8722 src/dps8/dps8_ins.c cu 8774 src/dps8/dps8_ins.c if (GET_I (cpu.cu.IWB) ? bG7PendingNoTRO (cpup) : bG7Pending (cpup)) cu 8780 src/dps8/dps8_ins.c cu 9740 src/dps8/dps8_ins.c if (get_addr_mode (cpup) == ABSOLUTE_mode && ! (cpu.cu.XSF || cpu.currentInstruction.b29)) // ISOLTS-860 cu 9862 src/dps8/dps8_ins.c if (cpu.cu.FIF) // fault occurred during instruction fetch cu 9870 src/dps8/dps8_ins.c cpu.cu.rfi = 0; cu 9876 src/dps8/dps8_ins.c if (cpu.cu.rfi) cu 9883 src/dps8/dps8_ins.c cpu.cu.rfi = 0; cu 9900 src/dps8/dps8_ins.c cpu.cu.rfi = 0; cu 9904 src/dps8/dps8_ins.c if (cpu.cu.rfi || // S/W asked for the instruction to be started cu 9905 src/dps8/dps8_ins.c cpu.cu.FIF) // fault occurred during instruction fetch cu 9913 src/dps8/dps8_ins.c cpu.cu.rfi = 0; cu 9926 src/dps8/dps8_ins.c cpu.cu.rfi = 1; cu 9957 src/dps8/dps8_ins.c cpu.cu.rfi = 0; cu 9971 src/dps8/dps8_ins.c cpu.cu.rfi = 0; cu 9979 src/dps8/dps8_ins.c cpu.cu.rfi = 1; cu 9996 src/dps8/dps8_ins.c cpu.cu.rfi = 1; cu 606 src/dps8/dps8_math.c m3 = Add72b (cpup, m1, m2, 0, I_CARRY, & cpu.cu.IR, & ovf); cu 2127 src/dps8/dps8_math.c word72 m3 = Add72b (cpup, m1, m2, 0, I_CARRY, & cpu.cu.IR, & ovf); cu 1828 src/dps8/dps8_sys.c cu 1829 src/dps8/dps8_sys.c cu 1830 src/dps8/dps8_sys.c cu 1831 src/dps8/dps8_sys.c cu 4059 src/dps8/dps8_sys.c { "cpus[].cu", SYM_STRUCT_OFFSET, SYM_PTR, offsetof (cpu_state_t, cu) }, cu 94 src/dps8/hdbg.h # define HDBGRegIR(c) hdbgRegW (hreg_IR, (word36) cpu.cu.IR, c) cu 339 src/dps8/panelScraper.c word11 cyc = (cpu.cu.APUCycleBits >> 3) & MASK11; cu 386 src/dps8/panelScraper.c SETL1 (bank_a, 19+3, cpu.cu.XSF); cu 387 src/dps8/panelScraper.c SETL1 (bank_a, 20+3, cpu.cu.SDWAMM); cu 388 src/dps8/panelScraper.c SETL1 (bank_a, 21+3, cpu.cu.SD_ON); cu 389 src/dps8/panelScraper.c SETL1 (bank_a, 22+3, cpu.cu.PTWAMM); cu 390 src/dps8/panelScraper.c SETL1 (bank_a, 23+3, cpu.cu.PT_ON); cu 391 src/dps8/panelScraper.c SETL (bank_a, 24+3, cpu.cu.APUCycleBits, 12); cu 396 src/dps8/panelScraper.c SETL1 (bank_a, 0+3, cpu.cu.IRO_ISN); cu 397 src/dps8/panelScraper.c SETL1 (bank_a, 1+3, cpu.cu.OEB_IOC); cu 398 src/dps8/panelScraper.c SETL1 (bank_a, 2+3, cpu.cu.EOFF_IAIM); cu 399 src/dps8/panelScraper.c SETL1 (bank_a, 3+3, cpu.cu.ORB_ISP); cu 400 src/dps8/panelScraper.c SETL1 (bank_a, 4+3, cpu.cu.ROFF_IPR); cu 401 src/dps8/panelScraper.c SETL1 (bank_a, 5+3, cpu.cu.OWB_NEA); cu 402 src/dps8/panelScraper.c SETL1 (bank_a, 6+3, cpu.cu.WOFF_OOB); cu 403 src/dps8/panelScraper.c SETL1 (bank_a, 7+3, cpu.cu.NO_GA); cu 404 src/dps8/panelScraper.c SETL1 (bank_a, 8+3, cpu.cu.OCB); cu 405 src/dps8/panelScraper.c SETL1 (bank_a, 9+3, cpu.cu.OCALL); cu 406 src/dps8/panelScraper.c SETL1 (bank_a, 10+3, cpu.cu.BOC); cu 407 src/dps8/panelScraper.c SETL1 (bank_a, 11+3, cpu.cu.PTWAM_ER); cu 408 src/dps8/panelScraper.c SETL1 (bank_a, 12+3, cpu.cu.CRT); cu 409 src/dps8/panelScraper.c SETL1 (bank_a, 13+3, cpu.cu.RALR); cu 410 src/dps8/panelScraper.c SETL1 (bank_a, 14+3, cpu.cu.SDWAM_ER); cu 411 src/dps8/panelScraper.c SETL1 (bank_a, 15+3, cpu.cu.OOSB); cu 412 src/dps8/panelScraper.c SETL1 (bank_a, 16+3, cpu.cu.PARU); cu 413 src/dps8/panelScraper.c SETL1 (bank_a, 17+3, cpu.cu.PARL); cu 414 src/dps8/panelScraper.c SETL1 (bank_a, 18+3, cpu.cu.ONC1); cu 415 src/dps8/panelScraper.c SETL1 (bank_a, 19+3, cpu.cu.ONC2); cu 416 src/dps8/panelScraper.c SETL (bank_a, 20+3, cpu.cu.IA, 4); cu 417 src/dps8/panelScraper.c SETL (bank_a, 24+3, cpu.cu.IACHN, 3); cu 418 src/dps8/panelScraper.c SETL (bank_a, 27+3, cpu.cu.CNCHN, 3); cu 419 src/dps8/panelScraper.c SETL (bank_a, 30+3, cpu.cu.FI_ADDR, 5); cu 435 src/dps8/panelScraper.c SETL (bank_a, 30+3, cpu.cu.delta, 6); cu 463 src/dps8/panelScraper.c SETL1 (bank_a, 18+3, cpu.cu.repeat_first); cu 464 src/dps8/panelScraper.c SETL1 (bank_a, 19+3, cpu.cu.rpt); cu 465 src/dps8/panelScraper.c SETL1 (bank_a, 20+3, cpu.cu.rd); cu 466 src/dps8/panelScraper.c SETL1 (bank_a, 21+3, cpu.cu.rl); cu 467 src/dps8/panelScraper.c SETL1 (bank_a, 22+3, cpu.cu.pot); cu 469 src/dps8/panelScraper.c SETL1 (bank_a, 24+3, cpu.cu.xde); cu 470 src/dps8/panelScraper.c SETL1 (bank_a, 25+3, cpu.cu.xdo); cu 472 src/dps8/panelScraper.c SETL1 (bank_a, 27+3, cpu.cu.rfi); cu 474 src/dps8/panelScraper.c SETL1 (bank_a, 29+3, cpu.cu.FIF); cu 475 src/dps8/panelScraper.c SETL (bank_a, 30+3, cpu.cu.CT_HOLD, 6); cu 489 src/dps8/panelScraper.c SETL (bank_a, 0+3, cpu.cu.IWB, 36); cu 494 src/dps8/panelScraper.c SETL (bank_a, 0+3, cpu.cu.IRODD, 36); cu 803 src/dps8/panelScraper.c cu 807 src/dps8/panelScraper.c cu 876 src/dps8/panelScraper.c SETL (bank_d, 0+3, cpu.cu.IWB, 36); cu 877 src/dps8/panelScraper.c SETL (bank_e, 0+3, cpu.cu.IRODD, 36); cu 918 src/dps8/panelScraper.c SETL (bank_f, 0, cpu.cu.IR, 18); cu 951 src/dps8/panelScraper.c SETL (bank_h, 3, cpu.cu.IWB, 36); cu 968 src/dps8/panelScraper.c SETL (bank_j, 32, cpu.cu.xde, 1); cu 969 src/dps8/panelScraper.c SETL (bank_j, 33, cpu.cu.xdo, 1); cu 971 src/dps8/panelScraper.c SETL (bank_j, 35, cpu.cu.rpt, 1); cu 972 src/dps8/panelScraper.c SETL (bank_j, 36, cpu.cu.rl, 1); cu 973 src/dps8/panelScraper.c SETL (bank_j, 37, cpu.cu.rd, 1); cu 975 src/dps8/panelScraper.c SETL (bank_j, 38, TSTF (cpu.cu.IR, I_NBAR), 1);