paged 74 src/dps8/doAppendCycleIndirectWordFetch.h bool paged = false; paged 94 src/dps8/doAppendCycleIndirectWordFetch.h if (! ucCacheCheck (this, cpu.TPR.TSR, cpu.TPR.CA, & bound, & p, & pageAddress, & RSDWH_R1, & paged)) paged 97 src/dps8/doAppendCycleIndirectWordFetch.h if (paged) { paged 342 src/dps8/doAppendCycleIndirectWordFetch.h paged = false; paged 372 src/dps8/doAppendCycleIndirectWordFetch.h paged = true; paged 398 src/dps8/doAppendCycleIndirectWordFetch.h ucCacheSave (cpup, this, cpu.TPR.TSR, cpu.TPR.CA, bound, p, pageAddress, RSDWH_R1, paged); paged 85 src/dps8/doAppendCycleInstructionFetch.h bool paged = false; paged 151 src/dps8/doAppendCycleInstructionFetch.h if (! ucCacheCheck (cpup, this, cpu.TPR.TSR, cpu.TPR.CA, & bound, & p, & pageAddress, & RSDWH_R1, & paged)) paged 155 src/dps8/doAppendCycleInstructionFetch.h if (paged) { paged 475 src/dps8/doAppendCycleInstructionFetch.h paged = false; paged 505 src/dps8/doAppendCycleInstructionFetch.h paged = true; paged 544 src/dps8/doAppendCycleInstructionFetch.h if (cachedPaged != paged) { paged 545 src/dps8/doAppendCycleInstructionFetch.h sim_printf ("cachedPaged %01o != paged %01o\r\n", cachedPaged, paged); paged 568 src/dps8/doAppendCycleInstructionFetch.h if (cachedPaged != paged) sim_printf ("cachedPaged %01o != paged %01o\r\n", cachedPaged, paged); paged 577 src/dps8/doAppendCycleInstructionFetch.h ucCacheSave (cpup, this, cpu.TPR.TSR, cpu.TPR.CA, bound, p, pageAddress, RSDWH_R1, paged); paged 84 src/dps8/doAppendCycleOperandRead.h bool paged; paged 143 src/dps8/doAppendCycleOperandRead.h if (! ucCacheCheck (cpup, this, cpu.TPR.TSR, cpu.TPR.CA, & bound, & p, & pageAddress, & RSDWH_R1, & paged)) { paged 151 src/dps8/doAppendCycleOperandRead.h if (paged) { paged 582 src/dps8/doAppendCycleOperandRead.h paged = false; paged 615 src/dps8/doAppendCycleOperandRead.h paged = true; paged 663 src/dps8/doAppendCycleOperandRead.h if (cachedPaged != paged) { paged 665 src/dps8/doAppendCycleOperandRead.h cachedPaged, paged); paged 690 src/dps8/doAppendCycleOperandRead.h ucCacheSave (cpup, this, cpu.TPR.TSR, cpu.TPR.CA, bound, p, pageAddress, RSDWH_R1, paged); paged 694 src/dps8/doAppendCycleOperandRead.h evcnt, this, cpu.TPR.TSR, cpu.TPR.CA, bound, p, pageAddress, RSDWH_R1, paged); paged 28 src/dps8/ucache.c word1 p, word24 address, word3 r1, bool paged) { paged 41 src/dps8/ucache.c ep->paged = paged; paged 44 src/dps8/ucache.c ucNum, segno, offset, bound, p, address, r1, paged); paged 50 src/dps8/ucache.c word1 * p, word24 * address, word3 * r1, bool * paged) { paged 76 src/dps8/ucache.c if (ep->paged && ((ep->offset & PG18MASK) != (offset & PG18MASK))) { paged 92 src/dps8/ucache.c ucNum, segno, offset, ep->bound, ep->p, ep->address, ep->r1, ep->paged); paged 96 src/dps8/ucache.c paged 113 src/dps8/ucache.c * paged = ep->paged; paged 35 src/dps8/ucache.h bool paged; paged 65 src/dps8/ucache.h word18 offset, word14 bound, word1 p, word24 address, word3 r1, bool paged); paged 68 src/dps8/ucache.h word18 offset, word14 * bound, word1 * p, word24 * address, word3 * r1, bool * paged);