IR               4418 src/dps8/dps8_cpu.c     putbits36_1  (& w0, 17, TSTF (cpu.cu.IR, I_NBAR)?1:0);
IR                984 src/dps8/dps8_cpu.h     word18 IR;     // 18-35 Indicator register
IR                581 src/dps8/dps8_hw_consts.h # define CLR_I_ABS   CLRF (cpu.cu.IR, I_ABS)
IR                582 src/dps8/dps8_hw_consts.h # define CLR_I_MIF   CLRF (cpu.cu.IR, I_MIF)
IR                583 src/dps8/dps8_hw_consts.h # define CLR_I_TRUNC CLRF (cpu.cu.IR, I_TRUNC)
IR                584 src/dps8/dps8_hw_consts.h # define CLR_I_NBAR  CLRF (cpu.cu.IR, I_NBAR)
IR                585 src/dps8/dps8_hw_consts.h # define CLR_I_TALLY CLRF (cpu.cu.IR, I_TALLY)
IR                586 src/dps8/dps8_hw_consts.h # define CLR_I_PMASK CLRF (cpu.cu.IR, I_PMASK)
IR                587 src/dps8/dps8_hw_consts.h # define CLR_I_EOFL  CLRF (cpu.cu.IR, I_EOFL)
IR                588 src/dps8/dps8_hw_consts.h # define CLR_I_EUFL  CLRF (cpu.cu.IR, I_EUFL)
IR                589 src/dps8/dps8_hw_consts.h # define CLR_I_OFLOW CLRF (cpu.cu.IR, I_OFLOW)
IR                590 src/dps8/dps8_hw_consts.h # define CLR_I_CARRY CLRF (cpu.cu.IR, I_CARRY)
IR                591 src/dps8/dps8_hw_consts.h # define CLR_I_NEG   CLRF (cpu.cu.IR, I_NEG)
IR                592 src/dps8/dps8_hw_consts.h # define CLR_I_ZERO  CLRF (cpu.cu.IR, I_ZERO)
IR                594 src/dps8/dps8_hw_consts.h # define SET_I_ABS   SETF (cpu.cu.IR, I_ABS)
IR                595 src/dps8/dps8_hw_consts.h # define SET_I_NBAR  SETF (cpu.cu.IR, I_NBAR)
IR                596 src/dps8/dps8_hw_consts.h # define SET_I_TRUNC SETF (cpu.cu.IR, I_TRUNC)
IR                597 src/dps8/dps8_hw_consts.h # define SET_I_TALLY SETF (cpu.cu.IR, I_TALLY)
IR                598 src/dps8/dps8_hw_consts.h # define SET_I_EOFL  SETF (cpu.cu.IR, I_EOFL)
IR                599 src/dps8/dps8_hw_consts.h # define SET_I_EUFL  SETF (cpu.cu.IR, I_EUFL)
IR                600 src/dps8/dps8_hw_consts.h # define SET_I_OFLOW SETF (cpu.cu.IR, I_OFLOW)
IR                601 src/dps8/dps8_hw_consts.h # define SET_I_CARRY SETF (cpu.cu.IR, I_CARRY)
IR                602 src/dps8/dps8_hw_consts.h # define SET_I_NEG   SETF (cpu.cu.IR, I_NEG)
IR                603 src/dps8/dps8_hw_consts.h # define SET_I_ZERO  SETF (cpu.cu.IR, I_ZERO)
IR                605 src/dps8/dps8_hw_consts.h # define TST_I_ABS   TSTF (cpu.cu.IR, I_ABS)
IR                606 src/dps8/dps8_hw_consts.h # define TST_I_MIF   TSTF (cpu.cu.IR, I_MIF)
IR                607 src/dps8/dps8_hw_consts.h # define TST_I_NBAR  TSTF (cpu.cu.IR, I_NBAR)
IR                608 src/dps8/dps8_hw_consts.h # define TST_I_PMASK TSTF (cpu.cu.IR, I_PMASK)
IR                609 src/dps8/dps8_hw_consts.h # define TST_I_TRUNC TSTF (cpu.cu.IR, I_TRUNC)
IR                610 src/dps8/dps8_hw_consts.h # define TST_I_TALLY TSTF (cpu.cu.IR, I_TALLY)
IR                611 src/dps8/dps8_hw_consts.h # define TST_I_OMASK TSTF (cpu.cu.IR, I_OMASK)
IR                612 src/dps8/dps8_hw_consts.h # define TST_I_EUFL  TSTF (cpu.cu.IR, I_EUFL )
IR                613 src/dps8/dps8_hw_consts.h # define TST_I_EOFL  TSTF (cpu.cu.IR, I_EOFL )
IR                614 src/dps8/dps8_hw_consts.h # define TST_I_OFLOW TSTF (cpu.cu.IR, I_OFLOW)
IR                615 src/dps8/dps8_hw_consts.h # define TST_I_CARRY TSTF (cpu.cu.IR, I_CARRY)
IR                616 src/dps8/dps8_hw_consts.h # define TST_I_NEG   TSTF (cpu.cu.IR, I_NEG)
IR                617 src/dps8/dps8_hw_consts.h # define TST_I_ZERO  TSTF (cpu.cu.IR, I_ZERO)
IR                618 src/dps8/dps8_hw_consts.h # define TST_I_HEX   TSTF (cpu.cu.IR, I_HEX)
IR                620 src/dps8/dps8_hw_consts.h # define SC_I_HEX(v)   SCF (v, cpu.cu.IR, I_HEX) // DPS8M only
IR                621 src/dps8/dps8_hw_consts.h # define SC_I_MIF(v)   SCF (v, cpu.cu.IR, I_MIF)
IR                622 src/dps8/dps8_hw_consts.h # define SC_I_TALLY(v) SCF (v, cpu.cu.IR, I_TALLY)
IR                623 src/dps8/dps8_hw_consts.h # define SC_I_NEG(v)   SCF (v, cpu.cu.IR, I_NEG)
IR                624 src/dps8/dps8_hw_consts.h # define SC_I_ZERO(v)  SCF (v, cpu.cu.IR, I_ZERO)
IR                625 src/dps8/dps8_hw_consts.h # define SC_I_CARRY(v) SCF (v, cpu.cu.IR, I_CARRY);
IR                626 src/dps8/dps8_hw_consts.h # define SC_I_OFLOW(v) SCF (v, cpu.cu.IR, I_OFLOW);
IR                627 src/dps8/dps8_hw_consts.h # define SC_I_EOFL(v)  SCF (v, cpu.cu.IR, I_EOFL);
IR                628 src/dps8/dps8_hw_consts.h # define SC_I_EUFL(v)  SCF (v, cpu.cu.IR, I_EUFL);
IR                629 src/dps8/dps8_hw_consts.h # define SC_I_OMASK(v) SCF (v, cpu.cu.IR, I_OMASK);
IR                630 src/dps8/dps8_hw_consts.h # define SC_I_PERR(v)  SCF (v, cpu.cu.IR, I_PERR);
IR                631 src/dps8/dps8_hw_consts.h # define SC_I_PMASK(v) SCF (v, cpu.cu.IR, I_PMASK);
IR                632 src/dps8/dps8_hw_consts.h # define SC_I_TRUNC(v) SCF (v, cpu.cu.IR, I_TRUNC);
IR                442 src/dps8/dps8_ins.c     putbits36_18 (& words[4], 18, cpu.cu.IR);
IR                715 src/dps8/dps8_ins.c     cpu.cu.IR           = getbits36_18 (words[4], 18); // HWR
IR               2298 src/dps8/dps8_ins.c                cpu.rA, cpu.rQ, dump_flags (buf, cpu.cu.IR));
IR               2827 src/dps8/dps8_ins.c           cmp36 (cpup, cpu.rQ, cpu.CY, &cpu.cu.IR);
IR               3039 src/dps8/dps8_ins.c           cmp36 (cpup, cpu.rA, cpu.CY, &cpu.cu.IR);
IR               3052 src/dps8/dps8_ins.c                                  & cpu.cu.IR, & ovf);
IR               3088 src/dps8/dps8_ins.c             if (! (cpu.cu.IR & I_NEG) && ! (cpu.cu.IR & I_ZERO))
IR               3365 src/dps8/dps8_ins.c                                  & cpu.cu.IR, & ovf);
IR               3377 src/dps8/dps8_ins.c             if (cpu.cu.IR & (I_NEG | I_ZERO))
IR               3552 src/dps8/dps8_ins.c           DPS8M_ (cpu.CY = cpu.cu.IR & 0000000777770LL; )
IR               3554 src/dps8/dps8_ins.c           L68_ (cpu.CY = cpu.cu.IR & 0000000777760LL;)
IR               3557 src/dps8/dps8_ins.c             cpu.CY = cpu.cu.IR & 0000000777600LL;
IR               3603 src/dps8/dps8_ins.c             cpu.rA = compl36 (cpup, cpu.CY, & cpu.cu.IR, & ovf);
IR               3614 src/dps8/dps8_ins.c             cpu.rQ = compl36 (cpup, cpu.CY, & cpu.cu.IR, & ovf);
IR               3634 src/dps8/dps8_ins.c             cpu.rX[n] = compl18 (cpup, GETHI (cpu.CY), & cpu.cu.IR, & ovf);
IR               3931 src/dps8/dps8_ins.c           DPS8M_ (SETLO (cpu.CY, cpu.cu.IR & 0777770);)
IR               3932 src/dps8/dps8_ins.c           L68_ (SETLO (cpu.CY, cpu.cu.IR & 0777760);)
IR               4580 src/dps8/dps8_ins.c             cpu.rA = Add36b (cpup, cpu.rA, cpu.CY, 0, I_ZNOC, & cpu.cu.IR, & ovf);
IR               4599 src/dps8/dps8_ins.c                                    tmp72, 0, I_ZNOC, & cpu.cu.IR, & ovf);
IR               4620 src/dps8/dps8_ins.c                                    tmp72, 0, I_ZNOC, & cpu.cu.IR, & ovf);
IR               4645 src/dps8/dps8_ins.c                             tmp72, 0, I_ZNC, & cpu.cu.IR, & ovf);
IR               4666 src/dps8/dps8_ins.c             cpu.rA = Add36b (cpup, cpu.rA, cpu.CY, 0, I_ZNC, & cpu.cu.IR, & ovf);
IR               4685 src/dps8/dps8_ins.c             cpu.rQ = Add36b (cpup, cpu.rQ, cpu.CY, 0, I_ZNC, & cpu.cu.IR, & ovf);
IR               4709 src/dps8/dps8_ins.c                              & cpu.cu.IR, & ovf);
IR               4737 src/dps8/dps8_ins.c                                  & cpu.cu.IR, & ovf);
IR               4758 src/dps8/dps8_ins.c                              & cpu.cu.IR, & ovf);
IR               4771 src/dps8/dps8_ins.c             cpu.CY = Add36b (cpup, cpu.rQ, cpu.CY, 0, I_ZNOC, & cpu.cu.IR, & ovf);
IR               4795 src/dps8/dps8_ins.c                                    I_ZNOC, & cpu.cu.IR, & ovf);
IR               4812 src/dps8/dps8_ins.c                                  I_ZNOC, & cpu.cu.IR, & ovf);
IR               4831 src/dps8/dps8_ins.c                              I_ZNOC, & cpu.cu.IR, & ovf);
IR               4850 src/dps8/dps8_ins.c             cpu.rA = Sub36b (cpup, cpu.rA, cpu.CY, 1, I_ZNOC, & cpu.cu.IR, & ovf);
IR               4869 src/dps8/dps8_ins.c                             I_ZNOC, & cpu.cu.IR,
IR               4889 src/dps8/dps8_ins.c             cpu.rA = Sub36b (cpup, cpu.rA, cpu.CY, 1, I_ZNC, & cpu.cu.IR, & ovf);
IR               4913 src/dps8/dps8_ins.c                             I_ZNC, & cpu.cu.IR, & ovf);
IR               4930 src/dps8/dps8_ins.c             cpu.rQ = Sub36b (cpup, cpu.rQ, cpu.CY, 1, I_ZNC, & cpu.cu.IR, & ovf);
IR               4957 src/dps8/dps8_ins.c                              I_ZNC, & cpu.cu.IR, & ovf);
IR               4972 src/dps8/dps8_ins.c             cpu.rQ = Sub36b (cpup, cpu.rQ, cpu.CY, 1, I_ZNOC, & cpu.cu.IR, & ovf);
IR               5000 src/dps8/dps8_ins.c                                  I_ZNOC, & cpu.cu.IR, & ovf);
IR               5017 src/dps8/dps8_ins.c             cpu.CY = Sub36b (cpup, cpu.rA, cpu.CY, 1, I_ZNOC, & cpu.cu.IR, & ovf);
IR               5031 src/dps8/dps8_ins.c             cpu.CY = Sub36b (cpup, cpu.rQ, cpu.CY, 1, I_ZNOC, & cpu.cu.IR, & ovf);
IR               5056 src/dps8/dps8_ins.c                                    I_ZNOC, & cpu.cu.IR, & ovf);
IR               5073 src/dps8/dps8_ins.c                              I_ZNOC, & cpu.cu.IR, & ovf);
IR               5092 src/dps8/dps8_ins.c                                  I_ZNOC, & cpu.cu.IR, & ovf);
IR               5503 src/dps8/dps8_ins.c             cmp72 (cpup, trAQ, tmp72, &cpu.cu.IR);
IR               5526 src/dps8/dps8_ins.c             cmp18 (cpup, cpu.rX[n], GETHI (cpu.CY), &cpu.cu.IR);
IR               5542 src/dps8/dps8_ins.c           cmp36wl (cpup, cpu.rA, cpu.CY, cpu.rQ, &cpu.cu.IR);
IR               6515 src/dps8/dps8_ins.c             cpu.cu.IR = tempIR;
IR                606 src/dps8/dps8_math.c   m3 = Add72b (cpup, m1, m2, 0, I_CARRY, & cpu.cu.IR, & ovf);
IR               2127 src/dps8/dps8_math.c   word72 m3 = Add72b (cpup, m1, m2, 0, I_CARRY, & cpu.cu.IR, & ovf);
IR                 26 src/dps8/dps8_mp.h     word36 A, Q, E, X [8], IR, TR, RALR;
IR               4062 src/dps8/dps8_sys.c     { "cpus[].cu.IR",           SYM_STRUCT_OFFSET, SYM_UINT32_18, offsetof (ctl_unit_data_t,       IR)          },
IR                 94 src/dps8/hdbg.h #  define HDBGRegIR(c) hdbgRegW (hreg_IR, (word36) cpu.cu.IR, c)
IR                918 src/dps8/panelScraper.c     SETL (bank_f, 0, cpu.cu.IR, 18);
IR                975 src/dps8/panelScraper.c     SETL (bank_j, 38, TSTF (cpu.cu.IR, I_NBAR), 1);