tweaks             34 src/dps8/doAppendCycleABSA.h   if (cpu.tweaks.enable_wam) {
tweaks             32 src/dps8/doAppendCycleAPUDataRMW.h   if (cpu.tweaks.enable_wam) {
tweaks             32 src/dps8/doAppendCycleAPUDataRead.h   if (cpu.tweaks.enable_wam) {
tweaks             32 src/dps8/doAppendCycleAPUDataStore.h   if (cpu.tweaks.enable_wam) {
tweaks            119 src/dps8/doAppendCycleIndirectWordFetch.h   if (cpu.tweaks.enable_wam) {
tweaks             21 src/dps8/doAppendCycleInstructionFetch.h   do { if (cpu.tweaks.l68_mode) cpu.cu.APUCycleBits |= 04000; } while (0)
tweaks            185 src/dps8/doAppendCycleInstructionFetch.h   if (cpu.tweaks.enable_wam) {
tweaks             32 src/dps8/doAppendCycleOperandRMW.h   if (cpu.tweaks.enable_wam) {
tweaks            183 src/dps8/doAppendCycleOperandRead.h   if (cpu.tweaks.enable_wam) {
tweaks             32 src/dps8/doAppendCycleOperandStore.h   if (cpu.tweaks.enable_wam) {
tweaks             32 src/dps8/doAppendCycleRTCDOperandFetch.h   if (cpu.tweaks.enable_wam) {
tweaks            118 src/dps8/dps8.h # define L68_(x) if (cpu.tweaks.l68_mode) { x }
tweaks            119 src/dps8/dps8.h # define DPS8M_(x) if (! cpu.tweaks.l68_mode) { x }
tweaks            123 src/dps8/dps8.h #  define IF1 if (cpu.tweaks.isolts_mode)
tweaks            419 src/dps8/dps8_addrmods.c        if ((cpu.tweaks.isolts_mode || cpu.tweaks.tandd_mode) &&
tweaks           1431 src/dps8/dps8_addrmods.c                 if (cpu.tweaks.isolts_mode || cpu.tweaks.tandd_mode)
tweaks            172 src/dps8/dps8_append.c     if (cpu.tweaks.enable_wam)
tweaks            212 src/dps8/dps8_append.c     if (cpu.switches.enable_cache && cpu.tweaks.enable_wam) {
tweaks            353 src/dps8/dps8_append.c   if ((! cpu.tweaks.enable_wam || ! cpu.cu.SD_ON)) {
tweaks            358 src/dps8/dps8_append.c   if (cpu.tweaks.l68_mode) { // L68
tweaks            391 src/dps8/dps8_append.c   if (! cpu.tweaks.l68_mode) { // DPS8M
tweaks            615 src/dps8/dps8_append.c     if (nomatch || (! cpu.tweaks.enable_wam) || (! cpu.cu.SD_ON))
tweaks            621 src/dps8/dps8_append.c     if (cpu.tweaks.l68_mode) { // L68
tweaks            663 src/dps8/dps8_append.c     if (! cpu.tweaks.l68_mode) { // DPS8M
tweaks            700 src/dps8/dps8_append.c     if ((! cpu.tweaks.enable_wam) || (! cpu.cu.PT_ON))
tweaks            706 src/dps8/dps8_append.c     if (cpu.tweaks.l68_mode) { // L68
tweaks            851 src/dps8/dps8_append.c     if (nomatch || (! cpu.tweaks.enable_wam) || (! cpu.cu.PT_ON))
tweaks            857 src/dps8/dps8_append.c     if (cpu.tweaks.l68_mode) { // L68
tweaks           1241 src/dps8/dps8_append.c     if (cpu.tweaks.enable_wam)
tweaks            162 src/dps8/dps8_cache.c # define L68 cpu.tweaks.l68_mode
tweaks            348 src/dps8/dps8_cache.c   return cpu.switches.enable_cache && cpu.tweaks.enable_wam;
tweaks            751 src/dps8/dps8_cache.c   if (! nBadParity || ! cpu.tweaks.tandd_mode)
tweaks            909 src/dps8/dps8_cache.c   if (nBadParity && cpu.tweaks.tandd_mode) // reading memory could fault
tweaks            128 src/dps8/dps8_cpu.c #define LUF_OVER(n) (cpu.tweaks.tandd_mode ? \
tweaks            204 src/dps8/dps8_cpu.c     for (int i = 0; i < (cpus[cpu_unit_idx].tweaks.l68_mode ? N_L68_CPU_PORTS : N_DPS8M_CPU_PORTS); i ++)
tweaks            231 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.dis_enable);
tweaks            235 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.halt_on_unimp);
tweaks            237 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.enable_wam);
tweaks            239 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.report_faults);
tweaks            241 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.tro_enable);
tweaks            243 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.drl_fatal);
tweaks            245 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.useMap);
tweaks            260 src/dps8/dps8_cpu.c     sim_msg ("ISOLTS mode:                  %01o(8)\r\n", cpus[cpu_unit_idx].tweaks.isolts_mode);
tweaks            261 src/dps8/dps8_cpu.c     sim_msg ("T&D mode:                     %01o(8)\r\n", cpus[cpu_unit_idx].tweaks.tandd_mode);
tweaks            262 src/dps8/dps8_cpu.c     sim_msg ("NODIS mode:                   %01o(8)\r\n", cpus[cpu_unit_idx].tweaks.nodis);
tweaks            264 src/dps8/dps8_cpu.c              cpus[cpu_unit_idx].tweaks.l68_mode, cpus[cpu_unit_idx].tweaks.l68_mode ? "6180" : "DPS8/M");
tweaks            543 src/dps8/dps8_cpu.c           if ((! cpus[cpu_unit_idx].tweaks.l68_mode) && (int) v > 3) {
tweaks            559 src/dps8/dps8_cpu.c             if (cpus[cpu_unit_idx].tweaks.l68_mode) {
tweaks            596 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.dis_enable = (uint) v;
tweaks            600 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.halt_on_unimp = (uint) v;
tweaks            604 src/dps8/dps8_cpu.c             cpus[cpu_unit_idx].tweaks.enable_wam = (uint) v;
tweaks            608 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.report_faults = (uint) v;
tweaks            610 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.tro_enable = (uint) v;
tweaks            612 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.drl_fatal = (uint) v;
tweaks            614 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.useMap = v;
tweaks            624 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.enable_emcall = v;
tweaks            639 src/dps8/dps8_cpu.c             cpus[cpu_unit_idx].tweaks.tandd_mode = v ? true : false;
tweaks            644 src/dps8/dps8_cpu.c             bool was = cpus[cpu_unit_idx].tweaks.isolts_mode;
tweaks            645 src/dps8/dps8_cpu.c             cpus[cpu_unit_idx].tweaks.isolts_mode = v;
tweaks            648 src/dps8/dps8_cpu.c               if (cpus[cpu_unit_idx].tweaks.l68_mode) // L68
tweaks            656 src/dps8/dps8_cpu.c               cpus[cpu_unit_idx].tweaks.useMap            = true;
tweaks            657 src/dps8/dps8_cpu.c               cpus[cpu_unit_idx].tweaks.enable_wam        = true;
tweaks            682 src/dps8/dps8_cpu.c               if (cpus[cpu_unit_idx].tweaks.l68_mode) { // L68
tweaks            741 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.nodis = v;
tweaks            743 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.l68_mode = v;
tweaks            883 src/dps8/dps8_cpu.c   cpun->tweaks.l68_mode = 1;
tweaks            908 src/dps8/dps8_cpu.c   cpun->tweaks.l68_mode = 0;
tweaks           1001 src/dps8/dps8_cpu.c     if (cpu.tweaks.isolts_mode)
tweaks           1015 src/dps8/dps8_cpu.c     if (cpu.tweaks.nodis) {
tweaks           1054 src/dps8/dps8_cpu.c     if (cpun->tweaks.isolts_mode)
tweaks           1057 src/dps8/dps8_cpu.c         if (cpun->tweaks.useMap)
tweaks           1375 src/dps8/dps8_cpu.c     int n_ports = cpu.tweaks.l68_mode ? N_L68_CPU_PORTS : N_DPS8M_CPU_PORTS;
tweaks           1388 src/dps8/dps8_cpu.c         uint sz_wds = cpu.tweaks.l68_mode ?
tweaks           1389 src/dps8/dps8_cpu.c                         (cpu.tweaks.isolts_mode && store_size == 3 ?
tweaks           1593 src/dps8/dps8_cpu.c     if (! cpu.tweaks.tandd_mode)
tweaks           1646 src/dps8/dps8_cpu.c     if (! cpu.tweaks.tandd_mode || ! (cpu.MR.separ || cpu.MR.sdpap))
tweaks           1701 src/dps8/dps8_cpu.c     if (! cpu.tweaks.tandd_mode)
tweaks           1851 src/dps8/dps8_cpu.c     int n_ports = cpu.tweaks.l68_mode ? N_L68_CPU_PORTS : N_DPS8M_CPU_PORTS;
tweaks           1861 src/dps8/dps8_cpu.c         uint sz_wds = cpu.tweaks.l68_mode ?
tweaks           1862 src/dps8/dps8_cpu.c                         (cpu.tweaks.isolts_mode && store_size == 3 ?
tweaks           1884 src/dps8/dps8_cpu.c     if (cpu.tweaks.tandd_mode)
tweaks           1900 src/dps8/dps8_cpu.c     for (int port_num = 0; port_num < (cpu.tweaks.l68_mode ? N_L68_CPU_PORTS : N_DPS8M_CPU_PORTS); port_num ++)
tweaks           1938 src/dps8/dps8_cpu.c           cpu.tweaks.l68_mode ?
tweaks           1939 src/dps8/dps8_cpu.c             cpu.tweaks.isolts_mode ?
tweaks           2431 src/dps8/dps8_cpu.c     if (cpu.tweaks.isolts_mode == 0)
tweaks           2786 src/dps8/dps8_cpu.c     if ((cpu.tweaks.tandd_mode || cpu.tweaks.isolts_mode) &&
tweaks           2787 src/dps8/dps8_cpu.c         ! cpu.tweaks.l68_mode &&
tweaks           2818 src/dps8/dps8_cpu.c     if (cpu.tweaks.isolts_mode && ! cpu.tweaks.tandd_mode)
tweaks           3041 src/dps8/dps8_cpu.c     if (cpu.tweaks.isolts_mode) {
tweaks           3106 src/dps8/dps8_cpu.c         if (cpu.tweaks.isolts_mode)
tweaks           3118 src/dps8/dps8_cpu.c                         if (cpu.tweaks.tro_enable)
tweaks           3133 src/dps8/dps8_cpu.c         if (cpu.tweaks.tandd_mode)
tweaks           3167 src/dps8/dps8_cpu.c             if (cpu.tweaks.tro_enable) {
tweaks           3361 src/dps8/dps8_cpu.c                 if (cpu.tweaks.tandd_mode)
tweaks           3578 src/dps8/dps8_cpu.c 
tweaks           3646 src/dps8/dps8_cpu.c                 cpu.syncClockModePoll = cpu.tweaks.isolts_mode ? 1 : syncClockModePollRate;
tweaks           3693 src/dps8/dps8_cpu.c                               cpus[i].workAllocation += cpu.tweaks.isolts_mode ? 1 : workAllocationQuantum;
tweaks           3770 src/dps8/dps8_cpu.c               if (LIKELY (! cpu.tweaks.isolts_mode) &&
tweaks           3809 src/dps8/dps8_cpu.c               if (cpu.tweaks.l68_mode)
tweaks           3976 src/dps8/dps8_cpu.c                       if (cpu.tweaks.tro_enable) {
tweaks           4014 src/dps8/dps8_cpu.c                       if (cpu.tweaks.tro_enable)
tweaks           4056 src/dps8/dps8_cpu.c                       if (cpu.tweaks.tro_enable) {
tweaks           4258 src/dps8/dps8_cpu.c                   ! cpu.tweaks.l68_mode)
tweaks           4736 src/dps8/dps8_cpu.c     if (nBadParity && cpu.tweaks.tandd_mode && bad_parity_marked (addr))
tweaks           4764 src/dps8/dps8_cpu.c     if (cpu.tweaks.isolts_mode)
tweaks           4848 src/dps8/dps8_cpu.c     if (cpu.tweaks.isolts_mode)
tweaks           5004 src/dps8/dps8_cpu.c   if (cpu.tweaks.isolts_mode) {
tweaks           5331 src/dps8/dps8_cpu.c     add_history (cpu.tweaks.l68_mode ? L68_APU_HIST_REG : DPS8M_APU_HIST_REG, w0, w1);
tweaks           6378 src/dps8/dps8_cpu.c   cpus[0].tweaks.enable_emcall = 1;
tweaks           1601 src/dps8/dps8_cpu.h #define N_MODEL_WAM_ENTRIES (cpu.tweaks.l68_mode ? N_L68_WAM_ENTRIES : N_DPS8M_WAM_ENTRIES)
tweaks           1741 src/dps8/dps8_cpu.h     tweaksType tweaks;
tweaks           1961 src/dps8/dps8_cpu.h    if (cpu.tweaks.useMap)                                      \
tweaks           1974 src/dps8/dps8_cpu.h                 if (cpu.tweaks.tandd_mode)                     \
tweaks           1985 src/dps8/dps8_cpu.h    if (cpu.tweaks.useMap)                                      \
tweaks           1998 src/dps8/dps8_cpu.h                 if (cpu.tweaks.tandd_mode)                     \
tweaks           2241 src/dps8/dps8_cpu.h     if (cpu.tweaks.isolts_mode)
tweaks           2265 src/dps8/dps8_cpu.h     if (cpu.tweaks.isolts_mode)
tweaks           2304 src/dps8/dps8_cpu.h     if (cpu.tweaks.isolts_mode)
tweaks           2008 src/dps8/dps8_eis.c     if (! cpu.tweaks.tandd_mode || cpu.currentInstruction.i ||
tweaks           2021 src/dps8/dps8_eis.c         if (cpu.tweaks.tro_enable)
tweaks           3402 src/dps8/dps8_eis.c     bool l68Res = cpu.tweaks.l68_mode && cpu.tweaks.tandd_mode;
tweaks           9139 src/dps8/dps8_eis.c     if (cpu.tweaks.tandd_mode)
tweaks            360 src/dps8/dps8_faults.c     return cpu.tweaks.l68_mode ? 0 : cpu.neaPort;
tweaks            491 src/dps8/dps8_faults.c                  cpu.tweaks.l68_mode)
tweaks            550 src/dps8/dps8_faults.c     cpu.l68OddFault = cpu.tweaks.l68_mode && cpu.cycle == EXEC_cycle &&
tweaks            707 src/dps8/dps8_faults.c             if (cpu.tweaks.tandd_mode && ! cpu.neaNoPort)
tweaks           1033 src/dps8/dps8_faults.c     if (cpu.tweaks.l68_mode)
tweaks           1041 src/dps8/dps8_faults.c     if (cpu.tweaks.l68_mode)
tweaks           1142 src/dps8/dps8_faults.c      if (cpu.tweaks.l68_mode) {  // L68
tweaks           1473 src/dps8/dps8_hw_consts.h # define N_MODEL_HIST_SIZE (cpu.tweaks.l68_mode ? N_L68_HIST_SIZE : N_DPS8M_HIST_SIZE)
tweaks            301 src/dps8/dps8_ins.c     if (cpu.tweaks.l68_mode)
tweaks            531 src/dps8/dps8_ins.c     if (cpu.tweaks.isolts_mode)
tweaks            785 src/dps8/dps8_ins.c     if (cpu.tweaks.isolts_mode || cpu.tweaks.tandd_mode)
tweaks            805 src/dps8/dps8_ins.c     if (cpu.tweaks.isolts_mode || cpu.tweaks.tandd_mode)
tweaks            899 src/dps8/dps8_ins.c     if (cpu.tweaks.isolts_mode || cpu.tweaks.tandd_mode)
tweaks           1244 src/dps8/dps8_ins.c         if (cpu.tweaks.l68_mode)
tweaks           1248 src/dps8/dps8_ins.c         if (cpu.tweaks.l68_mode)
tweaks           1947 src/dps8/dps8_ins.c     if (!restart && ! (cpu.tweaks.tandd_mode && TST_I_MIF &&
tweaks           2238 src/dps8/dps8_ins.c     if (cpu.tweaks.l68_mode)
tweaks           2503 src/dps8/dps8_ins.c     if (cpu.tweaks.l68_mode) { // L68
tweaks           3362 src/dps8/dps8_ins.c             if (cpu.tweaks.l68_mode)
tweaks           3923 src/dps8/dps8_ins.c           if (cpu.tweaks.isolts_mode && ! cpu.tweaks.tandd_mode)   // as stt
tweaks           4123 src/dps8/dps8_ins.c           if (cpu.tweaks.isolts_mode && ! cpu.tweaks.tandd_mode)
tweaks           7249 src/dps8/dps8_ins.c             if (cpu.tweaks.l68_mode)
tweaks           7312 src/dps8/dps8_ins.c           if (cpu.tweaks.drl_fatal)
tweaks           7665 src/dps8/dps8_ins.c                   if (! cpu.tweaks.l68_mode) // DPS8M
tweaks           7738 src/dps8/dps8_ins.c           if (cpu.tweaks.isolts_mode)
tweaks           7750 src/dps8/dps8_ins.c           if (cpu.tweaks.l68_mode && cpu.tweaks.tandd_mode && cpu.rTR == 0)
tweaks           7753 src/dps8/dps8_ins.c               if (cpu.tweaks.tro_enable)
tweaks           7771 src/dps8/dps8_ins.c           if (cpu.tweaks.l68_mode) {
tweaks           7789 src/dps8/dps8_ins.c           if (cpu.tweaks.l68_mode) {
tweaks           7817 src/dps8/dps8_ins.c           if (cpu.tweaks.l68_mode) {
tweaks           7832 src/dps8/dps8_ins.c           if (cpu.tweaks.l68_mode) {
tweaks           7875 src/dps8/dps8_ins.c                     uint reg = cpu.tweaks.l68_mode ? L68_APU_HIST_REG : DPS8M_APU_HIST_REG;
tweaks           7900 src/dps8/dps8_ins.c                     if (! cpu.tweaks.l68_mode ||
tweaks           7933 src/dps8/dps8_ins.c                     uint reg = cpu.tweaks.l68_mode ? L68_DU_HIST_REG : DPS8M_EAPU_HIST_REG;
tweaks           7955 src/dps8/dps8_ins.c                     uint reg = cpu.tweaks.l68_mode ? L68_OU_HIST_REG : DPS8M_DU_OU_HIST_REG;
tweaks           8166 src/dps8/dps8_ins.c             if (cpu.tweaks.enable_wam)
tweaks           8168 src/dps8/dps8_ins.c                 if (cpu.tweaks.l68_mode || cpu.cu.PT_ON) // only clear when enabled
tweaks           8213 src/dps8/dps8_ins.c             if (cpu.tweaks.enable_wam)
tweaks           8215 src/dps8/dps8_ins.c                 if (cpu.tweaks.l68_mode || cpu.cu.SD_ON) // only clear when enabled
tweaks           8322 src/dps8/dps8_ins.c             if (! (cpu.tweaks.tandd_mode && scr_port_from_final_address (cpup, & cpu_port_num)))
tweaks           8324 src/dps8/dps8_ins.c                 uint shift = cpu.tweaks.tandd_mode ? 15 : 10;
tweaks           8368 src/dps8/dps8_ins.c             if (! cpu.tweaks.l68_mode) {
tweaks           8539 src/dps8/dps8_ins.c                   if (cpu.tweaks.l68_mode)
tweaks           8560 src/dps8/dps8_ins.c                   if (cpu.tweaks.l68_mode)
tweaks           8610 src/dps8/dps8_ins.c                   if (!cpu.tweaks.l68_mode) { // DPS8M
tweaks           8868 src/dps8/dps8_ins.c             if (! (cpu.tweaks.tandd_mode && scr_port_from_final_address (cpup, & cpu_port_num)))
tweaks           8870 src/dps8/dps8_ins.c                 uint shift = cpu.tweaks.tandd_mode ? 15 : 10;
tweaks           8936 src/dps8/dps8_ins.c           if (! cpu.tweaks.dis_enable)
tweaks           8948 src/dps8/dps8_ins.c           if ((! cpu.tweaks.tro_enable) &&
tweaks           9070 src/dps8/dps8_ins.c               if (cpu.tweaks.tandd_mode) // see FETCH_cycle
tweaks           9120 src/dps8/dps8_ins.c               if (cpu.tweaks.tandd_mode) // see FETCH_cycle
tweaks           9769 src/dps8/dps8_ins.c             if (cpu.tweaks.enable_emcall) {
tweaks           9780 src/dps8/dps8_ins.c           if (cpu.tweaks.halt_on_unimp)
tweaks           10127 src/dps8/dps8_ins.c     int n_ports = cpu.tweaks.l68_mode ? N_L68_CPU_PORTS : N_DPS8M_CPU_PORTS;
tweaks           10134 src/dps8/dps8_ins.c         uint sz_wds = cpu.tweaks.l68_mode ? l68_store_table [store_size] :
tweaks            455 src/dps8/dps8_math.c     return (! cpu.tweaks.l68_mode) && (!! cpu.options.hex_mode_installed) &&  (!! cpu.MR.hexfp) && (!! TST_I_HEX);
tweaks           1284 src/dps8/dps8_scu.c     if (cpu.tweaks.tandd_mode && tandd_io_mode ())
tweaks           1874 src/dps8/dps8_scu.c             if (cpup && cpu.tweaks.tandd_mode)
tweaks            452 src/dps8/segldr.c     cpus[0].tweaks.enable_emcall = 1;
tweaks             70 src/dps8/ucache.c   if (cpu.tweaks.enable_wam && (! cpu.cu.SD_ON || (ep->paged && ! cpu.cu.PT_ON)))