IC 281 src/dps8/doAppendCycleABSA.h DBGAPP ("doAppendCycleABSA (Exit) PRR %o PSR %05o P %o IC %06o\r\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); IC 347 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("doAppendCycleAPUDataRMW (Exit) PRR %o PSR %05o P %o IC %06o\r\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); IC 300 src/dps8/doAppendCycleAPUDataRead.h DBGAPP ("doAppendCycleAPUDataRead (Exit) PRR %o PSR %05o P %o IC %06o\r\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); IC 303 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("doAppendCycleAPUDataStore (Exit) PRR %o PSR %05o P %o IC %06o\r\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); IC 473 src/dps8/doAppendCycleIndirectWordFetch.h cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); IC 646 src/dps8/doAppendCycleInstructionFetch.h cpu.PPR.IC = cpu.TPR.CA; IC 669 src/dps8/doAppendCycleInstructionFetch.h cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); IC 354 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("doAppendCycleOperandRMW (Exit) PRR %o PSR %05o P %o IC %06o\r\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); IC 747 src/dps8/doAppendCycleOperandRead.h cpu.PR[n].WORDNO = (cpu.PPR.IC + 1) & MASK18; IC 760 src/dps8/doAppendCycleOperandRead.h cpu.PPR.IC = cpu.TPR.CA; IC 807 src/dps8/doAppendCycleOperandRead.h cpu.PPR.IC = cpu.TPR.CA; IC 818 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead (Exit) PRR %o PSR %05o P %o IC %06o\r\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); IC 308 src/dps8/doAppendCycleOperandStore.h DBGAPP ("doAppendCycleOperandStore (Exit) PRR %o PSR %05o P %o IC %06o\r\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); IC 368 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.PPR.IC = cpu.TPR.CA; IC 392 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); IC 85 src/dps8/dps8_addrmods.c return cpu.PPR.IC; IC 2088 src/dps8/dps8_append.c cpu.PR[n].WORDNO = (cpu.PPR.IC + 1) & MASK18; IC 2137 src/dps8/dps8_append.c cpu.PPR.IC = cpu.TPR.CA; IC 2191 src/dps8/dps8_append.c cpu.PPR.IC = cpu.TPR.CA; IC 2237 src/dps8/dps8_append.c cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); IC 988 src/dps8/dps8_console.c cpus[i].PPR.IC, IC 994 src/dps8/dps8_cpu.c cpu.PPR.IC = 0; IC 2268 src/dps8/dps8_cpu.c { ORDATA (IC, dummy_IC, VASIZE), 0, 0, 0 }, IC 2270 src/dps8/dps8_cpu.c { ORDATA (IC, cpus[0].PPR.IC, VASIZE), 0, 0, 0 }, IC 2399 src/dps8/dps8_cpu.c "noticed %u ms later\r\n", 'A' + i, cpu.PPR.IC, total, IC 2404 src/dps8/dps8_cpu.c 'A' + i, cpu.PPR.IC, total); IC 2451 src/dps8/dps8_cpu.c sim_brk_test ((cpu.PPR.IC & 0777777) | IC 2790 src/dps8/dps8_cpu.c cpu.PPR.IC = cpu.lufXferIC; IC 2971 src/dps8/dps8_cpu.c cpus [0].PPR.IC = dummy_IC; IC 3263 src/dps8/dps8_cpu.c cpu.PPR.IC = (cpu.PPR.IC - 1) & MASK18; IC 3350 src/dps8/dps8_cpu.c get_BAR_address (cpup, cpu.PPR.IC); IC 3371 src/dps8/dps8_cpu.c fetchInstruction (cpup, cpu.PPR.IC); IC 3419 src/dps8/dps8_cpu.c (cpu.PPR.IC & 1) == 0 && IC 3436 src/dps8/dps8_cpu.c if ((cpu.PPR.IC & 1) == 1) IC 3612 src/dps8/dps8_cpu.c fetchInstruction (cpup, cpu.PPR.IC); IC 3783 src/dps8/dps8_cpu.c stall_points[i].offset && stall_points[i].offset == cpu.PPR.IC) IC 3801 src/dps8/dps8_cpu.c cpu.lufExecIC = cpu.PPR.IC; IC 4080 src/dps8/dps8_cpu.c (cpu.cu.rd && (cpu.PPR.IC & 1)) || IC 4085 src/dps8/dps8_cpu.c -- cpu.PPR.IC; IC 4110 src/dps8/dps8_cpu.c cpu.PPR.IC += ci->info->ndes; IC 4111 src/dps8/dps8_cpu.c cpu.PPR.IC ++; IC 4127 src/dps8/dps8_cpu.c cpu.PPR.IC = (cpu.PPR.IC + 1) & MASK18; IC 4163 src/dps8/dps8_cpu.c cpu.PPR.IC ++; IC 4165 src/dps8/dps8_cpu.c cpu.PPR.IC += ci->info->ndes; IC 4188 src/dps8/dps8_cpu.c if ((cpu.PPR.IC & 1) == 0 && IC 4192 src/dps8/dps8_cpu.c (cpu.PPR.IC & ~3u) != (cpu.last_write & ~3u)) IC 4194 src/dps8/dps8_cpu.c cpu.PPR.IC ++; IC 4201 src/dps8/dps8_cpu.c cpu.PPR.IC ++; IC 4203 src/dps8/dps8_cpu.c cpu.PPR.IC += ci->info->ndes; IC 4218 src/dps8/dps8_cpu.c cpu.PPR.IC += ci->info->ndes; IC 4219 src/dps8/dps8_cpu.c cpu.PPR.IC ++; IC 4469 src/dps8/dps8_cpu.c dummy_IC = cpu.PPR.IC; IC 4682 src/dps8/dps8_cpu.c (long long unsigned int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, real, IC 4702 src/dps8/dps8_cpu.c addr, cpu.PPR.PSR, cpu.PPR.IC, ctx); IC 4709 src/dps8/dps8_cpu.c (long long unsigned int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, addr, IC 4744 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); IC 4791 src/dps8/dps8_cpu.c (long long unsigned int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, IC 4814 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); IC 4832 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); IC 4882 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, IC 4921 src/dps8/dps8_cpu.c addr, cpu.PPR.PSR, cpu.PPR.IC, ctx); IC 4928 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, IC 4939 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); IC 4958 src/dps8/dps8_cpu.c addr, cpu.PPR.PSR, cpu.PPR.IC, ctx); IC 4965 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, IC 4976 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); IC 5018 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, IC 5041 src/dps8/dps8_cpu.c (long long unsigned int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, IC 5581 src/dps8/dps8_cpu.c putbits36_18 (& w1, 54 - 36, cpu.PPR.IC); IC 102 src/dps8/dps8_cpu.h word18 IC; // The word offset from the origin of the procedure segment IC 1107 src/dps8/dps8_cpu.h #define USE_IRODD (cpu.cu.rd && ((cpu. PPR.IC & 1) != 0)) IC 1791 src/dps8/dps8_cpu.h word18 IC; IC 347 src/dps8/dps8_eis.c return cpu.PPR.IC; IC 444 src/dps8/dps8_eis.c return cpu.PPR.IC; IC 519 src/dps8/dps8_eis.c return cpu.PPR.IC; IC 388 src/dps8/dps8_faults.c sim_printf (" TRO PSR:IC %05o:%06o\r\n", cpu.PPR.PSR, cpu.PPR.IC); IC 393 src/dps8/dps8_faults.c sim_printf (" ACV %012llo PSR:IC %05o:%06o\r\n", subFault.bits, cpu.PPR.PSR, cpu.PPR.IC); IC 426 src/dps8/dps8_faults.c fault_ic = cpu . PPR.IC; IC 551 src/dps8/dps8_faults.c (cpu.PPR.IC & 1) && cpu.l68PairValid && IC 614 src/dps8/dps8_faults.c cpu.PPR.IC = (cpu.PPR.IC - 1) & MASK18; IC 828 src/dps8/dps8_faults.c cpu.PPR.IC); IC 986 src/dps8/dps8_faults.c cpu.PPR.IC); IC 136 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) IC 211 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { IC 282 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { IC 353 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { IC 423 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { IC 496 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { IC 566 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { IC 1157 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) IC 1282 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) IC 323 src/dps8/dps8_ins.c cpu.PR[n].WORDNO = (cpu.PPR.IC + 1) & MASK18; IC 329 src/dps8/dps8_ins.c cpu.PPR.IC = cpu.TPR.CA; IC 334 src/dps8/dps8_ins.c __func__, cpu.PPR.PSR, cpu.PPR.IC); IC 335 src/dps8/dps8_ins.c if (cpu.PPR.IC & 1) IC 454 src/dps8/dps8_ins.c putbits36_18 (& words[4], 0, cpu.PPR.IC); IC 507 src/dps8/dps8_ins.c putbits36_1 (& words[5], 25, cpu.cu.xdo && (! cpu.cu.xde || (cpu.PPR.IC & 1))); IC 631 src/dps8/dps8_ins.c cpu.cu_data.IC = cpu.PPR.IC; IC 741 src/dps8/dps8_ins.c cpu.PPR.IC = getbits36_18 (words[4], 0); IC 1191 src/dps8/dps8_ins.c if (cpu.cu.rd && ((cpu.PPR.IC & 1) != 0)) IC 1227 src/dps8/dps8_ins.c if ((cpu.PPR.IC & 1) == 0) // Even IC 1264 src/dps8/dps8_ins.c char * where = lookup_address (cpu.PPR.PSR, cpu.PPR.IC, & compname, IC 1274 src/dps8/dps8_ins.c cpu.BAR.BASE, cpu.PPR.IC, where); IC 1278 src/dps8/dps8_ins.c sim_debug (flag, &cpu_dev, "%06o %s\r\n", cpu.PPR.IC, where); IC 1287 src/dps8/dps8_ins.c cpu.BAR.BASE, cpu.PPR.IC, where); IC 1292 src/dps8/dps8_ins.c cpu.PPR.PSR, cpu.PPR.IC, where); IC 1306 src/dps8/dps8_ins.c cpu.PPR.IC, IC 1323 src/dps8/dps8_ins.c cpu.PPR.IC, IC 1345 src/dps8/dps8_ins.c cpu.PPR.IC, IC 1363 src/dps8/dps8_ins.c cpu.PPR.IC, IC 1415 src/dps8/dps8_ins.c trk (cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, IWB_IRODD); IC 1579 src/dps8/dps8_ins.c if (!cpu.cu.xde && cpu.cu.xdo /* odd instr being executed */ && !(cpu.PPR.IC & 1)) IC 1586 src/dps8/dps8_ins.c if (opcode == 0560 && !opcodeX && cpu.cu.xde && !(cpu.PPR.IC & 1)) IC 1787 src/dps8/dps8_ins.c if (n_dbgevents && (dbgevt = (dbgevent_lookup (cpu.PPR.PSR, cpu.PPR.IC))) >= 0) { IC 1880 src/dps8/dps8_ins.c cpu.cu.repeat_first, cpu.cu.rpt, cpu.cu.rd, cpu.PPR.IC & 1, cpu.rX[0], IC 1892 src/dps8/dps8_ins.c bool icOdd = !! (cpu.PPR.IC & 1); IC 1974 src/dps8/dps8_ins.c word18 saveIC = cpu.PPR.IC; IC 1976 src/dps8/dps8_ins.c ReadInstructionFetch (cpup, cpu.PPR.IC + 1 + n, & cpu.currentEISinstruction.op[n]); IC 1977 src/dps8/dps8_ins.c cpu.PPR.IC = saveIC; IC 2144 src/dps8/dps8_ins.c bool icOdd = !! (cpu.PPR.IC & 1); IC 2392 src/dps8/dps8_ins.c cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); IC 3074 src/dps8/dps8_ins.c word18 ret = (cpu.PPR.IC + 1) & MASK18; IC 4015 src/dps8/dps8_ins.c SETHI (cpu.CY, (cpu.PPR.IC + 1) & MASK18); IC 4028 src/dps8/dps8_ins.c cpu.CY = ((word36) ((cpu.PPR.IC + 2) & MASK18)) << 18; IC 4099 src/dps8/dps8_ins.c putbits36_18 (& cpu.Ypair[1], 0, cpu.PPR.IC + 2); IC 4109 src/dps8/dps8_ins.c putbits36_18 (& cpu.Ypair[1], 0, cpu.cu_data.IC + 2); IC 6632 src/dps8/dps8_ins.c cpu.PPR.IC = GETHI (cpu.CY); IC 7422 src/dps8/dps8_ins.c if ((cpu.PPR.IC & 1) == 0) IC 7760 src/dps8/dps8_ins.c sim_printf (" ldt %d PSR:IC %05o:%06o\r\n", cpu.rTR, cpu.PPR.PSR, cpu.PPR.IC); IC 7811 src/dps8/dps8_ins.c sim_printf (" RALR set to %o PSR:IC %05o:%06o\r\n", cpu.rRALR, cpu.PPR.PSR, cpu.PPR.IC); IC 8920 src/dps8/dps8_ins.c if (cpu.PPR.PSR == 034 && cpu.PPR.IC == 03535) { IC 8954 src/dps8/dps8_ins.c " no events in queue\r\n", cpu.PPR.IC); IC 8971 src/dps8/dps8_ins.c if (cpu.PPR.PSR == 0430 && cpu.PPR.IC == 012) IC 9011 src/dps8/dps8_ins.c (cpu.PPR.PSR !=0 || cpu.PPR.IC != 0)) { IC 9013 src/dps8/dps8_ins.c sim_printf ("CPU%c DIS %o:%o gives up master\r\n", cpu.cpuIdx + 'A', cpu.PPR.PSR, cpu.PPR.IC); IC 10178 src/dps8/dps8_ins.c (cpu.Yblock8[0]>>18)&MASK15, (cpu.Yblock8[4]>>18)&MASK18, cpu.PPR.PSR, cpu.PPR.IC); IC 4076 src/dps8/dps8_iom.c __func__, iomChar (iom_unit_idx), cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC); IC 2772 src/dps8/dps8_sys.c word18 icOffset = cpu.PPR.IC; IC 4104 src/dps8/dps8_sys.c { "cpus[].PPR.IC", SYM_STRUCT_OFFSET, SYM_UINT32_18, offsetof (struct ppr_s, IC) }, IC 179 src/dps8/hdbg.c if (filter && hdbgSegNum > 0 && blacklist[cpu.PPR.IC]) \ IC 202 src/dps8/hdbg.c hevp[p].trace.ic = cpu.PPR.IC; IC 657 src/dps8/panelScraper.c SETL (bank_e, 0+3, cpu.PPR.IC, 18); IC 917 src/dps8/panelScraper.c SETL (bank_g, 0, cpu.PPR.IC, 18); IC 951 src/dps8/panelScraper.c SETL (bank_j, 3, cpu.PPR.IC, 18);