R3 96 src/dps8/doAppendCycleABSA.h DBGAPP ("doAppendCycleABSA(A) R1 %o R2 %o R3 %o E %o\n", cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.SDW->E); R3 116 src/dps8/doAppendCycleABSA.h if (! (cpu.SDW->R1 <= cpu.SDW->R2 && cpu.SDW->R2 <= cpu.SDW->R3)) { R3 105 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("doAppendCycleAPUDataRMW(A) R1 %o R2 %o R3 %o E %o\n", cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.SDW->E); R3 125 src/dps8/doAppendCycleAPUDataRMW.h if (! (cpu.SDW->R1 <= cpu.SDW->R2 && cpu.SDW->R2 <= cpu.SDW->R3)) { R3 106 src/dps8/doAppendCycleAPUDataRead.h DBGAPP ("doAppendCycleAPUDataRead(A) R1 %o R2 %o R3 %o E %o\n", cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.SDW->E); R3 126 src/dps8/doAppendCycleAPUDataRead.h if (! (cpu.SDW->R1 <= cpu.SDW->R2 && cpu.SDW->R2 <= cpu.SDW->R3)) { R3 104 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("doAppendCycleAPUDataStore(A) R1 %o R2 %o R3 %o E %o\n", cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.SDW->E); R3 124 src/dps8/doAppendCycleAPUDataStore.h if (! (cpu.SDW->R1 <= cpu.SDW->R2 && cpu.SDW->R2 <= cpu.SDW->R3)) { R3 196 src/dps8/doAppendCycleIndirectWordFetch.h DBGAPP ("doAppendCycleIndirectWordFetch(A) R1 %o R2 %o R3 %o E %o\n", cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.SDW->E); R3 216 src/dps8/doAppendCycleIndirectWordFetch.h if (! (cpu.SDW->R1 <= cpu.SDW->R2 && cpu.SDW->R2 <= cpu.SDW->R3)) { R3 248 src/dps8/doAppendCycleInstructionFetch.h DBGAPP ("doAppendCycleInstructionFetch(A) R1 %o R2 %o R3 %o E %o\n", cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.SDW->E); R3 268 src/dps8/doAppendCycleInstructionFetch.h if (! (cpu.SDW->R1 <= cpu.SDW->R2 && cpu.SDW->R2 <= cpu.SDW->R3)) { R3 105 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("doAppendCycleOperandRMW(A) R1 %o R2 %o R3 %o E %o\n", cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.SDW->E); R3 125 src/dps8/doAppendCycleOperandRMW.h if (! (cpu.SDW->R1 <= cpu.SDW->R2 && cpu.SDW->R2 <= cpu.SDW->R3)) { R3 260 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead(A) R1 %o R2 %o R3 %o E %o\n", cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.SDW->E); R3 280 src/dps8/doAppendCycleOperandRead.h if (! (cpu.SDW->R1 <= cpu.SDW->R2 && cpu.SDW->R2 <= cpu.SDW->R3)) { R3 388 src/dps8/doAppendCycleOperandRead.h cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.TPR.TRR, cpu.PPR.PRR); R3 424 src/dps8/doAppendCycleOperandRead.h if (cpu.TPR.TRR > cpu.SDW->R3) { R3 105 src/dps8/doAppendCycleOperandStore.h DBGAPP ("doAppendCycleOperandStore(A) R1 %o R2 %o R3 %o E %o\n", cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.SDW->E); R3 125 src/dps8/doAppendCycleOperandStore.h if (! (cpu.SDW->R1 <= cpu.SDW->R2 && cpu.SDW->R2 <= cpu.SDW->R3)) { R3 135 src/dps8/doAppendCycleRTCDOperandFetch.h DBGAPP ("doAppendCycleRTCDOperandFetch(A) R1 %o R2 %o R3 %o E %o\n", cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.SDW->E); R3 155 src/dps8/doAppendCycleRTCDOperandFetch.h if (! (cpu.SDW->R1 <= cpu.SDW->R2 && cpu.SDW->R2 <= cpu.SDW->R3)) { R3 438 src/dps8/dps8_append.c cpu.SDW0.R3 = (SDWeven >> 3) & 7; R3 461 src/dps8/dps8_append.c cpu.SDW0.R1, cpu.SDW0.R2, cpu.SDW0.R3, cpu.SDW0.BOUND, R3 501 src/dps8/dps8_append.c cpu.SDW0.R3 = (SDWeven >> 3) & 7; R3 536 src/dps8/dps8_append.c SDW->ADDR, SDW->R1, SDW->R2, SDW->R3, SDW->BOUND, R3 1338 src/dps8/dps8_append.c cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.SDW->E); R3 1358 src/dps8/dps8_append.c if (! (cpu.SDW->R1 <= cpu.SDW->R2 && cpu.SDW->R2 <= cpu.SDW->R3)) R3 1595 src/dps8/dps8_append.c cpu.SDW->EB, cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, R3 1634 src/dps8/dps8_append.c if (cpu.TPR.TRR > cpu.SDW->R3) R3 2276 src/dps8/dps8_append.c SDW1.R3 = (SDWeven >> 3) & 7; R3 2304 src/dps8/dps8_append.c SDW1.R3 = (SDWeven >> 3) & 7; R3 1231 src/dps8/dps8_cpu.c SDW->ADDR, SDW->R1, SDW->R2, SDW->R3, SDW->DF, R3 223 src/dps8/dps8_cpu.h word3 R3; // Upper limit of call ring bracket R3 292 src/dps8/dps8_cpu.h R3 7655 src/dps8/dps8_ins.c cpu.SDWAM[m].R3 = getbits36_3 (cpu.Yblock32[j], 30); R3 7928 src/dps8/dps8_ins.c cpu.SDWAM[toffset + j].R3); R3 2124 src/dps8/dps8_sys.c R3 3176 src/dps8/dps8_sys.c SDW->R3 = (SDWeven >> 3) & 7; R3 3236 src/dps8/dps8_sys.c SDW0.R3 = (SDWeven >> 3) & 7u;