PSR 29 src/dps8/doAppendCycleABSA.h DBGAPP ("doAppendCycleABSA(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PSR 157 src/dps8/doAppendCycleABSA.h if (cpu.PPR.PSR != cpu.TPR.TSR) { PSR 282 src/dps8/doAppendCycleABSA.h DBGAPP ("doAppendCycleABSA (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 27 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("doAppendCycleAPUDataRMW(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PSR 171 src/dps8/doAppendCycleAPUDataRMW.h if (cpu.PPR.PSR != cpu.TPR.TSR) { PSR 189 src/dps8/doAppendCycleAPUDataRMW.h if (cpu.TPR.TSR == cpu.PPR.PSR) PSR 348 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("doAppendCycleAPUDataRMW (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 27 src/dps8/doAppendCycleAPUDataRead.h DBGAPP ("doAppendCycleAPUDataRead(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PSR 166 src/dps8/doAppendCycleAPUDataRead.h if (cpu.PPR.PSR != cpu.TPR.TSR) { PSR 299 src/dps8/doAppendCycleAPUDataRead.h DBGAPP ("doAppendCycleAPUDataRead (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 27 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("doAppendCycleAPUDataStore(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PSR 154 src/dps8/doAppendCycleAPUDataStore.h if (cpu.TPR.TSR == cpu.PPR.PSR) PSR 302 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("doAppendCycleAPUDataStore (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 63 src/dps8/doAppendCycleIndirectWordFetch.h DBGAPP ("doAppendCycleIndirectWordFetch(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PSR 262 src/dps8/doAppendCycleIndirectWordFetch.h if (cpu.PPR.PSR != cpu.TPR.TSR) { PSR 467 src/dps8/doAppendCycleIndirectWordFetch.h DBGAPP ("doAppendCycleIndirectWordFetch (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 74 src/dps8/doAppendCycleInstructionFetch.h DBGAPP ("doAppendCycleInstructionFetch(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PSR 632 src/dps8/doAppendCycleInstructionFetch.h cpu.PPR.PSR = cpu.TPR.TSR; PSR 656 src/dps8/doAppendCycleInstructionFetch.h DBGAPP ("doAppendCycleInstructionFetch (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 27 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("doAppendCycleOperandRMW(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PSR 171 src/dps8/doAppendCycleOperandRMW.h if (cpu.PPR.PSR != cpu.TPR.TSR) { PSR 189 src/dps8/doAppendCycleOperandRMW.h if (cpu.TPR.TSR == cpu.PPR.PSR) PSR 353 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("doAppendCycleOperandRMW (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 69 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PSR 331 src/dps8/doAppendCycleOperandRead.h if (cpu.PPR.PSR != cpu.TPR.TSR) { PSR 386 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead(E): E %o G %o PSR %05o TSR %05o CA %06o " "EB %06o R %o%o%o TRR %o PRR %o\n", cpu.SDW->E, cpu.SDW->G, cpu.PPR.PSR, cpu.TPR.TSR, cpu.TPR.CA, cpu.SDW->EB, cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.TPR.TRR, cpu.PPR.PRR); PSR 403 src/dps8/doAppendCycleOperandRead.h if (cpu.PPR.PSR == cpu.TPR.TSR && ! TST_I_ABS) PSR 725 src/dps8/doAppendCycleOperandRead.h cpu.PR[n].SNR = cpu.PPR.PSR; PSR 737 src/dps8/doAppendCycleOperandRead.h cpu.PPR.PSR = cpu.TPR.TSR; PSR 784 src/dps8/doAppendCycleOperandRead.h cpu.PPR.PSR = cpu.TPR.TSR; PSR 797 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 27 src/dps8/doAppendCycleOperandStore.h DBGAPP ("doAppendCycleOperandStore(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PSR 149 src/dps8/doAppendCycleOperandStore.h if (cpu.TPR.TSR == cpu.PPR.PSR) PSR 305 src/dps8/doAppendCycleOperandStore.h DBGAPP ("doAppendCycleOperandStore (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 27 src/dps8/doAppendCycleRTCDOperandFetch.h DBGAPP ("doAppendCycleRTCDOperandFetch(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PSR 195 src/dps8/doAppendCycleRTCDOperandFetch.h if (cpu.PPR.PSR != cpu.TPR.TSR) { PSR 366 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.PPR.PSR = cpu.TPR.TSR; PSR 391 src/dps8/doAppendCycleRTCDOperandFetch.h DBGAPP ("doAppendCycleRTCDOperandFetch (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 1209 src/dps8/dps8_append.c cpu.PPR.PRR, cpu.PPR.PSR); PSR 1449 src/dps8/dps8_append.c if (cpu.PPR.PSR != cpu.TPR.TSR) PSR 1479 src/dps8/dps8_append.c if (cpu.TPR.TSR == cpu.PPR.PSR) PSR 1599 src/dps8/dps8_append.c cpu.SDW->E, cpu.SDW->G, cpu.PPR.PSR, cpu.TPR.TSR, cpu.TPR.CA, PSR 1619 src/dps8/dps8_append.c if (cpu.PPR.PSR == cpu.TPR.TSR && ! TST_I_ABS) PSR 2067 src/dps8/dps8_append.c cpu.PR[n].SNR = cpu.PPR.PSR; PSR 2115 src/dps8/dps8_append.c cpu.PPR.PSR = cpu.TPR.TSR; PSR 2169 src/dps8/dps8_append.c cpu.PPR.PSR = cpu.TPR.TSR; PSR 2217 src/dps8/dps8_append.c cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 948 src/dps8/dps8_cpu.c cpu.PPR.PSR = 0; PSR 1794 src/dps8/dps8_cpu.c ((((t_addr) cpu.PPR.PSR) & 037777) << 18), PSR 2683 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 2698 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 2720 src/dps8/dps8_cpu.c if (stall_points[i].segno && stall_points[i].segno == cpu.PPR.PSR && PSR 2766 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 3059 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 3555 src/dps8/dps8_cpu.c addr, cpu.PPR.PSR, cpu.PPR.IC, ctx); PSR 3562 src/dps8/dps8_cpu.c (long long unsigned int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, addr, PSR 3596 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); PSR 3639 src/dps8/dps8_cpu.c (long long unsigned int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PSR 3663 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); PSR 3679 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); PSR 3721 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PSR 3759 src/dps8/dps8_cpu.c addr, cpu.PPR.PSR, cpu.PPR.IC, ctx); PSR 3766 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PSR 3777 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); PSR 3796 src/dps8/dps8_cpu.c addr, cpu.PPR.PSR, cpu.PPR.IC, ctx); PSR 3803 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PSR 3814 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); PSR 3855 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PSR 3878 src/dps8/dps8_cpu.c (long long unsigned int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PSR 94 src/dps8/dps8_cpu.h word15 PSR; // The segment number of the procedure being executed. PSR 1652 src/dps8/dps8_cpu.h word15 PSR; PSR 596 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 666 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 833 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 895 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 381 src/dps8/dps8_faults.c sim_printf (" TRO PSR:IC %05o:%06o\r\n", cpu.PPR.PSR, cpu.PPR.IC); PSR 386 src/dps8/dps8_faults.c sim_printf (" ACV %012llo PSR:IC %05o:%06o\r\n", subFault.bits, cpu.PPR.PSR, cpu.PPR.IC); PSR 417 src/dps8/dps8_faults.c fault_psr = cpu . PPR.PSR; PSR 120 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 138 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) PSR 195 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 207 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { PSR 257 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 270 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { PSR 321 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 333 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { PSR 383 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 395 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { PSR 447 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 459 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { PSR 509 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 521 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { PSR 584 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 669 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 751 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 829 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 866 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 941 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1037 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1061 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) PSR 1161 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1186 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) PSR 1253 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1315 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1381 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1459 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1532 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1606 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1701 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1830 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 280 src/dps8/dps8_ins.c cpu.PR[n].SNR = cpu.PPR.PSR; PSR 292 src/dps8/dps8_ins.c __func__, cpu.PPR.PSR, cpu.PPR.IC); PSR 327 src/dps8/dps8_ins.c putbits36_15 (& words[0], 3, cpu.PPR.PSR); PSR 547 src/dps8/dps8_ins.c cpu.cu_data.PSR = cpu.PPR.PSR; PSR 581 src/dps8/dps8_ins.c cpu.PPR.PSR = getbits36_15 (words[0], 3); PSR 1165 src/dps8/dps8_ins.c char * where = lookup_address (cpu.PPR.PSR, cpu.PPR.IC, & compname, PSR 1187 src/dps8/dps8_ins.c cpu.PPR.PSR, PSR 1193 src/dps8/dps8_ins.c cpu.PPR.PSR, cpu.PPR.IC, where); PSR 1244 src/dps8/dps8_ins.c cpu.PPR.PSR, PSR 1263 src/dps8/dps8_ins.c cpu.PPR.PSR, PSR 1316 src/dps8/dps8_ins.c trk (cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, IWB_IRODD); PSR 1672 src/dps8/dps8_ins.c if (n_dbgevents && (dbgevt = (dbgevent_lookup (cpu.PPR.PSR, cpu.PPR.IC))) >= 0) { PSR 1835 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1907 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 1999 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PPR.PSR; PSR 2231 src/dps8/dps8_ins.c sim_debug (DBG_REGDUMPPPR, &cpu_dev, "PRR:%o PSR:%05o P:%o IC:%06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PSR 3865 src/dps8/dps8_ins.c putbits36_15 (& cpu.Ypair[0], 3, cpu.PPR.PSR); PSR 3875 src/dps8/dps8_ins.c putbits36_15 (& cpu.Ypair[0], 3, cpu.cu_data.PSR); PSR 6124 src/dps8/dps8_ins.c "call6 PRR %o PSR %o\n", cpu.PPR.PRR, cpu.PPR.PSR); PSR 7233 src/dps8/dps8_ins.c sim_printf (" ldt %d PSR:IC %05o:%06o\r\n", cpu.rTR, cpu.PPR.PSR, cpu.PPR.IC); PSR 7284 src/dps8/dps8_ins.c sim_printf (" RALR set to %o PSR:IC %05o:%06o\r\n", cpu.rRALR, cpu.PPR.PSR, cpu.PPR.IC); PSR 8367 src/dps8/dps8_ins.c if (cpu.PPR.PSR == 0430 && cpu.PPR.IC == 012) PSR 8387 src/dps8/dps8_ins.c PSR 8397 src/dps8/dps8_ins.c if (cpu.PPR.PSR == 034 && cpu.PPR.IC == 03535) PSR 9429 src/dps8/dps8_ins.c sim_printf (" rcu to %05o:%06o PSR:IC %05o:%06o\r\n", (cpu.Yblock8[0]>>18)&MASK15, (cpu.Yblock8[4]>>18)&MASK18, cpu.PPR.PSR, cpu.PPR.IC); PSR 3472 src/dps8/dps8_iom.c __func__, iomChar (iom_unit_idx), cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC); PSR 32 src/dps8/dps8_simh.h ((dptr != & cpu_dev) || (((dptr)->dctrl & (DBG_INTR | DBG_FAULT))) || (! sim_deb_segno_on) || sim_deb_segno[cpu.PPR.PSR & (DEBUG_SEGNO_LIMIT - 1)]) && \ PSR 2776 src/dps8/dps8_sys.c word15 icSegno = cpu.PPR.PSR; PSR 4117 src/dps8/dps8_sys.c { "cpus[].PPR.PSR", SYM_STRUCT_OFFSET, SYM_UINT16_15, offsetof (struct ppr_s, PSR) }, PSR 166 src/dps8/hdbg.c if (filter && hdbgSegNum >= 0 && hdbgSegNum != cpu.PPR.PSR) \ PSR 189 src/dps8/hdbg.c hevents[p].trace.segno = cpu.PPR.PSR;