PPR 29 src/dps8/doAppendCycleABSA.h DBGAPP ("doAppendCycleABSA(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PPR 154 src/dps8/doAppendCycleABSA.h cpu.TPR.TRR = cpu.PPR.PRR; PPR 157 src/dps8/doAppendCycleABSA.h if (cpu.PPR.PSR != cpu.TPR.TSR) { PPR 282 src/dps8/doAppendCycleABSA.h DBGAPP ("doAppendCycleABSA (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PPR 27 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("doAppendCycleAPUDataRMW(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PPR 168 src/dps8/doAppendCycleAPUDataRMW.h cpu.TPR.TRR = cpu.PPR.PRR; PPR 171 src/dps8/doAppendCycleAPUDataRMW.h if (cpu.PPR.PSR != cpu.TPR.TSR) { PPR 189 src/dps8/doAppendCycleAPUDataRMW.h if (cpu.TPR.TSR == cpu.PPR.PSR) PPR 190 src/dps8/doAppendCycleAPUDataRMW.h cpu.TPR.TRR = cpu.PPR.PRR; PPR 203 src/dps8/doAppendCycleAPUDataRMW.h cpu.TPR.TRR = cpu.PPR.PRR; PPR 348 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("doAppendCycleAPUDataRMW (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PPR 27 src/dps8/doAppendCycleAPUDataRead.h DBGAPP ("doAppendCycleAPUDataRead(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PPR 163 src/dps8/doAppendCycleAPUDataRead.h cpu.TPR.TRR = cpu.PPR.PRR; PPR 166 src/dps8/doAppendCycleAPUDataRead.h if (cpu.PPR.PSR != cpu.TPR.TSR) { PPR 299 src/dps8/doAppendCycleAPUDataRead.h DBGAPP ("doAppendCycleAPUDataRead (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PPR 27 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("doAppendCycleAPUDataStore(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PPR 154 src/dps8/doAppendCycleAPUDataStore.h if (cpu.TPR.TSR == cpu.PPR.PSR) PPR 155 src/dps8/doAppendCycleAPUDataStore.h cpu.TPR.TRR = cpu.PPR.PRR; PPR 168 src/dps8/doAppendCycleAPUDataStore.h cpu.TPR.TRR = cpu.PPR.PRR; PPR 302 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("doAppendCycleAPUDataStore (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PPR 63 src/dps8/doAppendCycleIndirectWordFetch.h DBGAPP ("doAppendCycleIndirectWordFetch(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PPR 259 src/dps8/doAppendCycleIndirectWordFetch.h cpu.TPR.TRR = cpu.PPR.PRR; PPR 262 src/dps8/doAppendCycleIndirectWordFetch.h if (cpu.PPR.PSR != cpu.TPR.TSR) { PPR 467 src/dps8/doAppendCycleIndirectWordFetch.h DBGAPP ("doAppendCycleIndirectWordFetch (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PPR 74 src/dps8/doAppendCycleInstructionFetch.h DBGAPP ("doAppendCycleInstructionFetch(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PPR 329 src/dps8/doAppendCycleInstructionFetch.h if (cpu.TPR.TRR > cpu.PPR.PRR) PPR 330 src/dps8/doAppendCycleInstructionFetch.h sim_warn ("rtcd: outbound call cpu.TPR.TRR %d cpu.PPR.PRR %d\n", cpu.TPR.TRR, cpu.PPR.PRR); PPR 332 src/dps8/doAppendCycleInstructionFetch.h if (cpu.TPR.TRR < cpu.PPR.PRR) { PPR 352 src/dps8/doAppendCycleInstructionFetch.h if (! (cpu.PPR.PRR < cpu.rRALR)) { PPR 354 src/dps8/doAppendCycleInstructionFetch.h DBGAPP ("acvFaults(D) C(PPR.PRR) %o < RALR %o\n", cpu.PPR.PRR, cpu.rRALR); PPR 394 src/dps8/doAppendCycleInstructionFetch.h if (cpu.PPR.PRR != cpu.TPR.TRR) { PPR 632 src/dps8/doAppendCycleInstructionFetch.h cpu.PPR.PSR = cpu.TPR.TSR; PPR 634 src/dps8/doAppendCycleInstructionFetch.h cpu.PPR.IC = cpu.TPR.CA; PPR 645 src/dps8/doAppendCycleInstructionFetch.h cpu.PPR.P = p; PPR 648 src/dps8/doAppendCycleInstructionFetch.h cpu.PPR.P = 0; PPR 656 src/dps8/doAppendCycleInstructionFetch.h DBGAPP ("doAppendCycleInstructionFetch (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PPR 27 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("doAppendCycleOperandRMW(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PPR 168 src/dps8/doAppendCycleOperandRMW.h cpu.TPR.TRR = cpu.PPR.PRR; PPR 171 src/dps8/doAppendCycleOperandRMW.h if (cpu.PPR.PSR != cpu.TPR.TSR) { PPR 189 src/dps8/doAppendCycleOperandRMW.h if (cpu.TPR.TSR == cpu.PPR.PSR) PPR 190 src/dps8/doAppendCycleOperandRMW.h cpu.TPR.TRR = cpu.PPR.PRR; PPR 203 src/dps8/doAppendCycleOperandRMW.h cpu.TPR.TRR = cpu.PPR.PRR; PPR 353 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("doAppendCycleOperandRMW (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PPR 69 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PPR 121 src/dps8/doAppendCycleOperandRead.h if (cpu.rRALR && (cpu.PPR.PRR >= cpu.rRALR)) { PPR 328 src/dps8/doAppendCycleOperandRead.h cpu.TPR.TRR = cpu.PPR.PRR; PPR 331 src/dps8/doAppendCycleOperandRead.h if (cpu.PPR.PSR != cpu.TPR.TSR) { PPR 362 src/dps8/doAppendCycleOperandRead.h if (! (cpu.PPR.PRR < cpu.rRALR)) { PPR 364 src/dps8/doAppendCycleOperandRead.h DBGAPP ("acvFaults(D) C(PPR.PRR) %o < RALR %o\n", cpu.PPR.PRR, cpu.rRALR); PPR 386 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead(E): E %o G %o PSR %05o TSR %05o CA %06o " "EB %06o R %o%o%o TRR %o PRR %o\n", cpu.SDW->E, cpu.SDW->G, cpu.PPR.PSR, cpu.TPR.TSR, cpu.TPR.CA, cpu.SDW->EB, cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.TPR.TRR, cpu.PPR.PRR); PPR 403 src/dps8/doAppendCycleOperandRead.h if (cpu.PPR.PSR == cpu.TPR.TSR && ! TST_I_ABS) PPR 442 src/dps8/doAppendCycleOperandRead.h if (cpu.TPR.TRR > cpu.PPR.PRR) { PPR 444 src/dps8/doAppendCycleOperandRead.h if (cpu.PPR.PRR < cpu.SDW->R2) { PPR 499 src/dps8/doAppendCycleOperandRead.h if (cpu.PPR.PRR != cpu.TPR.TRR) { PPR 721 src/dps8/doAppendCycleOperandRead.h cpu.PR[n].RNR = cpu.PPR.PRR; PPR 725 src/dps8/doAppendCycleOperandRead.h cpu.PR[n].SNR = cpu.PPR.PSR; PPR 726 src/dps8/doAppendCycleOperandRead.h cpu.PR[n].WORDNO = (cpu.PPR.IC + 1) & MASK18; PPR 737 src/dps8/doAppendCycleOperandRead.h cpu.PPR.PSR = cpu.TPR.TSR; PPR 739 src/dps8/doAppendCycleOperandRead.h cpu.PPR.IC = cpu.TPR.CA; PPR 749 src/dps8/doAppendCycleOperandRead.h cpu.PPR.P = p; PPR 752 src/dps8/doAppendCycleOperandRead.h cpu.PPR.P = 0; PPR 761 src/dps8/doAppendCycleOperandRead.h if (cpu.TPR.TRR == cpu.PPR.PRR) { PPR 782 src/dps8/doAppendCycleOperandRead.h cpu.PPR.PRR = cpu.TPR.TRR; PPR 784 src/dps8/doAppendCycleOperandRead.h cpu.PPR.PSR = cpu.TPR.TSR; PPR 786 src/dps8/doAppendCycleOperandRead.h cpu.PPR.IC = cpu.TPR.CA; PPR 797 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PPR 27 src/dps8/doAppendCycleOperandStore.h DBGAPP ("doAppendCycleOperandStore(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PPR 149 src/dps8/doAppendCycleOperandStore.h if (cpu.TPR.TSR == cpu.PPR.PSR) PPR 150 src/dps8/doAppendCycleOperandStore.h cpu.TPR.TRR = cpu.PPR.PRR; PPR 163 src/dps8/doAppendCycleOperandStore.h cpu.TPR.TRR = cpu.PPR.PRR; PPR 305 src/dps8/doAppendCycleOperandStore.h DBGAPP ("doAppendCycleOperandStore (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PPR 27 src/dps8/doAppendCycleRTCDOperandFetch.h DBGAPP ("doAppendCycleRTCDOperandFetch(Entry) PPR.PRR=%o PPR.PSR=%05o\n", cpu.PPR.PRR, cpu.PPR.PSR); PPR 192 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.TPR.TRR = cpu.PPR.PRR; PPR 195 src/dps8/doAppendCycleRTCDOperandFetch.h if (cpu.PPR.PSR != cpu.TPR.TSR) { PPR 352 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.PPR.PRR = cpu.TPR.TRR = max3 (y, cpu.TPR.TRR, cpu.RSDWH_R1); PPR 366 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.PPR.PSR = cpu.TPR.TSR; PPR 368 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.PPR.IC = cpu.TPR.CA; PPR 378 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.PPR.P = cpu.SDW->P; PPR 381 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.PPR.P = 0; PPR 391 src/dps8/doAppendCycleRTCDOperandFetch.h DBGAPP ("doAppendCycleRTCDOperandFetch (Exit) PRR %o PSR %05o P %o IC %06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PPR 87 src/dps8/dps8_addrmods.c return cpu.PPR.IC; PPR 1209 src/dps8/dps8_append.c cpu.PPR.PRR, cpu.PPR.PSR); PPR 1446 src/dps8/dps8_append.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 1449 src/dps8/dps8_append.c if (cpu.PPR.PSR != cpu.TPR.TSR) PPR 1479 src/dps8/dps8_append.c if (cpu.TPR.TSR == cpu.PPR.PSR) PPR 1480 src/dps8/dps8_append.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 1496 src/dps8/dps8_append.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 1546 src/dps8/dps8_append.c if (cpu.TPR.TRR > cpu.PPR.PRR) PPR 1548 src/dps8/dps8_append.c cpu.TPR.TRR, cpu.PPR.PRR); PPR 1550 src/dps8/dps8_append.c if (cpu.TPR.TRR < cpu.PPR.PRR) PPR 1571 src/dps8/dps8_append.c if (! (cpu.PPR.PRR < cpu.rRALR)) PPR 1575 src/dps8/dps8_append.c cpu.PPR.PRR, cpu.rRALR); PPR 1599 src/dps8/dps8_append.c cpu.SDW->E, cpu.SDW->G, cpu.PPR.PSR, cpu.TPR.TSR, cpu.TPR.CA, PPR 1601 src/dps8/dps8_append.c cpu.TPR.TRR, cpu.PPR.PRR); PPR 1619 src/dps8/dps8_append.c if (cpu.PPR.PSR == cpu.TPR.TSR && ! TST_I_ABS) PPR 1661 src/dps8/dps8_append.c if (cpu.TPR.TRR > cpu.PPR.PRR) PPR 1664 src/dps8/dps8_append.c if (cpu.PPR.PRR < cpu.SDW->R2) PPR 1727 src/dps8/dps8_append.c if (cpu.PPR.PRR != cpu.TPR.TRR) PPR 2034 src/dps8/dps8_append.c cpu.PPR.PRR = cpu.TPR.TRR = max3 (y, cpu.TPR.TRR, cpu.RSDWH_R1); PPR 2063 src/dps8/dps8_append.c cpu.PR[n].RNR = cpu.PPR.PRR; PPR 2067 src/dps8/dps8_append.c cpu.PR[n].SNR = cpu.PPR.PSR; PPR 2068 src/dps8/dps8_append.c cpu.PR[n].WORDNO = (cpu.PPR.IC + 1) & MASK18; PPR 2115 src/dps8/dps8_append.c cpu.PPR.PSR = cpu.TPR.TSR; PPR 2117 src/dps8/dps8_append.c cpu.PPR.IC = cpu.TPR.CA; PPR 2128 src/dps8/dps8_append.c cpu.PPR.P = cpu.SDW->P; PPR 2133 src/dps8/dps8_append.c cpu.PPR.P = 0; PPR 2142 src/dps8/dps8_append.c if (cpu.TPR.TRR == cpu.PPR.PRR) PPR 2167 src/dps8/dps8_append.c cpu.PPR.PRR = cpu.TPR.TRR; PPR 2169 src/dps8/dps8_append.c cpu.PPR.PSR = cpu.TPR.TSR; PPR 2171 src/dps8/dps8_append.c cpu.PPR.IC = cpu.TPR.CA; PPR 2217 src/dps8/dps8_append.c cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PPR 946 src/dps8/dps8_cpu.c cpu.PPR.IC = 0; PPR 947 src/dps8/dps8_cpu.c cpu.PPR.PRR = 0; PPR 948 src/dps8/dps8_cpu.c cpu.PPR.PSR = 0; PPR 949 src/dps8/dps8_cpu.c cpu.PPR.P = 1; PPR 989 src/dps8/dps8_cpu.c memset (& cpu.PPR, 0, sizeof (struct ppr_s)); PPR 1659 src/dps8/dps8_cpu.c { ORDATA (IC, cpus[0].PPR.IC, VASIZE), 0, 0, 0 }, PPR 1793 src/dps8/dps8_cpu.c sim_brk_test ((cpu.PPR.IC & 0777777) | PPR 1794 src/dps8/dps8_cpu.c ((((t_addr) cpu.PPR.PSR) & 037777) << 18), PPR 2194 src/dps8/dps8_cpu.c cpus [0].PPR.IC = dummy_IC; PPR 2406 src/dps8/dps8_cpu.c cpu.PPR.PRR = 0; PPR 2509 src/dps8/dps8_cpu.c get_BAR_address (cpu.PPR.IC); PPR 2532 src/dps8/dps8_cpu.c (cpu.PPR.IC & 1) == 0 && PPR 2549 src/dps8/dps8_cpu.c if ((cpu.PPR.IC & 1) == 1) PPR 2683 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 2684 src/dps8/dps8_cpu.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 2698 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 2699 src/dps8/dps8_cpu.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 2702 src/dps8/dps8_cpu.c fetchInstruction (cpu.PPR.IC); PPR 2720 src/dps8/dps8_cpu.c if (stall_points[i].segno && stall_points[i].segno == cpu.PPR.PSR && PPR 2721 src/dps8/dps8_cpu.c stall_points[i].offset && stall_points[i].offset == cpu.PPR.IC) PPR 2766 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 2767 src/dps8/dps8_cpu.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 2998 src/dps8/dps8_cpu.c (cpu.cu.rd && (cpu.PPR.IC & 1)) || PPR 3003 src/dps8/dps8_cpu.c -- cpu.PPR.IC; PPR 3024 src/dps8/dps8_cpu.c cpu.PPR.IC += ci->info->ndes; PPR 3025 src/dps8/dps8_cpu.c cpu.PPR.IC ++; PPR 3059 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 3060 src/dps8/dps8_cpu.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 3071 src/dps8/dps8_cpu.c cpu.PPR.IC ++; PPR 3073 src/dps8/dps8_cpu.c cpu.PPR.IC += ci->info->ndes; PPR 3096 src/dps8/dps8_cpu.c if ((cpu.PPR.IC & 1) == 0 && PPR 3100 src/dps8/dps8_cpu.c (cpu.PPR.IC & ~3u) != (cpu.last_write & ~3u)) PPR 3102 src/dps8/dps8_cpu.c cpu.PPR.IC ++; PPR 3109 src/dps8/dps8_cpu.c cpu.PPR.IC ++; PPR 3111 src/dps8/dps8_cpu.c cpu.PPR.IC += ci->info->ndes; PPR 3126 src/dps8/dps8_cpu.c cpu.PPR.IC += ci->info->ndes; PPR 3127 src/dps8/dps8_cpu.c cpu.PPR.IC ++; PPR 3186 src/dps8/dps8_cpu.c cpu.PPR.PRR = 0; PPR 3340 src/dps8/dps8_cpu.c dummy_IC = cpu.PPR.IC; PPR 3555 src/dps8/dps8_cpu.c addr, cpu.PPR.PSR, cpu.PPR.IC, ctx); PPR 3562 src/dps8/dps8_cpu.c (long long unsigned int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, addr, PPR 3596 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); PPR 3639 src/dps8/dps8_cpu.c (long long unsigned int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PPR 3663 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); PPR 3679 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); PPR 3721 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PPR 3759 src/dps8/dps8_cpu.c addr, cpu.PPR.PSR, cpu.PPR.IC, ctx); PPR 3766 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PPR 3777 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); PPR 3796 src/dps8/dps8_cpu.c addr, cpu.PPR.PSR, cpu.PPR.IC, ctx); PPR 3803 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PPR 3814 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); PPR 3855 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PPR 3878 src/dps8/dps8_cpu.c (long long unsigned int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PPR 3970 src/dps8/dps8_cpu.c else if (cpu.PPR.P) PPR 4035 src/dps8/dps8_cpu.c cpu.PPR.P = 1; PPR 4393 src/dps8/dps8_cpu.c putbits36_18 (& w1, 54 - 36, cpu.PPR.IC); PPR 1036 src/dps8/dps8_cpu.h #define USE_IRODD (cpu.cu.rd && ((cpu. PPR.IC & 1) != 0)) PPR 1659 src/dps8/dps8_cpu.h struct ppr_s PPR; // Procedure Pointer Register PPR 353 src/dps8/dps8_eis.c return cpu.PPR.IC; PPR 450 src/dps8/dps8_eis.c return cpu.PPR.IC; PPR 525 src/dps8/dps8_eis.c return cpu.PPR.IC; PPR 595 src/dps8/dps8_eis.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 596 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 665 src/dps8/dps8_eis.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 666 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 832 src/dps8/dps8_eis.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 833 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 894 src/dps8/dps8_eis.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 895 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 1277 src/dps8/dps8_eis.c cpu.PPR.PRR); PPR 1425 src/dps8/dps8_eis.c e -> addr [k - 1].RNR = max3 (cpu.PR [n].RNR, cpu.TPR.TRR, cpu.PPR.PRR); PPR 1630 src/dps8/dps8_eis.c e -> addr [k - 1].RNR = max3 (cpu.PR [n].RNR, cpu.TPR.TRR, cpu.PPR.PRR); PPR 1682 src/dps8/dps8_eis.c e->addr[k-1].RNR = max3(cpu.PR[n].RNR, cpu.TPR.TRR, cpu.PPR.PRR); PPR 1864 src/dps8/dps8_eis.c e->addr[k-1].RNR = max3(cpu.PR[n].RNR, cpu.TPR.TRR, cpu.PPR.PRR); PPR 381 src/dps8/dps8_faults.c sim_printf (" TRO PSR:IC %05o:%06o\r\n", cpu.PPR.PSR, cpu.PPR.IC); PPR 386 src/dps8/dps8_faults.c sim_printf (" ACV %012llo PSR:IC %05o:%06o\r\n", subFault.bits, cpu.PPR.PSR, cpu.PPR.IC); PPR 417 src/dps8/dps8_faults.c fault_psr = cpu . PPR.PSR; PPR 418 src/dps8/dps8_faults.c fault_ic = cpu . PPR.IC; PPR 690 src/dps8/dps8_faults.c cpu . PPR.IC); PPR 834 src/dps8/dps8_faults.c cpu.PPR.IC); PPR 120 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 121 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 138 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) PPR 195 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 196 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 207 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { PPR 257 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 258 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 270 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { PPR 321 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 322 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 333 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { PPR 383 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 384 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 395 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { PPR 447 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 448 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 459 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { PPR 509 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 510 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 521 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { PPR 584 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 585 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 669 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 670 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 751 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 752 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 829 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 830 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 866 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 867 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 941 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 942 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 1037 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 1038 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 1061 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) PPR 1161 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 1162 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 1186 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) PPR 1253 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 1254 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 1315 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 1316 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 1381 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 1382 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 1459 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 1460 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 1532 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 1533 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 1606 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 1607 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 1701 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 1702 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 1830 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 1831 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 276 src/dps8/dps8_ins.c cpu.PR[n].RNR = cpu.PPR.PRR; PPR 280 src/dps8/dps8_ins.c cpu.PR[n].SNR = cpu.PPR.PSR; PPR 281 src/dps8/dps8_ins.c cpu.PR[n].WORDNO = (cpu.PPR.IC + 1) & MASK18; PPR 287 src/dps8/dps8_ins.c cpu.PPR.IC = cpu.TPR.CA; PPR 292 src/dps8/dps8_ins.c __func__, cpu.PPR.PSR, cpu.PPR.IC); PPR 293 src/dps8/dps8_ins.c if (cpu.PPR.IC & 1) PPR 326 src/dps8/dps8_ins.c putbits36_3 (& words[0], 0, cpu.PPR.PRR); PPR 327 src/dps8/dps8_ins.c putbits36_15 (& words[0], 3, cpu.PPR.PSR); PPR 328 src/dps8/dps8_ins.c putbits36_1 (& words[0], 18, cpu.PPR.P); PPR 403 src/dps8/dps8_ins.c putbits36_18 (& words[4], 0, cpu.PPR.IC); PPR 547 src/dps8/dps8_ins.c cpu.cu_data.PSR = cpu.PPR.PSR; PPR 548 src/dps8/dps8_ins.c cpu.cu_data.PRR = cpu.PPR.PRR; PPR 549 src/dps8/dps8_ins.c cpu.cu_data.IC = cpu.PPR.IC; PPR 580 src/dps8/dps8_ins.c cpu.PPR.PRR = getbits36_3 (words[0], 0); PPR 581 src/dps8/dps8_ins.c cpu.PPR.PSR = getbits36_15 (words[0], 3); PPR 582 src/dps8/dps8_ins.c cpu.PPR.P = getbits36_1 (words[0], 18); PPR 660 src/dps8/dps8_ins.c cpu.PPR.IC = getbits36_18 (words[4], 0); PPR 1102 src/dps8/dps8_ins.c if (cpu.cu.rd && ((cpu.PPR.IC & 1) != 0)) PPR 1138 src/dps8/dps8_ins.c if ((cpu.PPR.IC & 1) == 0) // Even PPR 1165 src/dps8/dps8_ins.c char * where = lookup_address (cpu.PPR.PSR, cpu.PPR.IC, & compname, PPR 1175 src/dps8/dps8_ins.c cpu.BAR.BASE, cpu.PPR.IC, where); PPR 1179 src/dps8/dps8_ins.c sim_debug (flag, &cpu_dev, "%06o %s\n", cpu.PPR.IC, where); PPR 1187 src/dps8/dps8_ins.c cpu.PPR.PSR, PPR 1188 src/dps8/dps8_ins.c cpu.BAR.BASE, cpu.PPR.IC, where); PPR 1193 src/dps8/dps8_ins.c cpu.PPR.PSR, cpu.PPR.IC, where); PPR 1207 src/dps8/dps8_ins.c cpu.PPR.IC, PPR 1224 src/dps8/dps8_ins.c cpu.PPR.IC, PPR 1244 src/dps8/dps8_ins.c cpu.PPR.PSR, PPR 1246 src/dps8/dps8_ins.c cpu.PPR.IC, PPR 1247 src/dps8/dps8_ins.c cpu.PPR.PRR, PPR 1263 src/dps8/dps8_ins.c cpu.PPR.PSR, PPR 1264 src/dps8/dps8_ins.c cpu.PPR.IC, PPR 1265 src/dps8/dps8_ins.c cpu.PPR.PRR, PPR 1316 src/dps8/dps8_ins.c trk (cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, IWB_IRODD); PPR 1476 src/dps8/dps8_ins.c if (!cpu.cu.xde && cpu.cu.xdo /* odd instr being executed */ && !(cpu.PPR.IC & 1)) PPR 1482 src/dps8/dps8_ins.c if (opcode == 0560 && !opcodeX && cpu.cu.xde && !(cpu.PPR.IC & 1)) PPR 1672 src/dps8/dps8_ins.c if (n_dbgevents && (dbgevt = (dbgevent_lookup (cpu.PPR.PSR, cpu.PPR.IC))) >= 0) { PPR 1763 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "RPT/RPD first %d rpt %d rd %d e/o %d X0 %06o a %d b %d\n", cpu.cu.repeat_first, cpu.cu.rpt, cpu.cu.rd, cpu.PPR.IC & 1, cpu.rX[0], !! (cpu.rX[0] & 01000), !! (cpu.rX[0] & 0400)); PPR 1773 src/dps8/dps8_ins.c bool icOdd = !! (cpu.PPR.IC & 1); PPR 1834 src/dps8/dps8_ins.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 1835 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 1844 src/dps8/dps8_ins.c word18 saveIC = cpu.PPR.IC; PPR 1846 src/dps8/dps8_ins.c ReadInstructionFetch (cpu.PPR.IC + 1 + n, & cpu.currentEISinstruction.op[n]); PPR 1847 src/dps8/dps8_ins.c cpu.PPR.IC = saveIC; PPR 1886 src/dps8/dps8_ins.c cpu.TPR.TRR = max (cpu.PAR[n].RNR, cpu.PPR.PRR); PPR 1888 src/dps8/dps8_ins.c cpu.TPR.TRR = max3 (cpu.PAR[n].RNR, cpu.TPR.TRR, cpu.PPR.PRR); PPR 1907 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 1998 src/dps8/dps8_ins.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 1999 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 2010 src/dps8/dps8_ins.c bool icOdd = !! (cpu.PPR.IC & 1); PPR 2231 src/dps8/dps8_ins.c sim_debug (DBG_REGDUMPPPR, &cpu_dev, "PRR:%o PSR:%05o P:%o IC:%06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PPR 2902 src/dps8/dps8_ins.c word18 ret = (cpu.PPR.IC + 1) & MASK18; PPR 3786 src/dps8/dps8_ins.c SETHI (cpu.CY, (cpu.PPR.IC + 1) & MASK18); PPR 3799 src/dps8/dps8_ins.c cpu.CY = ((word36) ((cpu.PPR.IC + 2) & MASK18)) << 18; PPR 3865 src/dps8/dps8_ins.c putbits36_15 (& cpu.Ypair[0], 3, cpu.PPR.PSR); PPR 3866 src/dps8/dps8_ins.c putbits36_3 (& cpu.Ypair[0], 18, cpu.PPR.PRR); PPR 3870 src/dps8/dps8_ins.c putbits36_18 (& cpu.Ypair[1], 0, cpu.PPR.IC + 2); PPR 6124 src/dps8/dps8_ins.c "call6 PRR %o PSR %o\n", cpu.PPR.PRR, cpu.PPR.PSR); PPR 6143 src/dps8/dps8_ins.c cpu.PPR.IC = GETHI (cpu.CY); PPR 6930 src/dps8/dps8_ins.c if ((cpu.PPR.IC & 1) == 0) PPR 7233 src/dps8/dps8_ins.c sim_printf (" ldt %d PSR:IC %05o:%06o\r\n", cpu.rTR, cpu.PPR.PSR, cpu.PPR.IC); PPR 7284 src/dps8/dps8_ins.c sim_printf (" RALR set to %o PSR:IC %05o:%06o\r\n", cpu.rRALR, cpu.PPR.PSR, cpu.PPR.IC); PPR 8350 src/dps8/dps8_ins.c " no events in queue\n", cpu.PPR.IC); PPR 8367 src/dps8/dps8_ins.c if (cpu.PPR.PSR == 0430 && cpu.PPR.IC == 012) PPR 8387 src/dps8/dps8_ins.c PPR 8397 src/dps8/dps8_ins.c if (cpu.PPR.PSR == 034 && cpu.PPR.IC == 03535) PPR 9429 src/dps8/dps8_ins.c sim_printf (" rcu to %05o:%06o PSR:IC %05o:%06o\r\n", (cpu.Yblock8[0]>>18)&MASK15, (cpu.Yblock8[4]>>18)&MASK18, cpu.PPR.PSR, cpu.PPR.IC); PPR 9447 src/dps8/dps8_ins.c word1 saveP = cpu.PPR.P; // ISOLTS-870 02m PPR 9452 src/dps8/dps8_ins.c cpu.PPR.P = saveP; PPR 3472 src/dps8/dps8_iom.c __func__, iomChar (iom_unit_idx), cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC); PPR 26 src/dps8/dps8_mp.h struct ppr_s PPR; PPR 32 src/dps8/dps8_simh.h ((dptr != & cpu_dev) || (((dptr)->dctrl & (DBG_INTR | DBG_FAULT))) || (! sim_deb_segno_on) || sim_deb_segno[cpu.PPR.PSR & (DEBUG_SEGNO_LIMIT - 1)]) && \ PPR 33 src/dps8/dps8_simh.h ((dptr != & cpu_dev) || sim_deb_ringno == NO_SUCH_RINGNO || sim_deb_ringno == cpu . PPR. PRR) && \ PPR 2776 src/dps8/dps8_sys.c word15 icSegno = cpu.PPR.PSR; PPR 2777 src/dps8/dps8_sys.c word18 icOffset = cpu.PPR.IC; PPR 4115 src/dps8/dps8_sys.c { "cpus[].PPR", SYM_STRUCT_OFFSET, SYM_PTR, offsetof (cpu_state_t, PPR) }, PPR 166 src/dps8/hdbg.c if (filter && hdbgSegNum >= 0 && hdbgSegNum != cpu.PPR.PSR) \ PPR 168 src/dps8/hdbg.c if (filter && hdbgSegNum > 0 && blacklist[cpu.PPR.IC]) \ PPR 189 src/dps8/hdbg.c hevents[p].trace.segno = cpu.PPR.PSR; PPR 190 src/dps8/hdbg.c hevents[p].trace.ic = cpu.PPR.IC; PPR 191 src/dps8/hdbg.c hevents[p].trace.ring = cpu.PPR.PRR;