ihr               263 src/dps8/doAppendCycleABSA.h   if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               320 src/dps8/doAppendCycleAPUDataRMW.h   if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               278 src/dps8/doAppendCycleAPUDataRead.h   if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               281 src/dps8/doAppendCycleAPUDataStore.h   if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               389 src/dps8/doAppendCycleIndirectWordFetch.h   if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               520 src/dps8/doAppendCycleInstructionFetch.h   if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               319 src/dps8/doAppendCycleOperandRMW.h   if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               627 src/dps8/doAppendCycleOperandRead.h   if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               279 src/dps8/doAppendCycleOperandStore.h   if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               316 src/dps8/doAppendCycleRTCDOperandFetch.h   if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               269 src/dps8/dps8_append.c     L68_ (if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               316 src/dps8/dps8_append.c     L68_ (if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               455 src/dps8/dps8_append.c       if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               518 src/dps8/dps8_append.c       if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               816 src/dps8/dps8_append.c     L68_ (if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               955 src/dps8/dps8_append.c     L68_ (if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               980 src/dps8/dps8_append.c     L68_ (if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr              1879 src/dps8/dps8_append.c     L68_ (if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr              4129 src/dps8/dps8_cpu.c     if (! cpu.MR_cache.ihr)
ihr              4222 src/dps8/dps8_cpu.c     if (! cpu.MR_cache.ihr)
ihr              4287 src/dps8/dps8_cpu.c             cpu.MR.ihr = 0;
ihr               461 src/dps8/dps8_cpu.h     word1 ihr;      //  i       k           30 Enable HR
ihr               636 src/dps8/dps8_faults.c           cpu.MR.ihr = 0;
ihr               659 src/dps8/dps8_faults.c               cpu.MR.ihr = 0;
ihr               666 src/dps8/dps8_faults.c           cpu.MR.ihr = 0;
ihr               815 src/dps8/dps8_faults.c         cpu.MR.ihr = 0;
ihr              1414 src/dps8/dps8_ins.c           cpu.MR.ihr = 0;
ihr              7148 src/dps8/dps8_ins.c                   cpu.MR.ihr = getbits36_1 (cpu.CY, 30);
ihr              7373 src/dps8/dps8_ins.c                     putbits36_1 (& cpu.Ypair[0], 30, cpu.MR.ihr);
ihr              9110 src/dps8/dps8_ins.c       if (cpu.MR_cache.emr && cpu.MR_cache.ihr && is_ou)
ihr              9112 src/dps8/dps8_ins.c       if (cpu.MR_cache.emr && cpu.MR_cache.ihr && is_du)