root/src/dps8/dps8.h

/* */

INCLUDED FROM

   1 /*
   2  * vim: filetype=c:tabstop=4:ai:expandtab
   3  * SPDX-License-Identifier: ICU
   4  * scspell-id: 6965b612-f62e-11ec-a432-80ee73e9b8e7
   5  *
   6  * ---------------------------------------------------------------------------
   7  *
   8  * Copyright (c) 2012-2016 Harry Reed
   9  * Copyright (c) 2012 Dave Jordan
  10  * Copyright (c) 2013-2018 Charles Anthony
  11  * Copyright (c) 2016 Jean-Michel Merliot
  12  * Copyright (c) 2021-2023 The DPS8M Development Team
  13  *
  14  * All rights reserved.
  15  *
  16  * This software is made available under the terms of the ICU
  17  * License, version 1.8.1 or later.  For more details, see the
  18  * LICENSE.md file at the top-level directory of this distribution.
  19  *
  20  * ---------------------------------------------------------------------------
  21  */
  22 
  23 #ifndef DPS8_H
  24 # define DPS8_H
  25 
  26 # include <stdio.h>
  27 # include <stdbool.h>
  28 # include <errno.h>
  29 # include <inttypes.h>
  30 # include <sys/stat.h>
  31 # include <sys/time.h>
  32 # include <setjmp.h>  // for setjmp/longjmp used by interrupts & faults
  33 
  34 # if (defined(__APPLE__) && defined(__MACH__)) || defined(__ANDROID__)
  35 #  include <libgen.h>  // needed for macOS and Android
  36 # endif
  37 
  38 typedef int64_t __int64_t;
  39 
  40 # ifdef NEED_128
  41 typedef struct { uint64_t h; uint64_t l; } x__uint128_t;
  42 typedef struct { int64_t h;  uint64_t l; } x__int128_t;
  43 #  define construct_128(h, l) ((uint128) { (h), (l) })
  44 #  define construct_s128(h, l) ((int128) { (h), (l) })
  45 # endif /* ifdef NEED_128 */
  46 
  47 // Quiet compiler unused warnings
  48 # define QUIET_UNUSED
  49 
  50 // Enable speed over debugging if not TESTING
  51 # ifndef TESTING
  52 #  define SPEED
  53 # endif /* ifndef TESTING */
  54 
  55 // Experimental dial_out line disconnect delay
  56 // FNP polled ~100Hz; 2 secs. is 200 polls
  57 # define DISC_DELAY 200
  58 
  59 // Micro-cache
  60 # ifndef NO_UCACHE
  61 #  undef OLDAPP
  62 # else
  63 #  define OLDAPP
  64 # endif /* ifndef NO_UCACHE */
  65 # ifndef OLDAPP
  66 #  ifndef UCACHE_STATS
  67 #   define UCACHE_STATS
  68 #  endif /* ifndef UCACHE_STATS */
  69 # else
  70 #  undef UCACHE_STATS
  71 # endif /* ifndef OLDAPP */
  72 
  73 //
  74 // Dependencies
  75 //
  76 
  77 # ifdef PANEL68
  78 #  define PNL(x) x
  79 # else
  80 #  define PNL(x)
  81 # endif
  82 
  83 # define L68_(x) if (cpu.tweaks.l68_mode) { x }
  84 # define DPS8M_(x) if (! cpu.tweaks.l68_mode) { x }
  85 
  86 // Debugging tool
  87 # ifdef TESTING
  88 #  define IF1 if (cpu.tweaks.isolts_mode)
  89 # else
  90 #  define IF1 if (0)
  91 # endif
  92 
  93 // DPS8-M supports Hex Mode Floating Point
  94 # define HEX_MODE
  95 
  96 // Instruction profiler
  97 // #define MATRIX
  98 
  99 // Run TR on work done, not wall clock.
 100 // Define one of these; tied to memory access (MEM) or to instruction
 101 // execution (EXEC)
 102 
 103 //#define TR_WORK_MEM
 104 # define TR_WORK_EXEC
 105 
 106 // Multi-threading may require 'volatile' in some places
 107 # if defined(THREADZ) || defined(LOCKLESS)
 108 #  define vol volatile
 109 # else
 110 #  define vol
 111 # endif
 112 
 113 # ifndef NEED_128
 114 #  ifdef PRIu64
 115 #   undef PRIu64
 116 #  endif
 117 #  ifndef PRIu64
 118 #   define PRIu64 "llu"
 119 #  endif
 120 #  ifdef PRId64
 121 #   undef PRId64
 122 #  endif
 123 #  ifndef PRId64
 124 #   define PRId64 "lld"
 125 #  endif
 126 #  ifdef PRIo64
 127 #   undef PRIo64
 128 #  endif
 129 #  ifndef PRIo64
 130 #   ifdef __HAIKU__
 131 #    define PRIo64 "lo"
 132 #    undef llo
 133 #    define llo "lo"
 134 #   else
 135 #    define PRIo64 "llo"
 136 #   endif
 137 #  endif
 138 # endif
 139 
 140 # include "sim_defs.h"                                   /* simulator defns */
 141 # include "sim_tape.h"
 142 
 143 // patch supplied by Dave Jordan (jordandave@gmail.com) 29 Nov 2012
 144 # ifdef __MINGW32__
 145 #  include <stdint.h>
 146 typedef t_uint64    u_int64_t;
 147 # endif
 148 # ifdef __HAIKU__
 149 #  include <stdint.h>
 150 typedef long int64;
 151 typedef unsigned long uint64;
 152 # endif
 153 # ifndef __HAIKU__
 154 typedef t_uint64    uint64;
 155 # endif
 156 # ifndef _AIX
 157 #  ifndef __HAIKU__
 158 typedef t_int64     int64;
 159 #  endif
 160 # else
 161 typedef long        int64;
 162 # endif
 163 
 164 /* Data types */
 165 
 166 typedef uint8        word1;
 167 typedef uint8        word2;
 168 typedef uint8        word3;
 169 typedef uint8        word4;
 170 typedef uint8        word5;
 171 typedef uint8        word6;
 172 typedef uint8        word7;
 173 typedef uint8        word8;
 174 typedef int8         word8s; // signed 8-bit quantity
 175 typedef uint16       word9;
 176 typedef uint16       word10;
 177 typedef uint16       word11;
 178 typedef uint16       word12;
 179 typedef int16        word12s;
 180 typedef uint16       word13;
 181 typedef uint16       word14;
 182 typedef uint16       word15;
 183 typedef uint16       word16;
 184 typedef uint32       word17;
 185 typedef uint32       word18;
 186 typedef uint32       word19;
 187 typedef int32        word18s;
 188 typedef uint32       word20;
 189 typedef int32        word20s;
 190 typedef uint32       word21;
 191 typedef uint32       word22;
 192 typedef uint32       word23;
 193 typedef uint32       word24;
 194 typedef uint32       word27;
 195 typedef int32        word27s;
 196 typedef uint32       word28;
 197 typedef uint32       word32;
 198 typedef uint64       word34;
 199 typedef uint64       word36;
 200 typedef uint64       word37;
 201 typedef uint64       word38;
 202 typedef int64        word38s;
 203 typedef int64        word36s;
 204 # ifndef NEED_128
 205 typedef __uint128_t  word72;
 206 typedef __int128_t   word72s;
 207 typedef __uint128_t  word73;
 208 typedef __uint128_t  word74;
 209 typedef __uint128_t  uint128;
 210 typedef __int128_t   int128;
 211 # else
 212 typedef x__uint128_t word72;
 213 typedef x__int128_t  word72s;
 214 typedef x__uint128_t word73;
 215 typedef x__uint128_t word74;
 216 typedef x__uint128_t uint128;
 217 typedef x__int128_t  int128;
 218 # endif
 219 
 220 typedef word36       float36;   // single precision float
 221 typedef word72       float72;   // double precision float
 222 
 223 typedef unsigned int uint;   //-V677   // efficient unsigned int, at least 32 bits
 224 
 225 # include "dps8_simh.h"
 226 # include "dps8_sys.h"
 227 # include "dps8_math128.h"
 228 # include "dps8_hw_consts.h"
 229 # include "dps8_em_consts.h"
 230 
 231 # define SETF(flags, x)       flags = ((flags) |  (x))
 232 # define CLRF(flags, x)       flags = ((flags) & ~(x))
 233 # define TSTF(flags, x)       (((flags) & (x)) ? 1 : 0)
 234 # define SCF(cond, flags, x)  { if (cond) SETF((flags), x); else CLRF((flags), x); }
 235 
 236 # define SETBIT(dst, bitno)   ((dst)  |  (1LLU << (bitno)))
 237 # define CLRBIT(dst, bitno)   ((dst)  & ~(1LLU << (bitno)))
 238 # define TSTBIT(dst, bitno)   (((dst) &  (1LLU << (bitno))) ? 1: 0)
 239 
 240 typedef enum
 241   {
 242     UNKNOWN_CYCLE = 0,
 243     OPERAND_STORE,
 244     OPERAND_READ,
 245     INDIRECT_WORD_FETCH,
 246     RTCD_OPERAND_FETCH,
 247     INSTRUCTION_FETCH,
 248     APU_DATA_READ,
 249     APU_DATA_STORE,
 250     ABSA_CYCLE,
 251 # ifdef LOCKLESS
 252     OPERAND_RMW,
 253     APU_DATA_RMW,
 254 # endif
 255   } processor_cycle_type;
 256 
 257 # ifndef LOCKLESS
 258 #  define OPERAND_RMW   OPERAND_READ
 259 #  define APU_DATA_RMW  APU_DATA_READ
 260 # endif
 261 
 262 # ifndef EIS_PTR4
 263 // some breakpoint stuff ...
 264 typedef enum
 265   {
 266     UnknownMAT       = 0,
 267     OperandRead,
 268     OperandWrite,
 269     viaPR
 270   } MemoryAccessType;
 271 # endif
 272 
 273 // get 6-bit char @ pos
 274 # define GETCHAR(src, pos) (word6)(((word36)src >> (word36)((5 - pos) * 6)) & 077)
 275 // get 9-bit byte @ pos
 276 # define GETBYTE(src, pos) (word9)(((word36)src >> (word36)((3 - pos) * 9)) & 0777)
 277 
 278 # ifdef NEED_128
 279 #  define YPAIRTO72(ypair) construct_128 ((ypair[0] >> 28) & MASK8,    \
 280                                          ((ypair[0] & MASK28) << 36) | \
 281                                           (ypair[1] & MASK36));
 282 # else
 283 #  define YPAIRTO72(ypair)    (((((word72)(ypair[0] & DMASK)) << 36) | \
 284                                           (ypair[1] & DMASK)) & MASK72)
 285 # endif
 286 
 287 # define GET_TALLY(src) (((src) >> 6) & MASK12)   // 12-bits
 288 # define GET_DELTA(src)  ((src) & MASK6)          // 6-bits
 289 
 290 # ifndef max
 291 #  define max(a,b)   max2((a),(b))
 292 # endif
 293 # define max2(a,b)   ((a) > (b) ? (a) : (b))
 294 # define max3(a,b,c) max((a), max((b),(c)))
 295 
 296 # ifndef min
 297 #  define min(a,b)   min2((a),(b))
 298 # endif
 299 # define min2(a,b)   ((a) < (b) ? (a) : (b))
 300 # define min3(a,b,c) min((a), min((b),(c)))
 301 
 302 // opcode metadata (flag) ...
 303 typedef enum
 304   {
 305     READ_OPERAND    = (1U <<  0),  // fetches/reads operand (CA) from memory
 306     STORE_OPERAND   = (1U <<  1),  // stores/writes operand to memory (its a STR-OP)
 307 # define RMW             (READ_OPERAND | STORE_OPERAND) // a Read-Modify-Write instruction
 308     READ_YPAIR      = (1U <<  2),  // fetches/reads Y-pair operand (CA) from memory
 309     STORE_YPAIR     = (1U <<  3),  // stores/writes Y-pair operand to memory
 310     READ_YBLOCK8    = (1U <<  4),  // fetches/reads Y-block8 operand (CA) from memory
 311     NO_RPT          = (1U <<  5),  // Repeat instructions not allowed
 312 //#define NO_RPD          (1U << 6)
 313     NO_RPL          = (1U <<  7),
 314 //#define NO_RPX          (NO_RPT | NO_RPD | NO_RPL)
 315     READ_YBLOCK16   = (1U <<  8),  // fetches/reads Y-block16 operands from memory
 316     STORE_YBLOCK16  = (1U <<  9),  // fetches/reads Y-block16 operands from memory
 317     TRANSFER_INS    = (1U << 10),  // a transfer instruction
 318     TSPN_INS        = (1U << 11),  // a TSPn instruction
 319     CALL6_INS       = (1U << 12),  // a call6 instruction
 320     PREPARE_CA      = (1U << 13),  // prepare TPR.CA for instruction
 321     STORE_YBLOCK8   = (1U << 14),  // stores/writes Y-block8 operand to memory
 322     IGN_B29         = (1U << 15),  // Bit-29 has an instruction specific meaning. Ignore.
 323     NO_TAG          = (1U << 16),  // tag is interpreted differently and for addressing purposes is effectively 0
 324     PRIV_INS        = (1U << 17),  // privileged instruction
 325     NO_BAR          = (1U << 18),  // not allowed in BAR mode
 326 //  NO_XEC          = (1U << 19),  // can't be executed via xec/xed
 327     NO_XED          = (1U << 20),  // No execution via XEC/XED instruction
 328 
 329 // EIS operand types
 330 
 331 # define EOP_ALPHA 1U
 332 
 333 // bits 21, 22
 334     EOP1_ALPHA      = (EOP_ALPHA << 21),
 335     EOP1_MASK       = (3U << 21),
 336 # define EOP1_SHIFT 21
 337 
 338 // bits 23, 24
 339     EOP2_ALPHA      = (EOP_ALPHA << 23),
 340     EOP2_MASK       = (3U << 23),
 341 # define EOP2_SHIFT 23
 342 
 343 // bits 25, 26
 344     EOP3_ALPHA      = (EOP_ALPHA << 25),
 345     EOP3_MASK       = (3U << 25),
 346 # define EOP3_SHIFT 25
 347 
 348     READ_YBLOCK32   = (1U << 27),  // fetches/reads Y-block16 operands from memory
 349     STORE_YBLOCK32  = (1U << 28),  // fetches/reads Y-block16 operands from memory
 350   } opc_flag;
 351 
 352 // opcode metadata (disallowed) modifications
 353 enum opc_mod
 354   {
 355     NO_DU           = (1U << 0),   // No DU modification allowed (Can these 2 be combined into 1?)
 356     NO_DL           = (1U << 1),   // No DL modification allowed
 357 # define NO_DUDL    (NO_DU | NO_DL)
 358 
 359     NO_CI           = (1U << 2),   // No character indirect modification (can these next 3 be combined?_
 360     NO_SC           = (1U << 3),   // No sequence character modification
 361     NO_SCR          = (1U << 4),   // No sequence character reverse modification
 362 # define NO_CSS     (NO_CI | NO_SC | NO_SCR)
 363 
 364 # define NO_DLCSS   (NO_DU   | NO_CSS)
 365 # define NO_DDCSS   (NO_DUDL | NO_CSS)
 366 
 367     ONLY_AU_QU_AL_QL_XN = (1U << 5)    // None except au, qu, al, ql, xn
 368   };
 369 
 370 // None except au, qu, al, ql, xn for MF1 and REG
 371 // None except du, au, qu, al, ql, xn for MF2
 372 // None except au, qu, al, ql, xn for MF1, MF2, and MF3
 373 
 374 # define IS_NONE(tag) (!(tag))
 375 /*! non-tally: du or dl */
 376 # define IS_DD(tag) ((_TM(tag) != 040U) && \
 377     ((_TD(tag) == 003U) || (_TD(tag) == 007U)))
 378 /*! tally: ci, sc, or scr */
 379 # define IS_CSS(tag) ((_TM(tag) == 040U) && \
 380     ((_TD(tag) == 050U) || (_TD(tag) == 052U) || \
 381     (_TD(tag) == 045U)))
 382 # define IS_DDCSS(tag) (IS_DD(tag) || IS_CSS(tag))
 383 /*! just dl or css */
 384 # define IS_DCSS(tag) (((_TM(tag) != 040U) && (_TD(tag) == 007U)) || IS_CSS(tag))
 385 
 386 // !%WRD  ~0200000  017
 387 // !%9    ~0100000  027
 388 // !%6    ~0040000  033
 389 // !%4    ~0020000  035
 390 // !%1    ~0010000  036
 391 enum reg_use { is_WRD =  0174000,
 392                is_9  =   0274000,
 393                is_6  =   0334000,
 394                is_4  =   0354000,
 395                is_1  =   0364000,
 396                is_DU =   04000,
 397                is_OU =   02000,
 398                ru_A  =   02000 | 01000,
 399                ru_Q  =   02000 |  0400,
 400                ru_X0 =   02000 |  0200,
 401                ru_X1 =   02000 |  0100,
 402                ru_X2 =   02000 |   040,
 403                ru_X3 =   02000 |   020,
 404                ru_X4 =   02000 |   010,
 405                ru_X5 =   02000 |    04,
 406                ru_X6 =   02000 |    02,
 407                ru_X7 =   02000 |    01,
 408                ru_none = 02000 |     0 };
 409 //, ru_notou = 1024 };
 410 
 411 # define ru_AQ (ru_A | ru_Q)
 412 # define ru_Xn(n) (1 << (7 - (n)))
 413 
 414 // Basic + EIS opcodes .....
 415 struct opcode_s {
 416     const char *mne;       // mnemonic
 417     opc_flag flags;        // various and sundry flags
 418     enum opc_mod mods;          // disallowed addr mods
 419     uint ndes;             // number of operand descriptor words for instruction (mw EIS)
 420     enum reg_use reg_use;  // register usage
 421 };
 422 
 423 // operations stuff
 424 
 425 /*! Y of instruc word */
 426 # define Y(i) (i & MASKHI18)
 427 /*! X from opcodes in instruc word */
 428 # define OPSX(i) ((i & 0007000LLU) >> 9)
 429 /*! X from OP_* enum, and X from  */
 430 # define X(i) (i & 07U)
 431 
 432 enum { OP_1     = 00001U,
 433     OP_E        = 00002U,
 434     OP_BAR      = 00003U,
 435     OP_IC       = 00004U,
 436     OP_A        = 00005U,
 437     OP_Q        = 00006U,
 438     OP_AQ       = 00007U,
 439     OP_IR       = 00010U,
 440     OP_TR       = 00011U,
 441     OP_REGS     = 00012U,
 442 
 443     /* 645/6180 */
 444     OP_CPR      = 00021U,
 445     OP_DBR      = 00022U,
 446     OP_PTP      = 00023U,
 447     OP_PTR      = 00024U,
 448     OP_RA       = 00025U,
 449     OP_SDP      = 00026U,
 450     OP_SDR      = 00027U,
 451 
 452     OP_X        = 01000U
 453 };
 454 
 455 enum eCAFoper {
 456     unknown = 0,
 457     readCY,
 458     writeCY,
 459     rmwCY,      // Read-Modify-Write
 460 //    readCYpair,
 461 //    writeCYpair,
 462 //    readCYblock8,
 463 //    writeCYblock8,
 464 //    readCYblock16,
 465 //    writeCYblock16,
 466 
 467     prepareCA,
 468 };
 469 typedef enum eCAFoper eCAFoper;
 470 
 471 # define READOP(i) ((bool) (i->info->flags    &  \
 472                            (READ_OPERAND      |  \
 473                             READ_YPAIR        |  \
 474                             READ_YBLOCK8      |  \
 475                             READ_YBLOCK16     |  \
 476                             READ_YBLOCK32)))
 477 
 478 # define WRITEOP(i) ((bool) (i->info->flags   &  \
 479                             (STORE_OPERAND    |  \
 480                              STORE_YPAIR      |  \
 481                              STORE_YBLOCK8    |  \
 482                              STORE_YBLOCK16   |  \
 483                              STORE_YBLOCK32)))
 484 
 485 // if it's both read and write it's a RMW
 486 # define RMWOP(i) ((bool) READOP(i) && WRITEOP(i))
 487 
 488 # define TRANSOP(i) ((bool) (i->info->flags & (TRANSFER_INS) ))
 489 
 490 //
 491 // EIS stuff ...
 492 //
 493 
 494 // Numeric operand descriptors
 495 
 496 // AL39 Table 4-3. Alphanumeric Data Type (TA) Codes
 497 enum
 498   {
 499     CTA9   = 0U, // 9-bit bytes
 500     CTA6   = 1U, // 6-bit characters
 501     CTA4   = 2U, // 4-bit decimal
 502     CTAILL = 3U  // Illegal
 503   };
 504 
 505 // TN - Type Numeric AL39 Table 4-3. Alphanumeric Data Type (TN) Codes
 506 enum
 507   {
 508     CTN9 = 0U,   // 9-bit
 509     CTN4 = 1U    // 4-bit
 510   };
 511 
 512 // S - Sign and Decimal Type (AL39 Table 4-4. Sign and Decimal Type (S) Codes)
 513 
 514 enum
 515   {
 516     CSFL = 0U,   // Floating-point, leading sign
 517     CSLS = 1U,   // Scaled fixed-point, leading sign
 518     CSTS = 2U,   // Scaled fixed-point, trailing sign
 519     CSNS = 3U    // Scaled fixed-point, unsigned
 520   };
 521 
 522 enum
 523   {
 524     // Address register flag. This flag controls interpretation of the ADDRESS
 525     // field of the operand descriptor just as the "A" flag controls
 526     // interpretation of the ADDRESS field of the basic and EIS single-word
 527     // instructions.
 528     MFkAR = 0x40U,
 529     // Register length control. If RL = 0, then the length (N) field of the
 530     // operand descriptor contains the length of the operand. If RL = 1, then
 531     // the length (N) field of the operand descriptor contains a selector value
 532     // specifying a register holding the operand length. Operand length is
 533     // interpreted as units of the data size (1-, 4-, 6-, or 9-bit) given in
 534     // the associated operand descriptor.
 535     MFkRL = 0x20U,
 536     // Indirect descriptor control. If ID = 1 for Mfk, then the kth word
 537     // following the instruction word is an indirect pointer to the operand
 538     // descriptor for the kth operand; otherwise, that word is the operand
 539     // descriptor.
 540     MFkID = 0x10U,
 541 
 542     MFkREGMASK = 0xfU
 543   };
 544 
 545 // EIS instruction take on a life of their own. Need to take into account
 546 // RNR/SNR/BAR etc.
 547 typedef enum
 548   {
 549     eisUnknown = 0,  // uninitialized
 550     eisTA      = 1,  // type alphanumeric
 551     eisTN      = 2,  // type numeric
 552     eisBIT     = 3   // bit string
 553   } eisDataType;
 554 
 555 typedef enum
 556   {
 557     eRWreadBit = 0,
 558     eRWwriteBit
 559   } eRW;
 560 
 561 // Misc constants and macros
 562 
 563 # define ARRAY_SIZE(a) ( sizeof(a) / sizeof((a)[0]) )
 564 
 565 # undef FREE
 566 # ifdef TESTING
 567 #  define FREE(p) free(p)
 568 # else
 569 #  define FREE(p) do  \
 570   {                   \
 571     free((p));        \
 572     (p) = NULL;       \
 573   } while(0)
 574 # endif /* ifdef TESTING */
 575 
 576 # if defined (__MINGW64__) || \
 577     defined (__MINGW32__)  || \
 578     defined (__GNUC__)     || \
 579     defined (__clang_version__)
 580 #  define NO_RETURN __attribute__ ((noreturn))
 581 #  define UNUSED    __attribute__ ((unused))
 582 # else
 583 #  define NO_RETURN
 584 #  define UNUSED
 585 # endif
 586 
 587 # define MAX_DEV_NAME_LEN 64
 588 
 589 // TESTING realloc wrapper function
 590 # ifdef TESTING
 591 void * trealloc(void *ptr, size_t size);
 592 # endif /* ifdef TESTING */
 593 
 594 // Basic STDIO for MinGW
 595 # ifndef __CYGWIN__
 596 #  if defined( __MINGW32__ ) || defined( __MINGW64__ ) || defined( CROSS_MINGW32 ) || defined( CROSS_MINGW64 )
 597 #   define WIN_STDIO    1
 598 #  endif /* if defined( __MINGW32__ ) || defined( __MINGW64__ ) || defined( CROSS_MINGW32 ) || defined( CROSS_MINGW64 ) */
 599 # endif /* ifndef __CYGWIN__ */
 600 
 601 #endif // ifdef DPS8_H

/* */