IWB 325 src/dps8/dps8_addrmods.c wb = & cpu.cu.IWB; IWB 1005 src/dps8/dps8_cpu.c cpu.cu.IWB = 0000000616200; //-V536 // Stuff DIS w/interrupt inhibit in instruction buffer IWB 2427 src/dps8/dps8_cpu.c cpu.cu.IWB = cpu.switches.data_switches; IWB 3169 src/dps8/dps8_cpu.c & cpu.cu.IWB, & cpu.cu.IRODD, __func__); IWB 3171 src/dps8/dps8_cpu.c HDBGMRead (intr_pair_addr, cpu.cu.IWB, "intr even"); IWB 3299 src/dps8/dps8_cpu.c !(is_dis && GET_I (cpu.cu.IWB) == 0); IWB 3693 src/dps8/dps8_cpu.c if (GET_I (cpu.cu.IWB)) IWB 4035 src/dps8/dps8_cpu.c cpu.cu.IWB = cpu.cu.IRODD; IWB 4086 src/dps8/dps8_cpu.c cpu.cu.IWB = cpu.cu.IRODD; IWB 4221 src/dps8/dps8_cpu.c cpu.cu.IWB = sw; IWB 4225 src/dps8/dps8_cpu.c core_read2 (cpup, addr, & cpu.cu.IWB, & cpu.cu.IRODD, __func__); IWB 4227 src/dps8/dps8_cpu.c HDBGMRead (addr, cpu.cu.IWB, "fault even"); IWB 1036 src/dps8/dps8_cpu.h word36 IWB; IWB 1043 src/dps8/dps8_cpu.h #define IWB_IRODD (USE_IRODD ? cpu.cu.IRODD : cpu.cu.IWB) IWB 1159 src/dps8/dps8_eis.c e -> MF1 = getbits36_7 (cpu.cu.IWB, 29); IWB 1164 src/dps8/dps8_eis.c e -> MF2 = getbits36_7 (cpu.cu.IWB, 11); IWB 1169 src/dps8/dps8_eis.c e -> MF3 = getbits36_7 (cpu.cu.IWB, 2); IWB 2068 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); IWB 2070 src/dps8/dps8_eis.c int32_t address = SIGNEXT15_32 (GET_OFFSET (cpu.cu.IWB)); IWB 2074 src/dps8/dps8_eis.c word4 reg = GET_TD (cpu.cu.IWB); // 4-bit register modification (None except IWB 2083 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) IWB 2152 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); IWB 2154 src/dps8/dps8_eis.c int32_t address = SIGNEXT15_32 (GET_OFFSET (cpu.cu.IWB)); IWB 2155 src/dps8/dps8_eis.c word4 reg = GET_TD (cpu.cu.IWB); // 4-bit register modification (None except IWB 2162 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) IWB 2199 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); IWB 2201 src/dps8/dps8_eis.c int32_t address = SIGNEXT15_32 (GET_OFFSET (cpu.cu.IWB)); IWB 2202 src/dps8/dps8_eis.c word6 reg = GET_TD (cpu.cu.IWB); // 4-bit register modification (None except IWB 2224 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) IWB 2237 src/dps8/dps8_eis.c if (sz == 9 || GET_A (cpu.cu.IWB)) IWB 2277 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); IWB 2280 src/dps8/dps8_eis.c word18 address = SIGNEXT15_18 (GET_OFFSET (cpu.cu.IWB)); IWB 2283 src/dps8/dps8_eis.c word4 reg = (word4) GET_TD (cpu.cu.IWB); IWB 2298 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) IWB 2340 src/dps8/dps8_eis.c IWB 2342 src/dps8/dps8_eis.c IWB 2349 src/dps8/dps8_eis.c IWB 2369 src/dps8/dps8_eis.c IWB 2393 src/dps8/dps8_eis.c IWB 2487 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); IWB 2489 src/dps8/dps8_eis.c int32_t address = SIGNEXT15_32 (GET_OFFSET (cpu.cu.IWB)); IWB 2492 src/dps8/dps8_eis.c word4 reg = (word4) GET_TD (cpu.cu.IWB); IWB 2503 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) IWB 2534 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); IWB 2536 src/dps8/dps8_eis.c word18 address = SIGNEXT15_18 (GET_OFFSET (cpu.cu.IWB)); IWB 2537 src/dps8/dps8_eis.c word4 reg = (word4) GET_TD (cpu.cu.IWB); IWB 2543 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) IWB 2570 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); IWB 2572 src/dps8/dps8_eis.c int32_t address = SIGNEXT15_32 (GET_OFFSET (cpu.cu.IWB)); IWB 2575 src/dps8/dps8_eis.c word4 reg = (word4) GET_TD (cpu.cu.IWB); IWB 2586 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) IWB 2616 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); IWB 2618 src/dps8/dps8_eis.c word18 address = SIGNEXT15_18 (GET_OFFSET (cpu.cu.IWB)); IWB 2621 src/dps8/dps8_eis.c word4 reg = (word4) GET_TD (cpu.cu.IWB); IWB 2630 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) IWB 2902 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); IWB 2903 src/dps8/dps8_eis.c uint address = SIGNEXT15_18 (GET_OFFSET (cpu.cu.IWB)); IWB 2904 src/dps8/dps8_eis.c word4 reg = (word4) GET_TD (cpu.cu.IWB); // 4-bit register modification (None except IWB 2938 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) IWB 3174 src/dps8/dps8_eis.c word9 fill = getbits36_9 (cpu.cu.IWB, 0); IWB 3710 src/dps8/dps8_eis.c uint mask = (uint) getbits36_9 (cpu.cu.IWB, 0); IWB 3883 src/dps8/dps8_eis.c uint mask = (uint) getbits36_9 (cpu.cu.IWB, 0); IWB 4548 src/dps8/dps8_eis.c word1 T = getbits36_1 (cpu.cu.IWB, 9); IWB 4550 src/dps8/dps8_eis.c word9 fill = getbits36_9 (cpu.cu.IWB, 0); IWB 4955 src/dps8/dps8_eis.c word1 T = getbits36_1 (cpu.cu.IWB, 9); IWB 4957 src/dps8/dps8_eis.c word9 fill = getbits36_9 (cpu.cu.IWB, 0); IWB 7368 src/dps8/dps8_eis.c word1 T = getbits36_1 (cpu.cu.IWB, 9); IWB 7370 src/dps8/dps8_eis.c word9 fill = getbits36_9 (cpu.cu.IWB, 0); IWB 7864 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character IWB 7866 src/dps8/dps8_eis.c word1 T = getbits36_1 (cpu.cu.IWB, 9); IWB 7867 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit IWB 8237 src/dps8/dps8_eis.c bool F = getbits36_1 (cpu.cu.IWB, 0) != 0; // fill bit IWB 8238 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // T (enablefault) bit IWB 8240 src/dps8/dps8_eis.c uint BOLR = getbits36_4 (cpu.cu.IWB, 5); // T (enablefault) bit IWB 8536 src/dps8/dps8_eis.c bool F = getbits36_1 (cpu.cu.IWB, 0) != 0; // fill bit IWB 8537 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // T (enablefault) bit IWB 8539 src/dps8/dps8_eis.c uint BOLR = getbits36_4 (cpu.cu.IWB, 5); // T (enablefault) bit IWB 8725 src/dps8/dps8_eis.c bool F = getbits36_1 (cpu.cu.IWB, 0) != 0; // fill bit IWB 8726 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // T (enablefault) bit IWB 8728 src/dps8/dps8_eis.c uint BOLR = getbits36_4 (cpu.cu.IWB, 5); // T (enablefault) bit IWB 8925 src/dps8/dps8_eis.c bool F = getbits36_1 (cpu.cu.IWB, 0) != 0; // fill bit IWB 8926 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // T (enablefault) bit IWB 8928 src/dps8/dps8_eis.c uint BOLR = getbits36_4 (cpu.cu.IWB, 5); // T (enablefault) bit IWB 9110 src/dps8/dps8_eis.c bool F = getbits36_1 (cpu.cu.IWB, 0) != 0; // fill bit IWB 9769 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control IWB 10539 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control IWB 10540 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // truncation bit IWB 10541 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit IWB 10946 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control IWB 10947 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // truncation bit IWB 10948 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit IWB 11344 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control IWB 11345 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // truncation bit IWB 11346 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit IWB 11709 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control IWB 11710 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // truncation bit IWB 11711 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit IWB 12093 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control IWB 12094 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // truncation bit IWB 12095 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit IWB 12373 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control IWB 12374 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // truncation bit IWB 12375 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit IWB 13435 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control IWB 13437 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit IWB 13840 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control IWB 13842 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit IWB 133 src/dps8/dps8_ins.c rTAG = GET_TAG (cpu.cu.IWB); IWB 214 src/dps8/dps8_ins.c rTAG = GET_TAG (cpu.cu.IWB); IWB 333 src/dps8/dps8_ins.c cpu.cu.IWB = cpu.CY; IWB 338 src/dps8/dps8_ins.c cpu.cu.IWB = cpu.Ypair[0]; IWB 517 src/dps8/dps8_ins.c words[6] = cpu.cu.IWB; IWB 764 src/dps8/dps8_ins.c cpu.cu.IWB = words[6]; IWB 1201 src/dps8/dps8_ins.c ReadInstructionFetch (cpup, addr, & cpu.cu.IWB); IWB 1208 src/dps8/dps8_ins.c cpu.cu.IWB = tmp[0]; IWB 1229 src/dps8/dps8_ins.c cpu.cu.IWB = tmp[0]; IWB 1234 src/dps8/dps8_ins.c ReadInstructionFetch (cpup, addr, & cpu.cu.IWB); IWB 1235 src/dps8/dps8_ins.c cpu.cu.IRODD = cpu.cu.IWB; IWB 2179 src/dps8/dps8_ins.c uint Xn = (uint) getbits36_3 (cpu.cu.IWB, 36 - 3); IWB 2196 src/dps8/dps8_ins.c uint Xn = (uint) getbits36_3 (cpu.cu.IWB, 36 - 3); IWB 2345 src/dps8/dps8_ins.c uint Xn = (uint) getbits36_3 (cpu.cu.IWB, 36 - 3); IWB 7321 src/dps8/dps8_ins.c cpu.cu.IWB = cpu.CY; IWB 7365 src/dps8/dps8_ins.c cpu.cu.IWB = cpu.Ypair[0]; IWB 9024 src/dps8/dps8_ins.c IWB 9072 src/dps8/dps8_ins.c if (GET_I (cpu.cu.IWB) ? bG7PendingNoTRO (cpup) : bG7Pending (cpup)) IWB 9078 src/dps8/dps8_ins.c IWB 10162 src/dps8/dps8_ins.c uint Xn = (uint) getbits36_3 (cpu.cu.IWB, 36 - 3); IWB 10169 src/dps8/dps8_ins.c uint Xn = (uint) getbits36_3 (cpu.cu.IWB, 36 - 3); IWB 1873 src/dps8/dps8_sys.c IWB 4106 src/dps8/dps8_sys.c { "cpus[].cu.IWB", SYM_STRUCT_OFFSET, SYM_UINT64_36, offsetof (ctl_unit_data_t, IWB) }, IWB 483 src/dps8/panelScraper.c SETL (bank_a, 0+3, cpu.cu.IWB, 36); IWB 870 src/dps8/panelScraper.c SETL (bank_d, 0+3, cpu.cu.IWB, 36); IWB 945 src/dps8/panelScraper.c SETL (bank_h, 3, cpu.cu.IWB, 36);