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1 /*
2 * vim: filetype=c:tabstop=4:ai:expandtab
3 * SPDX-License-Identifier: ICU
4 * scspell-id: e959445f-f62e-11ec-b5eb-80ee73e9b8e7
5 *
6 * ---------------------------------------------------------------------------
7 *
8 * Copyright (c) 2007-2013 Michael Mondy
9 * Copyright (c) 2012-2016 Harry Reed
10 * Copyright (c) 2013-2016 Charles Anthony
11 * Copyright (c) 2021-2023 The DPS8M Development Team
12 *
13 * This software is made available under the terms of the ICU License.
14 * See the LICENSE.md file at the top-level directory of this distribution.
15 *
16 * ---------------------------------------------------------------------------
17 */
18
19 extern DEVICE scu_dev;
20
21 #if defined(SPEED)
22 # define if_sim_debug(dbits, dptr) if ((0))
23 #else
24 # define if_sim_debug(dbits, dptr) \
25 if ( \
26 sim_deb && \
27 (((dptr)->dctrl & (dbits)) || (dbits) == 0) && \
28 ((dptr != & cpu_dev) || ((1 << current_running_cpu_idx) & dbgCPUMask)) && \
29 ((dptr != & cpu_dev) || (((dptr)->dctrl & (DBG_INTR | DBG_FAULT))) || \
30 (! sim_deb_segno_on) || sim_deb_segno[cpu.PPR.PSR & (DEBUG_SEGNO_LIMIT - 1)]) && \
31 ((dptr != & cpu_dev) || sim_deb_ringno == NO_SUCH_RINGNO || sim_deb_ringno == cpu . PPR. PRR) && \
32 ((dptr != & cpu_dev) || (! sim_deb_bar) || (! TST_I_NBAR)) && \
33 cpu.cycleCnt >= sim_deb_start && \
34 (sim_deb_stop == 0 || cpu.cycleCnt < sim_deb_stop) && \
35 (sim_deb_mme_cntdwn == 0) && \
36 ((dptr != & cpu_dev) | (((dbits) & DBG_TRACE) ? (sim_deb_skip_cnt ++ >= sim_deb_skip_limit) : \
37 (sim_deb_skip_cnt >= sim_deb_skip_limit))) \
38 )
39 #endif /* if defined(SPEED) */
40
41 #if !defined(THREADZ) && !defined(LOCKLESS)
42 # define dps8_sim_debug _sim_debug
43 #endif /* if !defined(THREADZ) && !defined(LOCKLESS) */
44
45 #undef sim_debug
46 #if defined(THREADZ) || defined(LOCKLESS)
47 # define sim_debug(dbits, dptr, ...) \
48 if_sim_debug((dbits), dptr) \
49 dps8_sim_debug ((dbits), dptr, DBG_CTR, __VA_ARGS__); \
50 else \
51 (void) 0
52 #else
53 # define sim_debug(dbits, dptr, ...) \
54 if_sim_debug((dbits), dptr) \
55 dps8_sim_debug ((dbits), dptr, __VA_ARGS__); \
56 else \
57 (void) 0
58 #endif /* if defined(THREADZ) || defined(LOCKLESS) */
59
60 /* scp Debug flags */
61
62 #define DBG_TRACE (1U << 0) ///< instruction trace
63 #define DBG_MSG (1U << 1) ///< misc output
64
65 #define DBG_REGDUMPAQI (1U << 2) ///< A/Q/IR register dump
66 #define DBG_REGDUMPIDX (1U << 3) ///< index register dump
67 #define DBG_REGDUMPPR (1U << 4) ///< pointer registers dump
68 //#define DBG_REGDUMPADR (1U << 5) ///< address registers dump
69 #define DBG_REGDUMPPPR (1U << 6) ///< PPR register dump
70 #define DBG_REGDUMPDSBR (1U << 7) ///< descriptor segment base register dump
71 #define DBG_REGDUMPFLT (1U << 8) ///< C(EAQ) floating-point register dump
72
73 //#define DBG_REGDUMP (DBG_REGDUMPAQI | DBG_REGDUMPIDX | DBG_REGDUMPPR |
74 // DBG_REGDUMPADR | DBG_REGDUMPPPR | DBG_REGDUMPDSBR | DBG_REGDUMPFLT)
75 #define DBG_REGDUMP (DBG_REGDUMPAQI | DBG_REGDUMPIDX | DBG_REGDUMPPR | \
76 DBG_REGDUMPPPR | DBG_REGDUMPDSBR | DBG_REGDUMPFLT)
77
78 #define DBG_ADDRMOD (1U << 9) ///< follow address modifications
79 #define DBG_APPENDING (1U << 10) ///< follow appending unit operations
80 #define DBG_TRACEEXT (1U << 11) ///< extended instruction trace
81 #define DBG_WARN (1U << 12)
82 #define DBG_DEBUG (1U << 13)
83 #define DBG_INFO (1U << 14)
84 #define DBG_NOTIFY (1U << 15)
85 #define DBG_SIM_USES_16 (1U << 16)
86 #define DBG_SIM_USES_17 (1U << 17)
87 #define DBG_SIM_USES_18 (1U << 18)
88 #define DBG_ERR (1U << 19)
89 #define DBG_ALL (DBG_NOTIFY | DBG_INFO | DBG_ERR | DBG_DEBUG | DBG_WARN | \
90 DBG_ERR | DBG_TRACE )
91 #define DBG_FAULT (1U << 20) ///< follow fault handling
92 #define DBG_INTR (1U << 21) // follow interrupt handling
93 #define DBG_CORE (1U << 22)
94 #define DBG_CYCLE (1U << 23)
95 #define DBG_CAC (1U << 24)
96 #define DBG_FINAL (1U << 25)
97 #define DBG_AVC (1U << 26)
98
99 // Abort codes, used to sort out longjmp's back to the main loop.
100 // Codes > 0 are simulator stop codes
101 // Codes < 0 are internal aborts
102 // Code = 0 stops execution for an interrupt check (XXX Don't know if I like
103 // this or not)
104 // XXX above is not entirely correct (anymore).
105
106 //#define SCPE_OK 0
107 #define STOP_STOP 1
108 #define STOP_BKPT 2
109
110 // not really STOP codes, but get returned from instruction loops
111 #define CONT_TRA -1 // encountered a transfer instruction; don't bump PPR.IC
112 #define CONT_DIS -2 // instruction was a DIS
113 #define CONT_XEC -3 // instruction was a XEC or XED
114 #define CONT_RET -5 // encountered a return instruction; don't bump PPR.IC,
115 // do instruction fetch
116
117 //
118 // mask entry flags
119 // MTAB_XTD extended entry
120 // MTAB_VDV valid for devices
121 // MTAB_VUN valid for units
122 // MTAB_VALO takes a value (optional)
123 // MTAB_VALR takes a value (required)
124 // MTAB_NMO valid only in named SHOW
125 // MTAB_NC do not convert option value to upper case
126 // MTAB_SHP SHOW parameter takes optional value
127
128 // Requires a value, DEV and DEVn both work, not in "show"
129 #define MTAB_unit_value MTAB_XTD | MTAB_VUN | MTAB_VDV | MTAB_NMO | MTAB_VALR
130 // Requires a value, DEVn, not in "show"
131 #define MTAB_unitonly_value MTAB_XTD | MTAB_VUN | MTAB_NMO | MTAB_VALR
132 // Requires a value, DEV and DEVn both work, in "show"
133 #define MTAB_unit_value_show MTAB_XTD | MTAB_VUN | MTAB_VDV | MTAB_VALR
134 // Requires a value, DEV only, not in "show", uppercase value
135 #define MTAB_dev_valr_noshow MTAB_XTD | MTAB_VDV | MTAB_NMO | MTAB_VALR
136 // Requires a value, DEV only, not in "show", don't uppercase value
137 #define MTAB_dev_valr_nouc MTAB_XTD | MTAB_VDV | MTAB_NMO | MTAB_VALR | MTAB_NC
138 // Requires a value, DEV only, not in "show"
139 #define MTAB_dev_value MTAB_XTD | MTAB_VDV | MTAB_NMO | MTAB_VALR
140 // No value, DEV only, in "show"
141 #define MTAB_dev_novalue MTAB_XTD | MTAB_VDV
142 // Requires a value, DEVn only, in "show", don't uppercase value
143 #define MTAB_unit_valr_nouc MTAB_XTD | MTAB_VUN | MTAB_VALR | MTAB_NC
144 // Value optional, DEVn only, do not uppercase value
145 #define MTAB_unit_nouc MTAB_XTD | MTAB_VUN | MTAB_NC
146 // Value optional, DEVn only, uppercase value
147 #define MTAB_unit_uc MTAB_XTD | MTAB_VUN
148 // Value required, DEV only
149 #define MTAB_dev_valr MTAB_XTD | MTAB_VDV | MTAB_VALR
150 // End of list marker
151 #define MTAB_eol { 0, 0, NULL, NULL, 0, 0, NULL, NULL }
152
153 extern uint32 sim_brk_summ, sim_brk_types, sim_brk_dflt;
154 extern FILE *sim_deb;
155 void sim_printf( const char * format, ... ); // not really simh, by my impl
156
157 #if defined(THREADZ) || defined(LOCKLESS)
158 void dps8_sim_debug (uint32 dbits, DEVICE* dptr, unsigned long long cnt, const char* fmt, ...);
159 #endif /* if defined(THREADZ) || defined(LOCKLESS) */
160 #define sim_msg sim_printf
161 #define sim_warn sim_printf
162 #define sim_print sim_printf
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*/