cpu 21 src/dps8/doAppendCycleABSA.h DCDstruct * i = & cpu.currentInstruction; cpu 23 src/dps8/doAppendCycleABSA.h DBGAPP ("doAppendCycleABSA(Entry) lastCycle=%s\r\n", str_pct (cpu.apu.lastCycle)); cpu 24 src/dps8/doAppendCycleABSA.h DBGAPP ("doAppendCycleABSA(Entry) CA %06o\r\n", cpu.TPR.CA); cpu 26 src/dps8/doAppendCycleABSA.h DBGAPP ("doAppendCycleABSA(Entry) PPR.PRR=%o PPR.PSR=%05o\r\n", cpu.PPR.PRR, cpu.PPR.PSR); cpu 27 src/dps8/doAppendCycleABSA.h DBGAPP ("doAppendCycleABSA(Entry) TPR.TRR=%o TPR.TSR=%05o\r\n", cpu.TPR.TRR, cpu.TPR.TSR); cpu 34 src/dps8/doAppendCycleABSA.h if (cpu.tweaks.enable_wam) { cpu 47 src/dps8/doAppendCycleABSA.h processor_cycle_type lastCycle = cpu.apu.lastCycle; cpu 48 src/dps8/doAppendCycleABSA.h cpu.apu.lastCycle = ABSA_CYCLE; cpu 50 src/dps8/doAppendCycleABSA.h DBGAPP ("doAppendCycleABSA(Entry) XSF %o\r\n", cpu.cu.XSF); cpu 52 src/dps8/doAppendCycleABSA.h PNL (L68_ (cpu.apu.state = 0;)) cpu 54 src/dps8/doAppendCycleABSA.h cpu.RSDWH_R1 = 0; cpu 56 src/dps8/doAppendCycleABSA.h cpu.acvFaults = 0; cpu 69 src/dps8/doAppendCycleABSA.h PNL (cpu.APUMemAddr = cpu.TPR.CA;) cpu 74 src/dps8/doAppendCycleABSA.h if (nomatch || ! fetch_sdw_from_sdwam (cpup, cpu.TPR.TSR)) { cpu 76 src/dps8/doAppendCycleABSA.h DBGAPP ("doAppendCycleABSA(A):SDW for segment %05o not in SDWAM\r\n", cpu.TPR.TSR); cpu 78 src/dps8/doAppendCycleABSA.h DBGAPP ("doAppendCycleABSA(A):DSBR.U=%o\r\n", cpu.DSBR.U); cpu 80 src/dps8/doAppendCycleABSA.h if (cpu.DSBR.U == 0) { cpu 81 src/dps8/doAppendCycleABSA.h fetch_dsptw (cpup, cpu.TPR.TSR); cpu 83 src/dps8/doAppendCycleABSA.h if (! cpu.PTW0.DF) cpu 84 src/dps8/doAppendCycleABSA.h doFault (FAULT_DF0 + cpu.PTW0.FC, fst_zero, "doAppendCycleABSA(A): PTW0.F == 0"); cpu 86 src/dps8/doAppendCycleABSA.h if (! cpu.PTW0.U) cpu 87 src/dps8/doAppendCycleABSA.h modify_dsptw (cpup, cpu.TPR.TSR); cpu 89 src/dps8/doAppendCycleABSA.h fetch_psdw (cpup, cpu.TPR.TSR); cpu 91 src/dps8/doAppendCycleABSA.h fetch_nsdw (cpup, cpu.TPR.TSR); // load SDW0 from descriptor segment table. cpu 94 src/dps8/doAppendCycleABSA.h load_sdwam (cpup, cpu.TPR.TSR, nomatch); cpu 96 src/dps8/doAppendCycleABSA.h DBGAPP ("doAppendCycleABSA(A) R1 %o R2 %o R3 %o E %o\r\n", cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.SDW->E); cpu 99 src/dps8/doAppendCycleABSA.h cpu.RSDWH_R1 = cpu.SDW->R1; cpu 116 src/dps8/doAppendCycleABSA.h if (! (cpu.SDW->R1 <= cpu.SDW->R2 && cpu.SDW->R2 <= cpu.SDW->R3)) { cpu 118 src/dps8/doAppendCycleABSA.h cpu.acvFaults |= ACV0; cpu 119 src/dps8/doAppendCycleABSA.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 140 src/dps8/doAppendCycleABSA.h if (cpu.TPR.TRR > cpu.SDW->R2) { cpu 144 src/dps8/doAppendCycleABSA.h cpu.acvFaults |= ACV3; cpu 145 src/dps8/doAppendCycleABSA.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 149 src/dps8/doAppendCycleABSA.h if (cpu.SDW->R == 0) { cpu 151 src/dps8/doAppendCycleABSA.h cpu.TPR.TRR = cpu.PPR.PRR; cpu 154 src/dps8/doAppendCycleABSA.h if (cpu.PPR.PSR != cpu.TPR.TSR) { cpu 158 src/dps8/doAppendCycleABSA.h cpu.acvFaults |= ACV4; cpu 159 src/dps8/doAppendCycleABSA.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 175 src/dps8/doAppendCycleABSA.h if (((cpu.TPR.CA >> 4) & 037777) > cpu.SDW->BOUND) { cpu 178 src/dps8/doAppendCycleABSA.h cpu.acvFaults |= ACV15; cpu 179 src/dps8/doAppendCycleABSA.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 183 src/dps8/doAppendCycleABSA.h cpu.TPR.CA, ((cpu.TPR.CA >> 4) & 037777), cpu.SDW->BOUND); cpu 186 src/dps8/doAppendCycleABSA.h if (cpu.acvFaults) { cpu 188 src/dps8/doAppendCycleABSA.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 190 src/dps8/doAppendCycleABSA.h doFault (FAULT_ACV, (_fault_subtype) {.fault_acv_subtype=cpu.acvFaults}, "ACV fault"); cpu 194 src/dps8/doAppendCycleABSA.h if (cpu.SDW->U) cpu 200 src/dps8/doAppendCycleABSA.h DBGAPP ("doAppendCycleABSA(G) CA %06o\r\n", cpu.TPR.CA); cpu 201 src/dps8/doAppendCycleABSA.h if (nomatch || ! fetch_ptw_from_ptwam (cpup, cpu.SDW->POINTER, cpu.TPR.CA)) { //TPR.CA)) cpu 202 src/dps8/doAppendCycleABSA.h fetch_ptw (cpup, cpu.SDW, cpu.TPR.CA); cpu 203 src/dps8/doAppendCycleABSA.h loadPTWAM (cpup, cpu.SDW->POINTER, cpu.TPR.CA, nomatch); // load PTW0 to PTWAM cpu 213 src/dps8/doAppendCycleABSA.h do_ptw2 (cpup, cpu.SDW, cpu.TPR.CA); cpu 226 src/dps8/doAppendCycleABSA.h PNL (L68_ (cpu.apu.state |= apu_FANP;)) cpu 236 src/dps8/doAppendCycleABSA.h DBGAPP ("doAppendCycleABSA(H): SDW->ADDR=%08o CA=%06o\r\n", cpu.SDW->ADDR, cpu.TPR.CA); cpu 238 src/dps8/doAppendCycleABSA.h finalAddress = (cpu.SDW->ADDR & 077777760) + cpu.TPR.CA; cpu 240 src/dps8/doAppendCycleABSA.h PNL (cpu.APUMemAddr = finalAddress;) cpu 242 src/dps8/doAppendCycleABSA.h DBGAPP ("doAppendCycleABSA(H:FANP): (%05o:%06o) finalAddress=%08o\r\n", cpu.TPR.TSR, cpu.TPR.CA, finalAddress); cpu 250 src/dps8/doAppendCycleABSA.h PNL (L68_ (cpu.apu.state |= apu_FAP;)) cpu 252 src/dps8/doAppendCycleABSA.h word24 y2 = cpu.TPR.CA % 1024; cpu 256 src/dps8/doAppendCycleABSA.h finalAddress = (((word24)cpu.PTW->ADDR & 0777760) << 6) + y2; cpu 258 src/dps8/doAppendCycleABSA.h PNL (cpu.APUMemAddr = finalAddress;) cpu 261 src/dps8/doAppendCycleABSA.h if (cpu.MR_cache.emr && cpu.MR_cache.ihr) cpu 265 src/dps8/doAppendCycleABSA.h DBGAPP ("doAppendCycleABSA(H:FAP): (%05o:%06o) finalAddress=%08o\r\n", cpu.TPR.TSR, cpu.TPR.CA, finalAddress); cpu 276 src/dps8/doAppendCycleABSA.h PNL (cpu.APUDataBusOffset = cpu.TPR.CA;) cpu 277 src/dps8/doAppendCycleABSA.h PNL (cpu.APUDataBusAddr = finalAddress;) cpu 279 src/dps8/doAppendCycleABSA.h PNL (L68_ (cpu.apu.state |= apu_FA;)) cpu 281 src/dps8/doAppendCycleABSA.h DBGAPP ("doAppendCycleABSA (Exit) PRR %o PSR %05o P %o IC %06o\r\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); cpu 282 src/dps8/doAppendCycleABSA.h DBGAPP ("doAppendCycleABSA (Exit) TRR %o TSR %05o TBR %02o CA %06o\r\n", cpu.TPR.TRR, cpu.TPR.TSR, cpu.TPR.TBR, cpu.TPR.CA); cpu 19 src/dps8/doAppendCycleAPUDataRMW.h DCDstruct * i = & cpu.currentInstruction; cpu 21 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("doAppendCycleAPUDataRMW(Entry) lastCycle=%s\r\n", str_pct (cpu.apu.lastCycle)); cpu 22 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("doAppendCycleAPUDataRMW(Entry) CA %06o\r\n", cpu.TPR.CA); cpu 24 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("doAppendCycleAPUDataRMW(Entry) PPR.PRR=%o PPR.PSR=%05o\r\n", cpu.PPR.PRR, cpu.PPR.PSR); cpu 25 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("doAppendCycleAPUDataRMW(Entry) TPR.TRR=%o TPR.TSR=%05o\r\n", cpu.TPR.TRR, cpu.TPR.TSR); cpu 32 src/dps8/doAppendCycleAPUDataRMW.h if (cpu.tweaks.enable_wam) { cpu 43 src/dps8/doAppendCycleAPUDataRMW.h processor_cycle_type lastCycle = cpu.apu.lastCycle; cpu 44 src/dps8/doAppendCycleAPUDataRMW.h cpu.apu.lastCycle = APU_DATA_RMW; cpu 46 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("doAppendCycleAPUDataRMW(Entry) XSF %o\r\n", cpu.cu.XSF); cpu 48 src/dps8/doAppendCycleAPUDataRMW.h PNL (L68_ (cpu.apu.state = 0;)) cpu 50 src/dps8/doAppendCycleAPUDataRMW.h cpu.RSDWH_R1 = 0; cpu 52 src/dps8/doAppendCycleAPUDataRMW.h cpu.acvFaults = 0; cpu 71 src/dps8/doAppendCycleAPUDataRMW.h PNL (cpu.APUMemAddr = cpu.TPR.CA;) cpu 76 src/dps8/doAppendCycleAPUDataRMW.h if (nomatch || ! fetch_sdw_from_sdwam (cpup, cpu.TPR.TSR)) { cpu 78 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("doAppendCycleAPUDataRMW(A):SDW for segment %05o not in SDWAM\r\n", cpu.TPR.TSR); cpu 80 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("doAppendCycleAPUDataRMW(A):DSBR.U=%o\r\n", cpu.DSBR.U); cpu 82 src/dps8/doAppendCycleAPUDataRMW.h if (cpu.DSBR.U == 0) { cpu 83 src/dps8/doAppendCycleAPUDataRMW.h fetch_dsptw (cpup, cpu.TPR.TSR); cpu 85 src/dps8/doAppendCycleAPUDataRMW.h if (! cpu.PTW0.DF) cpu 86 src/dps8/doAppendCycleAPUDataRMW.h doFault (FAULT_DF0 + cpu.PTW0.FC, fst_zero, "doAppendCycleAPUDataRMW(A): PTW0.F == 0"); cpu 88 src/dps8/doAppendCycleAPUDataRMW.h if (! cpu.PTW0.U) cpu 89 src/dps8/doAppendCycleAPUDataRMW.h modify_dsptw (cpup, cpu.TPR.TSR); cpu 91 src/dps8/doAppendCycleAPUDataRMW.h fetch_psdw (cpup, cpu.TPR.TSR); cpu 93 src/dps8/doAppendCycleAPUDataRMW.h fetch_nsdw (cpup, cpu.TPR.TSR); // load SDW0 from descriptor segment table. cpu 95 src/dps8/doAppendCycleAPUDataRMW.h if (cpu.SDW0.DF == 0) { cpu 98 src/dps8/doAppendCycleAPUDataRMW.h doFault (FAULT_DF0 + cpu.SDW0.FC, fst_zero, "SDW0.F == 0"); cpu 101 src/dps8/doAppendCycleAPUDataRMW.h load_sdwam (cpup, cpu.TPR.TSR, nomatch); cpu 103 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("doAppendCycleAPUDataRMW(A) R1 %o R2 %o R3 %o E %o\r\n", cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.SDW->E); cpu 106 src/dps8/doAppendCycleAPUDataRMW.h cpu.RSDWH_R1 = cpu.SDW->R1; cpu 123 src/dps8/doAppendCycleAPUDataRMW.h if (! (cpu.SDW->R1 <= cpu.SDW->R2 && cpu.SDW->R2 <= cpu.SDW->R3)) { cpu 125 src/dps8/doAppendCycleAPUDataRMW.h cpu.acvFaults |= ACV0; cpu 126 src/dps8/doAppendCycleAPUDataRMW.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 152 src/dps8/doAppendCycleAPUDataRMW.h if (cpu.TPR.TRR > cpu.SDW->R2) { cpu 156 src/dps8/doAppendCycleAPUDataRMW.h cpu.acvFaults |= ACV3; cpu 157 src/dps8/doAppendCycleAPUDataRMW.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 161 src/dps8/doAppendCycleAPUDataRMW.h if (cpu.SDW->R == 0) { cpu 163 src/dps8/doAppendCycleAPUDataRMW.h cpu.TPR.TRR = cpu.PPR.PRR; cpu 166 src/dps8/doAppendCycleAPUDataRMW.h if (cpu.PPR.PSR != cpu.TPR.TSR) { cpu 170 src/dps8/doAppendCycleAPUDataRMW.h cpu.acvFaults |= ACV4; cpu 171 src/dps8/doAppendCycleAPUDataRMW.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 184 src/dps8/doAppendCycleAPUDataRMW.h if (cpu.TPR.TSR == cpu.PPR.PSR) cpu 185 src/dps8/doAppendCycleAPUDataRMW.h cpu.TPR.TRR = cpu.PPR.PRR; cpu 188 src/dps8/doAppendCycleAPUDataRMW.h if (cpu.TPR.TRR > cpu.SDW->R1) { cpu 189 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("ACV5 TRR %o R1 %o\r\n", cpu.TPR.TRR, cpu.SDW->R1); cpu 191 src/dps8/doAppendCycleAPUDataRMW.h cpu.acvFaults |= ACV5; cpu 192 src/dps8/doAppendCycleAPUDataRMW.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 196 src/dps8/doAppendCycleAPUDataRMW.h if (! cpu.SDW->W) { cpu 198 src/dps8/doAppendCycleAPUDataRMW.h cpu.TPR.TRR = cpu.PPR.PRR; cpu 202 src/dps8/doAppendCycleAPUDataRMW.h cpu.acvFaults |= ACV6; cpu 203 src/dps8/doAppendCycleAPUDataRMW.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 220 src/dps8/doAppendCycleAPUDataRMW.h if (((cpu.TPR.CA >> 4) & 037777) > cpu.SDW->BOUND) { cpu 223 src/dps8/doAppendCycleAPUDataRMW.h cpu.acvFaults |= ACV15; cpu 224 src/dps8/doAppendCycleAPUDataRMW.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 227 src/dps8/doAppendCycleAPUDataRMW.h cpu.TPR.CA, ((cpu.TPR.CA >> 4) & 037777), cpu.SDW->BOUND); cpu 230 src/dps8/doAppendCycleAPUDataRMW.h if (cpu.acvFaults) { cpu 232 src/dps8/doAppendCycleAPUDataRMW.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 234 src/dps8/doAppendCycleAPUDataRMW.h doFault (FAULT_ACV, (_fault_subtype) {.fault_acv_subtype=cpu.acvFaults}, "ACV fault"); cpu 238 src/dps8/doAppendCycleAPUDataRMW.h if (cpu.SDW->U) cpu 244 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("doAppendCycleAPUDataRMW(G) CA %06o\r\n", cpu.TPR.CA); cpu 245 src/dps8/doAppendCycleAPUDataRMW.h if (nomatch || ! fetch_ptw_from_ptwam (cpup, cpu.SDW->POINTER, cpu.TPR.CA)) { cpu 246 src/dps8/doAppendCycleAPUDataRMW.h fetch_ptw (cpup, cpu.SDW, cpu.TPR.CA); cpu 247 src/dps8/doAppendCycleAPUDataRMW.h if (! cpu.PTW0.DF) { cpu 249 src/dps8/doAppendCycleAPUDataRMW.h doFault (FAULT_DF0 + cpu.PTW0.FC, (_fault_subtype) {.bits=0}, "PTW0.F == 0"); cpu 251 src/dps8/doAppendCycleAPUDataRMW.h loadPTWAM (cpup, cpu.SDW->POINTER, cpu.TPR.CA, nomatch); // load PTW0 to PTWAM cpu 261 src/dps8/doAppendCycleAPUDataRMW.h do_ptw2 (cpup, cpu.SDW, cpu.TPR.CA); cpu 274 src/dps8/doAppendCycleAPUDataRMW.h PNL (L68_ (cpu.apu.state |= apu_FANP;)) cpu 286 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("doAppendCycleAPUDataRMW(H): SDW->ADDR=%08o CA=%06o\r\n", cpu.SDW->ADDR, cpu.TPR.CA); cpu 288 src/dps8/doAppendCycleAPUDataRMW.h finalAddress = (cpu.SDW->ADDR & 077777760) + cpu.TPR.CA; cpu 290 src/dps8/doAppendCycleAPUDataRMW.h PNL (cpu.APUMemAddr = finalAddress;) cpu 292 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("doAppendCycleAPUDataRMW(H:FANP): (%05o:%06o) finalAddress=%08o\r\n", cpu.TPR.TSR, cpu.TPR.CA, finalAddress); cpu 301 src/dps8/doAppendCycleAPUDataRMW.h if (cpu.PTW->M == 0) // is this the right way to do this? cpu 302 src/dps8/doAppendCycleAPUDataRMW.h modify_ptw (cpup, cpu.SDW, cpu.TPR.CA); cpu 306 src/dps8/doAppendCycleAPUDataRMW.h PNL (L68_ (cpu.apu.state |= apu_FAP;)) cpu 308 src/dps8/doAppendCycleAPUDataRMW.h word24 y2 = cpu.TPR.CA % 1024; cpu 312 src/dps8/doAppendCycleAPUDataRMW.h finalAddress = (((word24)cpu.PTW->ADDR & 0777760) << 6) + y2; cpu 314 src/dps8/doAppendCycleAPUDataRMW.h PNL (cpu.APUMemAddr = finalAddress;) cpu 317 src/dps8/doAppendCycleAPUDataRMW.h if (cpu.MR_cache.emr && cpu.MR_cache.ihr) cpu 321 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("doAppendCycleAPUDataRMW(H:FAP): (%05o:%06o) finalAddress=%08o\r\n", cpu.TPR.TSR, cpu.TPR.CA, finalAddress); cpu 329 src/dps8/doAppendCycleAPUDataRMW.h cpu.cu.XSF = 1; cpu 330 src/dps8/doAppendCycleAPUDataRMW.h cpu.xsfScu = true; // IT modifier (tally) words cpu 342 src/dps8/doAppendCycleAPUDataRMW.h PNL (cpu.APUDataBusOffset = cpu.TPR.CA;) cpu 343 src/dps8/doAppendCycleAPUDataRMW.h PNL (cpu.APUDataBusAddr = finalAddress;) cpu 345 src/dps8/doAppendCycleAPUDataRMW.h PNL (L68_ (cpu.apu.state |= apu_FA;)) cpu 347 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("doAppendCycleAPUDataRMW (Exit) PRR %o PSR %05o P %o IC %06o\r\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); cpu 348 src/dps8/doAppendCycleAPUDataRMW.h DBGAPP ("doAppendCycleAPUDataRMW (Exit) TRR %o TSR %05o TBR %02o CA %06o\r\n", cpu.TPR.TRR, cpu.TPR.TSR, cpu.TPR.TBR, cpu.TPR.CA); cpu 19 src/dps8/doAppendCycleAPUDataRead.h DCDstruct * i = & cpu.currentInstruction; cpu 21 src/dps8/doAppendCycleAPUDataRead.h DBGAPP ("doAppendCycleAPUDataRead(Entry) lastCycle=%s\r\n", str_pct (cpu.apu.lastCycle)); cpu 22 src/dps8/doAppendCycleAPUDataRead.h DBGAPP ("doAppendCycleAPUDataRead(Entry) CA %06o\r\n", cpu.TPR.CA); cpu 24 src/dps8/doAppendCycleAPUDataRead.h DBGAPP ("doAppendCycleAPUDataRead(Entry) PPR.PRR=%o PPR.PSR=%05o\r\n", cpu.PPR.PRR, cpu.PPR.PSR); cpu 25 src/dps8/doAppendCycleAPUDataRead.h DBGAPP ("doAppendCycleAPUDataRead(Entry) TPR.TRR=%o TPR.TSR=%05o\r\n", cpu.TPR.TRR, cpu.TPR.TSR); cpu 32 src/dps8/doAppendCycleAPUDataRead.h if (cpu.tweaks.enable_wam) { cpu 45 src/dps8/doAppendCycleAPUDataRead.h processor_cycle_type lastCycle = cpu.apu.lastCycle; cpu 46 src/dps8/doAppendCycleAPUDataRead.h cpu.apu.lastCycle = APU_DATA_READ; cpu 48 src/dps8/doAppendCycleAPUDataRead.h DBGAPP ("doAppendCycleAPUDataRead(Entry) XSF %o\r\n", cpu.cu.XSF); cpu 50 src/dps8/doAppendCycleAPUDataRead.h PNL (L68_ (cpu.apu.state = 0;)) cpu 52 src/dps8/doAppendCycleAPUDataRead.h cpu.RSDWH_R1 = 0; cpu 54 src/dps8/doAppendCycleAPUDataRead.h cpu.acvFaults = 0; cpu 74 src/dps8/doAppendCycleAPUDataRead.h PNL (cpu.APUMemAddr = cpu.TPR.CA;) cpu 79 src/dps8/doAppendCycleAPUDataRead.h if (nomatch || ! fetch_sdw_from_sdwam (cpup, cpu.TPR.TSR)) { cpu 81 src/dps8/doAppendCycleAPUDataRead.h DBGAPP ("doAppendCycleAPUDataRead(A):SDW for segment %05o not in SDWAM\r\n", cpu.TPR.TSR); cpu 83 src/dps8/doAppendCycleAPUDataRead.h DBGAPP ("doAppendCycleAPUDataRead(A):DSBR.U=%o\r\n", cpu.DSBR.U); cpu 85 src/dps8/doAppendCycleAPUDataRead.h if (cpu.DSBR.U == 0) { cpu 86 src/dps8/doAppendCycleAPUDataRead.h fetch_dsptw (cpup, cpu.TPR.TSR); cpu 88 src/dps8/doAppendCycleAPUDataRead.h if (! cpu.PTW0.DF) cpu 89 src/dps8/doAppendCycleAPUDataRead.h doFault (FAULT_DF0 + cpu.PTW0.FC, fst_zero, "doAppendCycleAPUDataRead(A): PTW0.F == 0"); cpu 91 src/dps8/doAppendCycleAPUDataRead.h if (! cpu.PTW0.U) cpu 92 src/dps8/doAppendCycleAPUDataRead.h modify_dsptw (cpup, cpu.TPR.TSR); cpu 94 src/dps8/doAppendCycleAPUDataRead.h fetch_psdw (cpup, cpu.TPR.TSR); cpu 96 src/dps8/doAppendCycleAPUDataRead.h fetch_nsdw (cpup, cpu.TPR.TSR); // load SDW0 from descriptor segment table. cpu 98 src/dps8/doAppendCycleAPUDataRead.h if (cpu.SDW0.DF == 0) { cpu 101 src/dps8/doAppendCycleAPUDataRead.h doFault (FAULT_DF0 + cpu.SDW0.FC, fst_zero, "SDW0.F == 0"); cpu 104 src/dps8/doAppendCycleAPUDataRead.h load_sdwam (cpup, cpu.TPR.TSR, nomatch); cpu 106 src/dps8/doAppendCycleAPUDataRead.h DBGAPP ("doAppendCycleAPUDataRead(A) R1 %o R2 %o R3 %o E %o\r\n", cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.SDW->E); cpu 109 src/dps8/doAppendCycleAPUDataRead.h cpu.RSDWH_R1 = cpu.SDW->R1; cpu 126 src/dps8/doAppendCycleAPUDataRead.h if (! (cpu.SDW->R1 <= cpu.SDW->R2 && cpu.SDW->R2 <= cpu.SDW->R3)) { cpu 128 src/dps8/doAppendCycleAPUDataRead.h cpu.acvFaults |= ACV0; cpu 129 src/dps8/doAppendCycleAPUDataRead.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 149 src/dps8/doAppendCycleAPUDataRead.h if (cpu.TPR.TRR > cpu.SDW->R2) { cpu 153 src/dps8/doAppendCycleAPUDataRead.h cpu.acvFaults |= ACV3; cpu 154 src/dps8/doAppendCycleAPUDataRead.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 158 src/dps8/doAppendCycleAPUDataRead.h if (cpu.SDW->R == 0) { cpu 160 src/dps8/doAppendCycleAPUDataRead.h cpu.TPR.TRR = cpu.PPR.PRR; cpu 163 src/dps8/doAppendCycleAPUDataRead.h if (cpu.PPR.PSR != cpu.TPR.TSR) { cpu 167 src/dps8/doAppendCycleAPUDataRead.h cpu.acvFaults |= ACV4; cpu 168 src/dps8/doAppendCycleAPUDataRead.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 184 src/dps8/doAppendCycleAPUDataRead.h if (((cpu.TPR.CA >> 4) & 037777) > cpu.SDW->BOUND) { cpu 187 src/dps8/doAppendCycleAPUDataRead.h cpu.acvFaults |= ACV15; cpu 188 src/dps8/doAppendCycleAPUDataRead.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 191 src/dps8/doAppendCycleAPUDataRead.h cpu.TPR.CA, ((cpu.TPR.CA >> 4) & 037777), cpu.SDW->BOUND); cpu 194 src/dps8/doAppendCycleAPUDataRead.h if (cpu.acvFaults) { cpu 196 src/dps8/doAppendCycleAPUDataRead.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 198 src/dps8/doAppendCycleAPUDataRead.h doFault (FAULT_ACV, (_fault_subtype) {.fault_acv_subtype=cpu.acvFaults}, "ACV fault"); cpu 202 src/dps8/doAppendCycleAPUDataRead.h if (cpu.SDW->U) cpu 208 src/dps8/doAppendCycleAPUDataRead.h DBGAPP ("doAppendCycleAPUDataRead(G) CA %06o\r\n", cpu.TPR.CA); cpu 209 src/dps8/doAppendCycleAPUDataRead.h if (nomatch || ! fetch_ptw_from_ptwam (cpup, cpu.SDW->POINTER, cpu.TPR.CA)) { cpu 210 src/dps8/doAppendCycleAPUDataRead.h fetch_ptw (cpup, cpu.SDW, cpu.TPR.CA); cpu 211 src/dps8/doAppendCycleAPUDataRead.h if (! cpu.PTW0.DF) cpu 213 src/dps8/doAppendCycleAPUDataRead.h doFault (FAULT_DF0 + cpu.PTW0.FC, (_fault_subtype) {.bits=0}, "PTW0.F == 0"); cpu 214 src/dps8/doAppendCycleAPUDataRead.h loadPTWAM (cpup, cpu.SDW->POINTER, cpu.TPR.CA, nomatch); // load PTW0 to PTWAM cpu 224 src/dps8/doAppendCycleAPUDataRead.h do_ptw2 (cpup, cpu.SDW, cpu.TPR.CA); cpu 237 src/dps8/doAppendCycleAPUDataRead.h PNL (L68_ (cpu.apu.state |= apu_FANP;)) cpu 248 src/dps8/doAppendCycleAPUDataRead.h DBGAPP ("doAppendCycleAPUDataRead(H): SDW->ADDR=%08o CA=%06o\r\n", cpu.SDW->ADDR, cpu.TPR.CA); cpu 250 src/dps8/doAppendCycleAPUDataRead.h finalAddress = (cpu.SDW->ADDR & 077777760) + cpu.TPR.CA; cpu 252 src/dps8/doAppendCycleAPUDataRead.h PNL (cpu.APUMemAddr = finalAddress;) cpu 254 src/dps8/doAppendCycleAPUDataRead.h DBGAPP ("doAppendCycleAPUDataRead(H:FANP): (%05o:%06o) finalAddress=%08o\r\n", cpu.TPR.TSR, cpu.TPR.CA, finalAddress); cpu 266 src/dps8/doAppendCycleAPUDataRead.h PNL (L68_ (cpu.apu.state |= apu_FAP;)) cpu 268 src/dps8/doAppendCycleAPUDataRead.h word24 y2 = cpu.TPR.CA % 1024; cpu 272 src/dps8/doAppendCycleAPUDataRead.h finalAddress = (((word24)cpu.PTW->ADDR & 0777760) << 6) + y2; cpu 274 src/dps8/doAppendCycleAPUDataRead.h PNL (cpu.APUMemAddr = finalAddress;) cpu 277 src/dps8/doAppendCycleAPUDataRead.h if (cpu.MR_cache.emr && cpu.MR_cache.ihr) cpu 281 src/dps8/doAppendCycleAPUDataRead.h DBGAPP ("doAppendCycleAPUDataRead(H:FAP): (%05o:%06o) finalAddress=%08o\r\n", cpu.TPR.TSR, cpu.TPR.CA, finalAddress); cpu 287 src/dps8/doAppendCycleAPUDataRead.h cpu.cu.XSF = 1; cpu 288 src/dps8/doAppendCycleAPUDataRead.h cpu.xsfScu = true; // IT modifier (tally) words cpu 295 src/dps8/doAppendCycleAPUDataRead.h PNL (cpu.APUDataBusOffset = cpu.TPR.CA;) cpu 296 src/dps8/doAppendCycleAPUDataRead.h PNL (cpu.APUDataBusAddr = finalAddress;) cpu 298 src/dps8/doAppendCycleAPUDataRead.h PNL (L68_ (cpu.apu.state |= apu_FA;)) cpu 300 src/dps8/doAppendCycleAPUDataRead.h DBGAPP ("doAppendCycleAPUDataRead (Exit) PRR %o PSR %05o P %o IC %06o\r\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); cpu 301 src/dps8/doAppendCycleAPUDataRead.h DBGAPP ("doAppendCycleAPUDataRead (Exit) TRR %o TSR %05o TBR %02o CA %06o\r\n", cpu.TPR.TRR, cpu.TPR.TSR, cpu.TPR.TBR, cpu.TPR.CA); cpu 19 src/dps8/doAppendCycleAPUDataStore.h DCDstruct * i = & cpu.currentInstruction; cpu 21 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("doAppendCycleAPUDataStore(Entry) lastCycle=%s\r\n", str_pct (cpu.apu.lastCycle)); cpu 22 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("doAppendCycleAPUDataStore(Entry) CA %06o\r\n", cpu.TPR.CA); cpu 24 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("doAppendCycleAPUDataStore(Entry) PPR.PRR=%o PPR.PSR=%05o\r\n", cpu.PPR.PRR, cpu.PPR.PSR); cpu 25 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("doAppendCycleAPUDataStore(Entry) TPR.TRR=%o TPR.TSR=%05o\r\n", cpu.TPR.TRR, cpu.TPR.TSR); cpu 32 src/dps8/doAppendCycleAPUDataStore.h if (cpu.tweaks.enable_wam) { cpu 45 src/dps8/doAppendCycleAPUDataStore.h processor_cycle_type lastCycle = cpu.apu.lastCycle; cpu 46 src/dps8/doAppendCycleAPUDataStore.h cpu.apu.lastCycle = APU_DATA_STORE; cpu 48 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("doAppendCycleAPUDataStore(Entry) XSF %o\r\n", cpu.cu.XSF); cpu 50 src/dps8/doAppendCycleAPUDataStore.h PNL (L68_ (cpu.apu.state = 0;)) cpu 52 src/dps8/doAppendCycleAPUDataStore.h cpu.RSDWH_R1 = 0; cpu 54 src/dps8/doAppendCycleAPUDataStore.h cpu.acvFaults = 0; cpu 72 src/dps8/doAppendCycleAPUDataStore.h PNL (cpu.APUMemAddr = cpu.TPR.CA;) cpu 77 src/dps8/doAppendCycleAPUDataStore.h if (nomatch || ! fetch_sdw_from_sdwam (cpup, cpu.TPR.TSR)) { cpu 79 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("doAppendCycleAPUDataStore(A):SDW for segment %05o not in SDWAM\r\n", cpu.TPR.TSR); cpu 81 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("doAppendCycleAPUDataStore(A):DSBR.U=%o\r\n", cpu.DSBR.U); cpu 83 src/dps8/doAppendCycleAPUDataStore.h if (cpu.DSBR.U == 0) { cpu 84 src/dps8/doAppendCycleAPUDataStore.h fetch_dsptw (cpup, cpu.TPR.TSR); cpu 86 src/dps8/doAppendCycleAPUDataStore.h if (! cpu.PTW0.DF) cpu 87 src/dps8/doAppendCycleAPUDataStore.h doFault (FAULT_DF0 + cpu.PTW0.FC, fst_zero, "doAppendCycleAPUDataStore(A): PTW0.F == 0"); cpu 89 src/dps8/doAppendCycleAPUDataStore.h if (! cpu.PTW0.U) cpu 90 src/dps8/doAppendCycleAPUDataStore.h modify_dsptw (cpup, cpu.TPR.TSR); cpu 92 src/dps8/doAppendCycleAPUDataStore.h fetch_psdw (cpup, cpu.TPR.TSR); cpu 94 src/dps8/doAppendCycleAPUDataStore.h fetch_nsdw (cpup, cpu.TPR.TSR); // load SDW0 from descriptor segment table. cpu 96 src/dps8/doAppendCycleAPUDataStore.h if (cpu.SDW0.DF == 0) { cpu 99 src/dps8/doAppendCycleAPUDataStore.h doFault (FAULT_DF0 + cpu.SDW0.FC, fst_zero, "SDW0.F == 0"); cpu 102 src/dps8/doAppendCycleAPUDataStore.h load_sdwam (cpup, cpu.TPR.TSR, nomatch); cpu 104 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("doAppendCycleAPUDataStore(A) R1 %o R2 %o R3 %o E %o\r\n", cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.SDW->E); cpu 107 src/dps8/doAppendCycleAPUDataStore.h cpu.RSDWH_R1 = cpu.SDW->R1; cpu 124 src/dps8/doAppendCycleAPUDataStore.h if (! (cpu.SDW->R1 <= cpu.SDW->R2 && cpu.SDW->R2 <= cpu.SDW->R3)) { cpu 126 src/dps8/doAppendCycleAPUDataStore.h cpu.acvFaults |= ACV0; cpu 127 src/dps8/doAppendCycleAPUDataStore.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 151 src/dps8/doAppendCycleAPUDataStore.h if (cpu.TPR.TSR == cpu.PPR.PSR) cpu 152 src/dps8/doAppendCycleAPUDataStore.h cpu.TPR.TRR = cpu.PPR.PRR; cpu 155 src/dps8/doAppendCycleAPUDataStore.h if (cpu.TPR.TRR > cpu.SDW->R1) { cpu 156 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("ACV5 TRR %o R1 %o\r\n", cpu.TPR.TRR, cpu.SDW->R1); cpu 158 src/dps8/doAppendCycleAPUDataStore.h cpu.acvFaults |= ACV5; cpu 159 src/dps8/doAppendCycleAPUDataStore.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 163 src/dps8/doAppendCycleAPUDataStore.h if (! cpu.SDW->W) { cpu 165 src/dps8/doAppendCycleAPUDataStore.h cpu.TPR.TRR = cpu.PPR.PRR; cpu 169 src/dps8/doAppendCycleAPUDataStore.h cpu.acvFaults |= ACV6; cpu 170 src/dps8/doAppendCycleAPUDataStore.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 183 src/dps8/doAppendCycleAPUDataStore.h if (((cpu.TPR.CA >> 4) & 037777) > cpu.SDW->BOUND) { cpu 186 src/dps8/doAppendCycleAPUDataStore.h cpu.acvFaults |= ACV15; cpu 187 src/dps8/doAppendCycleAPUDataStore.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 190 src/dps8/doAppendCycleAPUDataStore.h cpu.TPR.CA, ((cpu.TPR.CA >> 4) & 037777), cpu.SDW->BOUND); cpu 193 src/dps8/doAppendCycleAPUDataStore.h if (cpu.acvFaults) { cpu 195 src/dps8/doAppendCycleAPUDataStore.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 197 src/dps8/doAppendCycleAPUDataStore.h doFault (FAULT_ACV, (_fault_subtype) {.fault_acv_subtype=cpu.acvFaults}, "ACV fault"); cpu 201 src/dps8/doAppendCycleAPUDataStore.h if (cpu.SDW->U) cpu 207 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("doAppendCycleAPUDataStore(G) CA %06o\r\n", cpu.TPR.CA); cpu 208 src/dps8/doAppendCycleAPUDataStore.h if (nomatch || ! fetch_ptw_from_ptwam (cpup, cpu.SDW->POINTER, cpu.TPR.CA)) { cpu 209 src/dps8/doAppendCycleAPUDataStore.h fetch_ptw (cpup, cpu.SDW, cpu.TPR.CA); cpu 210 src/dps8/doAppendCycleAPUDataStore.h if (! cpu.PTW0.DF) { cpu 212 src/dps8/doAppendCycleAPUDataStore.h doFault (FAULT_DF0 + cpu.PTW0.FC, (_fault_subtype) {.bits=0}, "PTW0.F == 0"); cpu 214 src/dps8/doAppendCycleAPUDataStore.h loadPTWAM (cpup, cpu.SDW->POINTER, cpu.TPR.CA, nomatch); // load PTW0 to PTWAM cpu 224 src/dps8/doAppendCycleAPUDataStore.h do_ptw2 (cpup, cpu.SDW, cpu.TPR.CA); cpu 237 src/dps8/doAppendCycleAPUDataStore.h PNL (L68_ (cpu.apu.state |= apu_FANP;)) cpu 248 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("doAppendCycleAPUDataStore(H): SDW->ADDR=%08o CA=%06o\r\n", cpu.SDW->ADDR, cpu.TPR.CA); cpu 250 src/dps8/doAppendCycleAPUDataStore.h finalAddress = (cpu.SDW->ADDR & 077777760) + cpu.TPR.CA; cpu 252 src/dps8/doAppendCycleAPUDataStore.h PNL (cpu.APUMemAddr = finalAddress;) cpu 254 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("doAppendCycleAPUDataStore(H:FANP): (%05o:%06o) finalAddress=%08o\r\n", cpu.TPR.TSR, cpu.TPR.CA, finalAddress); cpu 263 src/dps8/doAppendCycleAPUDataStore.h if (cpu.PTW->M == 0) // is this the right way to do this? cpu 264 src/dps8/doAppendCycleAPUDataStore.h modify_ptw (cpup, cpu.SDW, cpu.TPR.CA); cpu 268 src/dps8/doAppendCycleAPUDataStore.h PNL (L68_ (cpu.apu.state |= apu_FAP;)) cpu 270 src/dps8/doAppendCycleAPUDataStore.h word24 y2 = cpu.TPR.CA % 1024; cpu 274 src/dps8/doAppendCycleAPUDataStore.h finalAddress = (((word24)cpu.PTW->ADDR & 0777760) << 6) + y2; cpu 276 src/dps8/doAppendCycleAPUDataStore.h PNL (cpu.APUMemAddr = finalAddress;) cpu 279 src/dps8/doAppendCycleAPUDataStore.h if (cpu.MR_cache.emr && cpu.MR_cache.ihr) cpu 283 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("doAppendCycleAPUDataStore(H:FAP): (%05o:%06o) finalAddress=%08o\r\n", cpu.TPR.TSR, cpu.TPR.CA, finalAddress); cpu 291 src/dps8/doAppendCycleAPUDataStore.h cpu.cu.XSF = 1; cpu 292 src/dps8/doAppendCycleAPUDataStore.h cpu.xsfScu = true; // IT modifier (tally) words cpu 298 src/dps8/doAppendCycleAPUDataStore.h PNL (cpu.APUDataBusOffset = cpu.TPR.CA;) cpu 299 src/dps8/doAppendCycleAPUDataStore.h PNL (cpu.APUDataBusAddr = finalAddress;) cpu 301 src/dps8/doAppendCycleAPUDataStore.h PNL (L68_ (cpu.apu.state |= apu_FA;)) cpu 303 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("doAppendCycleAPUDataStore (Exit) PRR %o PSR %05o P %o IC %06o\r\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); cpu 304 src/dps8/doAppendCycleAPUDataStore.h DBGAPP ("doAppendCycleAPUDataStore (Exit) TRR %o TSR %05o TBR %02o CA %06o\r\n", cpu.TPR.TRR, cpu.TPR.TSR, cpu.TPR.TBR, cpu.TPR.CA); cpu 55 src/dps8/doAppendCycleIndirectWordFetch.h DCDstruct * i = & cpu.currentInstruction; cpu 57 src/dps8/doAppendCycleIndirectWordFetch.h DBGAPP ("doAppendCycleIndirectWordFetch(Entry) lastCycle=%s\r\n", str_pct (cpu.apu.lastCycle)); cpu 58 src/dps8/doAppendCycleIndirectWordFetch.h DBGAPP ("doAppendCycleIndirectWordFetch(Entry) CA %06o\r\n", cpu.TPR.CA); cpu 60 src/dps8/doAppendCycleIndirectWordFetch.h DBGAPP ("doAppendCycleIndirectWordFetch(Entry) PPR.PRR=%o PPR.PSR=%05o\r\n", cpu.PPR.PRR, cpu.PPR.PSR); cpu 61 src/dps8/doAppendCycleIndirectWordFetch.h DBGAPP ("doAppendCycleIndirectWordFetch(Entry) TPR.TRR=%o TPR.TSR=%05o\r\n", cpu.TPR.TRR, cpu.TPR.TSR); cpu 94 src/dps8/doAppendCycleIndirectWordFetch.h if (! ucCacheCheck (this, cpu.TPR.TSR, cpu.TPR.CA, & bound, & p, & pageAddress, & RSDWH_R1, & paged)) cpu 98 src/dps8/doAppendCycleIndirectWordFetch.h finalAddress = pageAddress + (cpu.TPR.CA & OS18MASK); cpu 100 src/dps8/doAppendCycleIndirectWordFetch.h finalAddress = pageAddress + cpu.TPR.CA; cpu 102 src/dps8/doAppendCycleIndirectWordFetch.h cpu.RSDWH_R1 = RSDWH_R1; cpu 106 src/dps8/doAppendCycleIndirectWordFetch.h cpu.apu.lastCycle = INDIRECT_WORD_FETCH; cpu 111 src/dps8/doAppendCycleIndirectWordFetch.h cpu.uCache.skips[this] ++; cpu 119 src/dps8/doAppendCycleIndirectWordFetch.h if (cpu.tweaks.enable_wam) { cpu 132 src/dps8/doAppendCycleIndirectWordFetch.h processor_cycle_type lastCycle = cpu.apu.lastCycle; cpu 133 src/dps8/doAppendCycleIndirectWordFetch.h cpu.apu.lastCycle = INDIRECT_WORD_FETCH; cpu 135 src/dps8/doAppendCycleIndirectWordFetch.h DBGAPP ("doAppendCycleIndirectWordFetch(Entry) XSF %o\r\n", cpu.cu.XSF); cpu 137 src/dps8/doAppendCycleIndirectWordFetch.h PNL (L68_ (cpu.apu.state = 0;)) cpu 139 src/dps8/doAppendCycleIndirectWordFetch.h cpu.RSDWH_R1 = 0; cpu 141 src/dps8/doAppendCycleIndirectWordFetch.h cpu.acvFaults = 0; cpu 167 src/dps8/doAppendCycleIndirectWordFetch.h PNL (cpu.APUMemAddr = cpu.TPR.CA;) cpu 172 src/dps8/doAppendCycleIndirectWordFetch.h if (nomatch || ! fetch_sdw_from_sdwam (cpup, cpu.TPR.TSR)) { cpu 174 src/dps8/doAppendCycleIndirectWordFetch.h DBGAPP ("doAppendCycleIndirectWordFetch(A):SDW for segment %05o not in SDWAM\r\n", cpu.TPR.TSR); cpu 175 src/dps8/doAppendCycleIndirectWordFetch.h DBGAPP ("doAppendCycleIndirectWordFetch(A):DSBR.U=%o\r\n", cpu.DSBR.U); cpu 177 src/dps8/doAppendCycleIndirectWordFetch.h if (cpu.DSBR.U == 0) { cpu 178 src/dps8/doAppendCycleIndirectWordFetch.h fetch_dsptw (cpup, cpu.TPR.TSR); cpu 180 src/dps8/doAppendCycleIndirectWordFetch.h if (! cpu.PTW0.DF) cpu 181 src/dps8/doAppendCycleIndirectWordFetch.h doFault (FAULT_DF0 + cpu.PTW0.FC, fst_zero, "doAppendCycleIndirectWordFetch(A): PTW0.F == 0"); cpu 183 src/dps8/doAppendCycleIndirectWordFetch.h if (! cpu.PTW0.U) cpu 184 src/dps8/doAppendCycleIndirectWordFetch.h modify_dsptw (cpup, cpu.TPR.TSR); cpu 186 src/dps8/doAppendCycleIndirectWordFetch.h fetch_psdw (cpup, cpu.TPR.TSR); cpu 188 src/dps8/doAppendCycleIndirectWordFetch.h fetch_nsdw (cpup, cpu.TPR.TSR); // load SDW0 from descriptor segment table. cpu 190 src/dps8/doAppendCycleIndirectWordFetch.h if (cpu.SDW0.DF == 0) { cpu 193 src/dps8/doAppendCycleIndirectWordFetch.h doFault (FAULT_DF0 + cpu.SDW0.FC, fst_zero, "SDW0.F == 0"); cpu 196 src/dps8/doAppendCycleIndirectWordFetch.h load_sdwam (cpup, cpu.TPR.TSR, nomatch); cpu 198 src/dps8/doAppendCycleIndirectWordFetch.h DBGAPP ("doAppendCycleIndirectWordFetch(A) R1 %o R2 %o R3 %o E %o\r\n", cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.SDW->E); cpu 201 src/dps8/doAppendCycleIndirectWordFetch.h RSDWH_R1 = cpu.RSDWH_R1 = cpu.SDW->R1; cpu 218 src/dps8/doAppendCycleIndirectWordFetch.h if (! (cpu.SDW->R1 <= cpu.SDW->R2 && cpu.SDW->R2 <= cpu.SDW->R3)) { cpu 220 src/dps8/doAppendCycleIndirectWordFetch.h cpu.acvFaults |= ACV0; cpu 221 src/dps8/doAppendCycleIndirectWordFetch.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 247 src/dps8/doAppendCycleIndirectWordFetch.h if (cpu.TPR.TRR > cpu.SDW->R2) { cpu 251 src/dps8/doAppendCycleIndirectWordFetch.h cpu.acvFaults |= ACV3; cpu 252 src/dps8/doAppendCycleIndirectWordFetch.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 256 src/dps8/doAppendCycleIndirectWordFetch.h if (cpu.SDW->R == 0) { cpu 258 src/dps8/doAppendCycleIndirectWordFetch.h cpu.TPR.TRR = cpu.PPR.PRR; cpu 261 src/dps8/doAppendCycleIndirectWordFetch.h if (cpu.PPR.PSR != cpu.TPR.TSR) { cpu 265 src/dps8/doAppendCycleIndirectWordFetch.h cpu.acvFaults |= ACV4; cpu 266 src/dps8/doAppendCycleIndirectWordFetch.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 287 src/dps8/doAppendCycleIndirectWordFetch.h if (((cpu.TPR.CA >> 4) & 037777) > cpu.SDW->BOUND) { cpu 290 src/dps8/doAppendCycleIndirectWordFetch.h cpu.acvFaults |= ACV15; cpu 291 src/dps8/doAppendCycleIndirectWordFetch.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 294 src/dps8/doAppendCycleIndirectWordFetch.h cpu.TPR.CA, ((cpu.TPR.CA >> 4) & 037777), cpu.SDW->BOUND); cpu 296 src/dps8/doAppendCycleIndirectWordFetch.h bound = cpu.SDW->BOUND; cpu 297 src/dps8/doAppendCycleIndirectWordFetch.h p = cpu.SDW->P; cpu 299 src/dps8/doAppendCycleIndirectWordFetch.h if (cpu.acvFaults) { cpu 301 src/dps8/doAppendCycleIndirectWordFetch.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 303 src/dps8/doAppendCycleIndirectWordFetch.h doFault (FAULT_ACV, (_fault_subtype) {.fault_acv_subtype=cpu.acvFaults}, "ACV fault"); cpu 307 src/dps8/doAppendCycleIndirectWordFetch.h if (cpu.SDW->U) cpu 313 src/dps8/doAppendCycleIndirectWordFetch.h DBGAPP ("doAppendCycleIndirectWordFetch(G) CA %06o\r\n", cpu.TPR.CA); cpu 315 src/dps8/doAppendCycleIndirectWordFetch.h ! fetch_ptw_from_ptwam (cpup, cpu.SDW->POINTER, cpu.TPR.CA)) { cpu 316 src/dps8/doAppendCycleIndirectWordFetch.h fetch_ptw (cpup, cpu.SDW, cpu.TPR.CA); cpu 317 src/dps8/doAppendCycleIndirectWordFetch.h if (! cpu.PTW0.DF) { cpu 319 src/dps8/doAppendCycleIndirectWordFetch.h doFault (FAULT_DF0 + cpu.PTW0.FC, (_fault_subtype) {.bits=0}, "PTW0.F == 0"); cpu 321 src/dps8/doAppendCycleIndirectWordFetch.h loadPTWAM (cpup, cpu.SDW->POINTER, cpu.TPR.CA, nomatch); // load PTW0 to PTWAM cpu 331 src/dps8/doAppendCycleIndirectWordFetch.h do_ptw2 (cpup, cpu.SDW, cpu.TPR.CA); cpu 346 src/dps8/doAppendCycleIndirectWordFetch.h PNL (L68_ (cpu.apu.state |= apu_FANP;)) cpu 357 src/dps8/doAppendCycleIndirectWordFetch.h DBGAPP ("doAppendCycleIndirectWordFetch(H): SDW->ADDR=%08o CA=%06o \r\n", cpu.SDW->ADDR, cpu.TPR.CA); cpu 359 src/dps8/doAppendCycleIndirectWordFetch.h pageAddress = (cpu.SDW->ADDR & 077777760); cpu 360 src/dps8/doAppendCycleIndirectWordFetch.h finalAddress = (cpu.SDW->ADDR & 077777760) + cpu.TPR.CA; cpu 362 src/dps8/doAppendCycleIndirectWordFetch.h PNL (cpu.APUMemAddr = finalAddress;) cpu 364 src/dps8/doAppendCycleIndirectWordFetch.h DBGAPP ("doAppendCycleIndirectWordFetch(H:FANP): (%05o:%06o) finalAddress=%08o\r\n", cpu.TPR.TSR, cpu.TPR.CA, finalAddress); cpu 378 src/dps8/doAppendCycleIndirectWordFetch.h PNL (L68_ (cpu.apu.state |= apu_FAP;)) cpu 380 src/dps8/doAppendCycleIndirectWordFetch.h word24 y2 = cpu.TPR.CA % 1024; cpu 382 src/dps8/doAppendCycleIndirectWordFetch.h pageAddress = (((word24)cpu.PTW->ADDR & 0777760) << 6); cpu 385 src/dps8/doAppendCycleIndirectWordFetch.h finalAddress = (((word24)cpu.PTW->ADDR & 0777760) << 6) + y2; cpu 387 src/dps8/doAppendCycleIndirectWordFetch.h PNL (cpu.APUMemAddr = finalAddress;) cpu 390 src/dps8/doAppendCycleIndirectWordFetch.h if (cpu.MR_cache.emr && cpu.MR_cache.ihr) cpu 394 src/dps8/doAppendCycleIndirectWordFetch.h DBGAPP ("doAppendCycleIndirectWordFetch(H:FAP): (%05o:%06o) finalAddress=%08o\r\n", cpu.TPR.TSR, cpu.TPR.CA, finalAddress); cpu 401 src/dps8/doAppendCycleIndirectWordFetch.h ucCacheSave (cpup, this, cpu.TPR.TSR, cpu.TPR.CA, bound, p, pageAddress, RSDWH_R1, paged); cpu 404 src/dps8/doAppendCycleIndirectWordFetch.h cpu.cu.XSF = 1; cpu 405 src/dps8/doAppendCycleIndirectWordFetch.h cpu.xsfScu = true; cpu 422 src/dps8/doAppendCycleIndirectWordFetch.h if ((GET_TM (tag) == TM_IR || GET_TM (tag) == TM_RI) && (cpu.TPR.CA & 1) == 0) { cpu 441 src/dps8/doAppendCycleIndirectWordFetch.h cpu.TPR.TRR, cpu.RSDWH_R1, its_RNR); cpu 445 src/dps8/doAppendCycleIndirectWordFetch.h cpu.TPR.TRR = max3 (its_RNR, cpu.TPR.TRR, cpu.RSDWH_R1); cpu 446 src/dps8/doAppendCycleIndirectWordFetch.h DBGAPP ("doAppendCycleIndirectWordFetch(O) Set TRR to %o\r\n", cpu.TPR.TRR); cpu 456 src/dps8/doAppendCycleIndirectWordFetch.h cpu.TPR.TRR, cpu.RSDWH_R1, cpu.PR[n].RNR); cpu 460 src/dps8/doAppendCycleIndirectWordFetch.h cpu.TPR.TRR = max3 (cpu.PR[n].RNR, cpu.TPR.TRR, cpu.RSDWH_R1); cpu 461 src/dps8/doAppendCycleIndirectWordFetch.h DBGAPP ("doAppendCycleIndirectWordFetch(P) Set TRR to %o\r\n", cpu.TPR.TRR); cpu 467 src/dps8/doAppendCycleIndirectWordFetch.h PNL (cpu.APUDataBusOffset = cpu.TPR.CA;) cpu 468 src/dps8/doAppendCycleIndirectWordFetch.h PNL (cpu.APUDataBusAddr = finalAddress;) cpu 470 src/dps8/doAppendCycleIndirectWordFetch.h PNL (L68_ (cpu.apu.state |= apu_FA;)) cpu 473 src/dps8/doAppendCycleIndirectWordFetch.h cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); cpu 475 src/dps8/doAppendCycleIndirectWordFetch.h cpu.TPR.TRR, cpu.TPR.TSR, cpu.TPR.TBR, cpu.TPR.CA); cpu 21 src/dps8/doAppendCycleInstructionFetch.h do { if (cpu.tweaks.l68_mode) cpu.cu.APUCycleBits |= 04000; } while (0) cpu 70 src/dps8/doAppendCycleInstructionFetch.h DCDstruct * i = & cpu.currentInstruction; cpu 73 src/dps8/doAppendCycleInstructionFetch.h DBGAPP ("doAppendCycleInstructionFetch(Entry) lastCycle=%s\r\n", str_pct (cpu.apu.lastCycle)); cpu 74 src/dps8/doAppendCycleInstructionFetch.h DBGAPP ("doAppendCycleInstructionFetch(Entry) CA %06o\r\n", cpu.TPR.CA); cpu 76 src/dps8/doAppendCycleInstructionFetch.h DBGAPP ("doAppendCycleInstructionFetch(Entry) PPR.PRR=%o PPR.PSR=%05o\r\n", cpu.PPR.PRR, cpu.PPR.PSR); cpu 77 src/dps8/doAppendCycleInstructionFetch.h DBGAPP ("doAppendCycleInstructionFetch(Entry) TPR.TRR=%o TPR.TSR=%05o\r\n", cpu.TPR.TRR, cpu.TPR.TSR); cpu 127 src/dps8/doAppendCycleInstructionFetch.h if (cpu.rRALR) { cpu 153 src/dps8/doAppendCycleInstructionFetch.h ucCacheCheck (cpup, this, cpu.TPR.TSR, cpu.TPR.CA, & cachedBound, & cachedP, & cachedAddress, & cachedR1, & cachedPaged); cpu 156 src/dps8/doAppendCycleInstructionFetch.h if (! ucCacheCheck (cpup, this, cpu.TPR.TSR, cpu.TPR.CA, & bound, & p, & pageAddress, & RSDWH_R1, & paged)) cpu 161 src/dps8/doAppendCycleInstructionFetch.h finalAddress = pageAddress + (cpu.TPR.CA & OS18MASK); cpu 163 src/dps8/doAppendCycleInstructionFetch.h finalAddress = pageAddress + cpu.TPR.CA; cpu 165 src/dps8/doAppendCycleInstructionFetch.h cpu.RSDWH_R1 = RSDWH_R1; cpu 173 src/dps8/doAppendCycleInstructionFetch.h cpu.apu.lastCycle = INSTRUCTION_FETCH; cpu 179 src/dps8/doAppendCycleInstructionFetch.h cpu.uCache.skips[this] ++; cpu 185 src/dps8/doAppendCycleInstructionFetch.h if (cpu.tweaks.enable_wam) { cpu 198 src/dps8/doAppendCycleInstructionFetch.h processor_cycle_type lastCycle = cpu.apu.lastCycle; cpu 199 src/dps8/doAppendCycleInstructionFetch.h cpu.apu.lastCycle = INSTRUCTION_FETCH; cpu 201 src/dps8/doAppendCycleInstructionFetch.h DBGAPP ("doAppendCycleInstructionFetch(Entry) XSF %o\r\n", cpu.cu.XSF); cpu 203 src/dps8/doAppendCycleInstructionFetch.h PNL (L68_ (cpu.apu.state = 0;)) cpu 205 src/dps8/doAppendCycleInstructionFetch.h cpu.RSDWH_R1 = 0; cpu 207 src/dps8/doAppendCycleInstructionFetch.h cpu.acvFaults = 0; cpu 224 src/dps8/doAppendCycleInstructionFetch.h PNL (cpu.APUMemAddr = cpu.TPR.CA;) cpu 229 src/dps8/doAppendCycleInstructionFetch.h if (nomatch || ! fetch_sdw_from_sdwam (cpup, cpu.TPR.TSR)) { cpu 231 src/dps8/doAppendCycleInstructionFetch.h DBGAPP ("doAppendCycleInstructionFetch(A):SDW for segment %05o not in SDWAM\r\n", cpu.TPR.TSR); cpu 233 src/dps8/doAppendCycleInstructionFetch.h DBGAPP ("doAppendCycleInstructionFetch(A):DSBR.U=%o\r\n", cpu.DSBR.U); cpu 235 src/dps8/doAppendCycleInstructionFetch.h if (cpu.DSBR.U == 0) { cpu 236 src/dps8/doAppendCycleInstructionFetch.h fetch_dsptw (cpup, cpu.TPR.TSR); cpu 238 src/dps8/doAppendCycleInstructionFetch.h if (! cpu.PTW0.DF) cpu 239 src/dps8/doAppendCycleInstructionFetch.h doFault (FAULT_DF0 + cpu.PTW0.FC, fst_zero, "doAppendCycleInstructionFetch(A): PTW0.F == 0"); cpu 241 src/dps8/doAppendCycleInstructionFetch.h if (! cpu.PTW0.U) cpu 242 src/dps8/doAppendCycleInstructionFetch.h modify_dsptw (cpup, cpu.TPR.TSR); cpu 244 src/dps8/doAppendCycleInstructionFetch.h fetch_psdw (cpup, cpu.TPR.TSR); cpu 246 src/dps8/doAppendCycleInstructionFetch.h fetch_nsdw (cpup, cpu.TPR.TSR); // load SDW0 from descriptor segment table. cpu 248 src/dps8/doAppendCycleInstructionFetch.h if (cpu.SDW0.DF == 0) { cpu 251 src/dps8/doAppendCycleInstructionFetch.h doFault (FAULT_DF0 + cpu.SDW0.FC, fst_zero, "SDW0.F == 0"); cpu 254 src/dps8/doAppendCycleInstructionFetch.h load_sdwam (cpup, cpu.TPR.TSR, nomatch); cpu 256 src/dps8/doAppendCycleInstructionFetch.h DBGAPP ("doAppendCycleInstructionFetch(A) R1 %o R2 %o R3 %o E %o\r\n", cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.SDW->E); cpu 259 src/dps8/doAppendCycleInstructionFetch.h RSDWH_R1 = cpu.RSDWH_R1 = cpu.SDW->R1; cpu 276 src/dps8/doAppendCycleInstructionFetch.h if (! (cpu.SDW->R1 <= cpu.SDW->R2 && cpu.SDW->R2 <= cpu.SDW->R3)) { cpu 278 src/dps8/doAppendCycleInstructionFetch.h cpu.acvFaults |= ACV0; cpu 279 src/dps8/doAppendCycleInstructionFetch.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 320 src/dps8/doAppendCycleInstructionFetch.h if (cpu.TPR.TRR < cpu.SDW->R1 || cpu.TPR.TRR > cpu.SDW->R2) { cpu 322 src/dps8/doAppendCycleInstructionFetch.h DBGAPP ("acvFaults(C) ACV1 ! ( C(SDW .R1) %o <= C(TPR.TRR) %o <= C(SDW .R2) %o )\r\n", cpu.SDW->R1, cpu.TPR.TRR, cpu.SDW->R2); cpu 324 src/dps8/doAppendCycleInstructionFetch.h cpu.acvFaults |= ACV1; cpu 325 src/dps8/doAppendCycleInstructionFetch.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 329 src/dps8/doAppendCycleInstructionFetch.h if (! cpu.SDW->E) { cpu 333 src/dps8/doAppendCycleInstructionFetch.h cpu.acvFaults |= ACV2; cpu 334 src/dps8/doAppendCycleInstructionFetch.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 337 src/dps8/doAppendCycleInstructionFetch.h if (cpu.TPR.TRR > cpu.PPR.PRR) cpu 338 src/dps8/doAppendCycleInstructionFetch.h sim_warn ("rtcd: outbound call cpu.TPR.TRR %d cpu.PPR.PRR %d\r\n", cpu.TPR.TRR, cpu.PPR.PRR); cpu 340 src/dps8/doAppendCycleInstructionFetch.h if (cpu.TPR.TRR < cpu.PPR.PRR) { cpu 344 src/dps8/doAppendCycleInstructionFetch.h cpu.acvFaults |= ACV11; cpu 345 src/dps8/doAppendCycleInstructionFetch.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 356 src/dps8/doAppendCycleInstructionFetch.h if (cpu.rRALR == 0) cpu 360 src/dps8/doAppendCycleInstructionFetch.h if (! (cpu.PPR.PRR < cpu.rRALR)) { cpu 362 src/dps8/doAppendCycleInstructionFetch.h DBGAPP ("acvFaults(D) C(PPR.PRR) %o < RALR %o\r\n", cpu.PPR.PRR, cpu.rRALR); cpu 363 src/dps8/doAppendCycleInstructionFetch.h cpu.acvFaults |= ACV13; cpu 364 src/dps8/doAppendCycleInstructionFetch.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 377 src/dps8/doAppendCycleInstructionFetch.h PNL (L68_ (cpu.apu.state |= apu_PIAU;)) cpu 385 src/dps8/doAppendCycleInstructionFetch.h if (cpu.TPR.TRR < cpu.SDW->R1 || cpu.TPR.TRR > cpu.SDW->R2) { cpu 387 src/dps8/doAppendCycleInstructionFetch.h DBGAPP ("acvFaults(F) ACV1 !( C(SDW .R1) %o <= C(TPR.TRR) %o <= C(SDW .R2) %o )\r\n", cpu.SDW->R1, cpu.TPR.TRR, cpu.SDW->R2); cpu 388 src/dps8/doAppendCycleInstructionFetch.h cpu.acvFaults |= ACV1; cpu 389 src/dps8/doAppendCycleInstructionFetch.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 393 src/dps8/doAppendCycleInstructionFetch.h if (! cpu.SDW->E) { cpu 396 src/dps8/doAppendCycleInstructionFetch.h cpu.acvFaults |= ACV2; cpu 397 src/dps8/doAppendCycleInstructionFetch.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 402 src/dps8/doAppendCycleInstructionFetch.h if (cpu.PPR.PRR != cpu.TPR.TRR) { cpu 406 src/dps8/doAppendCycleInstructionFetch.h cpu.acvFaults |= ACV12; cpu 407 src/dps8/doAppendCycleInstructionFetch.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 424 src/dps8/doAppendCycleInstructionFetch.h if (((cpu.TPR.CA >> 4) & 037777) > cpu.SDW->BOUND) { cpu 427 src/dps8/doAppendCycleInstructionFetch.h cpu.acvFaults |= ACV15; cpu 428 src/dps8/doAppendCycleInstructionFetch.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 431 src/dps8/doAppendCycleInstructionFetch.h cpu.TPR.CA, ((cpu.TPR.CA >> 4) & 037777), cpu.SDW->BOUND); cpu 433 src/dps8/doAppendCycleInstructionFetch.h bound = cpu.SDW->BOUND; cpu 434 src/dps8/doAppendCycleInstructionFetch.h p = cpu.SDW->P; cpu 436 src/dps8/doAppendCycleInstructionFetch.h if (cpu.acvFaults) { cpu 438 src/dps8/doAppendCycleInstructionFetch.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 440 src/dps8/doAppendCycleInstructionFetch.h doFault (FAULT_ACV, (_fault_subtype) {.fault_acv_subtype=cpu.acvFaults}, "ACV fault"); cpu 444 src/dps8/doAppendCycleInstructionFetch.h if (cpu.SDW->U) cpu 450 src/dps8/doAppendCycleInstructionFetch.h DBGAPP ("doAppendCycleInstructionFetch(G) CA %06o\r\n", cpu.TPR.CA); cpu 452 src/dps8/doAppendCycleInstructionFetch.h ! fetch_ptw_from_ptwam (cpup, cpu.SDW->POINTER, cpu.TPR.CA)) { cpu 453 src/dps8/doAppendCycleInstructionFetch.h fetch_ptw (cpup, cpu.SDW, cpu.TPR.CA); cpu 454 src/dps8/doAppendCycleInstructionFetch.h if (! cpu.PTW0.DF) { cpu 456 src/dps8/doAppendCycleInstructionFetch.h doFault (FAULT_DF0 + cpu.PTW0.FC, (_fault_subtype) {.bits=0}, "PTW0.F == 0"); cpu 458 src/dps8/doAppendCycleInstructionFetch.h loadPTWAM (cpup, cpu.SDW->POINTER, cpu.TPR.CA, nomatch); // load PTW0 to PTWAM cpu 470 src/dps8/doAppendCycleInstructionFetch.h do_ptw2 (cpup, cpu.SDW, cpu.TPR.CA); cpu 485 src/dps8/doAppendCycleInstructionFetch.h PNL (L68_ (cpu.apu.state |= apu_FANP;)) cpu 497 src/dps8/doAppendCycleInstructionFetch.h DBGAPP ("doAppendCycleInstructionFetch(H): SDW->ADDR=%08o CA=%06o\r\n", cpu.SDW->ADDR, cpu.TPR.CA); cpu 499 src/dps8/doAppendCycleInstructionFetch.h pageAddress = (cpu.SDW->ADDR & 077777760); cpu 500 src/dps8/doAppendCycleInstructionFetch.h finalAddress = (cpu.SDW->ADDR & 077777760) + cpu.TPR.CA; cpu 502 src/dps8/doAppendCycleInstructionFetch.h PNL (cpu.APUMemAddr = finalAddress;) cpu 504 src/dps8/doAppendCycleInstructionFetch.h DBGAPP ("doAppendCycleInstructionFetch(H:FANP): (%05o:%06o) finalAddress=%08o\r\n", cpu.TPR.TSR, cpu.TPR.CA, finalAddress); cpu 519 src/dps8/doAppendCycleInstructionFetch.h PNL (L68_ (cpu.apu.state |= apu_FAP;)) cpu 521 src/dps8/doAppendCycleInstructionFetch.h word24 y2 = cpu.TPR.CA % 1024; cpu 523 src/dps8/doAppendCycleInstructionFetch.h pageAddress = (((word24)cpu.PTW->ADDR & 0777760) << 6); cpu 526 src/dps8/doAppendCycleInstructionFetch.h finalAddress = (((word24)cpu.PTW->ADDR & 0777760) << 6) + y2; cpu 528 src/dps8/doAppendCycleInstructionFetch.h PNL (cpu.APUMemAddr = finalAddress;) cpu 531 src/dps8/doAppendCycleInstructionFetch.h if (cpu.MR_cache.emr && cpu.MR_cache.ihr) cpu 535 src/dps8/doAppendCycleInstructionFetch.h DBGAPP ("doAppendCycleInstructionFetch(H:FAP): (%05o:%06o) finalAddress=%08o\r\n", cpu.TPR.TSR, cpu.TPR.CA, finalAddress); cpu 563 src/dps8/doAppendCycleInstructionFetch.h sim_printf ("ins fetch err %d %05o:%06o\r\n", evcnt, cpu.TPR.TSR, cpu.TPR.CA); cpu 568 src/dps8/doAppendCycleInstructionFetch.h hdbgNote ("doAppendCycleOperandRead.h", "test hit %d %05o:%06o\r\n", evcnt, cpu.TPR.TSR, cpu.TPR.CA); cpu 573 src/dps8/doAppendCycleInstructionFetch.h hdbgNote ("doAppendCycleOperandRead.h", "test miss %d %05o:%06o\r\n", evcnt, cpu.TPR.TSR, cpu.TPR.CA); cpu 588 src/dps8/doAppendCycleInstructionFetch.h ucCacheSave (cpup, this, cpu.TPR.TSR, cpu.TPR.CA, bound, p, pageAddress, RSDWH_R1, paged); cpu 591 src/dps8/doAppendCycleInstructionFetch.h cpu.cu.XSF = 1; cpu 619 src/dps8/doAppendCycleInstructionFetch.h cpu.PR[0].RNR = cpu 620 src/dps8/doAppendCycleInstructionFetch.h cpu.PR[1].RNR = cpu 621 src/dps8/doAppendCycleInstructionFetch.h cpu.PR[2].RNR = cpu 622 src/dps8/doAppendCycleInstructionFetch.h cpu.PR[3].RNR = cpu 623 src/dps8/doAppendCycleInstructionFetch.h cpu.PR[4].RNR = cpu 624 src/dps8/doAppendCycleInstructionFetch.h cpu.PR[5].RNR = cpu 625 src/dps8/doAppendCycleInstructionFetch.h cpu.PR[6].RNR = cpu 626 src/dps8/doAppendCycleInstructionFetch.h cpu.PR[7].RNR = cpu.TPR.TRR; cpu 644 src/dps8/doAppendCycleInstructionFetch.h cpu.PPR.PSR = cpu.TPR.TSR; cpu 646 src/dps8/doAppendCycleInstructionFetch.h cpu.PPR.IC = cpu.TPR.CA; cpu 654 src/dps8/doAppendCycleInstructionFetch.h if (cpu.TPR.TRR == 0) { cpu 657 src/dps8/doAppendCycleInstructionFetch.h cpu.PPR.P = p; cpu 660 src/dps8/doAppendCycleInstructionFetch.h cpu.PPR.P = 0; cpu 663 src/dps8/doAppendCycleInstructionFetch.h PNL (cpu.APUDataBusOffset = cpu.TPR.CA;) cpu 664 src/dps8/doAppendCycleInstructionFetch.h PNL (cpu.APUDataBusAddr = finalAddress;) cpu 666 src/dps8/doAppendCycleInstructionFetch.h PNL (L68_ (cpu.apu.state |= apu_FA;)) cpu 669 src/dps8/doAppendCycleInstructionFetch.h cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); cpu 671 src/dps8/doAppendCycleInstructionFetch.h cpu.TPR.TRR, cpu.TPR.TSR, cpu.TPR.TBR, cpu.TPR.CA); cpu 19 src/dps8/doAppendCycleOperandRMW.h DCDstruct * i = & cpu.currentInstruction; cpu 21 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("doAppendCycleOperandRMW(Entry) lastCycle=%s\r\n", str_pct (cpu.apu.lastCycle)); cpu 22 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("doAppendCycleOperandRMW(Entry) CA %06o\r\n", cpu.TPR.CA); cpu 24 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("doAppendCycleOperandRMW(Entry) PPR.PRR=%o PPR.PSR=%05o\r\n", cpu.PPR.PRR, cpu.PPR.PSR); cpu 25 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("doAppendCycleOperandRMW(Entry) TPR.TRR=%o TPR.TSR=%05o\r\n", cpu.TPR.TRR, cpu.TPR.TSR); cpu 32 src/dps8/doAppendCycleOperandRMW.h if (cpu.tweaks.enable_wam) { cpu 45 src/dps8/doAppendCycleOperandRMW.h processor_cycle_type lastCycle = cpu.apu.lastCycle; cpu 46 src/dps8/doAppendCycleOperandRMW.h cpu.apu.lastCycle = OPERAND_RMW; cpu 48 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("doAppendCycleOperandRMW(Entry) XSF %o\r\n", cpu.cu.XSF); cpu 50 src/dps8/doAppendCycleOperandRMW.h PNL (L68_ (cpu.apu.state = 0;)) cpu 52 src/dps8/doAppendCycleOperandRMW.h cpu.RSDWH_R1 = 0; cpu 54 src/dps8/doAppendCycleOperandRMW.h cpu.acvFaults = 0; cpu 74 src/dps8/doAppendCycleOperandRMW.h PNL (cpu.APUMemAddr = cpu.TPR.CA;) cpu 79 src/dps8/doAppendCycleOperandRMW.h if (nomatch || ! fetch_sdw_from_sdwam (cpup, cpu.TPR.TSR)) { cpu 81 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("doAppendCycleOperandRMW(A):SDW for segment %05o not in SDWAM\r\n", cpu.TPR.TSR); cpu 82 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("doAppendCycleOperandRMW(A):DSBR.U=%o\r\n", cpu.DSBR.U); cpu 84 src/dps8/doAppendCycleOperandRMW.h if (cpu.DSBR.U == 0) { cpu 85 src/dps8/doAppendCycleOperandRMW.h fetch_dsptw (cpup, cpu.TPR.TSR); cpu 87 src/dps8/doAppendCycleOperandRMW.h if (! cpu.PTW0.DF) cpu 88 src/dps8/doAppendCycleOperandRMW.h doFault (FAULT_DF0 + cpu.PTW0.FC, fst_zero, "doAppendCycleOperandRMW(A): PTW0.F == 0"); cpu 90 src/dps8/doAppendCycleOperandRMW.h if (! cpu.PTW0.U) cpu 91 src/dps8/doAppendCycleOperandRMW.h modify_dsptw (cpup, cpu.TPR.TSR); cpu 93 src/dps8/doAppendCycleOperandRMW.h fetch_psdw (cpup, cpu.TPR.TSR); cpu 95 src/dps8/doAppendCycleOperandRMW.h fetch_nsdw (cpup, cpu.TPR.TSR); // load SDW0 from descriptor segment table. cpu 97 src/dps8/doAppendCycleOperandRMW.h if (cpu.SDW0.DF == 0) { cpu 100 src/dps8/doAppendCycleOperandRMW.h doFault (FAULT_DF0 + cpu.SDW0.FC, fst_zero, "SDW0.F == 0"); cpu 103 src/dps8/doAppendCycleOperandRMW.h load_sdwam (cpup, cpu.TPR.TSR, nomatch); cpu 105 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("doAppendCycleOperandRMW(A) R1 %o R2 %o R3 %o E %o\r\n", cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.SDW->E); cpu 108 src/dps8/doAppendCycleOperandRMW.h cpu.RSDWH_R1 = cpu.SDW->R1; cpu 125 src/dps8/doAppendCycleOperandRMW.h if (! (cpu.SDW->R1 <= cpu.SDW->R2 && cpu.SDW->R2 <= cpu.SDW->R3)) { cpu 127 src/dps8/doAppendCycleOperandRMW.h cpu.acvFaults |= ACV0; cpu 128 src/dps8/doAppendCycleOperandRMW.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 154 src/dps8/doAppendCycleOperandRMW.h if (cpu.TPR.TRR > cpu.SDW->R2) { cpu 158 src/dps8/doAppendCycleOperandRMW.h cpu.acvFaults |= ACV3; cpu 159 src/dps8/doAppendCycleOperandRMW.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 163 src/dps8/doAppendCycleOperandRMW.h if (cpu.SDW->R == 0) { cpu 165 src/dps8/doAppendCycleOperandRMW.h cpu.TPR.TRR = cpu.PPR.PRR; cpu 168 src/dps8/doAppendCycleOperandRMW.h if (cpu.PPR.PSR != cpu.TPR.TSR) { cpu 172 src/dps8/doAppendCycleOperandRMW.h cpu.acvFaults |= ACV4; cpu 173 src/dps8/doAppendCycleOperandRMW.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 186 src/dps8/doAppendCycleOperandRMW.h if (cpu.TPR.TSR == cpu.PPR.PSR) cpu 187 src/dps8/doAppendCycleOperandRMW.h cpu.TPR.TRR = cpu.PPR.PRR; cpu 190 src/dps8/doAppendCycleOperandRMW.h if (cpu.TPR.TRR > cpu.SDW->R1) { cpu 191 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("ACV5 TRR %o R1 %o\r\n", cpu.TPR.TRR, cpu.SDW->R1); cpu 193 src/dps8/doAppendCycleOperandRMW.h cpu.acvFaults |= ACV5; cpu 194 src/dps8/doAppendCycleOperandRMW.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 198 src/dps8/doAppendCycleOperandRMW.h if (! cpu.SDW->W) { cpu 200 src/dps8/doAppendCycleOperandRMW.h cpu.TPR.TRR = cpu.PPR.PRR; cpu 204 src/dps8/doAppendCycleOperandRMW.h cpu.acvFaults |= ACV6; cpu 205 src/dps8/doAppendCycleOperandRMW.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 222 src/dps8/doAppendCycleOperandRMW.h if (((cpu.TPR.CA >> 4) & 037777) > cpu.SDW->BOUND) { cpu 225 src/dps8/doAppendCycleOperandRMW.h cpu.acvFaults |= ACV15; cpu 226 src/dps8/doAppendCycleOperandRMW.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 229 src/dps8/doAppendCycleOperandRMW.h cpu.TPR.CA, ((cpu.TPR.CA >> 4) & 037777), cpu.SDW->BOUND); cpu 232 src/dps8/doAppendCycleOperandRMW.h if (cpu.acvFaults) { cpu 234 src/dps8/doAppendCycleOperandRMW.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 236 src/dps8/doAppendCycleOperandRMW.h doFault (FAULT_ACV, (_fault_subtype) {.fault_acv_subtype=cpu.acvFaults}, "ACV fault"); cpu 240 src/dps8/doAppendCycleOperandRMW.h if (cpu.SDW->U) cpu 246 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("doAppendCycleOperandRMW(G) CA %06o\r\n", cpu.TPR.CA); cpu 247 src/dps8/doAppendCycleOperandRMW.h if (nomatch || ! fetch_ptw_from_ptwam (cpup, cpu.SDW->POINTER, cpu.TPR.CA)) { cpu 248 src/dps8/doAppendCycleOperandRMW.h fetch_ptw (cpup, cpu.SDW, cpu.TPR.CA); cpu 249 src/dps8/doAppendCycleOperandRMW.h if (! cpu.PTW0.DF) { cpu 251 src/dps8/doAppendCycleOperandRMW.h doFault (FAULT_DF0 + cpu.PTW0.FC, (_fault_subtype) {.bits=0}, "PTW0.F == 0"); cpu 253 src/dps8/doAppendCycleOperandRMW.h loadPTWAM (cpup, cpu.SDW->POINTER, cpu.TPR.CA, nomatch); // load PTW0 to PTWAM cpu 263 src/dps8/doAppendCycleOperandRMW.h do_ptw2 (cpup, cpu.SDW, cpu.TPR.CA); cpu 276 src/dps8/doAppendCycleOperandRMW.h PNL (L68_ (cpu.apu.state |= apu_FANP;)) cpu 286 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("doAppendCycleOperandRMW(H): SDW->ADDR=%08o CA=%06o\r\n", cpu.SDW->ADDR, cpu.TPR.CA); cpu 288 src/dps8/doAppendCycleOperandRMW.h finalAddress = (cpu.SDW->ADDR & 077777760) + cpu.TPR.CA; cpu 290 src/dps8/doAppendCycleOperandRMW.h PNL (cpu.APUMemAddr = finalAddress;) cpu 292 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("doAppendCycleOperandRMW(H:FANP): (%05o:%06o) finalAddress=%08o\r\n", cpu.TPR.TSR, cpu.TPR.CA, finalAddress); cpu 301 src/dps8/doAppendCycleOperandRMW.h if (cpu.PTW->M == 0) // is this the right way to do this? cpu 302 src/dps8/doAppendCycleOperandRMW.h modify_ptw (cpup, cpu.SDW, cpu.TPR.CA); cpu 306 src/dps8/doAppendCycleOperandRMW.h PNL (L68_ (cpu.apu.state |= apu_FAP;)) cpu 308 src/dps8/doAppendCycleOperandRMW.h word24 y2 = cpu.TPR.CA % 1024; cpu 312 src/dps8/doAppendCycleOperandRMW.h finalAddress = (((word24)cpu.PTW->ADDR & 0777760) << 6) + y2; cpu 314 src/dps8/doAppendCycleOperandRMW.h PNL (cpu.APUMemAddr = finalAddress;) cpu 317 src/dps8/doAppendCycleOperandRMW.h if (cpu.MR_cache.emr && cpu.MR_cache.ihr) cpu 321 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("doAppendCycleOperandRMW(H:FAP): (%05o:%06o) finalAddress=%08o\r\n", cpu.TPR.TSR, cpu.TPR.CA, finalAddress); cpu 329 src/dps8/doAppendCycleOperandRMW.h cpu.cu.XSF = 1; cpu 330 src/dps8/doAppendCycleOperandRMW.h if (cpu.currentInstruction.b29) cpu 331 src/dps8/doAppendCycleOperandRMW.h cpu.xsfScu = true; cpu 349 src/dps8/doAppendCycleOperandRMW.h PNL (cpu.APUDataBusOffset = cpu.TPR.CA;) cpu 350 src/dps8/doAppendCycleOperandRMW.h PNL (cpu.APUDataBusAddr = finalAddress;) cpu 352 src/dps8/doAppendCycleOperandRMW.h PNL (L68_ (cpu.apu.state |= apu_FA;)) cpu 354 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("doAppendCycleOperandRMW (Exit) PRR %o PSR %05o P %o IC %06o\r\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); cpu 355 src/dps8/doAppendCycleOperandRMW.h DBGAPP ("doAppendCycleOperandRMW (Exit) TRR %o TSR %05o TBR %02o CA %06o\r\n", cpu.TPR.TRR, cpu.TPR.TSR, cpu.TPR.TBR, cpu.TPR.CA); cpu 60 src/dps8/doAppendCycleOperandRead.h DCDstruct * i = & cpu.currentInstruction; cpu 63 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead(Entry) lastCycle=%s\r\n", str_pct (cpu.apu.lastCycle)); cpu 64 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead(Entry) CA %06o\r\n", cpu.TPR.CA); cpu 66 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead(Entry) PPR.PRR=%o PPR.PSR=%05o\r\n", cpu.PPR.PRR, cpu.PPR.PSR); cpu 67 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead(Entry) TPR.TRR=%o TPR.TSR=%05o\r\n", cpu.TPR.TRR, cpu.TPR.TSR); cpu 101 src/dps8/doAppendCycleOperandRead.h cpu.uCache.call6Skips ++; cpu 118 src/dps8/doAppendCycleOperandRead.h if (cpu.rRALR && (cpu.PPR.PRR >= cpu.rRALR)) { cpu 120 src/dps8/doAppendCycleOperandRead.h cpu.uCache.ralrSkips ++; cpu 135 src/dps8/doAppendCycleOperandRead.h ucCacheCheck (cpup, this, cpu.TPR.TSR, cpu.TPR.CA, & cachedBound, & cachedP, & cachedAddress, & cachedR1, & cachedPaged); cpu 138 src/dps8/doAppendCycleOperandRead.h cacheHit ? "hit" : "miss", evcnt, this, cpu.TPR.TSR, cpu.TPR.CA, cachedBound, cpu 143 src/dps8/doAppendCycleOperandRead.h if (! ucCacheCheck (cpup, this, cpu.TPR.TSR, cpu.TPR.CA, & bound, & p, & pageAddress, & RSDWH_R1, & paged)) { cpu 145 src/dps8/doAppendCycleOperandRead.h hdbgNote ("doAppendCycleOperandRead.h", "miss %d %05o:%06o\r\n", evcnt, cpu.TPR.TSR, cpu.TPR.CA); cpu 152 src/dps8/doAppendCycleOperandRead.h finalAddress = pageAddress + (cpu.TPR.CA & OS18MASK); cpu 154 src/dps8/doAppendCycleOperandRead.h finalAddress = pageAddress + cpu.TPR.CA; cpu 156 src/dps8/doAppendCycleOperandRead.h cpu.RSDWH_R1 = RSDWH_R1; cpu 161 src/dps8/doAppendCycleOperandRead.h hdbgNote ("doAppendCycleOperandRead.h", "hit %d %05o:%06o\r\n", evcnt, cpu.TPR.TSR, cpu.TPR.CA); cpu 166 src/dps8/doAppendCycleOperandRead.h cpu.apu.lastCycle = OPERAND_READ; cpu 173 src/dps8/doAppendCycleOperandRead.h hdbgNote ("doAppendCycleOperandRead.h", "skip %d %05o:%06o\r\n", evcnt, cpu.TPR.TSR, cpu.TPR.CA); cpu 176 src/dps8/doAppendCycleOperandRead.h cpu.uCache.skips[this] ++; cpu 183 src/dps8/doAppendCycleOperandRead.h if (cpu.tweaks.enable_wam) { cpu 196 src/dps8/doAppendCycleOperandRead.h processor_cycle_type lastCycle = cpu.apu.lastCycle; cpu 197 src/dps8/doAppendCycleOperandRead.h cpu.apu.lastCycle = OPERAND_READ; cpu 199 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead(Entry) XSF %o\r\n", cpu.cu.XSF); cpu 201 src/dps8/doAppendCycleOperandRead.h PNL (L68_ (cpu.apu.state = 0;)) cpu 203 src/dps8/doAppendCycleOperandRead.h cpu.RSDWH_R1 = 0; cpu 205 src/dps8/doAppendCycleOperandRead.h cpu.acvFaults = 0; cpu 231 src/dps8/doAppendCycleOperandRead.h PNL (cpu.APUMemAddr = cpu.TPR.CA;) cpu 236 src/dps8/doAppendCycleOperandRead.h if (nomatch || ! fetch_sdw_from_sdwam (cpup, cpu.TPR.TSR)) { cpu 238 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead(A):SDW for segment %05o not in SDWAM\r\n", cpu.TPR.TSR); cpu 239 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead(A):DSBR.U=%o\r\n", cpu.DSBR.U); cpu 241 src/dps8/doAppendCycleOperandRead.h if (cpu.DSBR.U == 0) { cpu 242 src/dps8/doAppendCycleOperandRead.h fetch_dsptw (cpup, cpu.TPR.TSR); cpu 244 src/dps8/doAppendCycleOperandRead.h if (! cpu.PTW0.DF) cpu 245 src/dps8/doAppendCycleOperandRead.h doFault (FAULT_DF0 + cpu.PTW0.FC, fst_zero, "doAppendCycleOperandRead(A): PTW0.F == 0"); cpu 247 src/dps8/doAppendCycleOperandRead.h if (! cpu.PTW0.U) cpu 248 src/dps8/doAppendCycleOperandRead.h modify_dsptw (cpup, cpu.TPR.TSR); cpu 250 src/dps8/doAppendCycleOperandRead.h fetch_psdw (cpup, cpu.TPR.TSR); cpu 252 src/dps8/doAppendCycleOperandRead.h fetch_nsdw (cpup, cpu.TPR.TSR); // load SDW0 from descriptor segment table. cpu 254 src/dps8/doAppendCycleOperandRead.h if (cpu.SDW0.DF == 0) { cpu 257 src/dps8/doAppendCycleOperandRead.h doFault (FAULT_DF0 + cpu.SDW0.FC, fst_zero, "SDW0.F == 0"); cpu 260 src/dps8/doAppendCycleOperandRead.h load_sdwam (cpup, cpu.TPR.TSR, nomatch); cpu 262 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead(A) R1 %o R2 %o R3 %o E %o\r\n", cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.SDW->E); cpu 265 src/dps8/doAppendCycleOperandRead.h RSDWH_R1 = cpu.RSDWH_R1 = cpu.SDW->R1; cpu 282 src/dps8/doAppendCycleOperandRead.h if (! (cpu.SDW->R1 <= cpu.SDW->R2 && cpu.SDW->R2 <= cpu.SDW->R3)) { cpu 284 src/dps8/doAppendCycleOperandRead.h cpu.acvFaults |= ACV0; cpu 285 src/dps8/doAppendCycleOperandRead.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 319 src/dps8/doAppendCycleOperandRead.h if (cpu.TPR.TRR > cpu.SDW->R2) { cpu 323 src/dps8/doAppendCycleOperandRead.h cpu.acvFaults |= ACV3; cpu 324 src/dps8/doAppendCycleOperandRead.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 328 src/dps8/doAppendCycleOperandRead.h if (cpu.SDW->R == 0) { cpu 330 src/dps8/doAppendCycleOperandRead.h cpu.TPR.TRR = cpu.PPR.PRR; cpu 333 src/dps8/doAppendCycleOperandRead.h if (cpu.PPR.PSR != cpu.TPR.TSR) { cpu 337 src/dps8/doAppendCycleOperandRead.h cpu.acvFaults |= ACV4; cpu 338 src/dps8/doAppendCycleOperandRead.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 360 src/dps8/doAppendCycleOperandRead.h if (cpu.rRALR == 0) cpu 364 src/dps8/doAppendCycleOperandRead.h if (! (cpu.PPR.PRR < cpu.rRALR)) { cpu 366 src/dps8/doAppendCycleOperandRead.h DBGAPP ("acvFaults(D) C(PPR.PRR) %o < RALR %o\r\n", cpu.PPR.PRR, cpu.rRALR); cpu 367 src/dps8/doAppendCycleOperandRead.h cpu.acvFaults |= ACV13; cpu 368 src/dps8/doAppendCycleOperandRead.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 389 src/dps8/doAppendCycleOperandRead.h cpu.SDW->E, cpu.SDW->G, cpu.PPR.PSR, cpu.TPR.TSR, cpu.TPR.CA, cpu.SDW->EB, cpu 390 src/dps8/doAppendCycleOperandRead.h cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.TPR.TRR, cpu.PPR.PRR); cpu 393 src/dps8/doAppendCycleOperandRead.h if (! cpu.SDW->E) { cpu 397 src/dps8/doAppendCycleOperandRead.h cpu.acvFaults |= ACV2; cpu 398 src/dps8/doAppendCycleOperandRead.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 403 src/dps8/doAppendCycleOperandRead.h if (cpu.SDW->G) cpu 407 src/dps8/doAppendCycleOperandRead.h if (cpu.PPR.PSR == cpu.TPR.TSR && ! TST_I_ABS) cpu 413 src/dps8/doAppendCycleOperandRead.h if (cpu.TPR.CA >= (word18) cpu.SDW->EB) { cpu 417 src/dps8/doAppendCycleOperandRead.h cpu.acvFaults |= ACV7; cpu 418 src/dps8/doAppendCycleOperandRead.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 426 src/dps8/doAppendCycleOperandRead.h if (cpu.TPR.TRR > cpu.SDW->R3) { cpu 430 src/dps8/doAppendCycleOperandRead.h cpu.acvFaults |= ACV8; cpu 431 src/dps8/doAppendCycleOperandRead.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 436 src/dps8/doAppendCycleOperandRead.h if (cpu.TPR.TRR < cpu.SDW->R1) { cpu 440 src/dps8/doAppendCycleOperandRead.h cpu.acvFaults |= ACV9; cpu 441 src/dps8/doAppendCycleOperandRead.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 446 src/dps8/doAppendCycleOperandRead.h if (cpu.TPR.TRR > cpu.PPR.PRR) { cpu 448 src/dps8/doAppendCycleOperandRead.h if (cpu.PPR.PRR < cpu.SDW->R2) { cpu 452 src/dps8/doAppendCycleOperandRead.h cpu.acvFaults |= ACV10; cpu 453 src/dps8/doAppendCycleOperandRead.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 458 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead(E1): CALL6 TPR.TRR %o SDW->R2 %o\r\n", cpu.TPR.TRR, cpu.SDW->R2); cpu 461 src/dps8/doAppendCycleOperandRead.h if (cpu.TPR.TRR > cpu.SDW->R2) { cpu 463 src/dps8/doAppendCycleOperandRead.h cpu.TPR.TRR = cpu.SDW->R2; cpu 466 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead(E1): CALL6 TPR.TRR %o\r\n", cpu.TPR.TRR); cpu 477 src/dps8/doAppendCycleOperandRead.h PNL (L68_ (cpu.apu.state |= apu_PIAU;)) cpu 486 src/dps8/doAppendCycleOperandRead.h if (cpu.TPR.TRR < cpu.SDW->R1 || cpu.TPR.TRR > cpu.SDW->R2) { cpu 488 src/dps8/doAppendCycleOperandRead.h DBGAPP ("acvFaults(F) ACV1 !( C(SDW .R1) %o <= C(TPR.TRR) %o <= C(SDW .R2) %o )\r\n", cpu.SDW->R1, cpu.TPR.TRR, cpu.SDW->R2); cpu 489 src/dps8/doAppendCycleOperandRead.h cpu.acvFaults |= ACV1; cpu 490 src/dps8/doAppendCycleOperandRead.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 494 src/dps8/doAppendCycleOperandRead.h if (! cpu.SDW->E) { cpu 497 src/dps8/doAppendCycleOperandRead.h cpu.acvFaults |= ACV2; cpu 498 src/dps8/doAppendCycleOperandRead.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 503 src/dps8/doAppendCycleOperandRead.h if (cpu.PPR.PRR != cpu.TPR.TRR) { cpu 507 src/dps8/doAppendCycleOperandRead.h cpu.acvFaults |= ACV12; cpu 508 src/dps8/doAppendCycleOperandRead.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 525 src/dps8/doAppendCycleOperandRead.h if (((cpu.TPR.CA >> 4) & 037777) > cpu.SDW->BOUND) { cpu 528 src/dps8/doAppendCycleOperandRead.h cpu.acvFaults |= ACV15; cpu 529 src/dps8/doAppendCycleOperandRead.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 532 src/dps8/doAppendCycleOperandRead.h cpu.TPR.CA, ((cpu.TPR.CA >> 4) & 037777), cpu.SDW->BOUND); cpu 534 src/dps8/doAppendCycleOperandRead.h bound = cpu.SDW->BOUND; cpu 535 src/dps8/doAppendCycleOperandRead.h p = cpu.SDW->P; cpu 537 src/dps8/doAppendCycleOperandRead.h if (cpu.acvFaults) { cpu 539 src/dps8/doAppendCycleOperandRead.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 541 src/dps8/doAppendCycleOperandRead.h doFault (FAULT_ACV, (_fault_subtype) {.fault_acv_subtype=cpu.acvFaults}, cpu 546 src/dps8/doAppendCycleOperandRead.h if (cpu.SDW->U) cpu 552 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead(G) CA %06o\r\n", cpu.TPR.CA); cpu 554 src/dps8/doAppendCycleOperandRead.h ! fetch_ptw_from_ptwam (cpup, cpu.SDW->POINTER, cpu.TPR.CA)) { cpu 555 src/dps8/doAppendCycleOperandRead.h fetch_ptw (cpup, cpu.SDW, cpu.TPR.CA); cpu 556 src/dps8/doAppendCycleOperandRead.h if (! cpu.PTW0.DF) { cpu 558 src/dps8/doAppendCycleOperandRead.h doFault (FAULT_DF0 + cpu.PTW0.FC, (_fault_subtype) {.bits=0}, cpu 561 src/dps8/doAppendCycleOperandRead.h loadPTWAM (cpup, cpu.SDW->POINTER, cpu.TPR.CA, nomatch); // load PTW0 to PTWAM cpu 571 src/dps8/doAppendCycleOperandRead.h do_ptw2 (cpup, cpu.SDW, cpu.TPR.CA); cpu 586 src/dps8/doAppendCycleOperandRead.h PNL (L68_ (cpu.apu.state |= apu_FANP;)) cpu 599 src/dps8/doAppendCycleOperandRead.h cpu.SDW->ADDR, cpu.TPR.CA); cpu 601 src/dps8/doAppendCycleOperandRead.h pageAddress = (cpu.SDW->ADDR & 077777760); cpu 602 src/dps8/doAppendCycleOperandRead.h finalAddress = (cpu.SDW->ADDR & 077777760) + cpu.TPR.CA; cpu 604 src/dps8/doAppendCycleOperandRead.h PNL (cpu.APUMemAddr = finalAddress;) cpu 607 src/dps8/doAppendCycleOperandRead.h cpu.TPR.TSR, cpu.TPR.CA, finalAddress); cpu 624 src/dps8/doAppendCycleOperandRead.h PNL (L68_ (cpu.apu.state |= apu_FAP;)) cpu 626 src/dps8/doAppendCycleOperandRead.h word24 y2 = cpu.TPR.CA % 1024; cpu 628 src/dps8/doAppendCycleOperandRead.h pageAddress = (((word24)cpu.PTW->ADDR & 0777760) << 6); cpu 631 src/dps8/doAppendCycleOperandRead.h finalAddress = (((word24)cpu.PTW->ADDR & 0777760) << 6) + y2; cpu 633 src/dps8/doAppendCycleOperandRead.h PNL (cpu.APUMemAddr = finalAddress;) cpu 636 src/dps8/doAppendCycleOperandRead.h if (cpu.MR_cache.emr && cpu.MR_cache.ihr) cpu 641 src/dps8/doAppendCycleOperandRead.h cpu.TPR.TSR, cpu.TPR.CA, finalAddress); cpu 676 src/dps8/doAppendCycleOperandRead.h evcnt, cpu.TPR.TSR, cpu.TPR.CA); cpu 682 src/dps8/doAppendCycleOperandRead.h evcnt, cpu.TPR.TSR, cpu.TPR.CA); cpu 688 src/dps8/doAppendCycleOperandRead.h evcnt, cpu.TPR.TSR, cpu.TPR.CA); cpu 693 src/dps8/doAppendCycleOperandRead.h ucCacheSave (cpup, this, cpu.TPR.TSR, cpu.TPR.CA, bound, p, pageAddress, RSDWH_R1, paged); cpu 697 src/dps8/doAppendCycleOperandRead.h evcnt, this, cpu.TPR.TSR, cpu.TPR.CA, bound, p, pageAddress, RSDWH_R1, paged); cpu 703 src/dps8/doAppendCycleOperandRead.h cpu.cu.XSF = 1; cpu 704 src/dps8/doAppendCycleOperandRead.h if (cpu.currentInstruction.b29) cpu 705 src/dps8/doAppendCycleOperandRead.h cpu.xsfScu = true; cpu 742 src/dps8/doAppendCycleOperandRead.h cpu.PR[n].RNR = cpu.PPR.PRR; cpu 746 src/dps8/doAppendCycleOperandRead.h cpu.PR[n].SNR = cpu.PPR.PSR; cpu 747 src/dps8/doAppendCycleOperandRead.h cpu.PR[n].WORDNO = (cpu.PPR.IC + 1) & MASK18; cpu 758 src/dps8/doAppendCycleOperandRead.h cpu.PPR.PSR = cpu.TPR.TSR; cpu 760 src/dps8/doAppendCycleOperandRead.h cpu.PPR.IC = cpu.TPR.CA; cpu 768 src/dps8/doAppendCycleOperandRead.h if (cpu.TPR.TRR == 0) { cpu 770 src/dps8/doAppendCycleOperandRead.h cpu.PPR.P = p; cpu 773 src/dps8/doAppendCycleOperandRead.h cpu.PPR.P = 0; cpu 782 src/dps8/doAppendCycleOperandRead.h if (cpu.TPR.TRR == cpu.PPR.PRR) { cpu 784 src/dps8/doAppendCycleOperandRead.h cpu.PR[7].SNR = cpu.PR[6].SNR; cpu 785 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead(N) PR7.SNR = PR6.SNR %05o\r\n", cpu.PR[7].SNR); cpu 788 src/dps8/doAppendCycleOperandRead.h cpu.PR[7].SNR = ((word15) (cpu.DSBR.STACK << 3)) | cpu.TPR.TRR; cpu 789 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead(N) STACK %05o TRR %o\r\n", cpu.DSBR.STACK, cpu.TPR.TRR); cpu 790 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead(N) PR7.SNR = STACK||TRR %05o\r\n", cpu.PR[7].SNR); cpu 794 src/dps8/doAppendCycleOperandRead.h cpu.PR[7].RNR = cpu.TPR.TRR; cpu 796 src/dps8/doAppendCycleOperandRead.h cpu.PR[7].WORDNO = 0; cpu 803 src/dps8/doAppendCycleOperandRead.h cpu.PPR.PRR = cpu.TPR.TRR; cpu 805 src/dps8/doAppendCycleOperandRead.h cpu.PPR.PSR = cpu.TPR.TSR; cpu 807 src/dps8/doAppendCycleOperandRead.h cpu.PPR.IC = cpu.TPR.CA; cpu 813 src/dps8/doAppendCycleOperandRead.h PNL (cpu.APUDataBusOffset = cpu.TPR.CA;) cpu 814 src/dps8/doAppendCycleOperandRead.h PNL (cpu.APUDataBusAddr = finalAddress;) cpu 816 src/dps8/doAppendCycleOperandRead.h PNL (L68_ (cpu.apu.state |= apu_FA;)) cpu 818 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead (Exit) PRR %o PSR %05o P %o IC %06o\r\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); cpu 819 src/dps8/doAppendCycleOperandRead.h DBGAPP ("doAppendCycleOperandRead (Exit) TRR %o TSR %05o TBR %02o CA %06o\r\n", cpu.TPR.TRR, cpu.TPR.TSR, cpu.TPR.TBR, cpu.TPR.CA); cpu 19 src/dps8/doAppendCycleOperandStore.h DCDstruct * i = & cpu.currentInstruction; cpu 21 src/dps8/doAppendCycleOperandStore.h DBGAPP ("doAppendCycleOperandStore(Entry) lastCycle=%s\r\n", str_pct (cpu.apu.lastCycle)); cpu 22 src/dps8/doAppendCycleOperandStore.h DBGAPP ("doAppendCycleOperandStore(Entry) CA %06o\r\n", cpu.TPR.CA); cpu 24 src/dps8/doAppendCycleOperandStore.h DBGAPP ("doAppendCycleOperandStore(Entry) PPR.PRR=%o PPR.PSR=%05o\r\n", cpu.PPR.PRR, cpu.PPR.PSR); cpu 25 src/dps8/doAppendCycleOperandStore.h DBGAPP ("doAppendCycleOperandStore(Entry) TPR.TRR=%o TPR.TSR=%05o\r\n", cpu.TPR.TRR, cpu.TPR.TSR); cpu 32 src/dps8/doAppendCycleOperandStore.h if (cpu.tweaks.enable_wam) { cpu 45 src/dps8/doAppendCycleOperandStore.h processor_cycle_type lastCycle = cpu.apu.lastCycle; cpu 46 src/dps8/doAppendCycleOperandStore.h cpu.apu.lastCycle = OPERAND_STORE; cpu 48 src/dps8/doAppendCycleOperandStore.h DBGAPP ("doAppendCycleOperandStore(Entry) XSF %o\r\n", cpu.cu.XSF); cpu 50 src/dps8/doAppendCycleOperandStore.h PNL (L68_ (cpu.apu.state = 0;)) cpu 52 src/dps8/doAppendCycleOperandStore.h cpu.RSDWH_R1 = 0; cpu 54 src/dps8/doAppendCycleOperandStore.h cpu.acvFaults = 0; cpu 73 src/dps8/doAppendCycleOperandStore.h PNL (cpu.APUMemAddr = cpu.TPR.CA;) cpu 78 src/dps8/doAppendCycleOperandStore.h if (nomatch || ! fetch_sdw_from_sdwam (cpup, cpu.TPR.TSR)) { cpu 80 src/dps8/doAppendCycleOperandStore.h DBGAPP ("doAppendCycleOperandStore(A):SDW for segment %05o not in SDWAM\r\n", cpu.TPR.TSR); cpu 82 src/dps8/doAppendCycleOperandStore.h DBGAPP ("doAppendCycleOperandStore(A):DSBR.U=%o\r\n", cpu.DSBR.U); cpu 84 src/dps8/doAppendCycleOperandStore.h if (cpu.DSBR.U == 0) { cpu 85 src/dps8/doAppendCycleOperandStore.h fetch_dsptw (cpup, cpu.TPR.TSR); cpu 87 src/dps8/doAppendCycleOperandStore.h if (! cpu.PTW0.DF) cpu 88 src/dps8/doAppendCycleOperandStore.h doFault (FAULT_DF0 + cpu.PTW0.FC, fst_zero, "doAppendCycleOperandStore(A): PTW0.F == 0"); cpu 90 src/dps8/doAppendCycleOperandStore.h if (! cpu.PTW0.U) cpu 91 src/dps8/doAppendCycleOperandStore.h modify_dsptw (cpup, cpu.TPR.TSR); cpu 93 src/dps8/doAppendCycleOperandStore.h fetch_psdw (cpup, cpu.TPR.TSR); cpu 95 src/dps8/doAppendCycleOperandStore.h fetch_nsdw (cpup, cpu.TPR.TSR); // load SDW0 from descriptor segment table. cpu 97 src/dps8/doAppendCycleOperandStore.h if (cpu.SDW0.DF == 0) { cpu 100 src/dps8/doAppendCycleOperandStore.h doFault (FAULT_DF0 + cpu.SDW0.FC, fst_zero, "SDW0.F == 0"); cpu 103 src/dps8/doAppendCycleOperandStore.h load_sdwam (cpup, cpu.TPR.TSR, nomatch); cpu 105 src/dps8/doAppendCycleOperandStore.h DBGAPP ("doAppendCycleOperandStore(A) R1 %o R2 %o R3 %o E %o\r\n", cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.SDW->E); cpu 108 src/dps8/doAppendCycleOperandStore.h cpu.RSDWH_R1 = cpu.SDW->R1; cpu 125 src/dps8/doAppendCycleOperandStore.h if (! (cpu.SDW->R1 <= cpu.SDW->R2 && cpu.SDW->R2 <= cpu.SDW->R3)) { cpu 127 src/dps8/doAppendCycleOperandStore.h cpu.acvFaults |= ACV0; cpu 128 src/dps8/doAppendCycleOperandStore.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 146 src/dps8/doAppendCycleOperandStore.h if (cpu.TPR.TSR == cpu.PPR.PSR) cpu 147 src/dps8/doAppendCycleOperandStore.h cpu.TPR.TRR = cpu.PPR.PRR; cpu 150 src/dps8/doAppendCycleOperandStore.h if (cpu.TPR.TRR > cpu.SDW->R1) { cpu 151 src/dps8/doAppendCycleOperandStore.h DBGAPP ("ACV5 TRR %o R1 %o\r\n", cpu.TPR.TRR, cpu.SDW->R1); cpu 153 src/dps8/doAppendCycleOperandStore.h cpu.acvFaults |= ACV5; cpu 154 src/dps8/doAppendCycleOperandStore.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 158 src/dps8/doAppendCycleOperandStore.h if (! cpu.SDW->W) { cpu 160 src/dps8/doAppendCycleOperandStore.h cpu.TPR.TRR = cpu.PPR.PRR; cpu 164 src/dps8/doAppendCycleOperandStore.h cpu.acvFaults |= ACV6; cpu 165 src/dps8/doAppendCycleOperandStore.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 182 src/dps8/doAppendCycleOperandStore.h if (((cpu.TPR.CA >> 4) & 037777) > cpu.SDW->BOUND) { cpu 185 src/dps8/doAppendCycleOperandStore.h cpu.acvFaults |= ACV15; cpu 186 src/dps8/doAppendCycleOperandStore.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 189 src/dps8/doAppendCycleOperandStore.h cpu.TPR.CA, ((cpu.TPR.CA >> 4) & 037777), cpu.SDW->BOUND); cpu 192 src/dps8/doAppendCycleOperandStore.h if (cpu.acvFaults) { cpu 194 src/dps8/doAppendCycleOperandStore.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 196 src/dps8/doAppendCycleOperandStore.h doFault (FAULT_ACV, (_fault_subtype) {.fault_acv_subtype=cpu.acvFaults}, "ACV fault"); cpu 200 src/dps8/doAppendCycleOperandStore.h if (cpu.SDW->U) cpu 206 src/dps8/doAppendCycleOperandStore.h DBGAPP ("doAppendCycleOperandStore(G) CA %06o\r\n", cpu.TPR.CA); cpu 207 src/dps8/doAppendCycleOperandStore.h if (nomatch || ! fetch_ptw_from_ptwam (cpup, cpu.SDW->POINTER, cpu.TPR.CA)) { cpu 208 src/dps8/doAppendCycleOperandStore.h fetch_ptw (cpup, cpu.SDW, cpu.TPR.CA); cpu 209 src/dps8/doAppendCycleOperandStore.h if (! cpu.PTW0.DF) { cpu 211 src/dps8/doAppendCycleOperandStore.h doFault (FAULT_DF0 + cpu.PTW0.FC, (_fault_subtype) {.bits=0}, "PTW0.F == 0"); cpu 213 src/dps8/doAppendCycleOperandStore.h loadPTWAM (cpup, cpu.SDW->POINTER, cpu.TPR.CA, nomatch); // load PTW0 to PTWAM cpu 223 src/dps8/doAppendCycleOperandStore.h do_ptw2 (cpup, cpu.SDW, cpu.TPR.CA); cpu 236 src/dps8/doAppendCycleOperandStore.h PNL (L68_ (cpu.apu.state |= apu_FANP;)) cpu 246 src/dps8/doAppendCycleOperandStore.h DBGAPP ("doAppendCycleOperandStore(H): SDW->ADDR=%08o CA=%06o\r\n", cpu.SDW->ADDR, cpu.TPR.CA); cpu 248 src/dps8/doAppendCycleOperandStore.h finalAddress = (cpu.SDW->ADDR & 077777760) + cpu.TPR.CA; cpu 250 src/dps8/doAppendCycleOperandStore.h PNL (cpu.APUMemAddr = finalAddress;) cpu 252 src/dps8/doAppendCycleOperandStore.h DBGAPP ("doAppendCycleOperandStore(H:FANP): (%05o:%06o) finalAddress=%08o\r\n", cpu.TPR.TSR, cpu.TPR.CA, finalAddress); cpu 261 src/dps8/doAppendCycleOperandStore.h if (cpu.PTW->M == 0) // is this the right way to do this? cpu 262 src/dps8/doAppendCycleOperandStore.h modify_ptw (cpup, cpu.SDW, cpu.TPR.CA); cpu 266 src/dps8/doAppendCycleOperandStore.h PNL (L68_ (cpu.apu.state |= apu_FAP;)) cpu 268 src/dps8/doAppendCycleOperandStore.h word24 y2 = cpu.TPR.CA % 1024; cpu 272 src/dps8/doAppendCycleOperandStore.h finalAddress = (((word24)cpu.PTW->ADDR & 0777760) << 6) + y2; cpu 274 src/dps8/doAppendCycleOperandStore.h PNL (cpu.APUMemAddr = finalAddress;) cpu 277 src/dps8/doAppendCycleOperandStore.h if (cpu.MR_cache.emr && cpu.MR_cache.ihr) cpu 281 src/dps8/doAppendCycleOperandStore.h DBGAPP ("doAppendCycleOperandStore(H:FAP): (%05o:%06o) finalAddress=%08o\r\n", cpu.TPR.TSR, cpu.TPR.CA, finalAddress); cpu 289 src/dps8/doAppendCycleOperandStore.h cpu.cu.XSF = 1; cpu 290 src/dps8/doAppendCycleOperandStore.h if (cpu.currentInstruction.b29) cpu 291 src/dps8/doAppendCycleOperandStore.h cpu.xsfScu = true; cpu 294 src/dps8/doAppendCycleOperandStore.h if (cpu.useZone) cpu 303 src/dps8/doAppendCycleOperandStore.h PNL (cpu.APUDataBusOffset = cpu.TPR.CA;) cpu 304 src/dps8/doAppendCycleOperandStore.h PNL (cpu.APUDataBusAddr = finalAddress;) cpu 306 src/dps8/doAppendCycleOperandStore.h PNL (L68_ (cpu.apu.state |= apu_FA;)) cpu 308 src/dps8/doAppendCycleOperandStore.h DBGAPP ("doAppendCycleOperandStore (Exit) PRR %o PSR %05o P %o IC %06o\r\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); cpu 309 src/dps8/doAppendCycleOperandStore.h DBGAPP ("doAppendCycleOperandStore (Exit) TRR %o TSR %05o TBR %02o CA %06o\r\n", cpu.TPR.TRR, cpu.TPR.TSR, cpu.TPR.TBR, cpu.TPR.CA); cpu 19 src/dps8/doAppendCycleRTCDOperandFetch.h DCDstruct * i = & cpu.currentInstruction; cpu 21 src/dps8/doAppendCycleRTCDOperandFetch.h DBGAPP ("doAppendCycleRTCDOperandFetch(Entry) lastCycle=%s\r\n", str_pct (cpu.apu.lastCycle)); cpu 22 src/dps8/doAppendCycleRTCDOperandFetch.h DBGAPP ("doAppendCycleRTCDOperandFetch(Entry) CA %06o\r\n", cpu.TPR.CA); cpu 24 src/dps8/doAppendCycleRTCDOperandFetch.h DBGAPP ("doAppendCycleRTCDOperandFetch(Entry) PPR.PRR=%o PPR.PSR=%05o\r\n", cpu.PPR.PRR, cpu.PPR.PSR); cpu 25 src/dps8/doAppendCycleRTCDOperandFetch.h DBGAPP ("doAppendCycleRTCDOperandFetch(Entry) TPR.TRR=%o TPR.TSR=%05o\r\n", cpu.TPR.TRR, cpu.TPR.TSR); cpu 32 src/dps8/doAppendCycleRTCDOperandFetch.h if (cpu.tweaks.enable_wam) { cpu 45 src/dps8/doAppendCycleRTCDOperandFetch.h processor_cycle_type lastCycle = cpu.apu.lastCycle; cpu 46 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.apu.lastCycle = RTCD_OPERAND_FETCH; cpu 48 src/dps8/doAppendCycleRTCDOperandFetch.h DBGAPP ("doAppendCycleRTCDOperandFetch(Entry) XSF %o\r\n", cpu.cu.XSF); cpu 50 src/dps8/doAppendCycleRTCDOperandFetch.h PNL (L68_ (cpu.apu.state = 0;)) cpu 52 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.RSDWH_R1 = 0; cpu 54 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.acvFaults = 0; cpu 84 src/dps8/doAppendCycleRTCDOperandFetch.h if (get_addr_mode(cpup) == ABSOLUTE_mode && ! (cpu.cu.XSF || cpu.currentInstruction.b29)) { cpu 85 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.TPR.TSR = 0; cpu 86 src/dps8/doAppendCycleRTCDOperandFetch.h DBGAPP ("RTCD_OPERAND_FETCH ABSOLUTE mode set TSR %05o TRR %o\r\n", cpu.TPR.TSR, cpu.TPR.TRR); cpu 104 src/dps8/doAppendCycleRTCDOperandFetch.h PNL (cpu.APUMemAddr = cpu.TPR.CA;) cpu 109 src/dps8/doAppendCycleRTCDOperandFetch.h if (nomatch || ! fetch_sdw_from_sdwam (cpup, cpu.TPR.TSR)) { cpu 111 src/dps8/doAppendCycleRTCDOperandFetch.h DBGAPP ("doAppendCycleRTCDOperandFetch(A):SDW for segment %05o not in SDWAM\r\n", cpu.TPR.TSR); cpu 112 src/dps8/doAppendCycleRTCDOperandFetch.h DBGAPP ("doAppendCycleRTCDOperandFetch(A):DSBR.U=%o\r\n", cpu.DSBR.U); cpu 114 src/dps8/doAppendCycleRTCDOperandFetch.h if (cpu.DSBR.U == 0) { cpu 115 src/dps8/doAppendCycleRTCDOperandFetch.h fetch_dsptw (cpup, cpu.TPR.TSR); cpu 117 src/dps8/doAppendCycleRTCDOperandFetch.h if (! cpu.PTW0.DF) cpu 118 src/dps8/doAppendCycleRTCDOperandFetch.h doFault (FAULT_DF0 + cpu.PTW0.FC, fst_zero, "doAppendCycleRTCDOperandFetch(A): PTW0.F == 0"); cpu 120 src/dps8/doAppendCycleRTCDOperandFetch.h if (! cpu.PTW0.U) cpu 121 src/dps8/doAppendCycleRTCDOperandFetch.h modify_dsptw (cpup, cpu.TPR.TSR); cpu 123 src/dps8/doAppendCycleRTCDOperandFetch.h fetch_psdw (cpup, cpu.TPR.TSR); cpu 125 src/dps8/doAppendCycleRTCDOperandFetch.h fetch_nsdw (cpup, cpu.TPR.TSR); // load SDW0 from descriptor segment table. cpu 127 src/dps8/doAppendCycleRTCDOperandFetch.h if (cpu.SDW0.DF == 0) { cpu 130 src/dps8/doAppendCycleRTCDOperandFetch.h doFault (FAULT_DF0 + cpu.SDW0.FC, fst_zero, "SDW0.F == 0"); cpu 133 src/dps8/doAppendCycleRTCDOperandFetch.h load_sdwam (cpup, cpu.TPR.TSR, nomatch); cpu 135 src/dps8/doAppendCycleRTCDOperandFetch.h DBGAPP ("doAppendCycleRTCDOperandFetch(A) R1 %o R2 %o R3 %o E %o\r\n", cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.SDW->E); cpu 138 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.RSDWH_R1 = cpu.SDW->R1; cpu 155 src/dps8/doAppendCycleRTCDOperandFetch.h if (! (cpu.SDW->R1 <= cpu.SDW->R2 && cpu.SDW->R2 <= cpu.SDW->R3)) { cpu 157 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.acvFaults |= ACV0; cpu 158 src/dps8/doAppendCycleRTCDOperandFetch.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 178 src/dps8/doAppendCycleRTCDOperandFetch.h if (cpu.TPR.TRR > cpu.SDW->R2) { cpu 182 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.acvFaults |= ACV3; cpu 183 src/dps8/doAppendCycleRTCDOperandFetch.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 187 src/dps8/doAppendCycleRTCDOperandFetch.h if (cpu.SDW->R == 0) { cpu 189 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.TPR.TRR = cpu.PPR.PRR; cpu 192 src/dps8/doAppendCycleRTCDOperandFetch.h if (cpu.PPR.PSR != cpu.TPR.TSR) { cpu 196 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.acvFaults |= ACV4; cpu 197 src/dps8/doAppendCycleRTCDOperandFetch.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 217 src/dps8/doAppendCycleRTCDOperandFetch.h if (((cpu.TPR.CA >> 4) & 037777) > cpu.SDW->BOUND) { cpu 220 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.acvFaults |= ACV15; cpu 221 src/dps8/doAppendCycleRTCDOperandFetch.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 224 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.TPR.CA, ((cpu.TPR.CA >> 4) & 037777), cpu.SDW->BOUND); cpu 227 src/dps8/doAppendCycleRTCDOperandFetch.h if (cpu.acvFaults) { cpu 229 src/dps8/doAppendCycleRTCDOperandFetch.h PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 231 src/dps8/doAppendCycleRTCDOperandFetch.h doFault (FAULT_ACV, (_fault_subtype) {.fault_acv_subtype=cpu.acvFaults}, "ACV fault"); cpu 235 src/dps8/doAppendCycleRTCDOperandFetch.h if (cpu.SDW->U) cpu 241 src/dps8/doAppendCycleRTCDOperandFetch.h DBGAPP ("doAppendCycleRTCDOperandFetch(G) CA %06o\r\n", cpu.TPR.CA); cpu 242 src/dps8/doAppendCycleRTCDOperandFetch.h if (nomatch || ! fetch_ptw_from_ptwam (cpup, cpu.SDW->POINTER, cpu.TPR.CA)) { cpu 243 src/dps8/doAppendCycleRTCDOperandFetch.h fetch_ptw (cpup, cpu.SDW, cpu.TPR.CA); cpu 244 src/dps8/doAppendCycleRTCDOperandFetch.h if (! cpu.PTW0.DF) { cpu 246 src/dps8/doAppendCycleRTCDOperandFetch.h doFault (FAULT_DF0 + cpu.PTW0.FC, (_fault_subtype) {.bits=0}, "PTW0.F == 0"); cpu 248 src/dps8/doAppendCycleRTCDOperandFetch.h loadPTWAM (cpup, cpu.SDW->POINTER, cpu.TPR.CA, nomatch); // load PTW0 to PTWAM cpu 258 src/dps8/doAppendCycleRTCDOperandFetch.h do_ptw2 (cpup, cpu.SDW, cpu.TPR.CA); cpu 271 src/dps8/doAppendCycleRTCDOperandFetch.h PNL (L68_ (cpu.apu.state |= apu_FANP;)) cpu 281 src/dps8/doAppendCycleRTCDOperandFetch.h DBGAPP ("doAppendCycleRTCDOperandFetch(H): SDW->ADDR=%08o CA=%06o\r\n", cpu.SDW->ADDR, cpu.TPR.CA); cpu 283 src/dps8/doAppendCycleRTCDOperandFetch.h if (get_addr_mode (cpup) == ABSOLUTE_mode && ! (cpu.cu.XSF || cpu.currentInstruction.b29)) { cpu 284 src/dps8/doAppendCycleRTCDOperandFetch.h finalAddress = cpu.TPR.CA; cpu 286 src/dps8/doAppendCycleRTCDOperandFetch.h finalAddress = (cpu.SDW->ADDR & 077777760) + cpu.TPR.CA; cpu 289 src/dps8/doAppendCycleRTCDOperandFetch.h PNL (cpu.APUMemAddr = finalAddress;) cpu 291 src/dps8/doAppendCycleRTCDOperandFetch.h DBGAPP ("doAppendCycleRTCDOperandFetch(H:FANP): (%05o:%06o) finalAddress=%08o\r\n", cpu.TPR.TSR, cpu.TPR.CA, finalAddress); cpu 303 src/dps8/doAppendCycleRTCDOperandFetch.h PNL (L68_ (cpu.apu.state |= apu_FAP;)) cpu 305 src/dps8/doAppendCycleRTCDOperandFetch.h word24 y2 = cpu.TPR.CA % 1024; cpu 309 src/dps8/doAppendCycleRTCDOperandFetch.h finalAddress = (((word24)cpu.PTW->ADDR & 0777760) << 6) + y2; cpu 311 src/dps8/doAppendCycleRTCDOperandFetch.h PNL (cpu.APUMemAddr = finalAddress;) cpu 314 src/dps8/doAppendCycleRTCDOperandFetch.h if (cpu.MR_cache.emr && cpu.MR_cache.ihr) cpu 318 src/dps8/doAppendCycleRTCDOperandFetch.h DBGAPP ("doAppendCycleRTCDOperandFetch(H:FAP): (%05o:%06o) finalAddress=%08o\r\n", cpu.TPR.TSR, cpu.TPR.CA, finalAddress); cpu 326 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.cu.XSF = 1; cpu 327 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.xsfScu = true; cpu 347 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.TPR.TSR = GET_ITS_SEGNO (data); cpu 352 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.PPR.PRR = cpu.TPR.TRR = max3 (y, cpu.TPR.TRR, cpu.RSDWH_R1); cpu 356 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.TPR.CA = GET_ITS_WORDNO (data); cpu 366 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.PPR.PSR = cpu.TPR.TSR; cpu 368 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.PPR.IC = cpu.TPR.CA; cpu 376 src/dps8/doAppendCycleRTCDOperandFetch.h if (cpu.TPR.TRR == 0) { cpu 378 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.PPR.P = cpu.SDW->P; cpu 381 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.PPR.P = 0; cpu 386 src/dps8/doAppendCycleRTCDOperandFetch.h PNL (cpu.APUDataBusOffset = cpu.TPR.CA;) cpu 387 src/dps8/doAppendCycleRTCDOperandFetch.h PNL (cpu.APUDataBusAddr = finalAddress;) cpu 389 src/dps8/doAppendCycleRTCDOperandFetch.h PNL (L68_ (cpu.apu.state |= apu_FA;)) cpu 392 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); cpu 394 src/dps8/doAppendCycleRTCDOperandFetch.h cpu.TPR.TRR, cpu.TPR.TSR, cpu.TPR.TBR, cpu.TPR.CA); cpu 118 src/dps8/dps8.h # define L68_(x) if (cpu.tweaks.l68_mode) { x } cpu 119 src/dps8/dps8.h # define DPS8M_(x) if (! cpu.tweaks.l68_mode) { x } cpu 123 src/dps8/dps8.h # define IF1 if (cpu.tweaks.isolts_mode) cpu 37 src/dps8/dps8_addrmods.c #define DBG_CTR cpu.cycleCnt cpu 47 src/dps8/dps8_addrmods.c cpu.ou.directOperandFlag = false; cpu 53 src/dps8/dps8_addrmods.c return cpu.rX [X (Tdes)]; cpu 64 src/dps8/dps8_addrmods.c return GETHI (cpu.rA); cpu 70 src/dps8/dps8_addrmods.c return GETHI (cpu.rQ); cpu 73 src/dps8/dps8_addrmods.c cpu.ou.directOperand = 0; cpu 74 src/dps8/dps8_addrmods.c SETHI (cpu.ou.directOperand, cpu.rY); cpu 75 src/dps8/dps8_addrmods.c cpu.ou.directOperandFlag = true; cpu 79 src/dps8/dps8_addrmods.c __func__, cpu.rY, cpu.ou.directOperand); cpu 84 src/dps8/dps8_addrmods.c return cpu.PPR.IC; cpu 90 src/dps8/dps8_addrmods.c return GETLO (cpu.rA); cpu 96 src/dps8/dps8_addrmods.c return GETLO (cpu.rQ); cpu 99 src/dps8/dps8_addrmods.c cpu.ou.directOperand = 0; cpu 100 src/dps8/dps8_addrmods.c SETLO (cpu.ou.directOperand, cpu.rY); cpu 101 src/dps8/dps8_addrmods.c cpu.ou.directOperandFlag = true; cpu 105 src/dps8/dps8_addrmods.c __func__, cpu.rY, cpu.ou.directOperand); cpu 114 src/dps8/dps8_addrmods.c DCDstruct * i = & cpu.currentInstruction; cpu 197 src/dps8/dps8_addrmods.c GET_ITP_PRNUM (cpu.itxPair), GET_ITP_WORDNO (cpu.itxPair), cpu 198 src/dps8/dps8_addrmods.c GET_ITP_BITNO (cpu.itxPair), GET_ITP_MOD (cpu.itxPair)); cpu 216 src/dps8/dps8_addrmods.c word3 n = GET_ITP_PRNUM (cpu.itxPair); cpu 221 src/dps8/dps8_addrmods.c cpu.TPR.TSR = cpu.PR[n].SNR; cpu 222 src/dps8/dps8_addrmods.c cpu.TPR.TRR = max3 (cpu.PR[n].RNR, cpu.RSDWH_R1, cpu.TPR.TRR); cpu 223 src/dps8/dps8_addrmods.c cpu.TPR.TBR = GET_ITP_BITNO (cpu.itxPair); cpu 224 src/dps8/dps8_addrmods.c cpu.TPR.CA = cpu.PAR[n].WORDNO + GET_ITP_WORDNO (cpu.itxPair); cpu 225 src/dps8/dps8_addrmods.c cpu.TPR.CA &= AMASK; cpu 226 src/dps8/dps8_addrmods.c cpu.rY = cpu.TPR.CA; cpu 228 src/dps8/dps8_addrmods.c cpu.rTAG = GET_ITP_MOD (cpu.itxPair); cpu 230 src/dps8/dps8_addrmods.c cpu.cu.itp = 1; cpu 231 src/dps8/dps8_addrmods.c cpu.cu.TSN_PRNO[0] = n; cpu 232 src/dps8/dps8_addrmods.c cpu.cu.TSN_VALID[0] = 1; cpu 241 src/dps8/dps8_addrmods.c GET_ITS_SEGNO (cpu.itxPair), GET_ITS_RN (cpu.itxPair), cpu 242 src/dps8/dps8_addrmods.c GET_ITS_WORDNO (cpu.itxPair), GET_ITS_BITNO (cpu.itxPair), cpu 243 src/dps8/dps8_addrmods.c GET_ITS_MOD (cpu.itxPair)); cpu 257 src/dps8/dps8_addrmods.c cpu.TPR.TSR = GET_ITS_SEGNO (cpu.itxPair); cpu 261 src/dps8/dps8_addrmods.c GET_ITS_RN (cpu.itxPair), cpu.RSDWH_R1, cpu.TPR.TRR, cpu 262 src/dps8/dps8_addrmods.c max3 (GET_ITS_RN (cpu.itxPair), cpu.RSDWH_R1, cpu.TPR.TRR)); cpu 264 src/dps8/dps8_addrmods.c cpu.TPR.TRR = max3 (GET_ITS_RN (cpu.itxPair), cpu.RSDWH_R1, cpu.TPR.TRR); cpu 265 src/dps8/dps8_addrmods.c cpu.TPR.TBR = GET_ITS_BITNO (cpu.itxPair); cpu 266 src/dps8/dps8_addrmods.c cpu.TPR.CA = GET_ITS_WORDNO (cpu.itxPair); cpu 267 src/dps8/dps8_addrmods.c cpu.TPR.CA &= AMASK; cpu 269 src/dps8/dps8_addrmods.c cpu.rY = cpu.TPR.CA; cpu 271 src/dps8/dps8_addrmods.c cpu.rTAG = GET_ITS_MOD (cpu.itxPair); cpu 273 src/dps8/dps8_addrmods.c cpu.cu.its = 1; cpu 281 src/dps8/dps8_addrmods.c word6 ind_tag = GET_TAG (cpu.itxPair [0]); cpu 285 src/dps8/dps8_addrmods.c cpu.itxPair[0], cpu.itxPair[1]); cpu 314 src/dps8/dps8_addrmods.c cpu.cu.XSF = 1; cpu 315 src/dps8/dps8_addrmods.c cpu.xsfScu = true; cpu 323 src/dps8/dps8_addrmods.c wb = & cpu.cu.IRODD; cpu 325 src/dps8/dps8_addrmods.c wb = & cpu.cu.IWB; cpu 340 src/dps8/dps8_addrmods.c decode_instruction (cpup, IWB_IRODD, & cpu.currentInstruction); cpu 360 src/dps8/dps8_addrmods.c if (cpu.currentInstruction.b29 == 0) cpu 362 src/dps8/dps8_addrmods.c cpu.TPR.CA = GET_ADDR (IWB_IRODD); cpu 371 src/dps8/dps8_addrmods.c cpu.TPR.CA = (cpu.PAR[n].WORDNO + SIGNEXT15_18 (offset)) cpu 377 src/dps8/dps8_addrmods.c __func__, op_desc_str (cpup, buf), cpu.TPR.CA); cpu 380 src/dps8/dps8_addrmods.c __func__, cpu.cu.CT_HOLD); cpu 382 src/dps8/dps8_addrmods.c DCDstruct * i = & cpu.currentInstruction; cpu 389 src/dps8/dps8_addrmods.c cpu.ou.directOperandFlag = false; cpu 392 src/dps8/dps8_addrmods.c cpu.rTAG = 0; cpu 394 src/dps8/dps8_addrmods.c cpu.rTAG = GET_TAG (IWB_IRODD); cpu 406 src/dps8/dps8_addrmods.c Td = GET_TD (cpu.rTAG); cpu 407 src/dps8/dps8_addrmods.c Tm = GET_TM (cpu.rTAG); cpu 412 src/dps8/dps8_addrmods.c if (cpu.cu.CT_HOLD) cpu 416 src/dps8/dps8_addrmods.c __func__, cpu.cu.CT_HOLD); cpu 418 src/dps8/dps8_addrmods.c if ((cpu.tweaks.isolts_mode || cpu.tweaks.tandd_mode) && cpu 419 src/dps8/dps8_addrmods.c GET_TM(cpu.cu.CT_HOLD) == TM_IT && GET_TD (cpu.cu.CT_HOLD) == IT_DIC && cpu 420 src/dps8/dps8_addrmods.c cpu.cu.pot == 1 && GET_ADDR (IWB_IRODD) == cpu.TPR.CA) cpu 422 src/dps8/dps8_addrmods.c cpu.TPR.CA--; cpu 427 src/dps8/dps8_addrmods.c cpu.cu.pot = 1; cpu 433 src/dps8/dps8_addrmods.c cpu.cu.its = 0; cpu 434 src/dps8/dps8_addrmods.c cpu.cu.itp = 0; cpu 435 src/dps8/dps8_addrmods.c cpu.cu.pot = 0; cpu 439 src/dps8/dps8_addrmods.c __func__, cpu.rTAG, get_mod_string (buf, cpu.rTAG), Tm, Td, cpu.cu.CT_HOLD); cpu 456 src/dps8/dps8_addrmods.c __func__, GET_TM (cpu.rTAG)); cpu 473 src/dps8/dps8_addrmods.c if (cpu.ou.directOperandFlag) cpu 477 src/dps8/dps8_addrmods.c cpu.ou.directOperand); cpu 483 src/dps8/dps8_addrmods.c if (cpu.cu.rpt || cpu.cu.rd | cpu.cu.rl) cpu 485 src/dps8/dps8_addrmods.c if (cpu.currentInstruction.b29) cpu 492 src/dps8/dps8_addrmods.c cpu.TPR.CA = Cr + cpu.PR [PRn].WORDNO; cpu 493 src/dps8/dps8_addrmods.c cpu.TPR.CA &= AMASK; cpu 497 src/dps8/dps8_addrmods.c cpu.TPR.CA = Cr; cpu 502 src/dps8/dps8_addrmods.c cpu.TPR.CA += Cr; cpu 503 src/dps8/dps8_addrmods.c cpu.TPR.CA &= MASK18; // keep to 18-bits cpu 506 src/dps8/dps8_addrmods.c cpu.TPR.CA); cpu 528 src/dps8/dps8_addrmods.c "RI_MOD: Cr=%06o CA(Before)=%06o\r\n", Cr, cpu.TPR.CA); cpu 530 src/dps8/dps8_addrmods.c if (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl) cpu 532 src/dps8/dps8_addrmods.c if (cpu.currentInstruction.b29) cpu 539 src/dps8/dps8_addrmods.c cpu.TPR.CA = Cr + cpu.PR [PRn].WORDNO; cpu 543 src/dps8/dps8_addrmods.c cpu.TPR.CA = Cr; cpu 545 src/dps8/dps8_addrmods.c cpu.TPR.CA &= AMASK; cpu 549 src/dps8/dps8_addrmods.c cpu.TPR.CA += Cr; cpu 550 src/dps8/dps8_addrmods.c cpu.TPR.CA &= MASK18; // keep to 18-bits cpu 553 src/dps8/dps8_addrmods.c "RI_MOD: CA(After)=%06o\r\n", cpu.TPR.CA); cpu 559 src/dps8/dps8_addrmods.c if (GET_TM(cpu.cu.CT_HOLD) == TM_IR) cpu 567 src/dps8/dps8_addrmods.c word18 saveCA = cpu.TPR.CA; cpu 570 src/dps8/dps8_addrmods.c if ((saveCA & 1) == 0 && (ISITP (cpu.itxPair[0]) || ISITS (cpu.itxPair[0]))) cpu 573 src/dps8/dps8_addrmods.c updateIWB (cpup, cpu.TPR.CA, cpu.rTAG); cpu 577 src/dps8/dps8_addrmods.c cpu.rTAG = GET_TAG (cpu.itxPair[0]); cpu 578 src/dps8/dps8_addrmods.c if (ISITP (cpu.itxPair[0]) || ISITS (cpu.itxPair[0])) cpu 585 src/dps8/dps8_addrmods.c if (!(cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl)) cpu 587 src/dps8/dps8_addrmods.c updateIWB (cpup, GET_ADDR (cpu.itxPair[0]), cpu.rTAG); cpu 590 src/dps8/dps8_addrmods.c if (GET_TM (cpu.rTAG) == TM_IT) cpu 592 src/dps8/dps8_addrmods.c if (GET_TD (cpu.rTAG) == IT_F2) cpu 596 src/dps8/dps8_addrmods.c if (GET_TD (cpu.rTAG) == IT_F3) cpu 601 src/dps8/dps8_addrmods.c cpu.TPR.CA = GETHI (cpu.itxPair[0]); cpu 602 src/dps8/dps8_addrmods.c cpu.rY = cpu.TPR.CA; cpu 614 src/dps8/dps8_addrmods.c cpu.itxPair[0], cpu.TPR.CA, cpu.rTAG); cpu 618 src/dps8/dps8_addrmods.c if (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl) cpu 630 src/dps8/dps8_addrmods.c "IR_MOD: CT_HOLD=%o %o\r\n", cpu.cu.CT_HOLD, Td); cpu 641 src/dps8/dps8_addrmods.c cpu.TPR.CA); cpu 643 src/dps8/dps8_addrmods.c word18 saveCA = cpu.TPR.CA; cpu 647 src/dps8/dps8_addrmods.c if (GET_TM(cpu.rTAG) == TM_IR) cpu 648 src/dps8/dps8_addrmods.c cpu.cu.CT_HOLD = cpu.rTAG; cpu 650 src/dps8/dps8_addrmods.c if ((saveCA & 1) == 0 && (ISITP (cpu.itxPair[0]) || ISITS (cpu.itxPair[0]))) cpu 656 src/dps8/dps8_addrmods.c if (ISITP (cpu.itxPair[0]) || ISITS (cpu.itxPair[0])) cpu 663 src/dps8/dps8_addrmods.c cpu.TPR.CA = GETHI (cpu.itxPair[0]); cpu 664 src/dps8/dps8_addrmods.c cpu.rY = cpu.TPR.CA; cpu 665 src/dps8/dps8_addrmods.c cpu.rTAG = GET_TAG (cpu.itxPair[0]); cpu 669 src/dps8/dps8_addrmods.c "IR_MOD: CT_HOLD=%o\r\n", cpu.cu.CT_HOLD); cpu 670 src/dps8/dps8_addrmods.c Td = GET_TD (cpu.rTAG); cpu 671 src/dps8/dps8_addrmods.c Tm = GET_TM (cpu.rTAG); cpu 676 src/dps8/dps8_addrmods.c cpu.itxPair[0], cpu.TPR.CA, Tm, Td, cpu 677 src/dps8/dps8_addrmods.c get_mod_string (buf, GET_TAG (cpu.itxPair[0]))); cpu 685 src/dps8/dps8_addrmods.c Td, cpu.cu.CT_HOLD); cpu 689 src/dps8/dps8_addrmods.c updateIWB(cpup, cpu.TPR.CA, cpu.rTAG); cpu 694 src/dps8/dps8_addrmods.c cpu.TPR.CA = saveCA; cpu 699 src/dps8/dps8_addrmods.c cpu.TPR.CA = saveCA; cpu 719 src/dps8/dps8_addrmods.c word6 Td_hold = GET_TD (cpu.cu.CT_HOLD); cpu 720 src/dps8/dps8_addrmods.c cpu.rTAG = (TM_R | Td_hold); cpu 721 src/dps8/dps8_addrmods.c updateIWB (cpup, cpu.TPR.CA, cpu.rTAG); cpu 735 src/dps8/dps8_addrmods.c Td, Cr, cpu.TPR.CA); cpu 737 src/dps8/dps8_addrmods.c cpu.TPR.CA += Cr; cpu 738 src/dps8/dps8_addrmods.c cpu.TPR.CA &= MASK18; // keep to 18-bits cpu 741 src/dps8/dps8_addrmods.c "IR_MOD(TM_RI): TPR.CA=%06o\r\n", cpu.TPR.CA); cpu 745 src/dps8/dps8_addrmods.c cpu.TPR.CA); cpu 748 src/dps8/dps8_addrmods.c updateIWB (cpup, cpu.TPR.CA, (TM_RI|TD_N)); cpu 754 src/dps8/dps8_addrmods.c updateIWB (cpup, cpu.TPR.CA, cpu.rTAG); // XXX guessing here... cpu 760 src/dps8/dps8_addrmods.c __func__, GET_TM (cpu.rTAG)); cpu 833 src/dps8/dps8_addrmods.c cpu.TPR.CA); cpu 840 src/dps8/dps8_addrmods.c word18 indaddr = cpu.TPR.CA; cpu 843 src/dps8/dps8_addrmods.c word24 phys_address = cpu.iefpFinalAddress; cpu 874 src/dps8/dps8_addrmods.c cpu.TPR.CA = Yi; cpu 875 src/dps8/dps8_addrmods.c cpu.ou.character_address = Yi; cpu 876 src/dps8/dps8_addrmods.c cpu.ou.characterOperandSize = sz; cpu 877 src/dps8/dps8_addrmods.c cpu.ou.characterOperandOffset = os; cpu 922 src/dps8/dps8_addrmods.c cpu.TPR.CA = Yi; cpu 923 src/dps8/dps8_addrmods.c cpu.ou.character_address = Yi; cpu 924 src/dps8/dps8_addrmods.c cpu.ou.characterOperandSize = sz; cpu 925 src/dps8/dps8_addrmods.c cpu.ou.characterOperandOffset = os; cpu 941 src/dps8/dps8_addrmods.c cpu.cu.pot = 1; cpu 945 src/dps8/dps8_addrmods.c Read (cpu.TPR.CA, & cpu.ou.character_data, (i->info->flags & RMW) == \ cpu 948 src/dps8/dps8_addrmods.c ReadOperandRead (cpup, cpu.TPR.CA, & cpu.ou.character_data); cpu 951 src/dps8/dps8_addrmods.c cpu.char_word_address = cpu.iefpFinalAddress; cpu 956 src/dps8/dps8_addrmods.c cpu.ou.character_data); cpu 958 src/dps8/dps8_addrmods.c cpu.cu.pot = 0; cpu 1020 src/dps8/dps8_addrmods.c indword, cpu.TPR.CA); cpu 1025 src/dps8/dps8_addrmods.c cpu.TPR.CA = cpu.ou.character_address; cpu 1033 src/dps8/dps8_addrmods.c cpu.TPR.CA); cpu 1040 src/dps8/dps8_addrmods.c cpu.itxPair[0]); cpu 1042 src/dps8/dps8_addrmods.c cpu.TPR.CA = GET_ADDR (cpu.itxPair[0]); cpu 1043 src/dps8/dps8_addrmods.c updateIWB (cpup, cpu.TPR.CA, (TM_R|TD_N)); cpu 1061 src/dps8/dps8_addrmods.c cpu.TPR.CA); cpu 1067 src/dps8/dps8_addrmods.c word18 saveCA = cpu.TPR.CA; cpu 1069 src/dps8/dps8_addrmods.c ReadAPUDataRMW (cpup, cpu.TPR.CA, & indword); cpu 1071 src/dps8/dps8_addrmods.c cpu.AM_tally = GET_TALLY (indword); // 12-bits cpu 1081 src/dps8/dps8_addrmods.c Yi, cpu.AM_tally, delta); cpu 1083 src/dps8/dps8_addrmods.c cpu.TPR.CA = Yi; cpu 1084 src/dps8/dps8_addrmods.c word18 computedAddress = cpu.TPR.CA; cpu 1089 src/dps8/dps8_addrmods.c cpu.AM_tally -= 1; cpu 1090 src/dps8/dps8_addrmods.c cpu.AM_tally &= 07777; // keep to 12-bits cpu 1094 src/dps8/dps8_addrmods.c SC_I_TALLY (cpu.AM_tally == 0); cpu 1096 src/dps8/dps8_addrmods.c (((word36) cpu.AM_tally & 07777) << 6) | cpu 1099 src/dps8/dps8_addrmods.c core_write_unlock(cpup, cpu.iefpFinalAddress, indword, __func__); cpu 1113 src/dps8/dps8_addrmods.c cpu.TPR.CA = computedAddress; cpu 1114 src/dps8/dps8_addrmods.c updateIWB (cpup, cpu.TPR.CA, (TM_R|TD_N)); cpu 1134 src/dps8/dps8_addrmods.c word18 saveCA = cpu.TPR.CA; cpu 1136 src/dps8/dps8_addrmods.c ReadAPUDataRMW (cpup, cpu.TPR.CA, & indword); cpu 1140 src/dps8/dps8_addrmods.c cpu.TPR.CA); cpu 1141 src/dps8/dps8_addrmods.c cpu.AM_tally = GET_TALLY (indword); // 12-bits cpu 1151 src/dps8/dps8_addrmods.c Yi, cpu.AM_tally, delta); cpu 1155 src/dps8/dps8_addrmods.c cpu.TPR.CA = Yi; cpu 1157 src/dps8/dps8_addrmods.c cpu.AM_tally += 1; cpu 1158 src/dps8/dps8_addrmods.c cpu.AM_tally &= 07777; // keep to 12-bits cpu 1159 src/dps8/dps8_addrmods.c if (cpu.AM_tally == 0) cpu 1164 src/dps8/dps8_addrmods.c (((word36) cpu.AM_tally & 07777) << 6) | cpu 1167 src/dps8/dps8_addrmods.c core_write_unlock(cpup, cpu.iefpFinalAddress, indword, __func__); cpu 1181 src/dps8/dps8_addrmods.c cpu.TPR.CA = Yi; cpu 1182 src/dps8/dps8_addrmods.c updateIWB (cpup, cpu.TPR.CA, (TM_R|TD_N)); cpu 1199 src/dps8/dps8_addrmods.c cpu.TPR.CA); cpu 1205 src/dps8/dps8_addrmods.c word18 saveCA = cpu.TPR.CA; cpu 1207 src/dps8/dps8_addrmods.c ReadAPUDataRMW (cpup, cpu.TPR.CA, & indword); cpu 1210 src/dps8/dps8_addrmods.c cpu.AM_tally = GET_TALLY (indword); // 12-bits cpu 1218 src/dps8/dps8_addrmods.c Yi, cpu.AM_tally); cpu 1222 src/dps8/dps8_addrmods.c cpu.TPR.CA = Yi; cpu 1224 src/dps8/dps8_addrmods.c cpu.AM_tally += 1; cpu 1225 src/dps8/dps8_addrmods.c cpu.AM_tally &= 07777; // keep to 12-bits cpu 1226 src/dps8/dps8_addrmods.c SC_I_TALLY (cpu.AM_tally == 0); cpu 1230 src/dps8/dps8_addrmods.c indword = (word36) (((word36) cpu.TPR.CA << 18) | cpu 1231 src/dps8/dps8_addrmods.c ((word36) cpu.AM_tally << 6) | cpu 1240 src/dps8/dps8_addrmods.c core_write_unlock(cpup, cpu.iefpFinalAddress, indword, __func__); cpu 1248 src/dps8/dps8_addrmods.c cpu.TPR.CA = Yi; cpu 1249 src/dps8/dps8_addrmods.c updateIWB (cpup, cpu.TPR.CA, (TM_R|TD_N)); cpu 1264 src/dps8/dps8_addrmods.c word18 saveCA = cpu.TPR.CA; cpu 1268 src/dps8/dps8_addrmods.c cpu.TPR.CA); cpu 1275 src/dps8/dps8_addrmods.c ReadAPUDataRMW (cpup, cpu.TPR.CA, & indword); cpu 1278 src/dps8/dps8_addrmods.c cpu.AM_tally = GET_TALLY (indword); // 12-bits cpu 1284 src/dps8/dps8_addrmods.c indword, Yi, cpu.AM_tally); cpu 1286 src/dps8/dps8_addrmods.c cpu.TPR.CA = Yi; cpu 1287 src/dps8/dps8_addrmods.c word18 computedAddress = cpu.TPR.CA; cpu 1292 src/dps8/dps8_addrmods.c cpu.AM_tally -= 1; cpu 1293 src/dps8/dps8_addrmods.c cpu.AM_tally &= 07777; // keep to 12-bits cpu 1298 src/dps8/dps8_addrmods.c SC_I_TALLY (cpu.AM_tally == 0); cpu 1302 src/dps8/dps8_addrmods.c ((word36) cpu.AM_tally << 6) | cpu 1311 src/dps8/dps8_addrmods.c core_write_unlock(cpup, cpu.iefpFinalAddress, indword, __func__); cpu 1320 src/dps8/dps8_addrmods.c cpu.TPR.CA = computedAddress; cpu 1321 src/dps8/dps8_addrmods.c updateIWB (cpup, cpu.TPR.CA, (TM_R|TD_N)); cpu 1350 src/dps8/dps8_addrmods.c cpu.TPR.CA); cpu 1356 src/dps8/dps8_addrmods.c word18 saveCA = cpu.TPR.CA; cpu 1358 src/dps8/dps8_addrmods.c ReadAPUDataRMW (cpup, cpu.TPR.CA, & indword); cpu 1360 src/dps8/dps8_addrmods.c cpu.cu.pot = 0; cpu 1363 src/dps8/dps8_addrmods.c cpu.AM_tally = GET_TALLY (indword); // 12-bits cpu 1369 src/dps8/dps8_addrmods.c indword, Yi, cpu.AM_tally, idwtag); cpu 1376 src/dps8/dps8_addrmods.c cpu.AM_tally += 1; cpu 1377 src/dps8/dps8_addrmods.c cpu.AM_tally &= 07777; // keep to 12-bits cpu 1386 src/dps8/dps8_addrmods.c ((word36) cpu.AM_tally << 6) | idwtag); cpu 1393 src/dps8/dps8_addrmods.c core_write_unlock(cpup, cpu.iefpFinalAddress, indword, __func__); cpu 1409 src/dps8/dps8_addrmods.c cpu.TPR.CA = Yi; cpu 1413 src/dps8/dps8_addrmods.c cpu.rTAG, idwtag); cpu 1414 src/dps8/dps8_addrmods.c cpu.cu.CT_HOLD = cpu.rTAG; cpu 1415 src/dps8/dps8_addrmods.c cpu.rTAG = idwtag; cpu 1417 src/dps8/dps8_addrmods.c Tm = GET_TM (cpu.rTAG); cpu 1420 src/dps8/dps8_addrmods.c if (GET_TD (cpu.rTAG) != 0) cpu 1429 src/dps8/dps8_addrmods.c SC_I_TALLY (cpu.AM_tally == 0); cpu 1430 src/dps8/dps8_addrmods.c if (cpu.tweaks.isolts_mode || cpu.tweaks.tandd_mode) cpu 1431 src/dps8/dps8_addrmods.c updateIWB (cpup, YiSafe2, cpu.rTAG); cpu 1433 src/dps8/dps8_addrmods.c updateIWB (cpup, cpu.TPR.CA, cpu.rTAG); cpu 1462 src/dps8/dps8_addrmods.c cpu.TPR.CA); cpu 1468 src/dps8/dps8_addrmods.c word18 saveCA = cpu.TPR.CA; cpu 1470 src/dps8/dps8_addrmods.c ReadAPUDataRMW (cpup, cpu.TPR.CA, & indword); cpu 1472 src/dps8/dps8_addrmods.c cpu.cu.pot = 0; cpu 1475 src/dps8/dps8_addrmods.c cpu.AM_tally = GET_TALLY (indword); // 12-bits cpu 1481 src/dps8/dps8_addrmods.c indword, Yi, cpu.AM_tally, idwtag); cpu 1488 src/dps8/dps8_addrmods.c cpu.AM_tally -= 1; cpu 1489 src/dps8/dps8_addrmods.c cpu.AM_tally &= 07777; // keep to 12-bits cpu 1496 src/dps8/dps8_addrmods.c ((word36) cpu.AM_tally << 6) | cpu 1505 src/dps8/dps8_addrmods.c core_write_unlock(cpup, cpu.iefpFinalAddress, indword, __func__); cpu 1523 src/dps8/dps8_addrmods.c cpu.TPR.CA = YiSafe; cpu 1527 src/dps8/dps8_addrmods.c cpu.rTAG, idwtag); cpu 1528 src/dps8/dps8_addrmods.c cpu.cu.CT_HOLD = cpu.rTAG; cpu 1529 src/dps8/dps8_addrmods.c cpu.rTAG = idwtag; cpu 1531 src/dps8/dps8_addrmods.c Tm = GET_TM (cpu.rTAG); cpu 1534 src/dps8/dps8_addrmods.c if (GET_TD (cpu.rTAG) != 0) cpu 1543 src/dps8/dps8_addrmods.c SC_I_TALLY (cpu.AM_tally == 0); cpu 1544 src/dps8/dps8_addrmods.c updateIWB (cpup, cpu.TPR.CA, cpu.rTAG); cpu 1562 src/dps8/dps8_addrmods.c if (UNLIKELY (cpu.MR.emr && cpu.MR.ADR_TRAP && cpu 1563 src/dps8/dps8_addrmods.c cpu.TPR.CA == cpu.switches.addr_switches)) cpu 1568 src/dps8/dps8_addrmods.c cpu.adr_trap_lock = true; cpu 45 src/dps8/dps8_append.c #define DBG_CTR cpu.cycleCnt cpu 52 src/dps8/dps8_append.c # define DBG_CTR cpu.cycleCnt cpu 62 src/dps8/dps8_append.c cpu 63 src/dps8/dps8_append.c cpu 65 src/dps8/dps8_append.c cpu 66 src/dps8/dps8_append.c cpu 67 src/dps8/dps8_append.c cpu 68 src/dps8/dps8_append.c cpu 69 src/dps8/dps8_append.c cpu 70 src/dps8/dps8_append.c cpu 71 src/dps8/dps8_append.c cpu 72 src/dps8/dps8_append.c cpu 73 src/dps8/dps8_append.c cpu 77 src/dps8/dps8_append.c cpu 83 src/dps8/dps8_append.c cpu 86 src/dps8/dps8_append.c cpu 89 src/dps8/dps8_append.c cpu 95 src/dps8/dps8_append.c cpu 98 src/dps8/dps8_append.c cpu 101 src/dps8/dps8_append.c cpu 104 src/dps8/dps8_append.c cpu 107 src/dps8/dps8_append.c cpu 147 src/dps8/dps8_append.c ptw_s * p = cpu.PTWAM + i; cpu 171 src/dps8/dps8_append.c if (cpu.tweaks.enable_wam) cpu 173 src/dps8/dps8_append.c if (cpu.cu.SD_ON) cpu 180 src/dps8/dps8_append.c cpu.SDWAM[i].FE = 0; cpu 181 src/dps8/dps8_append.c L68_ (cpu.SDWAM[i].USE = (word4) i;) cpu 182 src/dps8/dps8_append.c DPS8M_ (cpu.SDWAM[i].USE = 0;) cpu 186 src/dps8/dps8_append.c if (cpu.cu.PT_ON) cpu 193 src/dps8/dps8_append.c cpu.PTWAM[i].FE = 0; cpu 194 src/dps8/dps8_append.c L68_ (cpu.PTWAM[i].USE = (word4) i;) cpu 195 src/dps8/dps8_append.c DPS8M_ (cpu.PTWAM[i].USE = 0;) cpu 204 src/dps8/dps8_append.c cpu.SDW0.FE = 0; cpu 205 src/dps8/dps8_append.c cpu.SDW0.USE = 0; cpu 206 src/dps8/dps8_append.c cpu.PTW0.FE = 0; cpu 207 src/dps8/dps8_append.c cpu.PTW0.USE = 0; cpu 214 src/dps8/dps8_append.c cpu.DSBR.ADDR = (Ypair[0] >> (35 - 23)) & PAMASK; cpu 217 src/dps8/dps8_append.c cpu.DSBR.BND = (Ypair[1] >> (71 - 50)) & 037777; cpu 220 src/dps8/dps8_append.c cpu.DSBR.U = (Ypair[1] >> (71 - 55)) & 01; cpu 223 src/dps8/dps8_append.c cpu.DSBR.STACK = (Ypair[1] >> (71 - 71)) & 07777; cpu 226 src/dps8/dps8_append.c cpu.DSBR.ADDR, cpu.DSBR.BND, cpu.DSBR.U, cpu.DSBR.STACK); cpu 238 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FDPT;)) cpu 240 src/dps8/dps8_append.c if (2 * segno >= 16 * (cpu.DSBR.BND + 1)) cpu 244 src/dps8/dps8_append.c PNL (cpu.acvFaults |= ACV15;) cpu 245 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 254 src/dps8/dps8_append.c PNL (cpu.lastPTWOffset = segno;) cpu 255 src/dps8/dps8_append.c PNL (cpu.lastPTWIsDS = true;) cpu 258 src/dps8/dps8_append.c core_read (cpup, (cpu.DSBR.ADDR + x1) & PAMASK, & PTWx1, __func__); cpu 260 src/dps8/dps8_append.c cpu.PTW0.ADDR = GETHI (PTWx1); cpu 261 src/dps8/dps8_append.c cpu.PTW0.U = TSTBIT (PTWx1, 9); cpu 262 src/dps8/dps8_append.c cpu.PTW0.M = TSTBIT (PTWx1, 6); cpu 263 src/dps8/dps8_append.c cpu.PTW0.DF = TSTBIT (PTWx1, 2); cpu 264 src/dps8/dps8_append.c cpu.PTW0.FC = PTWx1 & 3; cpu 266 src/dps8/dps8_append.c L68_ (if (cpu.MR_cache.emr && cpu.MR_cache.ihr) cpu 271 src/dps8/dps8_append.c __func__, x1, cpu.DSBR.ADDR, PTWx1, cpu.PTW0.ADDR, cpu.PTW0.U, cpu 272 src/dps8/dps8_append.c cpu.PTW0.M, cpu.PTW0.DF, cpu.PTW0.FC); cpu 283 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_MDPT;)) cpu 297 src/dps8/dps8_append.c core_read_lock (cpup, (cpu.DSBR.ADDR + x1) & PAMASK, & PTWx1, __func__); cpu 299 src/dps8/dps8_append.c core_write_unlock (cpup, (cpu.DSBR.ADDR + x1) & PAMASK, PTWx1, __func__); cpu 301 src/dps8/dps8_append.c core_read (cpup, (cpu.DSBR.ADDR + x1) & PAMASK, & PTWx1, __func__); cpu 303 src/dps8/dps8_append.c core_write (cpup, (cpu.DSBR.ADDR + x1) & PAMASK, PTWx1, __func__); cpu 311 src/dps8/dps8_append.c cpu.PTW0.U = 1; cpu 312 src/dps8/dps8_append.c L68_ (if (cpu.MR_cache.emr && cpu.MR_cache.ihr) cpu 345 src/dps8/dps8_append.c cpu.cu.SDWAMM = 0; cpu 346 src/dps8/dps8_append.c cpu.cu.PTWAMM = 0; cpu 348 src/dps8/dps8_append.c if ((! cpu.tweaks.enable_wam || ! cpu.cu.SD_ON)) { cpu 353 src/dps8/dps8_append.c if (cpu.tweaks.l68_mode) { // L68 cpu 357 src/dps8/dps8_append.c if (cpu.SDWAM[_n].FE && segno == cpu.SDWAM[_n].POINTER) { cpu 360 src/dps8/dps8_append.c cpu.cu.SDWAMM = 1; cpu 361 src/dps8/dps8_append.c cpu.SDWAMR = (word4) _n; cpu 362 src/dps8/dps8_append.c cpu.SDW = & cpu.SDWAM[_n]; cpu 371 src/dps8/dps8_append.c if (cpu.SDWAM[_h].USE > cpu.SDW->USE) cpu 372 src/dps8/dps8_append.c cpu.SDWAM[_h].USE -= 1; cpu 374 src/dps8/dps8_append.c cpu.SDW->USE = N_L68_WAM_ENTRIES - 1; cpu 379 src/dps8/dps8_append.c DBGAPP ("%s(2):SDWAM[%d]=%s\r\n", __func__, _n, str_sdw (buf, cpu.SDW)); cpu 381 src/dps8/dps8_append.c return cpu.SDW; cpu 386 src/dps8/dps8_append.c if (! cpu.tweaks.l68_mode) { // DPS8M cpu 391 src/dps8/dps8_append.c p = & cpu.SDWAM[toffset + setno]; cpu 395 src/dps8/dps8_append.c cpu.cu.SDWAMM = 1; cpu 396 src/dps8/dps8_append.c cpu.SDWAMR = (word6) (toffset + setno); cpu 397 src/dps8/dps8_append.c cpu.SDW = p; // export pointer for appending cpu 401 src/dps8/dps8_append.c p = & cpu.SDWAM[toffset + setno]; cpu 408 src/dps8/dps8_append.c DBGAPP ("%s(2):SDWAM[%d]=%s\r\n", __func__, toffset + setno, str_sdw (buf, cpu.SDW)); cpu 410 src/dps8/dps8_append.c return cpu.SDW; cpu 417 src/dps8/dps8_append.c cpu.cu.SDWAMM = 0; cpu 431 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FSDP;)) cpu 433 src/dps8/dps8_append.c cpu.cu.SDWAMM = 0; cpu 434 src/dps8/dps8_append.c cpu.cu.PTWAMM = 0; cpu 440 src/dps8/dps8_append.c core_read2 (cpup, ((((word24) cpu.PTW0.ADDR & 0777760) << 6) + y1) & PAMASK, cpu 444 src/dps8/dps8_append.c cpu.SDW0.ADDR = (SDWeven >> 12) & 077777777; cpu 445 src/dps8/dps8_append.c cpu.SDW0.R1 = (SDWeven >> 9) & 7; cpu 446 src/dps8/dps8_append.c cpu.SDW0.R2 = (SDWeven >> 6) & 7; cpu 447 src/dps8/dps8_append.c cpu.SDW0.R3 = (SDWeven >> 3) & 7; cpu 448 src/dps8/dps8_append.c cpu.SDW0.DF = TSTBIT (SDWeven, 2); cpu 449 src/dps8/dps8_append.c cpu.SDW0.FC = SDWeven & 3; cpu 452 src/dps8/dps8_append.c cpu.SDW0.BOUND = (SDWodd >> 21) & 037777; cpu 453 src/dps8/dps8_append.c cpu.SDW0.R = TSTBIT (SDWodd, 20); cpu 454 src/dps8/dps8_append.c cpu.SDW0.E = TSTBIT (SDWodd, 19); cpu 455 src/dps8/dps8_append.c cpu.SDW0.W = TSTBIT (SDWodd, 18); cpu 456 src/dps8/dps8_append.c cpu.SDW0.P = TSTBIT (SDWodd, 17); cpu 457 src/dps8/dps8_append.c cpu.SDW0.U = TSTBIT (SDWodd, 16); cpu 458 src/dps8/dps8_append.c cpu.SDW0.G = TSTBIT (SDWodd, 15); cpu 459 src/dps8/dps8_append.c cpu.SDW0.C = TSTBIT (SDWodd, 14); cpu 460 src/dps8/dps8_append.c cpu.SDW0.EB = SDWodd & 037777; cpu 463 src/dps8/dps8_append.c if (cpu.MR_cache.emr && cpu.MR_cache.ihr) cpu 469 src/dps8/dps8_append.c __func__, y1, cpu.PTW0.ADDR, SDWeven, SDWodd, cpu.SDW0.ADDR, cpu 470 src/dps8/dps8_append.c cpu.SDW0.R1, cpu.SDW0.R2, cpu.SDW0.R3, cpu.SDW0.BOUND, cpu 471 src/dps8/dps8_append.c cpu.SDW0.R, cpu.SDW0.E, cpu.SDW0.W, cpu.SDW0.P, cpu.SDW0.U, cpu 472 src/dps8/dps8_append.c cpu.SDW0.G, cpu.SDW0.C, cpu.SDW0.DF, cpu.SDW0.FC, cpu.SDW0.FE, cpu 473 src/dps8/dps8_append.c cpu.SDW0.USE); cpu 484 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FSDN;)) cpu 486 src/dps8/dps8_append.c cpu.cu.SDWAMM = 0; cpu 487 src/dps8/dps8_append.c cpu.cu.PTWAMM = 0; cpu 490 src/dps8/dps8_append.c if (2 * segno >= 16 * (cpu.DSBR.BND + 1)) cpu 494 src/dps8/dps8_append.c __func__, segno, cpu.DSBR.BND); cpu 496 src/dps8/dps8_append.c PNL (cpu.acvFaults |= ACV15;) cpu 497 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 502 src/dps8/dps8_append.c __func__, cpu.DSBR.ADDR + 2u * segno); cpu 505 src/dps8/dps8_append.c core_read2 (cpup, (cpu.DSBR.ADDR + 2u * segno) & PAMASK, cpu 509 src/dps8/dps8_append.c cpu.SDW0.ADDR = (SDWeven >> 12) & 077777777; cpu 510 src/dps8/dps8_append.c cpu.SDW0.R1 = (SDWeven >> 9) & 7; cpu 511 src/dps8/dps8_append.c cpu.SDW0.R2 = (SDWeven >> 6) & 7; cpu 512 src/dps8/dps8_append.c cpu.SDW0.R3 = (SDWeven >> 3) & 7; cpu 513 src/dps8/dps8_append.c cpu.SDW0.DF = TSTBIT (SDWeven, 2); cpu 514 src/dps8/dps8_append.c cpu.SDW0.FC = SDWeven & 3; cpu 517 src/dps8/dps8_append.c cpu.SDW0.BOUND = (SDWodd >> 21) & 037777; cpu 518 src/dps8/dps8_append.c cpu.SDW0.R = TSTBIT (SDWodd, 20); cpu 519 src/dps8/dps8_append.c cpu.SDW0.E = TSTBIT (SDWodd, 19); cpu 520 src/dps8/dps8_append.c cpu.SDW0.W = TSTBIT (SDWodd, 18); cpu 521 src/dps8/dps8_append.c cpu.SDW0.P = TSTBIT (SDWodd, 17); cpu 522 src/dps8/dps8_append.c cpu.SDW0.U = TSTBIT (SDWodd, 16); cpu 523 src/dps8/dps8_append.c cpu.SDW0.G = TSTBIT (SDWodd, 15); cpu 524 src/dps8/dps8_append.c cpu.SDW0.C = TSTBIT (SDWodd, 14); cpu 525 src/dps8/dps8_append.c cpu.SDW0.EB = SDWodd & 037777; cpu 528 src/dps8/dps8_append.c if (cpu.MR_cache.emr && cpu.MR_cache.ihr) cpu 534 src/dps8/dps8_append.c DBGAPP ("%s (2):SDW0=%s\r\n", __func__, str_SDW0 (buf, & cpu.SDW0)); cpu 564 src/dps8/dps8_append.c sdw_s *p = & cpu.SDWAM[_n]; cpu 603 src/dps8/dps8_append.c cpu.SDW0.POINTER = segno; cpu 604 src/dps8/dps8_append.c cpu.SDW0.USE = 0; cpu 606 src/dps8/dps8_append.c cpu.SDW0.FE = true; // in use by SDWAM cpu 608 src/dps8/dps8_append.c cpu.SDW = & cpu.SDW0; cpu 610 src/dps8/dps8_append.c if (nomatch || (! cpu.tweaks.enable_wam) || (! cpu.cu.SD_ON)) cpu 616 src/dps8/dps8_append.c if (cpu.tweaks.l68_mode) { // L68 cpu 625 src/dps8/dps8_append.c sdw_s * p = & cpu.SDWAM[_n]; cpu 629 src/dps8/dps8_append.c * p = cpu.SDW0; cpu 635 src/dps8/dps8_append.c sdw_s * q = & cpu.SDWAM[_h]; cpu 640 src/dps8/dps8_append.c cpu.SDW = p; cpu 658 src/dps8/dps8_append.c if (! cpu.tweaks.l68_mode) { // DPS8M cpu 663 src/dps8/dps8_append.c p = & cpu.SDWAM[toffset + setno]; cpu 669 src/dps8/dps8_append.c p = & cpu.SDWAM[toffset + setno]; cpu 674 src/dps8/dps8_append.c * p = cpu.SDW0; // load the SDW cpu 678 src/dps8/dps8_append.c cpu.SDW = p; // export pointer for appending cpu 681 src/dps8/dps8_append.c p = & cpu.SDWAM[toffset1 + setno]; cpu 688 src/dps8/dps8_append.c DBGAPP ("%s(2):SDWAM[%d]=%s\r\n", __func__, toffset + setno, str_sdw (buf, cpu.SDW)); cpu 695 src/dps8/dps8_append.c if ((! cpu.tweaks.enable_wam) || (! cpu.cu.PT_ON)) cpu 701 src/dps8/dps8_append.c if (cpu.tweaks.l68_mode) { // L68 cpu 705 src/dps8/dps8_append.c if (cpu.PTWAM[_n].FE && ((CA >> 6) & 07760) == cpu.PTWAM[_n].PAGENO && cpu 706 src/dps8/dps8_append.c cpu.PTWAM[_n].POINTER == segno) //_initialized cpu 710 src/dps8/dps8_append.c __func__, segno, cpu.PTWAM[_n].PAGENO, _n); cpu 711 src/dps8/dps8_append.c cpu.cu.PTWAMM = 1; cpu 712 src/dps8/dps8_append.c cpu.PTWAMR = (word4) _n; cpu 713 src/dps8/dps8_append.c cpu.PTW = & cpu.PTWAM[_n]; cpu 723 src/dps8/dps8_append.c if (cpu.PTWAM[_h].USE > cpu.PTW->USE) cpu 724 src/dps8/dps8_append.c cpu.PTWAM[_h].USE -= 1; //PTW->USE -= 1; cpu 726 src/dps8/dps8_append.c cpu.PTW->USE = N_L68_WAM_ENTRIES - 1; cpu 731 src/dps8/dps8_append.c __func__, cpu.PTW->ADDR, cpu.PTW->U, cpu.PTW->M, cpu 732 src/dps8/dps8_append.c cpu.PTW->DF, cpu.PTW->FC); cpu 733 src/dps8/dps8_append.c return cpu.PTW; cpu 744 src/dps8/dps8_append.c p = & cpu.PTWAM[toffset + setno]; cpu 751 src/dps8/dps8_append.c cpu.cu.PTWAMM = 1; cpu 752 src/dps8/dps8_append.c cpu.PTWAMR = (word6) (toffset + setno); cpu 753 src/dps8/dps8_append.c cpu.PTW = p; // export pointer for appending cpu 758 src/dps8/dps8_append.c p = & cpu.PTWAM[toffset + setno]; cpu 763 src/dps8/dps8_append.c __func__, cpu.PTW->ADDR, cpu.PTW->U, cpu.PTW->M, cpu 764 src/dps8/dps8_append.c cpu.PTW->DF, cpu.PTW->FC); cpu 765 src/dps8/dps8_append.c return cpu.PTW; cpu 769 src/dps8/dps8_append.c cpu.cu.PTWAMM = 0; cpu 778 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FPTW;)) cpu 788 src/dps8/dps8_append.c PNL (cpu.lastPTWOffset = offset;) cpu 789 src/dps8/dps8_append.c PNL (cpu.lastPTWIsDS = false;) cpu 802 src/dps8/dps8_append.c cpu.PTW0.ADDR = GETHI (PTWx2); cpu 803 src/dps8/dps8_append.c cpu.PTW0.U = TSTBIT (PTWx2, 9); cpu 804 src/dps8/dps8_append.c cpu.PTW0.M = TSTBIT (PTWx2, 6); cpu 805 src/dps8/dps8_append.c cpu.PTW0.DF = TSTBIT (PTWx2, 2); cpu 806 src/dps8/dps8_append.c cpu.PTW0.FC = PTWx2 & 3; cpu 810 src/dps8/dps8_append.c if (! cpu.PTW0.U) cpu 819 src/dps8/dps8_append.c cpu.PTW0.U = 1; cpu 827 src/dps8/dps8_append.c L68_ (if (cpu.MR_cache.emr && cpu.MR_cache.ihr) cpu 832 src/dps8/dps8_append.c __func__, x2, sdw->ADDR, PTWx2, cpu.PTW0.ADDR, cpu.PTW0.U, cpu 833 src/dps8/dps8_append.c cpu.PTW0.M, cpu.PTW0.DF, cpu.PTW0.FC); cpu 838 src/dps8/dps8_append.c cpu.PTW0.PAGENO = (offset >> 6) & 07760; cpu 839 src/dps8/dps8_append.c cpu.PTW0.POINTER = segno; cpu 840 src/dps8/dps8_append.c cpu.PTW0.USE = 0; cpu 841 src/dps8/dps8_append.c cpu.PTW0.FE = true; cpu 843 src/dps8/dps8_append.c cpu.PTW = & cpu.PTW0; cpu 844 src/dps8/dps8_append.c if (nomatch || (! cpu.tweaks.enable_wam) || (! cpu.cu.PT_ON)) cpu 850 src/dps8/dps8_append.c if (cpu.tweaks.l68_mode) { // L68 cpu 859 src/dps8/dps8_append.c ptw_s * p = & cpu.PTWAM[_n]; cpu 863 src/dps8/dps8_append.c *p = cpu.PTW0; cpu 871 src/dps8/dps8_append.c ptw_s * q = & cpu.PTWAM[_h]; cpu 876 src/dps8/dps8_append.c cpu.PTW = p; cpu 879 src/dps8/dps8_append.c cpu.PTW->ADDR, cpu.PTW->U, cpu.PTW->M, cpu.PTW->DF, cpu 880 src/dps8/dps8_append.c cpu.PTW->FC, cpu.PTW->POINTER, cpu.PTW->PAGENO, cpu 881 src/dps8/dps8_append.c cpu.PTW->USE); cpu 899 src/dps8/dps8_append.c p = & cpu.PTWAM[toffset + setno]; cpu 906 src/dps8/dps8_append.c p = & cpu.PTWAM[toffset + setno]; cpu 913 src/dps8/dps8_append.c * p = cpu.PTW0; // load the PTW cpu 918 src/dps8/dps8_append.c cpu.PTW = p; // export pointer for appending cpu 922 src/dps8/dps8_append.c p = & cpu.PTWAM[toffset1 + setno]; cpu 928 src/dps8/dps8_append.c cpu.PTW->ADDR, cpu.PTW->U, cpu.PTW->M, cpu.PTW->DF, cpu 929 src/dps8/dps8_append.c cpu.PTW->FC, cpu.PTW->POINTER, cpu.PTW->PAGENO, cpu.PTW->USE); cpu 939 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_MPTW;)) cpu 965 src/dps8/dps8_append.c cpu.PTW->M = 1; cpu 966 src/dps8/dps8_append.c L68_ (if (cpu.MR_cache.emr && cpu.MR_cache.ihr) cpu 972 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FPTW2;)) cpu 991 src/dps8/dps8_append.c L68_ (if (cpu.MR_cache.emr && cpu.MR_cache.ihr) cpu 1001 src/dps8/dps8_append.c if ((PTW2.ADDR & 0777760) == (cpu.PTW->ADDR & 0777760) + 16) cpu 1208 src/dps8/dps8_append.c DCDstruct * i = & cpu.currentInstruction; cpu 1212 src/dps8/dps8_append.c str_pct (cpu.apu.lastCycle)); cpu 1214 src/dps8/dps8_append.c cpu.TPR.CA); cpu 1218 src/dps8/dps8_append.c cpu.PPR.PRR, cpu.PPR.PSR); cpu 1220 src/dps8/dps8_append.c cpu.TPR.TRR, cpu.TPR.TSR); cpu 1232 src/dps8/dps8_append.c if (cpu.tweaks.enable_wam) cpu 1244 src/dps8/dps8_append.c processor_cycle_type lastCycle = cpu.apu.lastCycle; cpu 1245 src/dps8/dps8_append.c cpu.apu.lastCycle = thisCycle; cpu 1247 src/dps8/dps8_append.c DBGAPP ("do_append_cycle(Entry) XSF %o\r\n", cpu.cu.XSF); cpu 1249 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state = 0;)) cpu 1251 src/dps8/dps8_append.c cpu.RSDWH_R1 = 0; cpu 1253 src/dps8/dps8_append.c cpu.acvFaults = 0; cpu 1286 src/dps8/dps8_append.c ! (cpu.cu.XSF || cpu.currentInstruction.b29) /*get_went_appending()*/) cpu 1288 src/dps8/dps8_append.c cpu.TPR.TSR = 0; cpu 1290 src/dps8/dps8_append.c cpu.TPR.TSR, cpu.TPR.TRR); cpu 1308 src/dps8/dps8_append.c PNL (cpu.APUMemAddr = cpu.TPR.CA;) cpu 1313 src/dps8/dps8_append.c if (nomatch || ! fetch_sdw_from_sdwam (cpu.TPR.TSR)) cpu 1317 src/dps8/dps8_append.c cpu.TPR.TSR); cpu 1320 src/dps8/dps8_append.c cpu.DSBR.U); cpu 1322 src/dps8/dps8_append.c if (cpu.DSBR.U == 0) cpu 1324 src/dps8/dps8_append.c fetch_dsptw (cpu.TPR.TSR); cpu 1326 src/dps8/dps8_append.c if (! cpu.PTW0.DF) cpu 1327 src/dps8/dps8_append.c doFault (FAULT_DF0 + cpu.PTW0.FC, fst_zero, cpu 1330 src/dps8/dps8_append.c if (! cpu.PTW0.U) cpu 1331 src/dps8/dps8_append.c modify_dsptw (cpu.TPR.TSR); cpu 1333 src/dps8/dps8_append.c fetch_psdw (cpu.TPR.TSR); cpu 1336 src/dps8/dps8_append.c fetch_nsdw (cpu.TPR.TSR); // load SDW0 from descriptor segment table. cpu 1338 src/dps8/dps8_append.c if (cpu.SDW0.DF == 0) cpu 1345 src/dps8/dps8_append.c doFault (FAULT_DF0 + cpu.SDW0.FC, fst_zero, "SDW0.F == 0"); cpu 1349 src/dps8/dps8_append.c load_sdwam (cpu.TPR.TSR, nomatch); cpu 1352 src/dps8/dps8_append.c cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu.SDW->E); cpu 1355 src/dps8/dps8_append.c cpu.RSDWH_R1 = cpu.SDW->R1; cpu 1372 src/dps8/dps8_append.c if (! (cpu.SDW->R1 <= cpu.SDW->R2 && cpu.SDW->R2 <= cpu.SDW->R3)) cpu 1375 src/dps8/dps8_append.c cpu.acvFaults |= ACV0; cpu 1376 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 1442 src/dps8/dps8_append.c if (cpu.TPR.TRR > cpu.SDW->R2) cpu 1447 src/dps8/dps8_append.c cpu.acvFaults |= ACV3; cpu 1448 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 1452 src/dps8/dps8_append.c if (cpu.SDW->R == 0) cpu 1455 src/dps8/dps8_append.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 1458 src/dps8/dps8_append.c if (cpu.PPR.PSR != cpu.TPR.TSR) cpu 1463 src/dps8/dps8_append.c cpu.acvFaults |= ACV4; cpu 1464 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 1488 src/dps8/dps8_append.c if (cpu.TPR.TSR == cpu.PPR.PSR) cpu 1489 src/dps8/dps8_append.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 1492 src/dps8/dps8_append.c if (cpu.TPR.TRR > cpu.SDW->R1) cpu 1495 src/dps8/dps8_append.c cpu.TPR.TRR, cpu.SDW->R1); cpu 1497 src/dps8/dps8_append.c cpu.acvFaults |= ACV5; cpu 1498 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 1502 src/dps8/dps8_append.c if (! cpu.SDW->W) cpu 1505 src/dps8/dps8_append.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 1509 src/dps8/dps8_append.c cpu.acvFaults |= ACV6; cpu 1510 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 1534 src/dps8/dps8_append.c if (cpu.TPR.TRR < cpu.SDW->R1 || cpu 1535 src/dps8/dps8_append.c cpu.TPR.TRR > cpu.SDW->R2) cpu 1539 src/dps8/dps8_append.c cpu.SDW->R1, cpu.TPR.TRR, cpu.SDW->R2); cpu 1541 src/dps8/dps8_append.c cpu.acvFaults |= ACV1; cpu 1542 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 1546 src/dps8/dps8_append.c if (! cpu.SDW->E) cpu 1551 src/dps8/dps8_append.c cpu.acvFaults |= ACV2; cpu 1552 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 1555 src/dps8/dps8_append.c if (cpu.TPR.TRR > cpu.PPR.PRR) cpu 1557 src/dps8/dps8_append.c cpu.TPR.TRR, cpu.PPR.PRR); cpu 1559 src/dps8/dps8_append.c if (cpu.TPR.TRR < cpu.PPR.PRR) cpu 1564 src/dps8/dps8_append.c cpu.acvFaults |= ACV11; cpu 1565 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 1576 src/dps8/dps8_append.c if (cpu.rRALR == 0) cpu 1580 src/dps8/dps8_append.c if (! (cpu.PPR.PRR < cpu.rRALR)) cpu 1584 src/dps8/dps8_append.c cpu.PPR.PRR, cpu.rRALR); cpu 1585 src/dps8/dps8_append.c cpu.acvFaults |= ACV13; cpu 1586 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 1608 src/dps8/dps8_append.c cpu.SDW->E, cpu.SDW->G, cpu.PPR.PSR, cpu.TPR.TSR, cpu.TPR.CA, cpu 1609 src/dps8/dps8_append.c cpu.SDW->EB, cpu.SDW->R1, cpu.SDW->R2, cpu.SDW->R3, cpu 1610 src/dps8/dps8_append.c cpu.TPR.TRR, cpu.PPR.PRR); cpu 1613 src/dps8/dps8_append.c if (! cpu.SDW->E) cpu 1618 src/dps8/dps8_append.c cpu.acvFaults |= ACV2; cpu 1619 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 1624 src/dps8/dps8_append.c if (cpu.SDW->G) cpu 1628 src/dps8/dps8_append.c if (cpu.PPR.PSR == cpu.TPR.TSR && ! TST_I_ABS) cpu 1634 src/dps8/dps8_append.c if (cpu.TPR.CA >= (word18) cpu.SDW->EB) cpu 1639 src/dps8/dps8_append.c cpu.acvFaults |= ACV7; cpu 1640 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 1648 src/dps8/dps8_append.c if (cpu.TPR.TRR > cpu.SDW->R3) cpu 1653 src/dps8/dps8_append.c cpu.acvFaults |= ACV8; cpu 1654 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 1659 src/dps8/dps8_append.c if (cpu.TPR.TRR < cpu.SDW->R1) cpu 1664 src/dps8/dps8_append.c cpu.acvFaults |= ACV9; cpu 1665 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 1670 src/dps8/dps8_append.c if (cpu.TPR.TRR > cpu.PPR.PRR) cpu 1673 src/dps8/dps8_append.c if (cpu.PPR.PRR < cpu.SDW->R2) cpu 1678 src/dps8/dps8_append.c cpu.acvFaults |= ACV10; cpu 1679 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 1686 src/dps8/dps8_append.c cpu.TPR.TRR, cpu.SDW->R2); cpu 1689 src/dps8/dps8_append.c if (cpu.TPR.TRR > cpu.SDW->R2) cpu 1692 src/dps8/dps8_append.c cpu.TPR.TRR = cpu.SDW->R2; cpu 1695 src/dps8/dps8_append.c DBGAPP ("do_append_cycle(E1): CALL6 TPR.TRR %o\r\n", cpu.TPR.TRR); cpu 1706 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_PIAU;)) cpu 1715 src/dps8/dps8_append.c if (cpu.TPR.TRR < cpu.SDW->R1 || cpu 1716 src/dps8/dps8_append.c cpu.TPR.TRR > cpu.SDW->R2) cpu 1720 src/dps8/dps8_append.c cpu.SDW->R1, cpu.TPR.TRR, cpu.SDW->R2); cpu 1721 src/dps8/dps8_append.c cpu.acvFaults |= ACV1; cpu 1722 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 1726 src/dps8/dps8_append.c if (! cpu.SDW->E) cpu 1730 src/dps8/dps8_append.c cpu.acvFaults |= ACV2; cpu 1731 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 1736 src/dps8/dps8_append.c if (cpu.PPR.PRR != cpu.TPR.TRR) cpu 1741 src/dps8/dps8_append.c cpu.acvFaults |= ACV12; cpu 1742 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 1759 src/dps8/dps8_append.c if (((cpu.TPR.CA >> 4) & 037777) > cpu.SDW->BOUND) cpu 1763 src/dps8/dps8_append.c cpu.acvFaults |= ACV15; cpu 1764 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 1768 src/dps8/dps8_append.c cpu.TPR.CA, ((cpu.TPR.CA >> 4) & 037777), cpu.SDW->BOUND); cpu 1771 src/dps8/dps8_append.c if (cpu.acvFaults) cpu 1774 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FLT;)) cpu 1776 src/dps8/dps8_append.c doFault (FAULT_ACV, (_fault_subtype) {.fault_acv_subtype=cpu.acvFaults}, cpu 1781 src/dps8/dps8_append.c if (cpu.SDW->U) cpu 1787 src/dps8/dps8_append.c DBGAPP ("do_append_cycle(G) CA %06o\r\n", cpu.TPR.CA); cpu 1789 src/dps8/dps8_append.c ! fetch_ptw_from_ptwam (cpu.SDW->POINTER, cpu.TPR.CA)) //TPR.CA)) cpu 1791 src/dps8/dps8_append.c fetch_ptw (cpu.SDW, cpu.TPR.CA); cpu 1792 src/dps8/dps8_append.c if (! cpu.PTW0.DF) cpu 1797 src/dps8/dps8_append.c doFault (FAULT_DF0 + cpu.PTW0.FC, (_fault_subtype) {.bits=0}, cpu 1801 src/dps8/dps8_append.c loadPTWAM (cpu.SDW->POINTER, cpu.TPR.CA, nomatch); // load PTW0 to PTWAM cpu 1812 src/dps8/dps8_append.c do_ptw2 (cpu.SDW, cpu.TPR.CA); cpu 1825 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FANP;)) cpu 1838 src/dps8/dps8_append.c cpu.SDW->ADDR, cpu.TPR.CA); cpu 1842 src/dps8/dps8_append.c ! (cpu.cu.XSF || cpu.currentInstruction.b29) /*get_went_appending ()*/) cpu 1844 src/dps8/dps8_append.c finalAddress = cpu.TPR.CA; cpu 1848 src/dps8/dps8_append.c finalAddress = (cpu.SDW->ADDR & 077777760) + cpu.TPR.CA; cpu 1851 src/dps8/dps8_append.c PNL (cpu.APUMemAddr = finalAddress;) cpu 1854 src/dps8/dps8_append.c cpu.TPR.TSR, cpu.TPR.CA, finalAddress); cpu 1868 src/dps8/dps8_append.c thisCycle == APU_DATA_RMW) && cpu.PTW->M == 0) // is this the right way to do this? cpu 1870 src/dps8/dps8_append.c if (StrOp && cpu.PTW->M == 0) // is this the right way to do this? cpu 1873 src/dps8/dps8_append.c modify_ptw (cpu.SDW, cpu.TPR.CA); cpu 1878 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FAP;)) cpu 1880 src/dps8/dps8_append.c word24 y2 = cpu.TPR.CA % 1024; cpu 1884 src/dps8/dps8_append.c finalAddress = (((word24)cpu.PTW->ADDR & 0777760) << 6) + y2; cpu 1886 src/dps8/dps8_append.c PNL (cpu.APUMemAddr = finalAddress;) cpu 1888 src/dps8/dps8_append.c L68_ (if (cpu.MR_cache.emr && cpu.MR_cache.ihr) cpu 1892 src/dps8/dps8_append.c cpu.TPR.TSR, cpu.TPR.CA, finalAddress); cpu 1904 src/dps8/dps8_append.c cpu.cu.XSF = 1; cpu 1905 src/dps8/dps8_append.c if (cpu.currentInstruction.b29) cpu 1906 src/dps8/dps8_append.c cpu.xsfScu = true; cpu 1910 src/dps8/dps8_append.c if (thisCycle == OPERAND_STORE && cpu.useZone) cpu 1972 src/dps8/dps8_append.c (cpu.TPR.CA & 1) == 0) cpu 2040 src/dps8/dps8_append.c cpu.TPR.TSR = GET_ITS_SEGNO (data); cpu 2045 src/dps8/dps8_append.c cpu.PPR.PRR = cpu.TPR.TRR = max3 (y, cpu.TPR.TRR, cpu.RSDWH_R1); cpu 2049 src/dps8/dps8_append.c cpu.TPR.CA = GET_ITS_WORDNO (data); cpu 2074 src/dps8/dps8_append.c cpu.PR[n].RNR = cpu.PPR.PRR; cpu 2078 src/dps8/dps8_append.c cpu.PR[n].SNR = cpu.PPR.PSR; cpu 2079 src/dps8/dps8_append.c cpu.PR[n].WORDNO = (cpu.PPR.IC + 1) & MASK18; cpu 2101 src/dps8/dps8_append.c cpu.PR[0].RNR = cpu 2102 src/dps8/dps8_append.c cpu.PR[1].RNR = cpu 2103 src/dps8/dps8_append.c cpu.PR[2].RNR = cpu 2104 src/dps8/dps8_append.c cpu.PR[3].RNR = cpu 2105 src/dps8/dps8_append.c cpu.PR[4].RNR = cpu 2106 src/dps8/dps8_append.c cpu.PR[5].RNR = cpu 2107 src/dps8/dps8_append.c cpu.PR[6].RNR = cpu 2108 src/dps8/dps8_append.c cpu.PR[7].RNR = cpu.TPR.TRR; cpu 2126 src/dps8/dps8_append.c cpu.PPR.PSR = cpu.TPR.TSR; cpu 2128 src/dps8/dps8_append.c cpu.PPR.IC = cpu.TPR.CA; cpu 2136 src/dps8/dps8_append.c if (cpu.TPR.TRR == 0) cpu 2139 src/dps8/dps8_append.c cpu.PPR.P = cpu.SDW->P; cpu 2144 src/dps8/dps8_append.c cpu.PPR.P = 0; cpu 2153 src/dps8/dps8_append.c if (cpu.TPR.TRR == cpu.PPR.PRR) cpu 2156 src/dps8/dps8_append.c cpu.PR[7].SNR = cpu.PR[6].SNR; cpu 2157 src/dps8/dps8_append.c DBGAPP ("do_append_cycle(N) PR7.SNR = PR6.SNR %05o\r\n", cpu.PR[7].SNR); cpu 2162 src/dps8/dps8_append.c cpu.PR[7].SNR = ((word15) (cpu.DSBR.STACK << 3)) | cpu.TPR.TRR; cpu 2164 src/dps8/dps8_append.c cpu.DSBR.STACK, cpu.TPR.TRR); cpu 2165 src/dps8/dps8_append.c DBGAPP ("do_append_cycle(N) PR7.SNR = STACK||TRR %05o\r\n", cpu.PR[7].SNR); cpu 2169 src/dps8/dps8_append.c cpu.PR[7].RNR = cpu.TPR.TRR; cpu 2171 src/dps8/dps8_append.c cpu.PR[7].WORDNO = 0; cpu 2178 src/dps8/dps8_append.c cpu.PPR.PRR = cpu.TPR.TRR; cpu 2180 src/dps8/dps8_append.c cpu.PPR.PSR = cpu.TPR.TSR; cpu 2182 src/dps8/dps8_append.c cpu.PPR.IC = cpu.TPR.CA; cpu 2196 src/dps8/dps8_append.c cpu.TPR.TRR, cpu.RSDWH_R1, its_RNR); cpu 2200 src/dps8/dps8_append.c cpu.TPR.TRR = max3 (its_RNR, cpu.TPR.TRR, cpu.RSDWH_R1); cpu 2201 src/dps8/dps8_append.c DBGAPP ("do_append_cycle(O) Set TRR to %o\r\n", cpu.TPR.TRR); cpu 2211 src/dps8/dps8_append.c cpu.TPR.TRR, cpu.RSDWH_R1, cpu.PR[n].RNR); cpu 2215 src/dps8/dps8_append.c cpu.TPR.TRR = max3 (cpu.PR[n].RNR, cpu.TPR.TRR, cpu.RSDWH_R1); cpu 2216 src/dps8/dps8_append.c DBGAPP ("do_append_cycle(P) Set TRR to %o\r\n", cpu.TPR.TRR); cpu 2222 src/dps8/dps8_append.c PNL (cpu.APUDataBusOffset = cpu.TPR.CA;) cpu 2223 src/dps8/dps8_append.c PNL (cpu.APUDataBusAddr = finalAddress;) cpu 2225 src/dps8/dps8_append.c PNL (L68_ (cpu.apu.state |= apu_FA;)) cpu 2228 src/dps8/dps8_append.c cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); cpu 2230 src/dps8/dps8_append.c cpu.TPR.TRR, cpu.TPR.TSR, cpu.TPR.TBR, cpu.TPR.CA); cpu 2249 src/dps8/dps8_append.c if (2u * segno >= 16u * (cpu.DSBR.BND + 1u)) cpu 2256 src/dps8/dps8_append.c if (cpu.DSBR.U == 0) cpu 2264 src/dps8/dps8_append.c core_read (cpup, (cpu.DSBR.ADDR + x1) & PAMASK, & PTWx1, __func__); cpu 2313 src/dps8/dps8_append.c core_read2 (cpup, (cpu.DSBR.ADDR + 2 * segno) & PAMASK, cpu 118 src/dps8/dps8_append.h word12 FCT = cpu.cu.APUCycleBits & MASK3; cpu 119 src/dps8/dps8_append.h cpu.cu.APUCycleBits = (status & 07770) | FCT; cpu 168 src/dps8/dps8_append.h cpu.apu.lastCycle = thisCycle; cpu 90 src/dps8/dps8_cpu.c #define DBG_CTR cpu.cycleCnt cpu 127 src/dps8/dps8_cpu.c #define LUF_OVER(n) (cpu.tweaks.tandd_mode ? \ cpu 128 src/dps8/dps8_cpu.c cpu.lufTicks >= (1024u << (n)) : \ cpu 129 src/dps8/dps8_cpu.c cpu.lufCounter > luf_limits[n]) cpu 944 src/dps8/dps8_cpu.c cpu.cycle = cycle; cpu 977 src/dps8/dps8_cpu.c cpu.rA = 0; cpu 978 src/dps8/dps8_cpu.c cpu.rQ = 0; cpu 980 src/dps8/dps8_cpu.c cpu.PPR.IC = 0; cpu 981 src/dps8/dps8_cpu.c cpu.PPR.PRR = 0; cpu 982 src/dps8/dps8_cpu.c cpu.PPR.PSR = 0; cpu 983 src/dps8/dps8_cpu.c cpu.PPR.P = 1; cpu 984 src/dps8/dps8_cpu.c cpu.RSDWH_R1 = 0; cpu 985 src/dps8/dps8_cpu.c cpu.rTR = MASK27; cpu 987 src/dps8/dps8_cpu.c if (cpu.tweaks.isolts_mode) cpu 989 src/dps8/dps8_cpu.c cpu.shadowTR = 0; cpu 990 src/dps8/dps8_cpu.c cpu.rTRlsb = 0; cpu 992 src/dps8/dps8_cpu.c cpu.rTRticks = 0; cpu 997 src/dps8/dps8_cpu.c cpu.CMR.luf = 3; // default of 16 mS cpu 998 src/dps8/dps8_cpu.c cpu.cu.SD_ON = cpu.switches.sdwam_enable ? 1 : 0; cpu 999 src/dps8/dps8_cpu.c cpu.cu.PT_ON = cpu.switches.ptwam_enable ? 1 : 0; cpu 1001 src/dps8/dps8_cpu.c if (cpu.tweaks.nodis) { cpu 1005 src/dps8/dps8_cpu.c cpu.cu.IWB = 0000000616200; //-V536 // Stuff DIS w/interrupt inhibit in instruction buffer cpu 1010 src/dps8/dps8_cpu.c cpu.wasXfer = false; cpu 1011 src/dps8/dps8_cpu.c cpu.wasInhibited = false; cpu 1013 src/dps8/dps8_cpu.c cpu.interrupt_flag = false; cpu 1014 src/dps8/dps8_cpu.c cpu.g7_flag = false; cpu 1016 src/dps8/dps8_cpu.c cpu.faultRegister [0] = 0; cpu 1017 src/dps8/dps8_cpu.c cpu.faultRegister [1] = 0; cpu 1020 src/dps8/dps8_cpu.c cpu.apu.lastCycle = UNKNOWN_CYCLE; cpu 1023 src/dps8/dps8_cpu.c (void)memset (& cpu.PPR, 0, sizeof (struct ppr_s)); cpu 1328 src/dps8/dps8_cpu.c cpu.sc_addr_map [pg] = -1; cpu 1329 src/dps8/dps8_cpu.c cpu.sc_scu_map [pg] = -1; cpu 1332 src/dps8/dps8_cpu.c cpu.sc_num_banks[u] = 0; cpu 1335 src/dps8/dps8_cpu.c cpu.sc_ilv_lower_wds[p] = 0; cpu 1336 src/dps8/dps8_cpu.c cpu.sc_ilv_single[p] = false; cpu 1338 src/dps8/dps8_cpu.c cpu.sc_interlace = false; cpu 1345 src/dps8/dps8_cpu.c int n_ports = cpu.tweaks.l68_mode ? N_L68_CPU_PORTS : N_DPS8M_CPU_PORTS; cpu 1348 src/dps8/dps8_cpu.c if (! cpu.switches.enable [port_num]) cpu 1353 src/dps8/dps8_cpu.c uint store_size = cpu.switches.store_size [port_num]; cpu 1354 src/dps8/dps8_cpu.c uint sz_wds = cpu.tweaks.l68_mode ? l68_store_table [store_size] : cpu 1356 src/dps8/dps8_cpu.c uint base_addr_bks = (sz_wds * cpu.switches.assignment[port_num]) / SCBANK_SZ; cpu 1395 src/dps8/dps8_cpu.c cpu.sc_ilv_lower_wds[port_num] = lower_32k * 32768u; cpu 1396 src/dps8/dps8_cpu.c cpu.sc_ilv_base[port_num] = base_addr_bks * SCBANK_SZ; cpu 1397 src/dps8/dps8_cpu.c cpu.sc_ilv_single[port_num] = ! upper_32k; cpu 1398 src/dps8/dps8_cpu.c cpu.sc_interlace = true; cpu 1404 src/dps8/dps8_cpu.c cpu.sc_num_banks[port_num] = num_banks; cpu 1418 src/dps8/dps8_cpu.c if (cpu.sc_addr_map [addr_bks] != -1) cpu 1421 src/dps8/dps8_cpu.c cpu.sc_addr_map[addr_bks] = (int) port_num * (int) ZONE_SZ + phys_bank * (int) SCBANK_SZ; cpu 1422 src/dps8/dps8_cpu.c cpu.sc_scu_map[addr_bks] = port_num; cpu 1434 src/dps8/dps8_cpu.c int port = cpu.sc_scu_map[pg]; cpu 1446 src/dps8/dps8_cpu.c bool zac = cpu.MR.separ; cpu 1447 src/dps8/dps8_cpu.c cpu.MR.separ = 0; cpu 1448 src/dps8/dps8_cpu.c cpu.MR.sdpap = 0; cpu 1449 src/dps8/dps8_cpu.c putbits36_1 (& cpu.MR.r, 20, 0); cpu 1450 src/dps8/dps8_cpu.c putbits36_1 (& cpu.MR.r, 21, 0); cpu 1470 src/dps8/dps8_cpu.c if (! cpu.tweaks.tandd_mode) cpu 1473 src/dps8/dps8_cpu.c bool parity = cpu.MR.separ || cpu.MR.sdpap; cpu 1494 src/dps8/dps8_cpu.c if (cpu.useZone) cpu 1505 src/dps8/dps8_cpu.c SETF (cpu.cu.IR, I_PERR); cpu 1518 src/dps8/dps8_cpu.c if (! cpu.tweaks.tandd_mode || ! (cpu.MR.separ || cpu.MR.sdpap)) cpu 1524 src/dps8/dps8_cpu.c cpu.neaPort = (word3) cpuPortNum; cpu 1525 src/dps8/dps8_cpu.c SETF (cpu.cu.IR, I_PERR); cpu 1573 src/dps8/dps8_cpu.c if (! cpu.tweaks.tandd_mode) cpu 1587 src/dps8/dps8_cpu.c SETF (cpu.cu.IR, I_PERR); cpu 1601 src/dps8/dps8_cpu.c if (cpu.cycle == FETCH_cycle) cpu 1603 src/dps8/dps8_cpu.c cpu.scLockedOut = false; cpu 1604 src/dps8/dps8_cpu.c cpu.rTR = (cpu.rTR - 16u) & MASK27; cpu 1605 src/dps8/dps8_cpu.c cpu.lufTicks += 16; cpu 1606 src/dps8/dps8_cpu.c cpu.tanddTRTicks += 16; cpu 1619 src/dps8/dps8_cpu.c uint lower = cpu.sc_ilv_lower_wds[port_num]; cpu 1620 src/dps8/dps8_cpu.c uint base = cpu.sc_ilv_base[port_num]; cpu 1626 src/dps8/dps8_cpu.c if (store && cpu.sc_ilv_single[port_num]) cpu 1647 src/dps8/dps8_cpu.c cpu.neaPort = 0; cpu 1648 src/dps8/dps8_cpu.c cpu.neaNoPort = true; cpu 1649 src/dps8/dps8_cpu.c int n_ports = cpu.tweaks.l68_mode ? N_L68_CPU_PORTS : N_DPS8M_CPU_PORTS; cpu 1652 src/dps8/dps8_cpu.c if (! cpu.switches.enable [port_num]) cpu 1654 src/dps8/dps8_cpu.c uint store_size = cpu.switches.store_size [port_num]; cpu 1655 src/dps8/dps8_cpu.c uint sz_wds = cpu.tweaks.l68_mode ? l68_store_table [store_size] : cpu 1657 src/dps8/dps8_cpu.c uint base = sz_wds * cpu.switches.assignment[port_num]; cpu 1660 src/dps8/dps8_cpu.c cpu.neaPort = (word3) port_num; cpu 1661 src/dps8/dps8_cpu.c cpu.neaNoPort = false; cpu 1669 src/dps8/dps8_cpu.c if (cpu.tweaks.tandd_mode) cpu 1678 src/dps8/dps8_cpu.c cpu.sc_addr_map [pg] = -1; cpu 1679 src/dps8/dps8_cpu.c cpu.sc_scu_map [pg] = -1; cpu 1682 src/dps8/dps8_cpu.c cpu.sc_num_banks[u] = 0; cpu 1685 src/dps8/dps8_cpu.c for (int port_num = 0; port_num < (cpu.tweaks.l68_mode ? N_L68_CPU_PORTS : N_DPS8M_CPU_PORTS); port_num ++) cpu 1688 src/dps8/dps8_cpu.c if (! cpu.switches.enable [port_num]) cpu 1700 src/dps8/dps8_cpu.c uint store_size = cpu.switches.store_size [port_num]; cpu 1723 src/dps8/dps8_cpu.c cpu.tweaks.l68_mode ? cpu 1724 src/dps8/dps8_cpu.c cpu.tweaks.isolts_mode ? cpu 1730 src/dps8/dps8_cpu.c uint base_addr_wds = sz_wds * cpu.switches.assignment[port_num]; cpu 1734 src/dps8/dps8_cpu.c cpu.sc_num_banks[port_num] = num_banks; cpu 1746 src/dps8/dps8_cpu.c if (cpu.sc_addr_map [addr_bks] != -1) cpu 1750 src/dps8/dps8_cpu.c addr_bks, addr_bks, cpu.sc_addr_map [addr_bks], port_num); cpu 1755 src/dps8/dps8_cpu.c cpu.sc_addr_map[addr_bks] = (int)((int)port_num * (int)ZONE_SZ + (int)pg * (int)SCBANK_SZ); cpu 1756 src/dps8/dps8_cpu.c cpu.sc_scu_map[addr_bks] = port_num; cpu 1789 src/dps8/dps8_cpu.c return cpu.sc_scu_map[scpg]; cpu 1817 src/dps8/dps8_cpu.c if (cpu.switches.serno) cpu 1819 src/dps8/dps8_cpu.c cpu.switches.serno = sn; cpu 1822 src/dps8/dps8_cpu.c sim_msg ("%s CPU serial number: %u\r\n", sim_name, cpu.switches.serno); cpu 1906 src/dps8/dps8_cpu.c cpu.instrCntT0 = cpu.instrCntT1; cpu 1907 src/dps8/dps8_cpu.c cpu.instrCntT1 = cpu.instrCnt; cpu 1967 src/dps8/dps8_cpu.c cpu.instrCnt = 0; cpu 1968 src/dps8/dps8_cpu.c cpu.cycleCnt = 0; cpu 1970 src/dps8/dps8_cpu.c cpu.faultCnt [i] = 0; cpu 2125 src/dps8/dps8_cpu.c if (cpu.events.XIP [scu_unit_idx]) cpu 2137 src/dps8/dps8_cpu.c cpu.lufCounter = 0; cpu 2138 src/dps8/dps8_cpu.c cpu.lufTicks = 0; cpu 2141 src/dps8/dps8_cpu.c if (cpu.events.XIP [scu_unit_idx]) cpu 2156 src/dps8/dps8_cpu.c if (cpu.tweaks.isolts_mode == 0) cpu 2176 src/dps8/dps8_cpu.c sim_brk_test ((cpu.PPR.IC & 0777777) | cpu 2177 src/dps8/dps8_cpu.c ((((t_addr) cpu.PPR.PSR) & 037777) << 18), cpu 2181 src/dps8/dps8_cpu.c if (sim_deb_break && cpu.cycleCnt >= sim_deb_break) cpu 2194 src/dps8/dps8_cpu.c if (cpu.panelInitialize && cpu.DATA_panel_s_trig_sw == 0) cpu 2197 src/dps8/dps8_cpu.c while (cpu.panelInitialize) cpu 2199 src/dps8/dps8_cpu.c if (cpu.DATA_panel_init_sw) cpu 2207 src/dps8/dps8_cpu.c if (cpu.DATA_panel_s_trig_sw == 0 && cpu 2208 src/dps8/dps8_cpu.c cpu.DATA_panel_execute_sw && // EXECUTE button cpu 2209 src/dps8/dps8_cpu.c cpu.DATA_panel_scope_sw && // 'EXECUTE PB/SCOPE REPEAT' set to PB cpu 2210 src/dps8/dps8_cpu.c cpu.DATA_panel_exec_sw == 0) // 'EXECUTE SWITCH/EXECUTE FAULT' cpu 2214 src/dps8/dps8_cpu.c while (cpu.DATA_panel_execute_sw) cpu 2217 src/dps8/dps8_cpu.c if (cpu.DATA_panel_exec_sw) // EXECUTE SWITCH cpu 2220 src/dps8/dps8_cpu.c cpu.cu.IWB = cpu.switches.data_switches; cpu 2509 src/dps8/dps8_cpu.c if ((cpu.tweaks.tandd_mode || cpu.tweaks.isolts_mode) && cpu 2510 src/dps8/dps8_cpu.c ! cpu.tweaks.l68_mode && cpu 2511 src/dps8/dps8_cpu.c cpu.cycle == PSEUDO_FETCH_cycle && cpu.lufAfterXfer) cpu 2513 src/dps8/dps8_cpu.c cpu.PPR.IC = cpu.lufXferIC; cpu 2514 src/dps8/dps8_cpu.c cpu.lufRFI = true; cpu 2517 src/dps8/dps8_cpu.c cpu.lufTicks = 0; cpu 2518 src/dps8/dps8_cpu.c cpu.lufCounter = 0; cpu 2519 src/dps8/dps8_cpu.c cpu.lufOccurred = false; cpu 2538 src/dps8/dps8_cpu.c if (cpu.tweaks.isolts_mode) cpu 2539 src/dps8/dps8_cpu.c cpu.shadowTR = (word27) cpu.TR0 - (1024u << (is_priv_mode (cpup) ? 4 : cpu.CMR.luf)); cpu 2572 src/dps8/dps8_cpu.c cpu.secret_addressing_mode = true; cpu 2573 src/dps8/dps8_cpu.c cpu.cu.XSF = false; cpu 2581 src/dps8/dps8_cpu.c cpu.secret_addressing_mode = false; cpu 2582 src/dps8/dps8_cpu.c return cpu.cu.XSF; cpu 2610 src/dps8/dps8_cpu.c cpu.syncClockModeMaster = true; // This CPU is the clock master cpu 2611 src/dps8/dps8_cpu.c cpu.masterCycleCnt = 0; cpu 2612 src/dps8/dps8_cpu.c cpu.syncClockModeCache = true; cpu 2642 src/dps8/dps8_cpu.c sim_printf ("CPU%c %s entry\r\n", cpu.cpuIdx + 'A', __func__); cpu 2643 src/dps8/dps8_cpu.c sim_printf ("CPU%c Alloc count %d\r\n", cpu.cpuIdx + 'A', allocCount); cpu 2646 src/dps8/dps8_cpu.c cpu.syncClockModeMaster = false; //-V779 cpu 2689 src/dps8/dps8_cpu.c int val = setjmp (cpu.jmpMain); cpu 2711 src/dps8/dps8_cpu.c cpu.wasXfer = false; cpu 2739 src/dps8/dps8_cpu.c DCDstruct * ci = & cpu.currentInstruction; cpu 2741 src/dps8/dps8_cpu.c if (cpu.restart) cpu 2752 src/dps8/dps8_cpu.c cpu.executing = true; //-V779 cpu 2753 src/dps8/dps8_cpu.c if (cpu.tweaks.isolts_mode) { cpu 2756 src/dps8/dps8_cpu.c cpu.inMultics = true; cpu 2798 src/dps8/dps8_cpu.c cpu.cycleCnt ++; cpu 2818 src/dps8/dps8_cpu.c if (cpu.tweaks.isolts_mode) cpu 2820 src/dps8/dps8_cpu.c if (cpu.cycle != FETCH_cycle) cpu 2823 src/dps8/dps8_cpu.c cpu.rTRlsb ++; cpu 2824 src/dps8/dps8_cpu.c if (cpu.rTRlsb >= 4) cpu 2826 src/dps8/dps8_cpu.c cpu.rTRlsb = 0; cpu 2827 src/dps8/dps8_cpu.c cpu.shadowTR = (cpu.shadowTR - 1) & MASK27; cpu 2828 src/dps8/dps8_cpu.c if (cpu.shadowTR == 0) // passing through 0... cpu 2830 src/dps8/dps8_cpu.c if (cpu.tweaks.tro_enable) cpu 2845 src/dps8/dps8_cpu.c if (cpu.tweaks.tandd_mode) cpu 2850 src/dps8/dps8_cpu.c cpu.rTRticks = 0; cpu 2851 src/dps8/dps8_cpu.c if (++ cpu.rTRlsb >= 4) cpu 2853 src/dps8/dps8_cpu.c cpu.rTRlsb = 0; cpu 2854 src/dps8/dps8_cpu.c cpu.rTR --; cpu 2855 src/dps8/dps8_cpu.c cpu.lufTicks ++; cpu 2856 src/dps8/dps8_cpu.c cpu.tanddTRTicks ++; cpu 2862 src/dps8/dps8_cpu.c cpu 2864 src/dps8/dps8_cpu.c cpu 2870 src/dps8/dps8_cpu.c cpu.rTR = (word27) (((word27s) cpu.rTR) - (word27s) (cpu.rTRticks / TR_RATE)); cpu 2871 src/dps8/dps8_cpu.c cpu.rTRticks %= TR_RATE; cpu 2876 src/dps8/dps8_cpu.c if (cpu.rTR & ~MASK27) cpu 2878 src/dps8/dps8_cpu.c cpu.rTR &= MASK27; cpu 2879 src/dps8/dps8_cpu.c if (cpu.tweaks.tro_enable) { cpu 2885 src/dps8/dps8_cpu.c cycle_str (cpu.cycle)); cpu 2887 src/dps8/dps8_cpu.c switch (cpu.cycle) cpu 2907 src/dps8/dps8_cpu.c cpu.cu.FI_ADDR = (word5) (intr_pair_addr / 2); cpu 2911 src/dps8/dps8_cpu.c if (cpu.tanddFetchIntr) cpu 2913 src/dps8/dps8_cpu.c cpu.scu_data[7] = cpu.tanddIRODD; cpu 2914 src/dps8/dps8_cpu.c putbits36_1 (& cpu.scu_data[0], 19, 0); cpu 2915 src/dps8/dps8_cpu.c putbits36_1 (& cpu.scu_data[5], 27, 1); cpu 2916 src/dps8/dps8_cpu.c putbits36_1 (& cpu.scu_data[5], 29, 1); cpu 2926 src/dps8/dps8_cpu.c cpu.PPR.PRR = 0; cpu 2927 src/dps8/dps8_cpu.c cpu.TPR.TRR = 0; cpu 2930 src/dps8/dps8_cpu.c intr_pair_addr, cpu.interrupt_flag); cpu 2936 src/dps8/dps8_cpu.c if (cpu.interrupt_flag) cpu 2951 src/dps8/dps8_cpu.c & cpu.cu.IWB, & cpu.cu.IRODD, __func__); cpu 2953 src/dps8/dps8_cpu.c HDBGMRead (intr_pair_addr, cpu.cu.IWB, "intr even"); cpu 2954 src/dps8/dps8_cpu.c HDBGMRead (intr_pair_addr + 1, cpu.cu.IRODD, "intr odd"); cpu 2956 src/dps8/dps8_cpu.c cpu.cu.xde = 1; cpu 2957 src/dps8/dps8_cpu.c cpu.cu.xdo = 1; cpu 2958 src/dps8/dps8_cpu.c cpu.isExec = true; cpu 2959 src/dps8/dps8_cpu.c cpu.isXED = true; cpu 2962 src/dps8/dps8_cpu.c cpu.interrupt_flag = false; cpu 2963 src/dps8/dps8_cpu.c cpu.tanddFetchIntr = false; cpu 2972 src/dps8/dps8_cpu.c cpu.interrupt_flag = false; cpu 2976 src/dps8/dps8_cpu.c if (cpu.tanddFetchIntr) // undo the T&D SCU data patch cpu 2978 src/dps8/dps8_cpu.c cpu.cu.rfi = 0; cpu 2979 src/dps8/dps8_cpu.c cpu.cu.FIF = 0; cpu 2980 src/dps8/dps8_cpu.c cpu.tanddFetchIntr = false; cpu 2984 src/dps8/dps8_cpu.c cpu.wasXfer = false; cpu 2993 src/dps8/dps8_cpu.c (void)memset (cpu.cpt, 0, sizeof (cpu.cpt)); cpu 3000 src/dps8/dps8_cpu.c if (UNLIKELY (cpu.execSwitchesReq)) cpu 3002 src/dps8/dps8_cpu.c cpu.execSwitchesReq = false; cpu 3003 src/dps8/dps8_cpu.c cpu.execSwitches = true; cpu 3004 src/dps8/dps8_cpu.c cpu.faultNumber = FAULT_EXF; cpu 3009 src/dps8/dps8_cpu.c PNL (L68_ (cpu.INS_FETCH = false;)) cpu 3047 src/dps8/dps8_cpu.c get_BAR_address (cpup, cpu.PPR.IC); cpu 3055 src/dps8/dps8_cpu.c cpu.tanddFetched = false; cpu 3056 src/dps8/dps8_cpu.c cpu.g7FetchFault = false; cpu 3057 src/dps8/dps8_cpu.c word36 tanddIRODD = cpu.cu.IRODD; cpu 3058 src/dps8/dps8_cpu.c if (cpu.tweaks.tandd_mode) cpu 3060 src/dps8/dps8_cpu.c cpu.isExec = false; cpu 3061 src/dps8/dps8_cpu.c cpu.isXED = false; cpu 3062 src/dps8/dps8_cpu.c cpu.cu.XSF = 0; cpu 3063 src/dps8/dps8_cpu.c cpu.cu.TSN_VALID [0] = 0; cpu 3064 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 3065 src/dps8/dps8_cpu.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 3066 src/dps8/dps8_cpu.c PNL (cpu.prepare_state = ps_PIA); cpu 3067 src/dps8/dps8_cpu.c PNL (L68_ (cpu.INS_FETCH = true;)) cpu 3068 src/dps8/dps8_cpu.c fetchInstruction (cpup, cpu.PPR.IC); cpu 3069 src/dps8/dps8_cpu.c cpu.tanddFetched = true; cpu 3076 src/dps8/dps8_cpu.c bool is_dis = cpu.tanddFetched ? cpu 3078 src/dps8/dps8_cpu.c (cpu.currentInstruction.opcode == 0616 && cpu 3079 src/dps8/dps8_cpu.c cpu.currentInstruction.opcodeX == 0); cpu 3081 src/dps8/dps8_cpu.c !(is_dis && GET_I (cpu.cu.IWB) == 0); cpu 3087 src/dps8/dps8_cpu.c cpu.interrupt_flag = sample_interrupts (cpup); cpu 3088 src/dps8/dps8_cpu.c cpu.g7_flag = cpu 3091 src/dps8/dps8_cpu.c else if (! (cpu.cu.xde | cpu.cu.xdo | cpu 3092 src/dps8/dps8_cpu.c cpu.cu.rpt | cpu.cu.rd | cpu.cu.rl)) cpu 3094 src/dps8/dps8_cpu.c if ((!cpu.wasInhibited) && cpu 3095 src/dps8/dps8_cpu.c ! (cpu.tanddFetched && GET_I (IWB_IRODD)) && cpu 3096 src/dps8/dps8_cpu.c (cpu.PPR.IC & 1) == 0 && cpu 3097 src/dps8/dps8_cpu.c (! cpu.wasXfer)) cpu 3100 src/dps8/dps8_cpu.c cpu.interrupt_flag = sample_interrupts (cpup); cpu 3101 src/dps8/dps8_cpu.c cpu.g7_flag = cpu 3104 src/dps8/dps8_cpu.c cpu.wasInhibited = false; cpu 3113 src/dps8/dps8_cpu.c if ((cpu.PPR.IC & 1) == 1) cpu 3115 src/dps8/dps8_cpu.c cpu.wasInhibited = true; cpu 3150 src/dps8/dps8_cpu.c cpu 3151 src/dps8/dps8_cpu.c cpu 3153 src/dps8/dps8_cpu.c if (cpu.g7_flag) cpu 3155 src/dps8/dps8_cpu.c cpu.g7_flag = false; cpu 3156 src/dps8/dps8_cpu.c cpu.interrupt_flag = false; cpu 3161 src/dps8/dps8_cpu.c if (cpu.tanddFetched) cpu 3163 src/dps8/dps8_cpu.c cpu.cu.IRODD = tanddIRODD; cpu 3164 src/dps8/dps8_cpu.c cpu.cu.XSF = 0; cpu 3165 src/dps8/dps8_cpu.c cpu.lufRFI = true; cpu 3166 src/dps8/dps8_cpu.c cpu.tanddFetchFault = true; cpu 3172 src/dps8/dps8_cpu.c cpu.g7FetchFault = ! is_dis; cpu 3177 src/dps8/dps8_cpu.c if (cpu.interrupt_flag) cpu 3184 src/dps8/dps8_cpu.c cpu.tanddFetchIntr = cpu.tanddFetched; cpu 3185 src/dps8/dps8_cpu.c cpu.tanddIRODD = tanddIRODD; cpu 3202 src/dps8/dps8_cpu.c cpu.lufCounter ++; cpu 3204 src/dps8/dps8_cpu.c if (LUF_OVER (cpu.CMR.luf)) cpu 3209 src/dps8/dps8_cpu.c cpu.lufOccurred = true; cpu 3225 src/dps8/dps8_cpu.c if (! tmp_priv_mode && cpu.lufOccurred) cpu 3230 src/dps8/dps8_cpu.c cpu 3232 src/dps8/dps8_cpu.c cpu 3235 src/dps8/dps8_cpu.c cpu 3255 src/dps8/dps8_cpu.c cpu 3256 src/dps8/dps8_cpu.c cpu 3261 src/dps8/dps8_cpu.c if (cpu.cycle == PSEUDO_FETCH_cycle) cpu 3263 src/dps8/dps8_cpu.c cpu.apu.lastCycle = INSTRUCTION_FETCH; cpu 3264 src/dps8/dps8_cpu.c cpu.cu.XSF = 0; cpu 3265 src/dps8/dps8_cpu.c cpu.cu.TSN_VALID [0] = 0; cpu 3266 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 3267 src/dps8/dps8_cpu.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 3268 src/dps8/dps8_cpu.c cpu.wasInhibited = false; cpu 3270 src/dps8/dps8_cpu.c else if (cpu.tanddFetched) cpu 3272 src/dps8/dps8_cpu.c cpu.tanddFetched = false; // fetched at the start (T&D) cpu 3277 src/dps8/dps8_cpu.c cpu.isExec = false; cpu 3278 src/dps8/dps8_cpu.c cpu.isXED = false; cpu 3282 src/dps8/dps8_cpu.c cpu.cu.XSF = 0; cpu 3284 src/dps8/dps8_cpu.c cpu.cu.TSN_VALID [0] = 0; cpu 3285 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 3286 src/dps8/dps8_cpu.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 3287 src/dps8/dps8_cpu.c PNL (cpu.prepare_state = ps_PIA); cpu 3288 src/dps8/dps8_cpu.c PNL (L68_ (cpu.INS_FETCH = true;)) cpu 3289 src/dps8/dps8_cpu.c fetchInstruction (cpup, cpu.PPR.IC); cpu 3304 src/dps8/dps8_cpu.c if (UNLIKELY (cpu.becomeSlave)) { cpu 3305 src/dps8/dps8_cpu.c cpu.becomeSlave = false; cpu 3311 src/dps8/dps8_cpu.c cpu.syncClockModePoll = 0; cpu 3315 src/dps8/dps8_cpu.c if (cpu.syncClockModeCache || --cpu.syncClockModePoll <= 0) { cpu 3317 src/dps8/dps8_cpu.c cpu.syncClockModePoll = cpu.tweaks.isolts_mode ? 1 : syncClockModePollRate; cpu 3323 src/dps8/dps8_cpu.c cpu.syncClockModeCache = true; cpu 3329 src/dps8/dps8_cpu.c cpu.masterCycleCnt ++; cpu 3330 src/dps8/dps8_cpu.c if (cpu.masterCycleCnt > masterCycleCntlimit) { cpu 3339 src/dps8/dps8_cpu.c if (cpu.workAllocation <= 0) { cpu 3364 src/dps8/dps8_cpu.c cpus[i].workAllocation += cpu.tweaks.isolts_mode ? 1 : workAllocationQuantum; cpu 3380 src/dps8/dps8_cpu.c cpu.syncClockModeCache = false; cpu 3395 src/dps8/dps8_cpu.c if (! cpu.isSlave) { cpu 3398 src/dps8/dps8_cpu.c sim_printf ("CPU%c becoming slave\r\n", cpu.cpuIdx + 'A'); cpu 3401 src/dps8/dps8_cpu.c cpu.isSlave = true; cpu 3404 src/dps8/dps8_cpu.c while (syncClockMode && cpu.workAllocation <= 0) cpu 3414 src/dps8/dps8_cpu.c cpu.syncClockModeCache = false; cpu 3415 src/dps8/dps8_cpu.c if (cpu.isSlave) { cpu 3418 src/dps8/dps8_cpu.c sim_printf ("CPU%c free; free at last\r\n", cpu.cpuIdx + 'A'); cpu 3420 src/dps8/dps8_cpu.c cpu.isSlave = false; cpu 3429 src/dps8/dps8_cpu.c if (LIKELY (! cpu.tweaks.isolts_mode) && cpu 3430 src/dps8/dps8_cpu.c UNLIKELY (! cpu.inMultics)) { cpu 3431 src/dps8/dps8_cpu.c cpu.inMultics = true; cpu 3441 src/dps8/dps8_cpu.c if (stall_points[i].segno && stall_points[i].segno == cpu.PPR.PSR && cpu 3442 src/dps8/dps8_cpu.c stall_points[i].offset && stall_points[i].offset == cpu.PPR.IC) cpu 3457 src/dps8/dps8_cpu.c if (GET_I (cpu.cu.IWB)) cpu 3458 src/dps8/dps8_cpu.c cpu.wasInhibited = true; cpu 3460 src/dps8/dps8_cpu.c cpu.lufExecIC = cpu.PPR.IC; cpu 3461 src/dps8/dps8_cpu.c cpu.lufAfterXfer = false; cpu 3465 src/dps8/dps8_cpu.c cpu.lastTag = ci->tag; cpu 3466 src/dps8/dps8_cpu.c cpu.rptXnSaved = false; cpu 3468 src/dps8/dps8_cpu.c if (cpu.tweaks.l68_mode) cpu 3471 src/dps8/dps8_cpu.c if (cpu.adr_trap_lock) cpu 3473 src/dps8/dps8_cpu.c cpu.adr_trap_lock = false; cpu 3474 src/dps8/dps8_cpu.c if (cpu.MR.ihrrs) cpu 3475 src/dps8/dps8_cpu.c cpu.MR.ihr = 0; cpu 3490 src/dps8/dps8_cpu.c cpu.wasXfer = false; cpu 3491 src/dps8/dps8_cpu.c cpu.isExec = true; cpu 3492 src/dps8/dps8_cpu.c if (cpu.cu.xdo) cpu 3493 src/dps8/dps8_cpu.c cpu.isXED = true; cpu 3495 src/dps8/dps8_cpu.c cpu.cu.XSF = 0; cpu 3496 src/dps8/dps8_cpu.c cpu.cu.TSN_VALID [0] = 0; cpu 3497 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 3498 src/dps8/dps8_cpu.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 3505 src/dps8/dps8_cpu.c cpu.cu.xde = cpu.cu.xdo = 0; cpu 3506 src/dps8/dps8_cpu.c cpu.isExec = false; cpu 3507 src/dps8/dps8_cpu.c cpu.isXED = false; cpu 3509 src/dps8/dps8_cpu.c cpu.wasXfer = true; cpu 3511 src/dps8/dps8_cpu.c if (cpu.cycle != EXEC_cycle) // fault or interrupt cpu 3519 src/dps8/dps8_cpu.c if (! (cpu.currentInstruction.opcode == 0715 && cpu 3520 src/dps8/dps8_cpu.c cpu.currentInstruction.opcodeX == 0)) cpu 3544 src/dps8/dps8_cpu.c if (TST_I_ABS && cpu.cu.XSF) cpu 3552 src/dps8/dps8_cpu.c cpu.wasXfer = false; cpu 3553 src/dps8/dps8_cpu.c cpu.lufXferIC = cpu.lufExecIC; cpu 3554 src/dps8/dps8_cpu.c cpu.lufAfterXfer = true; cpu 3568 src/dps8/dps8_cpu.c if (cpu.syncClockModeCache) { cpu 3633 src/dps8/dps8_cpu.c if (cpu.rTR <= ticks) cpu 3635 src/dps8/dps8_cpu.c if (cpu.tweaks.tro_enable) { cpu 3638 src/dps8/dps8_cpu.c cpu.rTR = (cpu.rTR - ticks) & MASK27; cpu 3641 src/dps8/dps8_cpu.c cpu.rTR = (cpu.rTR - ticks) & MASK27; cpu 3643 src/dps8/dps8_cpu.c if (cpu.rTR == 0) cpu 3644 src/dps8/dps8_cpu.c cpu.rTR = MASK27; cpu 3648 src/dps8/dps8_cpu.c unsigned long left = (unsigned long) ((uint64) (cpu.rTR) * 125u / 64u); cpu 3667 src/dps8/dps8_cpu.c cpu.rTR = (word27) (left * 64 / 125); cpu 3673 src/dps8/dps8_cpu.c if (cpu.tweaks.tro_enable) cpu 3679 src/dps8/dps8_cpu.c cpu.rTR = MASK27; cpu 3682 src/dps8/dps8_cpu.c cpu.rTRticks = 0; cpu 3706 src/dps8/dps8_cpu.c cpu.rTRticks = 0; cpu 3713 src/dps8/dps8_cpu.c if (cpu.rTR <= sys_opts.sys_poll_interval * 512) cpu 3715 src/dps8/dps8_cpu.c if (cpu.tweaks.tro_enable) { cpu 3718 src/dps8/dps8_cpu.c cpu.rTR = (cpu.rTR - sys_opts.sys_poll_interval * 512) & MASK27; cpu 3721 src/dps8/dps8_cpu.c cpu.rTR = (cpu.rTR - sys_opts.sys_poll_interval * 512) & MASK27; cpu 3722 src/dps8/dps8_cpu.c if (cpu.rTR == 0) cpu 3723 src/dps8/dps8_cpu.c cpu.rTR = MASK27; cpu 3729 src/dps8/dps8_cpu.c cpu.wasXfer = false; cpu 3737 src/dps8/dps8_cpu.c if ((! cpu.cu.repeat_first) && cpu 3738 src/dps8/dps8_cpu.c (cpu.cu.rpt || cpu 3739 src/dps8/dps8_cpu.c (cpu.cu.rd && (cpu.PPR.IC & 1)) || cpu 3740 src/dps8/dps8_cpu.c cpu.cu.rl)) cpu 3743 src/dps8/dps8_cpu.c if (cpu.cu.rd) cpu 3744 src/dps8/dps8_cpu.c -- cpu.PPR.IC; cpu 3745 src/dps8/dps8_cpu.c cpu.wasXfer = false; cpu 3751 src/dps8/dps8_cpu.c if (cpu.cycle == FAULT_EXEC_cycle && cpu 3752 src/dps8/dps8_cpu.c !cpu.cu.xde && cpu.cu.xdo) cpu 3761 src/dps8/dps8_cpu.c cpu.wasXfer = false; cpu 3762 src/dps8/dps8_cpu.c cpu.isExec = false; cpu 3763 src/dps8/dps8_cpu.c cpu.isXED = false; cpu 3765 src/dps8/dps8_cpu.c if (cpu.g7FetchFault) cpu 3766 src/dps8/dps8_cpu.c cpu.g7FetchFault = false; cpu 3769 src/dps8/dps8_cpu.c cpu.PPR.IC += ci->info->ndes; cpu 3770 src/dps8/dps8_cpu.c cpu.PPR.IC ++; cpu 3778 src/dps8/dps8_cpu.c if (cpu.cycle == INTERRUPT_EXEC_cycle && cpu 3779 src/dps8/dps8_cpu.c !cpu.cu.xde && cpu.cu.xdo) cpu 3787 src/dps8/dps8_cpu.c cpu.wasXfer = false; cpu 3788 src/dps8/dps8_cpu.c cpu.isExec = false; cpu 3789 src/dps8/dps8_cpu.c cpu.isXED = false; cpu 3796 src/dps8/dps8_cpu.c if (cpu.cu.xde && cpu.cu.xdo) cpu 3799 src/dps8/dps8_cpu.c cpu.cu.IWB = cpu.cu.IRODD; cpu 3800 src/dps8/dps8_cpu.c cpu.cu.xde = 0; cpu 3801 src/dps8/dps8_cpu.c cpu.isExec = true; cpu 3802 src/dps8/dps8_cpu.c cpu.isXED = true; cpu 3803 src/dps8/dps8_cpu.c cpu.cu.XSF = 0; cpu 3804 src/dps8/dps8_cpu.c cpu.cu.TSN_VALID [0] = 0; cpu 3805 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 3806 src/dps8/dps8_cpu.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 3810 src/dps8/dps8_cpu.c if (cpu.cu.xde || cpu.cu.xdo) // we are in an XEC/XED cpu 3812 src/dps8/dps8_cpu.c cpu.cu.xde = cpu.cu.xdo = 0; cpu 3813 src/dps8/dps8_cpu.c cpu.isExec = false; cpu 3814 src/dps8/dps8_cpu.c cpu.isXED = false; cpu 3816 src/dps8/dps8_cpu.c cpu.wasXfer = false; cpu 3817 src/dps8/dps8_cpu.c cpu.PPR.IC ++; cpu 3819 src/dps8/dps8_cpu.c cpu.PPR.IC += ci->info->ndes; cpu 3820 src/dps8/dps8_cpu.c cpu.wasInhibited = true; cpu 3826 src/dps8/dps8_cpu.c if (cpu.cycle != EXEC_cycle) cpu 3827 src/dps8/dps8_cpu.c sim_warn ("expected EXEC_cycle (%d)\r\n", cpu.cycle); cpu 3829 src/dps8/dps8_cpu.c cpu.cu.xde = cpu.cu.xdo = 0; cpu 3830 src/dps8/dps8_cpu.c cpu.isExec = false; cpu 3831 src/dps8/dps8_cpu.c cpu.isXED = false; cpu 3842 src/dps8/dps8_cpu.c if ((cpu.PPR.IC & 1) == 0 && cpu 3844 src/dps8/dps8_cpu.c !cpu.cu.repeat_first && !cpu.cu.rpt && !cpu.cu.rd && !cpu.cu.rl && cpu 3845 src/dps8/dps8_cpu.c !(cpu.currentInstruction.opcode == 0616 && cpu.currentInstruction.opcodeX == 0) && cpu 3846 src/dps8/dps8_cpu.c (cpu.PPR.IC & ~3u) != (cpu.last_write & ~3u)) cpu 3848 src/dps8/dps8_cpu.c cpu.PPR.IC ++; cpu 3849 src/dps8/dps8_cpu.c cpu.wasXfer = false; cpu 3850 src/dps8/dps8_cpu.c cpu.cu.IWB = cpu.cu.IRODD; cpu 3855 src/dps8/dps8_cpu.c cpu.PPR.IC ++; cpu 3857 src/dps8/dps8_cpu.c cpu.PPR.IC += ci->info->ndes; cpu 3860 src/dps8/dps8_cpu.c cpu.wasXfer = false; cpu 3872 src/dps8/dps8_cpu.c cpu.PPR.IC += ci->info->ndes; cpu 3873 src/dps8/dps8_cpu.c cpu.PPR.IC ++; cpu 3874 src/dps8/dps8_cpu.c cpu.wasXfer = false; cpu 3910 src/dps8/dps8_cpu.c if (((cpu.cu.APUCycleBits & 060) || cpu.secret_addressing_mode) && cpu 3911 src/dps8/dps8_cpu.c ! cpu.tanddFetchFault && cpu.faultNumber != FAULT_STR && cpu 3912 src/dps8/dps8_cpu.c ! cpu.tweaks.l68_mode) cpu 3914 src/dps8/dps8_cpu.c cpu.tanddFetchFault = false; cpu 3926 src/dps8/dps8_cpu.c if (cpu.faultNumber != FAULT_TRB || cpu.cu.xde == 0) cpu 3932 src/dps8/dps8_cpu.c word36 tmpIRODD = cpu.scu_data[7]; cpu 3934 src/dps8/dps8_cpu.c cpu.scu_data[7] = tmpIRODD; cpu 3936 src/dps8/dps8_cpu.c if (cpu.scuRFI) // see doFault cpu 3937 src/dps8/dps8_cpu.c putbits36_1 (& cpu.scu_data[5], 27, 1); cpu 3938 src/dps8/dps8_cpu.c cpu.scuRFI = false; cpu 3940 src/dps8/dps8_cpu.c if (cpu.l68OddFault && (cpu.l68PairAddr & 01777) <= 01775) cpu 3941 src/dps8/dps8_cpu.c core_read (cpup, cpu.l68PairAddr + 3, & cpu.scu_data[7], __func__); cpu 3942 src/dps8/dps8_cpu.c cpu.l68OddFault = false; cpu 3949 src/dps8/dps8_cpu.c cpu.PPR.PRR = 0; cpu 3950 src/dps8/dps8_cpu.c cpu.TPR.TRR = 0; cpu 3953 src/dps8/dps8_cpu.c uint fltAddress = (cpu.switches.FLT_BASE << 5) & 07740; cpu 3955 src/dps8/dps8_cpu.c if (cpu.is_FFV) cpu 3957 src/dps8/dps8_cpu.c cpu.is_FFV = false; cpu 3960 src/dps8/dps8_cpu.c fltAddress = (cpu.MR.FFV & MASK15) << 3; cpu 3965 src/dps8/dps8_cpu.c word24 addr = fltAddress + 2 * cpu.faultNumber; cpu 3967 src/dps8/dps8_cpu.c if (cpu.restart) cpu 3969 src/dps8/dps8_cpu.c cpu.restart = false; cpu 3970 src/dps8/dps8_cpu.c addr = cpu.restart_address; cpu 3975 src/dps8/dps8_cpu.c bool switches = cpu.execSwitches; cpu 3976 src/dps8/dps8_cpu.c word36 sw = cpu.switches.data_switches; cpu 3977 src/dps8/dps8_cpu.c cpu.execSwitches = false; cpu 3985 src/dps8/dps8_cpu.c cpu.cu.IWB = sw; cpu 3986 src/dps8/dps8_cpu.c cpu.cu.IRODD = 0000000011000; // nop cpu 3989 src/dps8/dps8_cpu.c core_read2 (cpup, addr, & cpu.cu.IWB, & cpu.cu.IRODD, __func__); cpu 3991 src/dps8/dps8_cpu.c HDBGMRead (addr, cpu.cu.IWB, "fault even"); cpu 3992 src/dps8/dps8_cpu.c HDBGMRead (addr + 1, cpu.cu.IRODD, "fault odd"); cpu 3994 src/dps8/dps8_cpu.c cpu.cu.xde = 1; cpu 3995 src/dps8/dps8_cpu.c cpu.cu.xdo = 1; cpu 3996 src/dps8/dps8_cpu.c cpu.isExec = true; cpu 3997 src/dps8/dps8_cpu.c cpu.isXED = true; cpu 4011 src/dps8/dps8_cpu.c cpu.executing = false; cpu 4012 src/dps8/dps8_cpu.c cpu.inMultics = false; cpu 4035 src/dps8/dps8_cpu.c if (cycleCntAll > (unsigned long long)cpu.cycleCnt) cpu 4101 src/dps8/dps8_cpu.c cpu 4103 src/dps8/dps8_cpu.c cpu 4119 src/dps8/dps8_cpu.c dummy_IC = cpu.PPR.IC; cpu 4141 src/dps8/dps8_cpu.c DCDstruct * i = & cpu.currentInstruction; cpu 4161 src/dps8/dps8_cpu.c DCDstruct * i = & cpu.currentInstruction; cpu 4169 src/dps8/dps8_cpu.c ReadOperandRead (cpup, addr, & cpu.CY); cpu 4174 src/dps8/dps8_cpu.c Read2OperandRead (cpup, addr, cpu.Ypair); cpu 4179 src/dps8/dps8_cpu.c Read8 (cpup, addr, cpu.Yblock8, cpu.currentInstruction.b29); cpu 4184 src/dps8/dps8_cpu.c Read16 (cpup, addr, cpu.Yblock16); cpu 4190 src/dps8/dps8_cpu.c ReadOperandRead (cpup, addr + j, cpu.Yblock32 + j); cpu 4200 src/dps8/dps8_cpu.c ReadOperandRMW (cpup, addr, & cpu.CY); cpu 4205 src/dps8/dps8_cpu.c Read2OperandRead (cpup, addr, cpu.Ypair); cpu 4210 src/dps8/dps8_cpu.c Read8 (cpup, addr, cpu.Yblock8, cpu.currentInstruction.b29); cpu 4215 src/dps8/dps8_cpu.c Read16 (cpup, addr, cpu.Yblock16); cpu 4221 src/dps8/dps8_cpu.c ReadOperandRMW (cpup, addr + j, cpu.Yblock32 + j); cpu 4234 src/dps8/dps8_cpu.c WriteOperandStore (cpup, addr, cpu.CY); cpu 4239 src/dps8/dps8_cpu.c Write2OperandStore (cpup, addr + 0, cpu.Ypair); cpu 4244 src/dps8/dps8_cpu.c Write8 (cpup, addr, cpu.Yblock8, cpu.currentInstruction.b29); cpu 4249 src/dps8/dps8_cpu.c Write16 (cpup, addr, cpu.Yblock16); cpu 4256 src/dps8/dps8_cpu.c Write32 (cpup, addr, cpu.Yblock32); cpu 4263 src/dps8/dps8_cpu.c DCDstruct * i = & cpu.currentInstruction; cpu 4329 src/dps8/dps8_cpu.c PNL (cpu.portBusy = true;) cpu 4337 src/dps8/dps8_cpu.c addr, cpu.PPR.PSR, cpu.PPR.IC, ctx); cpu 4344 src/dps8/dps8_cpu.c (long long unsigned int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, addr, cpu 4371 src/dps8/dps8_cpu.c if (nBadParity && cpu.tweaks.tandd_mode && bad_parity_marked (addr)) cpu 4372 src/dps8/dps8_cpu.c cpu.scLockedOut = true; cpu 4375 src/dps8/dps8_cpu.c LOCK_CORE_WORD(addr, & cpu.coreLockState); cpu 4376 src/dps8/dps8_cpu.c if (cpu.coreLockState.locked_addr != 0) { cpu 4378 src/dps8/dps8_cpu.c addr, cpu.coreLockState.locked_addr, current_running_cpu_idx + 'A', cpu 4379 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); cpu 4382 src/dps8/dps8_cpu.c cpu.coreLockState.locked_addr = addr; cpu 4397 src/dps8/dps8_cpu.c PNL (cpu.portBusy = true;) cpu 4399 src/dps8/dps8_cpu.c if (cpu.tweaks.isolts_mode) cpu 4401 src/dps8/dps8_cpu.c if (cpu.MR.sdpap) cpu 4404 src/dps8/dps8_cpu.c cpu.MR.sdpap = 0; cpu 4406 src/dps8/dps8_cpu.c if (cpu.MR.separ) cpu 4409 src/dps8/dps8_cpu.c cpu.MR.separ = 0; cpu 4413 src/dps8/dps8_cpu.c LOCK_CORE_WORD(addr, & cpu.coreLockState); cpu 4424 src/dps8/dps8_cpu.c (long long unsigned int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, cpu 4443 src/dps8/dps8_cpu.c if (cpu.coreLockState.locked_addr != addr) cpu 4446 src/dps8/dps8_cpu.c addr, cpu.coreLockState.locked_addr, current_running_cpu_idx + 'A', cpu 4447 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); cpu 4454 src/dps8/dps8_cpu.c cpu.coreLockState.locked_addr = 0; cpu 4460 src/dps8/dps8_cpu.c if (cpu.coreLockState.locked_addr != 0) { cpu 4462 src/dps8/dps8_cpu.c cpu.coreLockState.locked_addr, current_running_cpu_idx + 'A', cpu 4463 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); cpu 4465 src/dps8/dps8_cpu.c STORE_REL_CORE_WORD(cpu.coreLockState.locked_addr, M[cpu.coreLockState.locked_addr]); cpu 4467 src/dps8/dps8_cpu.c cpu.coreLockState.locked_addr = 0; cpu 4478 src/dps8/dps8_cpu.c PNL (cpu.portBusy = true;) cpu 4479 src/dps8/dps8_cpu.c if (cpu.tweaks.isolts_mode) cpu 4481 src/dps8/dps8_cpu.c if (cpu.MR.sdpap) cpu 4484 src/dps8/dps8_cpu.c cpu.MR.sdpap = 0; cpu 4486 src/dps8/dps8_cpu.c if (cpu.MR.separ) cpu 4489 src/dps8/dps8_cpu.c cpu.MR.separ = 0; cpu 4497 src/dps8/dps8_cpu.c v = (v & ~cpu.zone) | (data & cpu.zone); cpu 4500 src/dps8/dps8_cpu.c M[mapAddr] = (M[mapAddr] & ~cpu.zone) | (data & cpu.zone); cpu 4502 src/dps8/dps8_cpu.c cpu.useZone = false; // Safety cpu 4507 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, cpu 4527 src/dps8/dps8_cpu.c PNL (cpu.portBusy = true;) cpu 4546 src/dps8/dps8_cpu.c addr, cpu.PPR.PSR, cpu.PPR.IC, ctx); cpu 4553 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, cpu 4563 src/dps8/dps8_cpu.c addr, cpu.coreLockState.locked_addr, current_running_cpu_idx + 'A', cpu 4564 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); cpu 4583 src/dps8/dps8_cpu.c addr, cpu.PPR.PSR, cpu.PPR.IC, ctx); cpu 4590 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, cpu 4600 src/dps8/dps8_cpu.c addr, cpu.coreLockState.locked_addr, current_running_cpu_idx + 'A', cpu 4601 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); cpu 4621 src/dps8/dps8_cpu.c PNL (cpu.portBusy = true;) cpu 4629 src/dps8/dps8_cpu.c if (cpu.tweaks.isolts_mode) { cpu 4630 src/dps8/dps8_cpu.c if (cpu.MR.sdpap) { cpu 4632 src/dps8/dps8_cpu.c cpu.MR.sdpap = 0; cpu 4634 src/dps8/dps8_cpu.c if (cpu.MR.separ) { cpu 4636 src/dps8/dps8_cpu.c cpu.MR.separ = 0; cpu 4643 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, cpu 4649 src/dps8/dps8_cpu.c LOCK_CORE_WORD(addr, & cpu.coreLockState); cpu 4666 src/dps8/dps8_cpu.c (long long unsigned int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, cpu 4672 src/dps8/dps8_cpu.c LOCK_CORE_WORD(addr, & cpu.coreLockState); cpu 4723 src/dps8/dps8_cpu.c (void)memset (& cpu.currentEISinstruction, 0, cpu 4724 src/dps8/dps8_cpu.c sizeof (cpu.currentEISinstruction)); cpu 4759 src/dps8/dps8_cpu.c else if (cpu.PPR.P) cpu 4774 src/dps8/dps8_cpu.c return ! (cpu.secret_addressing_mode || TST_I_NBAR); cpu 4779 src/dps8/dps8_cpu.c if (cpu.secret_addressing_mode) cpu 4817 src/dps8/dps8_cpu.c cpu.secret_addressing_mode = false; cpu 4824 src/dps8/dps8_cpu.c cpu.PPR.P = 1; cpu 4872 src/dps8/dps8_cpu.c if (cpu . BAR.BOUND == 0) cpu 4885 src/dps8/dps8_cpu.c if (addr >= (((word18) cpu . BAR.BOUND) << 9)) cpu 4889 src/dps8/dps8_cpu.c word18 barAddr = (addr + (((word18) cpu . BAR.BASE) << 9)) & 0777777; cpu 4899 src/dps8/dps8_cpu.c cpu.history [hset] [cpu.history_cyclic[hset]] [0] = w0; cpu 4900 src/dps8/dps8_cpu.c cpu.history [hset] [cpu.history_cyclic[hset]] [1] = w1; cpu 4901 src/dps8/dps8_cpu.c cpu.history_cyclic[hset] = (cpu.history_cyclic[hset] + 1) % N_MODEL_HIST_SIZE; cpu 4907 src/dps8/dps8_cpu.c cpu.history [hset] [cpu.history_cyclic[hset]] [0] = w0; cpu 4908 src/dps8/dps8_cpu.c cpu.history [hset] [cpu.history_cyclic[hset]] [1] = w1; cpu 4909 src/dps8/dps8_cpu.c cpu.history_cyclic[hset] = (cpu.history_cyclic[hset] + 1) % N_MODEL_HIST_SIZE; cpu 4914 src/dps8/dps8_cpu.c if (cpu.skip_cu_hist) cpu 4916 src/dps8/dps8_cpu.c if (! cpu.MR_cache.emr) cpu 4918 src/dps8/dps8_cpu.c if (! cpu.MR_cache.ihr) cpu 4920 src/dps8/dps8_cpu.c if (cpu.MR_cache.hrxfr && ! cpu.wasXfer) cpu 4929 src/dps8/dps8_cpu.c w1 |= ((word36)(cpu.iefpFinalAddress & MASK24) << 12); cpu 4953 src/dps8/dps8_cpu.c add_history (cpu.tweaks.l68_mode ? L68_APU_HIST_REG : DPS8M_APU_HIST_REG, w0, w1); cpu 5011 src/dps8/dps8_cpu.c if (cpu.skip_cu_hist) cpu 5013 src/dps8/dps8_cpu.c if (! cpu.MR_cache.emr) cpu 5015 src/dps8/dps8_cpu.c if (! cpu.MR_cache.ihr) cpu 5019 src/dps8/dps8_cpu.c if (getbits36_1 (cpu.MR_cache.r, 29) && cpu 5021 src/dps8/dps8_cpu.c cpu.currentInstruction.opcode != getbits36_9 (cpu.MR_cache.r, 18) || cpu 5022 src/dps8/dps8_cpu.c (cpu.currentInstruction.opcodeX ? 1u : 0u) != getbits36_1 (cpu.MR_cache.r, 27))) cpu 5035 src/dps8/dps8_cpu.c PNL (putbits36_8 (& w0, 0, cpu.prepare_state);) cpu 5037 src/dps8/dps8_cpu.c putbits36_1 (& w0, 8, cpu.wasXfer); cpu 5039 src/dps8/dps8_cpu.c putbits36_1 (& w0, 9, cpu.cu.xde); cpu 5041 src/dps8/dps8_cpu.c putbits36_1 (& w0, 10, cpu.cu.xdo); cpu 5045 src/dps8/dps8_cpu.c putbits36_1 (& w0, 12, cpu.cu.rpt); cpu 5048 src/dps8/dps8_cpu.c PNL (putbits36_1 (& w0, 14, cpu.AR_F_E);) cpu 5050 src/dps8/dps8_cpu.c putbits36_1 (& w0, 15, cpu.cycle != INTERRUPT_cycle?1:0); cpu 5052 src/dps8/dps8_cpu.c putbits36_1 (& w0, 16, cpu.cycle != FAULT_cycle?1:0); cpu 5054 src/dps8/dps8_cpu.c putbits36_1 (& w0, 17, TSTF (cpu.cu.IR, I_NBAR)?1:0); cpu 5059 src/dps8/dps8_cpu.c putbits36_18 (& w1, 0, cpu.TPR.CA); cpu 5062 src/dps8/dps8_cpu.c PNL (putbits36_1 (& w1, 59-36, (cpu.portSelect == 0)?1:0);) cpu 5063 src/dps8/dps8_cpu.c PNL (putbits36_1 (& w1, 60-36, (cpu.portSelect == 1)?1:0);) cpu 5064 src/dps8/dps8_cpu.c PNL (putbits36_1 (& w1, 61-36, (cpu.portSelect == 2)?1:0);) cpu 5065 src/dps8/dps8_cpu.c PNL (putbits36_1 (& w1, 62-36, (cpu.portSelect == 3)?1:0);) cpu 5067 src/dps8/dps8_cpu.c putbits36_1 (& w1, 63-36, cpu.interrupt_flag?1:0); cpu 5082 src/dps8/dps8_cpu.c if (cpu.MR.hrhlt && cpu.history_cyclic[CU_HIST_REG] == 0) cpu 5085 src/dps8/dps8_cpu.c if (cpu.MR.ihrrs) cpu 5087 src/dps8/dps8_cpu.c cpu.MR.ihr = 0; cpu 5145 src/dps8/dps8_cpu.c PNL (add_history (cpup, L68_DU_HIST_REG, cpu.du.cycle1, cpu.du.cycle2);) cpu 5155 src/dps8/dps8_cpu.c putbits36_9 (& w0, 0, cpu.ou.RS); cpu 5158 src/dps8/dps8_cpu.c putbits36_1 (& w0, 9, cpu.ou.characterOperandSize ? 1 : 0); cpu 5161 src/dps8/dps8_cpu.c putbits36_3 (& w0, 10, cpu.ou.characterOperandOffset); cpu 5164 src/dps8/dps8_cpu.c putbits36_1 (& w0, 13, cpu.ou.crflag); cpu 5167 src/dps8/dps8_cpu.c putbits36_1 (& w0, 14, cpu.ou.directOperandFlag ? 1 : 0); cpu 5170 src/dps8/dps8_cpu.c putbits36_2 (& w0, 15, cpu.ou.eac); cpu 5174 src/dps8/dps8_cpu.c putbits36_9 (& w0, 18, cpu.ou.RS); cpu 5177 src/dps8/dps8_cpu.c putbits36_1 (& w0, 27, cpu.ou.RB1_FULL); cpu 5180 src/dps8/dps8_cpu.c putbits36_1 (& w0, 28, cpu.ou.RP_FULL); cpu 5183 src/dps8/dps8_cpu.c putbits36_1 (& w0, 29, cpu.ou.RS_FULL); cpu 5186 src/dps8/dps8_cpu.c putbits36_6 (& w0, 30, (word6) (cpu.ou.cycle >> 3)); cpu 5189 src/dps8/dps8_cpu.c putbits36_3 (& w1, 36-36, (word3) cpu.ou.cycle); cpu 5192 src/dps8/dps8_cpu.c putbits36_1 (& w1, 39-36, cpu.ou.STR_OP); cpu 5198 src/dps8/dps8_cpu.c (word10) ~opcodes10 [cpu.ou.RS].reg_use); cpu 5203 src/dps8/dps8_cpu.c putbits36_18 (& w1, 54 - 36, cpu.PPR.IC); cpu 5265 src/dps8/dps8_cpu.c putbits36_15 (& w0, 0, cpu.TPR.TSR); cpu 5267 src/dps8/dps8_cpu.c PNL (putbits36_1 (& w0, 15, (cpu.apu.state & apu_ESN_SNR) ? 1 : 0);) cpu 5268 src/dps8/dps8_cpu.c PNL (putbits36_1 (& w0, 16, (cpu.apu.state & apu_ESN_TSR) ? 1 : 0);) cpu 5270 src/dps8/dps8_cpu.c putbits36_1 (& w0, 25, cpu.cu.SDWAMM); cpu 5272 src/dps8/dps8_cpu.c putbits36_4 (& w0, 26, (word4) cpu.SDWAMR); cpu 5274 src/dps8/dps8_cpu.c putbits36_1 (& w0, 30, cpu.cu.PTWAMM); cpu 5276 src/dps8/dps8_cpu.c putbits36_4 (& w0, 31, (word4) cpu.PTWAMR); cpu 5278 src/dps8/dps8_cpu.c PNL (putbits36_1 (& w0, 35, (cpu.apu.state & apu_FLT) ? 1 : 0);) cpu 5281 src/dps8/dps8_cpu.c PNL (putbits36_24 (& w1, 0, cpu.APUMemAddr);) cpu 5283 src/dps8/dps8_cpu.c putbits36_3 (& w1, 24, cpu.TPR.TRR); cpu 5286 src/dps8/dps8_cpu.c putbits36_1 (& w1, 34, cpu.SDW0.C); cpu 583 src/dps8/dps8_cpu.h # define TA1 cpu.du.TAk[0] cpu 584 src/dps8/dps8_cpu.h # define TA2 cpu.du.TAk[1] cpu 585 src/dps8/dps8_cpu.h # define TA3 cpu.du.TAk[2] cpu 1042 src/dps8/dps8_cpu.h #define USE_IRODD (cpu.cu.rd && ((cpu. PPR.IC & 1) != 0)) cpu 1043 src/dps8/dps8_cpu.h #define IWB_IRODD (USE_IRODD ? cpu.cu.IRODD : cpu.cu.IWB) cpu 1200 src/dps8/dps8_cpu.h #define DU_CYCLE_GDLDA { clrmask (& cpu.du.cycle2, du2_nGDLDA); \ cpu 1201 src/dps8/dps8_cpu.h setmask (& cpu.du.cycle2, du2_nGDLDB | du2_nGDLDC); } cpu 1202 src/dps8/dps8_cpu.h #define DU_CYCLE_GDLDB { clrmask (& cpu.du.cycle2, du2_nGDLDB); \ cpu 1203 src/dps8/dps8_cpu.h setmask (& cpu.du.cycle2, du2_nGDLDA | du2_nGDLDC); } cpu 1204 src/dps8/dps8_cpu.h #define DU_CYCLE_GDLDC { clrmask (& cpu.du.cycle2, du2_nGDLDC); \ cpu 1205 src/dps8/dps8_cpu.h setmask (& cpu.du.cycle2, du2_nGDLDA | du2_nGDLDB); } cpu 1206 src/dps8/dps8_cpu.h #define DU_CYCLE_FA_I1 setmask (& cpu.du.cycle1, du1_FA_I1) cpu 1207 src/dps8/dps8_cpu.h #define DU_CYCLE_FA_I2 setmask (& cpu.du.cycle1, du1_FA_I2) cpu 1208 src/dps8/dps8_cpu.h #define DU_CYCLE_FA_I3 setmask (& cpu.du.cycle1, du1_FA_I3) cpu 1209 src/dps8/dps8_cpu.h #define DU_CYCLE_ANLD1 setmask (& cpu.du.cycle2, du2_ANLD1) cpu 1210 src/dps8/dps8_cpu.h #define DU_CYCLE_ANLD2 setmask (& cpu.du.cycle2, du2_ANLD2) cpu 1211 src/dps8/dps8_cpu.h #define DU_CYCLE_NLD1 setmask (& cpu.du.cycle2, du2_NLD1) cpu 1212 src/dps8/dps8_cpu.h #define DU_CYCLE_NLD2 setmask (& cpu.du.cycle2, du2_NLD2) cpu 1213 src/dps8/dps8_cpu.h #define DU_CYCLE_FRND setmask (& cpu.du.cycle2, du2_FRND) cpu 1214 src/dps8/dps8_cpu.h #define DU_CYCLE_DGBD setmask (& cpu.du.cycle2, du2_DGBD) cpu 1215 src/dps8/dps8_cpu.h #define DU_CYCLE_DGDB setmask (& cpu.du.cycle2, du2_DGDB) cpu 1216 src/dps8/dps8_cpu.h #define DU_CYCLE_DDU_LDEA clrmask (& cpu.du.cycle1, du1_nDDU_LDEA) cpu 1217 src/dps8/dps8_cpu.h #define DU_CYCLE_DDU_STEA clrmask (& cpu.du.cycle1, du1_nDDU_STEA) cpu 1218 src/dps8/dps8_cpu.h #define DU_CYCLE_END clrmask (& cpu.du.cycle1, du1_nEND) cpu 1219 src/dps8/dps8_cpu.h #define DU_CYCLE_LDWRT1 setmask (& cpu.du.cycle2, du2_LDWRT1) cpu 1220 src/dps8/dps8_cpu.h #define DU_CYCLE_LDWRT2 setmask (& cpu.du.cycle2, du2_LDWRT2) cpu 1221 src/dps8/dps8_cpu.h #define DU_CYCLE_FEXOP setmask (& cpu.du.cycle2, du2_FEXOP) cpu 1222 src/dps8/dps8_cpu.h #define DU_CYCLE_ANSTR setmask (& cpu.du.cycle2, du2_ANSTR) cpu 1223 src/dps8/dps8_cpu.h #define DU_CYCLE_GSTR setmask (& cpu.du.cycle2, du2_GSTR) cpu 1224 src/dps8/dps8_cpu.h #define DU_CYCLE_FLEN_128 clrmask (& cpu.du.cycle2, du2_nFLEN_128) cpu 1225 src/dps8/dps8_cpu.h #define DU_CYCLE_FDUD { cpu.du.cycle1 = \ cpu 1248 src/dps8/dps8_cpu.h cpu.du.cycle2 = \ cpu 1257 src/dps8/dps8_cpu.h #define DU_CYCLE_nDUD clrmask (& cpu.du.cycle2, du2_DUD) cpu 1261 src/dps8/dps8_cpu.h # define CPT(R,C) cpu.cpt[R][C]=1 cpu 1262 src/dps8/dps8_cpu.h # define CPTUR(C) cpu.cpt[cpt5L][C]=1 cpu 1536 src/dps8/dps8_cpu.h #define N_MODEL_WAM_ENTRIES (cpu.tweaks.l68_mode ? N_L68_WAM_ENTRIES : N_DPS8M_WAM_ENTRIES) cpu 1847 src/dps8/dps8_cpu.h if (cpu.tweaks.useMap) \ cpu 1849 src/dps8/dps8_cpu.h word24 maddr = cpu.sc_interlace ? \ cpu 1853 src/dps8/dps8_cpu.h int base = cpu.sc_addr_map[pgnum]; \ cpu 1856 src/dps8/dps8_cpu.h if (cpu.tweaks.tandd_mode) \ cpu 1866 src/dps8/dps8_cpu.h if (cpu.tweaks.useMap) \ cpu 1868 src/dps8/dps8_cpu.h word24 maddr = cpu.sc_interlace ? \ cpu 1872 src/dps8/dps8_cpu.h int base = cpu.sc_addr_map[pgnum]; \ cpu 1875 src/dps8/dps8_cpu.h if (cpu.tweaks.tandd_mode) \ cpu 2041 src/dps8/dps8_cpu.h #define GET_PR_BITNO(n) (cpu.PAR[n].PR_BITNO) cpu 2042 src/dps8/dps8_cpu.h #define GET_AR_BITNO(n) (cpu.PAR[n].AR_BITNO) cpu 2043 src/dps8/dps8_cpu.h #define GET_AR_CHAR(n) (cpu.PAR[n].AR_CHAR) cpu 2052 src/dps8/dps8_cpu.h cpu.PAR[n].PR_BITNO = b; cpu 2053 src/dps8/dps8_cpu.h cpu.PAR[n].AR_BITNO = (b % 9) & MASK4; cpu 2054 src/dps8/dps8_cpu.h cpu.PAR[n].AR_CHAR = (b / 9) & MASK2; cpu 2056 src/dps8/dps8_cpu.h cpu.PAR[n].AR_BITNO = (b - 27) & MASK4; cpu 2057 src/dps8/dps8_cpu.h cpu.PAR[n].AR_CHAR = 3; cpu 2058 src/dps8/dps8_cpu.h cpu.PAR[n].PR_BITNO = 27 + cpu.PAR[n].AR_BITNO; cpu 2064 src/dps8/dps8_cpu.h cpu.PAR[n].PR_BITNO = c * 9 + b; cpu 2065 src/dps8/dps8_cpu.h cpu.PAR[n].AR_BITNO = b & MASK4; cpu 2066 src/dps8/dps8_cpu.h cpu.PAR[n].AR_CHAR = c & MASK2; cpu 2084 src/dps8/dps8_cpu.h cpu.portSelect = port; cpu 2085 src/dps8/dps8_cpu.h cpu.portAddr [port] = a; cpu 2086 src/dps8/dps8_cpu.h cpu.portData [port] = d; cpu 2087 src/dps8/dps8_cpu.h cpu.portBusy = false; cpu 2101 src/dps8/dps8_cpu.h PNL (cpu.portBusy = true;) cpu 2112 src/dps8/dps8_cpu.h PNL (cpu.portBusy = true;) cpu 2114 src/dps8/dps8_cpu.h if (cpu.tweaks.isolts_mode) cpu 2116 src/dps8/dps8_cpu.h if (cpu.MR.sdpap) cpu 2119 src/dps8/dps8_cpu.h cpu.MR.sdpap = 0; cpu 2121 src/dps8/dps8_cpu.h if (cpu.MR.separ) cpu 2124 src/dps8/dps8_cpu.h cpu.MR.separ = 0; cpu 2136 src/dps8/dps8_cpu.h PNL (cpu.portBusy = true;) cpu 2138 src/dps8/dps8_cpu.h if (cpu.tweaks.isolts_mode) cpu 2140 src/dps8/dps8_cpu.h if (cpu.MR.sdpap) cpu 2143 src/dps8/dps8_cpu.h cpu.MR.sdpap = 0; cpu 2145 src/dps8/dps8_cpu.h if (cpu.MR.separ) cpu 2148 src/dps8/dps8_cpu.h cpu.MR.separ = 0; cpu 2151 src/dps8/dps8_cpu.h M[addr] = (M[addr] & ~cpu.zone) | (data & cpu.zone); cpu 2152 src/dps8/dps8_cpu.h cpu.useZone = false; // Safety cpu 2161 src/dps8/dps8_cpu.h PNL (cpu.portBusy = true;) cpu 2173 src/dps8/dps8_cpu.h PNL (cpu.portBusy = true;) cpu 2175 src/dps8/dps8_cpu.h if (cpu.tweaks.isolts_mode) cpu 2177 src/dps8/dps8_cpu.h if (cpu.MR.sdpap) cpu 2180 src/dps8/dps8_cpu.h cpu.MR.sdpap = 0; cpu 2182 src/dps8/dps8_cpu.h if (cpu.MR.separ) cpu 2185 src/dps8/dps8_cpu.h cpu.MR.separ = 0; cpu 2488 src/dps8/dps8_cpu.h #define SC_LOCKOUT_WAIT() do { if (cpu.scLockedOut) sc_lockout_wait (cpup); } while (0) cpu 68 src/dps8/dps8_eis.c #define DBG_CTR cpu.cycleCnt cpu 327 src/dps8/dps8_eis.c return cpu.rX [X (reg)]; cpu 338 src/dps8/dps8_eis.c return GETHI (cpu.rA); cpu 344 src/dps8/dps8_eis.c return GETHI (cpu.rQ); cpu 347 src/dps8/dps8_eis.c return cpu.PPR.IC; cpu 353 src/dps8/dps8_eis.c return cpu.rA; // See AL36, Table 4-1 cpu 359 src/dps8/dps8_eis.c return cpu.rQ; // See AL36, Table 4-1 cpu 401 src/dps8/dps8_eis.c return GETHI (cpu.rA); cpu 407 src/dps8/dps8_eis.c return GETHI (cpu.rQ); cpu 417 src/dps8/dps8_eis.c cpu 418 src/dps8/dps8_eis.c cpu 444 src/dps8/dps8_eis.c return cpu.PPR.IC; cpu 450 src/dps8/dps8_eis.c return GETLO (cpu.rA); cpu 456 src/dps8/dps8_eis.c return GETLO (cpu.rQ); cpu 471 src/dps8/dps8_eis.c return cpu.rX [n - 8]; cpu 493 src/dps8/dps8_eis.c return GETHI (cpu.rA); cpu 499 src/dps8/dps8_eis.c return GETHI (cpu.rQ); cpu 519 src/dps8/dps8_eis.c return cpu.PPR.IC; cpu 525 src/dps8/dps8_eis.c return cpu.rA; cpu 531 src/dps8/dps8_eis.c return cpu.rQ; cpu 546 src/dps8/dps8_eis.c return cpu.rX [n - 8]; cpu 552 src/dps8/dps8_eis.c #define EISADDR_IDX(p) ((p) - cpu.currentEISinstruction.addr) cpu 557 src/dps8/dps8_eis.c word3 saveTRR = cpu.TPR.TRR; cpu 563 src/dps8/dps8_eis.c cpu.TPR.TRR = p -> RNR; cpu 564 src/dps8/dps8_eis.c cpu.TPR.TSR = p -> SNR; cpu 565 src/dps8/dps8_eis.c cpu.cu.XSF = 0; cpu 577 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Write8 TRR %o TSR %05o\r\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } cpu 589 src/dps8/dps8_eis.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 590 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 591 src/dps8/dps8_eis.c cpu.cu.XSF = 0; cpu 601 src/dps8/dps8_eis.c __func__, p -> cachedParagraph [i], cpu.TPR.TSR, p -> cachedAddr + i); cpu 605 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Write8 NO PR TRR %o TSR %05o\r\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } cpu 615 src/dps8/dps8_eis.c cpu.TPR.TRR = saveTRR; cpu 621 src/dps8/dps8_eis.c word3 saveTRR = cpu.TPR.TRR; cpu 640 src/dps8/dps8_eis.c cpu.TPR.TRR = p -> RNR; cpu 641 src/dps8/dps8_eis.c cpu.TPR.TSR = p -> SNR; cpu 642 src/dps8/dps8_eis.c cpu.cu.XSF = 0; cpu 644 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Read8 TRR %o TSR %05o\r\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } cpu 659 src/dps8/dps8_eis.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 660 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 661 src/dps8/dps8_eis.c cpu.cu.XSF = 0; cpu 665 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Read8 NO PR TRR %o TSR %05o\r\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } cpu 672 src/dps8/dps8_eis.c __func__, p -> cachedParagraph [i], cpu.TPR.TSR, paragraphAddress + i); cpu 680 src/dps8/dps8_eis.c cpu.TPR.TRR = saveTRR; cpu 688 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISWriteIdx addr %06o n %u\r\n", cpu.du.Dk_PTR_W[eisaddr_idx], n); cpu 689 src/dps8/dps8_eis.c word18 addressN = (cpu.du.Dk_PTR_W[eisaddr_idx] + n) & AMASK; cpu 727 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISReadIdx addr %06o n %u\r\n", cpu.du.Dk_PTR_W[eisaddr_idx], n); cpu 728 src/dps8/dps8_eis.c word18 addressN = (cpu.du.Dk_PTR_W[eisaddr_idx] + n) & AMASK; cpu 757 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISRead addr %06o\r\n", cpu.du.Dk_PTR_W[eisaddr_idx]); cpu 770 src/dps8/dps8_eis.c cpu 786 src/dps8/dps8_eis.c word18 addressN = (cpu.du.Dk_PTR_W[eisaddr_idx] + n) & AMASK; cpu 799 src/dps8/dps8_eis.c word3 saveTRR = cpu.TPR.TRR; cpu 803 src/dps8/dps8_eis.c cpu.TPR.TRR = p -> RNR; cpu 804 src/dps8/dps8_eis.c cpu.TPR.TSR = p -> SNR; cpu 805 src/dps8/dps8_eis.c cpu.cu.XSF = 0; cpu 814 src/dps8/dps8_eis.c __func__, data [i], cpu.TPR.TSR, addressN + i); cpu 826 src/dps8/dps8_eis.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 827 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 828 src/dps8/dps8_eis.c cpu.cu.XSF = 0; cpu 837 src/dps8/dps8_eis.c __func__, data [i], cpu.TPR.TSR, addressN + i); cpu 840 src/dps8/dps8_eis.c cpu.TPR.TRR = saveTRR; cpu 848 src/dps8/dps8_eis.c word18 addressN = (cpu.du.Dk_PTR_W[eisaddr_idx] + n) & AMASK; cpu 861 src/dps8/dps8_eis.c word3 saveTRR = cpu.TPR.TRR; cpu 865 src/dps8/dps8_eis.c cpu.TPR.TRR = p -> RNR; cpu 866 src/dps8/dps8_eis.c cpu.TPR.TSR = p -> SNR; cpu 867 src/dps8/dps8_eis.c cpu.cu.XSF = 0; cpu 876 src/dps8/dps8_eis.c __func__, data [i], cpu.TPR.TSR, addressN + i); cpu 888 src/dps8/dps8_eis.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 889 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 890 src/dps8/dps8_eis.c cpu.cu.XSF = 0; cpu 899 src/dps8/dps8_eis.c __func__, data [i], cpu.TPR.TSR, addressN + i); cpu 902 src/dps8/dps8_eis.c cpu.TPR.TRR = saveTRR; cpu 907 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 911 src/dps8/dps8_eis.c switch (cpu.du.TAk[k-1]) cpu 931 src/dps8/dps8_eis.c PNL (cpu.du.Dk_PTR_W[k-1] = address); cpu 933 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[k-1] = address; cpu 941 src/dps8/dps8_eis.c switch (cpu.du.TAk[k-1]) cpu 959 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISGet469 : k: %u TAk %u coffset %u c %o\r\n", k, cpu.du.TAk[k - 1], residue, c); cpu 969 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 973 src/dps8/dps8_eis.c switch (cpu.du.TAk[k-1]) cpu 993 src/dps8/dps8_eis.c PNL (cpu.du.Dk_PTR_W[k-1] = address); cpu 995 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[k-1] = address; cpu 1003 src/dps8/dps8_eis.c switch (cpu.du.TAk[k-1]) cpu 1039 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[eisaddr_idx] = (cpu.du.Dk_PTR_W[eisaddr_idx] + 1) & AMASK; cpu 1074 src/dps8/dps8_eis.c baseBitPosn += (int) cpu.du.CHTALLY; cpu 1080 src/dps8/dps8_eis.c word18 saveAddr = cpu.du.Dk_PTR_W[eisaddr_idx]; cpu 1081 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[eisaddr_idx] += (uint) woff; cpu 1082 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[eisaddr_idx] &= AMASK; cpu 1104 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[eisaddr_idx] = saveAddr; cpu 1113 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 1153 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 1159 src/dps8/dps8_eis.c e -> MF1 = getbits36_7 (cpu.cu.IWB, 29); cpu 1164 src/dps8/dps8_eis.c e -> MF2 = getbits36_7 (cpu.cu.IWB, 11); cpu 1169 src/dps8/dps8_eis.c e -> MF3 = getbits36_7 (cpu.cu.IWB, 2); cpu 1200 src/dps8/dps8_eis.c cpu 1201 src/dps8/dps8_eis.c cpu 1224 src/dps8/dps8_eis.c PNL (cpu.du.Dk_PTR_W[k-1] = address); cpu 1226 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[k-1] = address; cpu 1258 src/dps8/dps8_eis.c address = (cpu.AR [n].WORDNO + SIGNEXT15_18 (offset)) & AMASK; cpu 1260 src/dps8/dps8_eis.c PNL (cpu.du.Dk_PTR_W[k-1] = address); cpu 1262 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[k-1] = address; cpu 1266 src/dps8/dps8_eis.c cpu.cu.TSN_PRNO[k-1] = n; cpu 1267 src/dps8/dps8_eis.c cpu.cu.TSN_VALID[k-1] = 1; cpu 1268 src/dps8/dps8_eis.c e -> addr [k - 1].SNR = cpu.PR [n].SNR; cpu 1269 src/dps8/dps8_eis.c e -> addr [k - 1].RNR = max3 (cpu.PR [n].RNR, cpu 1270 src/dps8/dps8_eis.c cpu.TPR.TRR, cpu 1271 src/dps8/dps8_eis.c cpu.PPR.PRR); cpu 1292 src/dps8/dps8_eis.c PNL (cpu.du.Dk_PTR_W[k-1] = address); cpu 1295 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[k-1] = address; cpu 1313 src/dps8/dps8_eis.c PNL (cpu.du.POP = 0); cpu 1314 src/dps8/dps8_eis.c PNL (cpu.du.POL = 0); cpu 1319 src/dps8/dps8_eis.c if (i < cpu.currentInstruction.info -> ndes) cpu 1329 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 1339 src/dps8/dps8_eis.c PNL (cpu.du.POP = 1); cpu 1350 src/dps8/dps8_eis.c cpu.du.TAk[k-1] = cpu.du.TAk[useTA-1]; cpu 1352 src/dps8/dps8_eis.c cpu.du.TAk[k-1] = getbits36_2 (opDesc, 21); // type alphanumeric cpu 1366 src/dps8/dps8_eis.c cpu.dataMode = 0102; // 9 bit an cpu 1367 src/dps8/dps8_eis.c cpu.ou.opsz = is_9 >> 12; cpu 1370 src/dps8/dps8_eis.c cpu.dataMode = 0042; // 6 bit an cpu 1371 src/dps8/dps8_eis.c cpu.ou.opsz = is_6 >> 12; cpu 1374 src/dps8/dps8_eis.c cpu.dataMode = 0022; // 4 bit an cpu 1375 src/dps8/dps8_eis.c cpu.ou.opsz = is_4 >> 12; cpu 1411 src/dps8/dps8_eis.c address = (cpu.AR [n].WORDNO + offset) & AMASK; cpu 1416 src/dps8/dps8_eis.c cpu.cu.TSN_PRNO[k-1] = n; cpu 1417 src/dps8/dps8_eis.c cpu.cu.TSN_VALID[k-1] = 1; cpu 1418 src/dps8/dps8_eis.c e -> addr [k - 1].SNR = cpu.PR [n].SNR; cpu 1419 src/dps8/dps8_eis.c e -> addr [k - 1].RNR = max3 (cpu.PR [n].RNR, cpu.TPR.TRR, cpu.PPR.PRR); cpu 1425 src/dps8/dps8_eis.c PNL (cpu.du.POL = 1); cpu 1437 src/dps8/dps8_eis.c switch (cpu.du.TAk[k-1]) cpu 1483 src/dps8/dps8_eis.c switch (cpu.du.TAk[k-1]) cpu 1530 src/dps8/dps8_eis.c cpu.currentInstruction.opcode == 024 && cpu 1531 src/dps8/dps8_eis.c cpu.currentInstruction.opcodeX == 1) ? 9u : 6u; cpu 1585 src/dps8/dps8_eis.c PNL (cpu.du.Dk_PTR_W[k-1] = effWORDNO); cpu 1587 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[k-1] = effWORDNO; cpu 1609 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 1621 src/dps8/dps8_eis.c PNL (cpu.du.POP = 1); cpu 1631 src/dps8/dps8_eis.c y = (cpu.AR [n].WORDNO + SIGNEXT15_18 (offset)) & AMASK; cpu 1636 src/dps8/dps8_eis.c cpu.cu.TSN_PRNO[k-1] = n; cpu 1637 src/dps8/dps8_eis.c cpu.cu.TSN_VALID[k-1] = 1; cpu 1638 src/dps8/dps8_eis.c e -> addr [k - 1].SNR = cpu.PR[n].SNR; cpu 1639 src/dps8/dps8_eis.c e -> addr [k - 1].RNR = max3 (cpu.PR [n].RNR, cpu.TPR.TRR, cpu.PPR.PRR); cpu 1646 src/dps8/dps8_eis.c PNL (cpu.du.Dk_PTR_W[k-1] = y); cpu 1649 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[k-1] = y; cpu 1664 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 1667 src/dps8/dps8_eis.c PNL (cpu.du.POP = 1); cpu 1683 src/dps8/dps8_eis.c address = (cpu.AR[n].WORDNO + SIGNEXT15_18(offset)) & AMASK; cpu 1688 src/dps8/dps8_eis.c cpu.cu.TSN_PRNO[k-1] = n; cpu 1689 src/dps8/dps8_eis.c cpu.cu.TSN_VALID[k-1] = 1; cpu 1690 src/dps8/dps8_eis.c e->addr[k-1].SNR = cpu.PR[n].SNR; cpu 1691 src/dps8/dps8_eis.c e->addr[k-1].RNR = max3(cpu.PR[n].RNR, cpu.TPR.TRR, cpu.PPR.PRR); cpu 1696 src/dps8/dps8_eis.c PNL (cpu.du.POL = 1); cpu 1705 src/dps8/dps8_eis.c cpu.dataMode = 0021; // 4 bit numeric cpu 1707 src/dps8/dps8_eis.c cpu.dataMode = 0101; // 9 bit numeric cpu 1809 src/dps8/dps8_eis.c cpu.du.TAk[k-1]); cpu 1818 src/dps8/dps8_eis.c PNL (cpu.du.Dk_PTR_W[k-1] = effWORDNO); cpu 1820 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[k-1] = effWORDNO; cpu 1833 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[k-1], a->cPos, a->bPos, k, e->N[k-1]); cpu 1850 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 1856 src/dps8/dps8_eis.c cpu.dataMode = 0010; // 1 bit not alpha, not alpha numeric cpu 1861 src/dps8/dps8_eis.c PNL (cpu.du.POP = 1); cpu 1872 src/dps8/dps8_eis.c address = (cpu.AR[n].WORDNO + SIGNEXT15_18(offset)) & AMASK; cpu 1878 src/dps8/dps8_eis.c cpu.cu.TSN_PRNO[k-1] = n; cpu 1879 src/dps8/dps8_eis.c cpu.cu.TSN_VALID[k-1] = 1; cpu 1880 src/dps8/dps8_eis.c e->addr[k-1].SNR = cpu.PR[n].SNR; cpu 1881 src/dps8/dps8_eis.c e->addr[k-1].RNR = max3(cpu.PR[n].RNR, cpu.TPR.TRR, cpu.PPR.PRR); cpu 1884 src/dps8/dps8_eis.c PNL (cpu.du.POL = 1); cpu 1932 src/dps8/dps8_eis.c PNL (cpu.du.Dk_PTR_W[k-1] = effWORDNO); cpu 1934 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[k-1] = effWORDNO; cpu 1944 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 1956 src/dps8/dps8_eis.c DCDstruct * i = & cpu.currentInstruction; cpu 1994 src/dps8/dps8_eis.c if (! cpu.tweaks.tandd_mode || cpu.currentInstruction.i || cpu 1995 src/dps8/dps8_eis.c unit <= cpu.tanddEISstart || unit % (2 * perWord)) cpu 1997 src/dps8/dps8_eis.c if (++ cpu.rTRlsb >= 4) cpu 1999 src/dps8/dps8_eis.c cpu.rTRlsb = 0; cpu 2000 src/dps8/dps8_eis.c cpu.rTR --; cpu 2001 src/dps8/dps8_eis.c cpu.lufTicks ++; cpu 2002 src/dps8/dps8_eis.c cpu.tanddTRTicks ++; cpu 2004 src/dps8/dps8_eis.c if (cpu.rTR & ~MASK27) cpu 2006 src/dps8/dps8_eis.c cpu.rTR &= MASK27; cpu 2007 src/dps8/dps8_eis.c if (cpu.tweaks.tro_enable) cpu 2015 src/dps8/dps8_eis.c bool g7 = noCheckTR ? (cpu.g7Faults & ~(1u << FAULT_TRO)) != 0 cpu 2016 src/dps8/dps8_eis.c : cpu.g7Faults != 0; cpu 2021 src/dps8/dps8_eis.c cpu.du.CHTALLY = unit; cpu 2025 src/dps8/dps8_eis.c cpu.interrupt_flag = true; cpu 2026 src/dps8/dps8_eis.c cpu.cycle = INTERRUPT_cycle; cpu 2027 src/dps8/dps8_eis.c longjmp (cpu.jmpMain, JMP_REENTRY); cpu 2054 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); cpu 2056 src/dps8/dps8_eis.c int32_t address = SIGNEXT15_32 (GET_OFFSET (cpu.cu.IWB)); cpu 2060 src/dps8/dps8_eis.c word4 reg = GET_TD (cpu.cu.IWB); // 4-bit register modification (None except cpu 2069 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) cpu 2080 src/dps8/dps8_eis.c augend = cpu.AR[ARn].WORDNO * 8u + GET_AR_CHAR (ARn) * 2u; cpu 2106 src/dps8/dps8_eis.c cpu.AR[ARn].WORDNO = (word18) (sum / 8) & AMASK; cpu 2138 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); cpu 2140 src/dps8/dps8_eis.c int32_t address = SIGNEXT15_32 (GET_OFFSET (cpu.cu.IWB)); cpu 2141 src/dps8/dps8_eis.c word4 reg = GET_TD (cpu.cu.IWB); // 4-bit register modification (None except cpu 2148 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) cpu 2151 src/dps8/dps8_eis.c minuend = cpu.AR [ARn].WORDNO * 32 + cntFromBit [GET_AR_CHAR (ARn) * 9 + GET_AR_BITNO (ARn)]; cpu 2163 src/dps8/dps8_eis.c cpu.AR [ARn].WORDNO = (word18) (difference / 32) & AMASK; cpu 2185 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); cpu 2187 src/dps8/dps8_eis.c int32_t address = SIGNEXT15_32 (GET_OFFSET (cpu.cu.IWB)); cpu 2188 src/dps8/dps8_eis.c word6 reg = GET_TD (cpu.cu.IWB); // 4-bit register modification (None except cpu 2210 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) cpu 2214 src/dps8/dps8_eis.c ARn, cpu.PAR[ARn].WORDNO, GET_AR_CHAR (ARn), cpu 2216 src/dps8/dps8_eis.c augend = cpu.AR[ARn].WORDNO * 36u + GET_AR_CHAR (ARn) * 9u + GET_AR_BITNO (ARn); cpu 2223 src/dps8/dps8_eis.c if (sz == 9 || GET_A (cpu.cu.IWB)) cpu 2249 src/dps8/dps8_eis.c cpu.AR [ARn].WORDNO = (word18) (sum / 36) & AMASK; cpu 2263 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); cpu 2266 src/dps8/dps8_eis.c word18 address = SIGNEXT15_18 (GET_OFFSET (cpu.cu.IWB)); cpu 2269 src/dps8/dps8_eis.c word4 reg = (word4) GET_TD (cpu.cu.IWB); cpu 2284 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) cpu 2292 src/dps8/dps8_eis.c cpu.AR[ARn].WORDNO = (cpu.AR[ARn].WORDNO + address + cpu 2306 src/dps8/dps8_eis.c cpu.AR[ARn].WORDNO = (address + r / 36) & MASK18; cpu 2326 src/dps8/dps8_eis.c cpu 2328 src/dps8/dps8_eis.c cpu 2335 src/dps8/dps8_eis.c cpu 2355 src/dps8/dps8_eis.c cpu 2359 src/dps8/dps8_eis.c cpu 2360 src/dps8/dps8_eis.c cpu 2363 src/dps8/dps8_eis.c cpu 2368 src/dps8/dps8_eis.c cpu 2371 src/dps8/dps8_eis.c cpu 2379 src/dps8/dps8_eis.c cpu 2412 src/dps8/dps8_eis.c cpu 2422 src/dps8/dps8_eis.c cpu 2446 src/dps8/dps8_eis.c cpu 2466 src/dps8/dps8_eis.c cpu 2467 src/dps8/dps8_eis.c cpu 2473 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); cpu 2475 src/dps8/dps8_eis.c int32_t address = SIGNEXT15_32 (GET_OFFSET (cpu.cu.IWB)); cpu 2478 src/dps8/dps8_eis.c word4 reg = (word4) GET_TD (cpu.cu.IWB); cpu 2489 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) cpu 2493 src/dps8/dps8_eis.c ARn, cpu.PAR[ARn].WORDNO, GET_AR_CHAR (ARn), cpu 2497 src/dps8/dps8_eis.c augend = cpu.AR [ARn].WORDNO; cpu 2511 src/dps8/dps8_eis.c cpu.AR[ARn].WORDNO = (word18) sum & AMASK; cpu 2520 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); cpu 2522 src/dps8/dps8_eis.c word18 address = SIGNEXT15_18 (GET_OFFSET (cpu.cu.IWB)); cpu 2523 src/dps8/dps8_eis.c word4 reg = (word4) GET_TD (cpu.cu.IWB); cpu 2529 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) cpu 2532 src/dps8/dps8_eis.c cpu.AR[ARn].WORDNO = (cpu.AR[ARn].WORDNO - cpu 2542 src/dps8/dps8_eis.c cpu.AR[ARn].WORDNO = (- (address + r / 36)) & MASK18; cpu 2556 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); cpu 2558 src/dps8/dps8_eis.c int32_t address = SIGNEXT15_32 (GET_OFFSET (cpu.cu.IWB)); cpu 2561 src/dps8/dps8_eis.c word4 reg = (word4) GET_TD (cpu.cu.IWB); cpu 2572 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) cpu 2576 src/dps8/dps8_eis.c ARn, cpu.PAR[ARn].WORDNO, GET_AR_CHAR (ARn), cpu 2580 src/dps8/dps8_eis.c minued = cpu.AR [ARn].WORDNO; cpu 2593 src/dps8/dps8_eis.c cpu.AR [ARn].WORDNO = (word18) difference & AMASK; cpu 2602 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); cpu 2604 src/dps8/dps8_eis.c word18 address = SIGNEXT15_18 (GET_OFFSET (cpu.cu.IWB)); cpu 2607 src/dps8/dps8_eis.c word4 reg = (word4) GET_TD (cpu.cu.IWB); cpu 2616 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) cpu 2621 src/dps8/dps8_eis.c cpu.AR[ARn].WORDNO = (cpu.AR[ARn].WORDNO - cpu 2633 src/dps8/dps8_eis.c cpu.AR[ARn].WORDNO = (- (address + (r + 3) / 4)) & MASK18; cpu 2888 src/dps8/dps8_eis.c uint ARn = GET_ARN (cpu.cu.IWB); cpu 2889 src/dps8/dps8_eis.c uint address = SIGNEXT15_18 (GET_OFFSET (cpu.cu.IWB)); cpu 2890 src/dps8/dps8_eis.c word4 reg = (word4) GET_TD (cpu.cu.IWB); // 4-bit register modification (None except cpu 2924 src/dps8/dps8_eis.c if (GET_A (cpu.cu.IWB)) cpu 2929 src/dps8/dps8_eis.c augend = cpu.AR[ARn].WORDNO * 36u; cpu 2948 src/dps8/dps8_eis.c augend = cpu.AR[ARn].WORDNO * 36u + map [charno * 16 + bitno]; cpu 3008 src/dps8/dps8_eis.c cpu.AR [ARn].WORDNO = (word18) (sum / 36u) & AMASK; cpu 3085 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 3160 src/dps8/dps8_eis.c word9 fill = getbits36_9 (cpu.cu.IWB, 0); cpu 3168 src/dps8/dps8_eis.c for (; cpu.du.CHTALLY < min (e->N1, e->N2); cpu.du.CHTALLY ++) cpu 3170 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, TDPER (e -> TA1)); cpu 3171 src/dps8/dps8_eis.c word9 c1 = EISget469 (cpup, 1, cpu.du.CHTALLY); // get Y-char1n cpu 3172 src/dps8/dps8_eis.c word9 c2 = EISget469 (cpup, 2, cpu.du.CHTALLY); // get Y-char2n cpu 3173 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "cmpc tally %d c1 %03o c2 %03o\r\n", cpu.du.CHTALLY, c1, c2); cpu 3186 src/dps8/dps8_eis.c for( ; cpu.du.CHTALLY < e->N2; cpu.du.CHTALLY ++) cpu 3188 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, TDPER (e -> TA1)); cpu 3190 src/dps8/dps8_eis.c word9 c2 = EISget469 (cpup, 2, cpu.du.CHTALLY); // get Y-char2n cpu 3204 src/dps8/dps8_eis.c for ( ; cpu.du.CHTALLY < e->N1; cpu.du.CHTALLY ++) cpu 3206 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, TDPER (e -> TA1)); cpu 3207 src/dps8/dps8_eis.c word9 c1 = EISget469 (cpup, 1, cpu.du.CHTALLY); // get Y-char1n cpu 3231 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 3320 src/dps8/dps8_eis.c c1 = (cpu.du.D2_PTR_W >> 13) & 017; cpu 3321 src/dps8/dps8_eis.c c2 = (cpu.du.D2_PTR_W >> 9) & 017; cpu 3330 src/dps8/dps8_eis.c c1 = (cpu.du.D2_PTR_W >> 12) & 077; cpu 3331 src/dps8/dps8_eis.c c2 = (cpu.du.D2_PTR_W >> 6) & 077; cpu 3340 src/dps8/dps8_eis.c c1 = (cpu.du.D2_PTR_W >> 9) & 0777; cpu 3341 src/dps8/dps8_eis.c c2 = (cpu.du.D2_PTR_W ) & 0777; cpu 3385 src/dps8/dps8_eis.c for ( ; cpu.du.CHTALLY < limit; cpu.du.CHTALLY ++) cpu 3387 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, 3); // 6 chars/cycle: PM842 05B-07B <= 9 TROs, PA887 12A TRO inside cpu 3388 src/dps8/dps8_eis.c yCharn11 = EISget469 (cpup, 1, cpu.du.CHTALLY); cpu 3389 src/dps8/dps8_eis.c yCharn12 = EISget469 (cpup, 1, cpu.du.CHTALLY + 1); cpu 3393 src/dps8/dps8_eis.c SC_I_TALLY (cpu.du.CHTALLY == limit); cpu 3401 src/dps8/dps8_eis.c word36 CY3 = setbits36_24 (0, 12, cpu.du.CHTALLY); cpu 3415 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 3504 src/dps8/dps8_eis.c c1 = (cpu.du.D2_PTR_W >> 13) & 017; cpu 3505 src/dps8/dps8_eis.c c2 = (cpu.du.D2_PTR_W >> 9) & 017; cpu 3514 src/dps8/dps8_eis.c c1 = (cpu.du.D2_PTR_W >> 12) & 077; cpu 3515 src/dps8/dps8_eis.c c2 = (cpu.du.D2_PTR_W >> 6) & 077; cpu 3524 src/dps8/dps8_eis.c c1 = (cpu.du.D2_PTR_W >> 9) & 0777; cpu 3525 src/dps8/dps8_eis.c c2 = (cpu.du.D2_PTR_W ) & 0777; cpu 3571 src/dps8/dps8_eis.c for ( ; cpu.du.CHTALLY < limit; cpu.du.CHTALLY ++) cpu 3573 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, 3); // 6 chars/cycle: PM842 05B-07B <= 9 TROs, PA887 12A TRO inside cpu 3574 src/dps8/dps8_eis.c yCharn11 = EISget469 (cpup, 1, limit - cpu.du.CHTALLY - 1); cpu 3575 src/dps8/dps8_eis.c yCharn12 = EISget469 (cpup, 1, limit - cpu.du.CHTALLY); cpu 3580 src/dps8/dps8_eis.c SC_I_TALLY (cpu.du.CHTALLY == limit); cpu 3588 src/dps8/dps8_eis.c word36 CY3 = setbits36_24 (0, 12, cpu.du.CHTALLY); cpu 3602 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 3685 src/dps8/dps8_eis.c uint mask = (uint) getbits36_9 (cpu.cu.IWB, 0); cpu 3741 src/dps8/dps8_eis.c for ( ; cpu.du.CHTALLY < limit; cpu.du.CHTALLY ++) cpu 3743 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, 3); // 6 chars/cycle: PM842 05B-07B <= 9 TROs, PA887 12A TRO inside cpu 3744 src/dps8/dps8_eis.c word9 yCharn1 = EISget469 (cpup, 1, cpu.du.CHTALLY); cpu 3755 src/dps8/dps8_eis.c word36 CY3 = setbits36_24 (0, 12, cpu.du.CHTALLY); cpu 3757 src/dps8/dps8_eis.c SC_I_TALLY (cpu.du.CHTALLY == limit); cpu 3771 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 3858 src/dps8/dps8_eis.c uint mask = (uint) getbits36_9 (cpu.cu.IWB, 0); cpu 3913 src/dps8/dps8_eis.c for ( ; cpu.du.CHTALLY < limit; cpu.du.CHTALLY ++) cpu 3915 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, 3); // 6 chars/cycle: PM842 05B-07B <= 9 TROs, PA887 12A TRO inside cpu 3916 src/dps8/dps8_eis.c word9 yCharn1 = EISget469 (cpup, 1, limit - cpu.du.CHTALLY - 1); cpu 3927 src/dps8/dps8_eis.c word36 CY3 = setbits36_24 (0, 12, cpu.du.CHTALLY); cpu 3929 src/dps8/dps8_eis.c SC_I_TALLY (cpu.du.CHTALLY == limit); cpu 3984 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 4129 src/dps8/dps8_eis.c for ( ; cpu.du.CHTALLY < e -> N1; cpu.du.CHTALLY ++) cpu 4131 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, 2); // a table read per char cpu 4132 src/dps8/dps8_eis.c word9 c = EISget469 (cpup, 1, cpu.du.CHTALLY); // get src char cpu 4164 src/dps8/dps8_eis.c SC_I_TALLY (cpu.du.CHTALLY == e -> N1); cpu 4167 src/dps8/dps8_eis.c putbits36_24 (& CY3, 12, cpu.du.CHTALLY); cpu 4177 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 4326 src/dps8/dps8_eis.c for ( ; cpu.du.CHTALLY < limit; cpu.du.CHTALLY ++) cpu 4328 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, 2); // a table read per char cpu 4329 src/dps8/dps8_eis.c word9 c = EISget469 (cpup, 1, limit - cpu.du.CHTALLY - 1); // get src char cpu 4361 src/dps8/dps8_eis.c SC_I_TALLY (cpu.du.CHTALLY == e -> N1); cpu 4364 src/dps8/dps8_eis.c putbits36_24 (& CY3, 12, cpu.du.CHTALLY); cpu 4436 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 4523 src/dps8/dps8_eis.c word1 T = getbits36_1 (cpu.cu.IWB, 9); cpu 4525 src/dps8/dps8_eis.c word9 fill = getbits36_9 (cpu.cu.IWB, 0); cpu 4579 src/dps8/dps8_eis.c cpu.du.CHTALLY, TA1, TA2, e -> N1, e -> N2, e -> CN1, e -> CN2); cpu 4583 src/dps8/dps8_eis.c cpu.du.CHTALLY, e -> TA1, e -> TA2, e -> N1, e -> N2, e -> CN1, e -> CN2); cpu 4598 src/dps8/dps8_eis.c if ((cpu.du.CHTALLY % PGSZ) == 0 && cpu 4611 src/dps8/dps8_eis.c (cpu.du.D1_PTR_W & PGMK) == 0 && cpu 4612 src/dps8/dps8_eis.c (cpu.du.D2_PTR_W & PGMK) == 0) cpu 4619 src/dps8/dps8_eis.c while (cpu.du.CHTALLY < e -> N1) cpu 4622 src/dps8/dps8_eis.c EISReadPage (cpup, & e -> ADDR1, cpu.du.CHTALLY / 4, pg); cpu 4623 src/dps8/dps8_eis.c EISWritePage (cpup, & e -> ADDR2, cpu.du.CHTALLY / 4, pg); cpu 4624 src/dps8/dps8_eis.c cpu.du.CHTALLY += PGSZ * 4; cpu 4638 src/dps8/dps8_eis.c if ((cpu.du.CHTALLY % PGSZ) == 0 && cpu 4651 src/dps8/dps8_eis.c (cpu.du.D1_PTR_W & PGMK) == 0 && cpu 4652 src/dps8/dps8_eis.c (cpu.du.D2_PTR_W& PGMK) == 0) cpu 4670 src/dps8/dps8_eis.c while (cpu.du.CHTALLY < e -> N2) cpu 4672 src/dps8/dps8_eis.c EISWritePage (cpup, & e -> ADDR2, cpu.du.CHTALLY / 4, pg); cpu 4673 src/dps8/dps8_eis.c cpu.du.CHTALLY += PGSZ * 4; cpu 4699 src/dps8/dps8_eis.c for ( ; cpu.du.CHTALLY < e -> N2; cpu.du.CHTALLY += 4) cpu 4701 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, 4); cpu 4702 src/dps8/dps8_eis.c uint n = cpu.du.CHTALLY / 4; cpu 4731 src/dps8/dps8_eis.c for ( ; cpu.du.CHTALLY < e -> N2; cpu.du.CHTALLY += 4) cpu 4733 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, 4); cpu 4734 src/dps8/dps8_eis.c uint n = cpu.du.CHTALLY / 4; cpu 4746 src/dps8/dps8_eis.c for ( ; cpu.du.CHTALLY < min (e->N1, e->N2); cpu.du.CHTALLY ++) cpu 4748 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, tdPer); cpu 4749 src/dps8/dps8_eis.c word9 c = EISget469 (cpup, 1, cpu.du.CHTALLY); // get src char cpu 4757 src/dps8/dps8_eis.c EISput469 (cpup, 2, cpu.du.CHTALLY, c); cpu 4795 src/dps8/dps8_eis.c if (ovp && (cpu.du.CHTALLY == e -> N1 - 1)) cpu 4801 src/dps8/dps8_eis.c EISput469 (cpup, 2, cpu.du.CHTALLY, cout); cpu 4813 src/dps8/dps8_eis.c for ( ; cpu.du.CHTALLY < e -> N2 ; cpu.du.CHTALLY ++) cpu 4815 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, tdPer); cpu 4817 src/dps8/dps8_eis.c if (ovp && (cpu.du.CHTALLY == e -> N2 - 1)) cpu 4820 src/dps8/dps8_eis.c EISput469 (cpup, 2, cpu.du.CHTALLY, 015); // 015 is decimal - cpu 4822 src/dps8/dps8_eis.c EISput469 (cpup, 2, cpu.du.CHTALLY, 014); // 014 is decimal + cpu 4825 src/dps8/dps8_eis.c EISput469 (cpup, 2, cpu.du.CHTALLY, fillT); cpu 4843 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 4930 src/dps8/dps8_eis.c word1 T = getbits36_1 (cpu.cu.IWB, 9); cpu 4932 src/dps8/dps8_eis.c word9 fill = getbits36_9 (cpu.cu.IWB, 0); cpu 5000 src/dps8/dps8_eis.c for ( ; cpu.du.CHTALLY < limit; cpu.du.CHTALLY += 4) cpu 5002 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, TDPER (e -> TA2)); cpu 5003 src/dps8/dps8_eis.c uint n = (limit - cpu.du.CHTALLY - 1) / 4; cpu 5036 src/dps8/dps8_eis.c for ( ; cpu.du.CHTALLY < e -> N2; cpu.du.CHTALLY += 4) cpu 5038 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, TDPER (e -> TA2)); cpu 5039 src/dps8/dps8_eis.c uint n = (limit - cpu.du.CHTALLY - 1) / 4; cpu 5050 src/dps8/dps8_eis.c for ( ; cpu.du.CHTALLY < min (e -> N1, e -> N2); cpu.du.CHTALLY ++) cpu 5052 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, TDPER (e -> TA2)); cpu 5053 src/dps8/dps8_eis.c word9 c = EISget469 (cpup, 1, e -> N1 - cpu.du.CHTALLY - 1); // get src char cpu 5061 src/dps8/dps8_eis.c EISput469 (cpup, 2, e -> N2 - cpu.du.CHTALLY - 1, c); cpu 5100 src/dps8/dps8_eis.c if (ovp && (cpu.du.CHTALLY == 0)) cpu 5105 src/dps8/dps8_eis.c EISput469 (cpup, 2, e -> N2 - cpu.du.CHTALLY - 1, cout); cpu 5117 src/dps8/dps8_eis.c for ( ; cpu.du.CHTALLY < e -> N2 ; cpu.du.CHTALLY ++) cpu 5119 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, TDPER (e -> TA2)); cpu 5121 src/dps8/dps8_eis.c if (ovp && (cpu.du.CHTALLY == e -> N2 - 1)) cpu 5124 src/dps8/dps8_eis.c EISput469 (cpup, 2, e -> N2 - cpu.du.CHTALLY - 1, 015); // 015 is decimal - cpu 5126 src/dps8/dps8_eis.c EISput469 (cpup, 2, e -> N2 - cpu.du.CHTALLY - 1, 014); // 014 is decimal + cpu 5130 src/dps8/dps8_eis.c EISput469 (cpup, 2, e -> N2 - cpu.du.CHTALLY - 1, fillT); cpu 5175 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 5338 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 5360 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 5371 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 5490 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 5534 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 5580 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 5614 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 5745 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 5820 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 5851 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 5920 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 5978 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 6049 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 6155 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 6265 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 6307 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 6364 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 6427 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 6493 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 6554 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 6619 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 6643 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[KMOP] = (cpu.du.Dk_PTR_W[KMOP] + 1) & AMASK; // bump source to next address cpu 6646 src/dps8/dps8_eis.c PNL (cpu.du.Dk_PTR_W[1] = (cpu.du.Dk_PTR_W[1] + 1) & AMASK); // bump source to next address cpu 6649 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[1] = (cpu.du.Dk_PTR_W[1] + 1) & AMASK; // bump source to next address cpu 6685 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 6827 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 6954 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 7176 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 7343 src/dps8/dps8_eis.c word1 T = getbits36_1 (cpu.cu.IWB, 9); cpu 7345 src/dps8/dps8_eis.c word9 fill = getbits36_9 (cpu.cu.IWB, 0); cpu 7366 src/dps8/dps8_eis.c for ( ; cpu.du.CHTALLY < min(e->N1, e->N2); cpu.du.CHTALLY ++) cpu 7368 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, TDPER (e -> TA2)); cpu 7369 src/dps8/dps8_eis.c word9 c = EISget469(cpup, 1, cpu.du.CHTALLY); // get src char cpu 7377 src/dps8/dps8_eis.c EISput469(cpup, 2, cpu.du.CHTALLY, xlate (cpup, &e->ADDR3, dstTA, c)); cpu 7422 src/dps8/dps8_eis.c EISput469 (cpup, 2, cpu.du.CHTALLY, cout); cpu 7458 src/dps8/dps8_eis.c for( ; cpu.du.CHTALLY < e->N2 ; cpu.du.CHTALLY ++) cpu 7460 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, TDPER (e -> TA2)); cpu 7461 src/dps8/dps8_eis.c EISput469 (cpup, 2, cpu.du.CHTALLY, cfill); cpu 7485 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 7658 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[eisaddr_idx] = (cpu.du.Dk_PTR_W[eisaddr_idx] + 1) & AMASK; // bump source to next address cpu 7721 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[eisaddr_idx] = (cpu.du.Dk_PTR_W[eisaddr_idx] + 1) & AMASK; // bump source to next address cpu 7791 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 7829 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character cpu 7831 src/dps8/dps8_eis.c word1 T = getbits36_1 (cpu.cu.IWB, 9); cpu 7832 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit cpu 8109 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 8202 src/dps8/dps8_eis.c bool F = getbits36_1 (cpu.cu.IWB, 0) != 0; // fill bit cpu 8203 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // T (enablefault) bit cpu 8205 src/dps8/dps8_eis.c uint BOLR = getbits36_4 (cpu.cu.IWB, 5); // T (enablefault) bit cpu 8234 src/dps8/dps8_eis.c for( ; cpu.du.CHTALLY < min(e->N1, e->N2); cpu.du.CHTALLY += 1) cpu 8236 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, 36); cpu 8246 src/dps8/dps8_eis.c cpu.du.Z = 0; cpu 8259 src/dps8/dps8_eis.c for(; cpu.du.CHTALLY < e->N2; cpu.du.CHTALLY += 1) cpu 8261 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, 36); cpu 8272 src/dps8/dps8_eis.c cpu.du.Z = 0; cpu 8289 src/dps8/dps8_eis.c SC_I_ZERO (cpu.du.Z); cpu 8339 src/dps8/dps8_eis.c baseBitPosn -= (int) cpu.du.CHTALLY; cpu 8361 src/dps8/dps8_eis.c word18 saveAddr = cpu.du.Dk_PTR_W[eisaddr_idx]; cpu 8362 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[eisaddr_idx] += (word18) woff; cpu 8363 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[eisaddr_idx] &= AMASK; cpu 8388 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[eisaddr_idx] = saveAddr; cpu 8397 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 8476 src/dps8/dps8_eis.c PNL (cpu.du.D1_PTR_W += (word18) numWords1); cpu 8477 src/dps8/dps8_eis.c PNL (cpu.du.D1_PTR_W &= AMASK); cpu 8479 src/dps8/dps8_eis.c cpu.du.D1_PTR_W += (word18) numWords1; cpu 8480 src/dps8/dps8_eis.c cpu.du.D1_PTR_W &= AMASK; cpu 8492 src/dps8/dps8_eis.c PNL (cpu.du.D2_PTR_W += (word18) numWords1); cpu 8493 src/dps8/dps8_eis.c PNL (cpu.du.D2_PTR_W &= AMASK); cpu 8495 src/dps8/dps8_eis.c cpu.du.D2_PTR_W += (word18) numWords1; cpu 8496 src/dps8/dps8_eis.c cpu.du.D2_PTR_W &= AMASK; cpu 8501 src/dps8/dps8_eis.c bool F = getbits36_1 (cpu.cu.IWB, 0) != 0; // fill bit cpu 8502 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // T (enablefault) bit cpu 8504 src/dps8/dps8_eis.c uint BOLR = getbits36_4 (cpu.cu.IWB, 5); // T (enablefault) bit cpu 8519 src/dps8/dps8_eis.c for( ; cpu.du.CHTALLY < min(e->N1, e->N2); cpu.du.CHTALLY += 1) cpu 8521 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, 36); cpu 8530 src/dps8/dps8_eis.c cpu.du.Z = 0; cpu 8542 src/dps8/dps8_eis.c for(; cpu.du.CHTALLY < e->N2; cpu.du.CHTALLY += 1) cpu 8544 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, 36); cpu 8555 src/dps8/dps8_eis.c cpu.du.Z = 0; cpu 8572 src/dps8/dps8_eis.c SC_I_ZERO (cpu.du.Z); cpu 8597 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 8690 src/dps8/dps8_eis.c bool F = getbits36_1 (cpu.cu.IWB, 0) != 0; // fill bit cpu 8691 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // T (enablefault) bit cpu 8693 src/dps8/dps8_eis.c uint BOLR = getbits36_4 (cpu.cu.IWB, 5); // T (enablefault) bit cpu 8723 src/dps8/dps8_eis.c for( ; cpu.du.CHTALLY < min (e->N1, e->N2); cpu.du.CHTALLY += 1) cpu 8725 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, 36); cpu 8734 src/dps8/dps8_eis.c cpu.du.Z = 0; cpu 8741 src/dps8/dps8_eis.c for (; cpu.du.CHTALLY < e->N2; cpu.du.CHTALLY += 1) cpu 8743 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, 36); cpu 8752 src/dps8/dps8_eis.c cpu.du.Z = 0; cpu 8761 src/dps8/dps8_eis.c SC_I_ZERO (cpu.du.Z); cpu 8786 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 8865 src/dps8/dps8_eis.c PNL (cpu.du.D1_PTR_W += (word18) numWords1); cpu 8866 src/dps8/dps8_eis.c PNL (cpu.du.D1_PTR_W &= AMASK); cpu 8868 src/dps8/dps8_eis.c cpu.du.D1_PTR_W += (word18) numWords1; cpu 8869 src/dps8/dps8_eis.c cpu.du.D1_PTR_W &= AMASK; cpu 8881 src/dps8/dps8_eis.c PNL (cpu.du.D2_PTR_W += (word18) numWords1); cpu 8882 src/dps8/dps8_eis.c PNL (cpu.du.D2_PTR_W &= AMASK); cpu 8884 src/dps8/dps8_eis.c cpu.du.D2_PTR_W += (word18) numWords1; cpu 8885 src/dps8/dps8_eis.c cpu.du.D2_PTR_W &= AMASK; cpu 8890 src/dps8/dps8_eis.c bool F = getbits36_1 (cpu.cu.IWB, 0) != 0; // fill bit cpu 8891 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // T (enablefault) bit cpu 8893 src/dps8/dps8_eis.c uint BOLR = getbits36_4 (cpu.cu.IWB, 5); // T (enablefault) bit cpu 8908 src/dps8/dps8_eis.c for( ; cpu.du.CHTALLY < min(e->N1, e->N2); cpu.du.CHTALLY += 1) cpu 8910 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, 36); cpu 8920 src/dps8/dps8_eis.c cpu.du.Z = 0; cpu 8928 src/dps8/dps8_eis.c for(; cpu.du.CHTALLY < e->N2; cpu.du.CHTALLY += 1) cpu 8930 src/dps8/dps8_eis.c tandd_eis_sample (cpup, cpu.du.CHTALLY, 36); cpu 8941 src/dps8/dps8_eis.c cpu.du.Z = 0; cpu 8951 src/dps8/dps8_eis.c SC_I_ZERO (cpu.du.Z); cpu 9000 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[eisaddr_idx] += 1; cpu 9001 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[eisaddr_idx] &= AMASK; cpu 9022 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 9075 src/dps8/dps8_eis.c bool F = getbits36_1 (cpu.cu.IWB, 0) != 0; // fill bit cpu 9104 src/dps8/dps8_eis.c if (cpu.tweaks.tandd_mode) cpu 9105 src/dps8/dps8_eis.c for ( ; i < cpu.du.CHTALLY; i ++) cpu 9196 src/dps8/dps8_eis.c cpu 9261 src/dps8/dps8_eis.c cpu 9302 src/dps8/dps8_eis.c cpu 9363 src/dps8/dps8_eis.c cpu 9364 src/dps8/dps8_eis.c cpu 9366 src/dps8/dps8_eis.c cpu 9367 src/dps8/dps8_eis.c cpu 9463 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 9489 src/dps8/dps8_eis.c cpu.du.Dk_PTR_W[eisaddr_idx] = (cpu.du.Dk_PTR_W[eisaddr_idx] + 1) & AMASK; // bump source to next address cpu 9516 src/dps8/dps8_eis.c cpu 9560 src/dps8/dps8_eis.c cpu 9631 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 9734 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control cpu 9919 src/dps8/dps8_eis.c cpu 9940 src/dps8/dps8_eis.c cpu 10067 src/dps8/dps8_eis.c cpu 10092 src/dps8/dps8_eis.c cpu 10093 src/dps8/dps8_eis.c cpu 10120 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 10316 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 10353 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control cpu 10354 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // truncation bit cpu 10355 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit cpu 10675 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 10714 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control cpu 10715 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // truncation bit cpu 10716 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit cpu 11026 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 11066 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control cpu 11067 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // truncation bit cpu 11068 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit cpu 11347 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 11385 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control cpu 11386 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // truncation bit cpu 11387 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit cpu 11686 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 11723 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control cpu 11724 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // truncation bit cpu 11725 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit cpu 11965 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 12003 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control cpu 12004 src/dps8/dps8_eis.c bool T = getbits36_1 (cpu.cu.IWB, 9) != 0; // truncation bit cpu 12005 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit cpu 13027 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 13065 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control cpu 13067 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit cpu 13431 src/dps8/dps8_eis.c EISstruct * e = & cpu.currentEISinstruction; cpu 13470 src/dps8/dps8_eis.c e->P = getbits36_1 (cpu.cu.IWB, 0) != 0; // 4-bit data sign character control cpu 13472 src/dps8/dps8_eis.c bool R = getbits36_1 (cpu.cu.IWB, 10) != 0; // rounding bit cpu 47 src/dps8/dps8_faults.c #define DBG_CTR cpu.cycleCnt cpu 258 src/dps8/dps8_faults.c sim_printf (" fault number %d (%o)\r\n", cpu . faultNumber, cpu . faultNumber); cpu 259 src/dps8/dps8_faults.c sim_printf (" subfault number %llu (%llo)\r\n", (unsigned long long) cpu.subFault.bits, cpu 260 src/dps8/dps8_faults.c (unsigned long long)cpu.subFault.bits); cpu 268 src/dps8/dps8_faults.c cpu . bTroubleFaultCycle = false; cpu 360 src/dps8/dps8_faults.c return cpu.tweaks.l68_mode ? 0 : cpu.neaPort; cpu 388 src/dps8/dps8_faults.c sim_printf (" TRO PSR:IC %05o:%06o\r\n", cpu.PPR.PSR, cpu.PPR.IC); cpu 393 src/dps8/dps8_faults.c sim_printf (" ACV %012llo PSR:IC %05o:%06o\r\n", subFault.bits, cpu.PPR.PSR, cpu.PPR.IC); cpu 405 src/dps8/dps8_faults.c cpu . bTroubleFaultCycle ? 'Y' : 'N', faultMsg); cpu 411 src/dps8/dps8_faults.c (void)atomic_fetch_add_explicit(&cpu.faults[faultNumber], 1u, memory_order_acquire); cpu 421 src/dps8/dps8_faults.c PNL (cpu.DACVpDF = faultNumber >= FAULT_DF0 && faultNumber <= FAULT_ACV;) cpu 425 src/dps8/dps8_faults.c fault_psr = cpu . PPR.PSR; cpu 426 src/dps8/dps8_faults.c fault_ic = cpu . PPR.IC; cpu 440 src/dps8/dps8_faults.c cpu.faultNumber = faultNumber; cpu 441 src/dps8/dps8_faults.c cpu.subFault = subFault; cpu 442 src/dps8/dps8_faults.c cpu.faultCnt [faultNumber] ++; cpu 446 src/dps8/dps8_faults.c cpu.CMR.csh_reg = 0; cpu 450 src/dps8/dps8_faults.c word3 FCT = cpu.cu.APUCycleBits & MASK3; cpu 452 src/dps8/dps8_faults.c cpu.cu.APUCycleBits = (word12) ((cpu.cu.APUCycleBits & 07770) | FCT); cpu 461 src/dps8/dps8_faults.c cpu 463 src/dps8/dps8_faults.c cpu 465 src/dps8/dps8_faults.c cpu 467 src/dps8/dps8_faults.c cpu 469 src/dps8/dps8_faults.c cpu . faultRegister [0] |= subFault.bits; cpu 474 src/dps8/dps8_faults.c cpu . faultRegister [0] |= FR_NEM; cpu 479 src/dps8/dps8_faults.c cpu . faultRegister [0] |= FR_OOB; cpu 490 src/dps8/dps8_faults.c cpu . faultRegister [0] |= FR_CON_A; cpu 493 src/dps8/dps8_faults.c cpu . faultRegister [0] |= FR_CON_B; cpu 496 src/dps8/dps8_faults.c cpu . faultRegister [0] |= FR_CON_C; cpu 499 src/dps8/dps8_faults.c cpu . faultRegister [0] |= FR_CON_D; cpu 509 src/dps8/dps8_faults.c cpu . cu . IRO_ISN = 0; cpu 510 src/dps8/dps8_faults.c cpu . cu . OEB_IOC = 0; cpu 511 src/dps8/dps8_faults.c cpu . cu . EOFF_IAIM = 0; cpu 512 src/dps8/dps8_faults.c cpu . cu . ORB_ISP = 0; cpu 513 src/dps8/dps8_faults.c cpu . cu . ROFF_IPR = 0; cpu 514 src/dps8/dps8_faults.c cpu . cu . OWB_NEA = 0; cpu 515 src/dps8/dps8_faults.c cpu . cu . WOFF_OOB = 0; cpu 516 src/dps8/dps8_faults.c cpu . cu . NO_GA = 0; cpu 517 src/dps8/dps8_faults.c cpu . cu . OCB = 0; cpu 518 src/dps8/dps8_faults.c cpu . cu . OCALL = 0; cpu 519 src/dps8/dps8_faults.c cpu . cu . BOC = 0; cpu 520 src/dps8/dps8_faults.c DPS8M_ (cpu . cu . PTWAM_ER = 0;) cpu 521 src/dps8/dps8_faults.c cpu . cu . CRT = 0; cpu 522 src/dps8/dps8_faults.c cpu . cu . RALR = 0; cpu 523 src/dps8/dps8_faults.c cpu . cu . SDWAM_ER = 0; cpu 524 src/dps8/dps8_faults.c cpu . cu . OOSB = 0; cpu 525 src/dps8/dps8_faults.c cpu . cu . PARU = 0; cpu 526 src/dps8/dps8_faults.c cpu . cu . PARL = 0; cpu 527 src/dps8/dps8_faults.c cpu . cu . ONC1 = 0; cpu 528 src/dps8/dps8_faults.c cpu . cu . ONC2 = 0; cpu 529 src/dps8/dps8_faults.c cpu . cu . IA = 0; cpu 530 src/dps8/dps8_faults.c cpu . cu . IACHN = 0; cpu 531 src/dps8/dps8_faults.c cpu . cu . CNCHN = (faultNumber == FAULT_CON) ? subFault.fault_con_subtype & MASK3 : 0; cpu 534 src/dps8/dps8_faults.c cpu . cu . FIF = cpu . cycle == FETCH_cycle ? 1 : 0; cpu 535 src/dps8/dps8_faults.c cpu . cu . FI_ADDR = (word5) faultNumber; cpu 541 src/dps8/dps8_faults.c cpu.l68OddFault = cpu.tweaks.l68_mode && cpu.cycle == EXEC_cycle && cpu 542 src/dps8/dps8_faults.c (cpu.PPR.IC & 1) && cpu.l68PairValid && cpu 543 src/dps8/dps8_faults.c ! (cpu.cu.xde || cpu.cu.xdo || cpu.cu.rpt || cpu 544 src/dps8/dps8_faults.c cpu.cu.rd || cpu.cu.rl) && cpu 552 src/dps8/dps8_faults.c if (cpu.cycle == FETCH_cycle && (cpu.cu.APUCycleBits & 03700) && cpu 553 src/dps8/dps8_faults.c ! (cpu.cu.APUCycleBits & 00070)) cpu 554 src/dps8/dps8_faults.c cpu.cu.APUCycleBits |= 04000; cpu 560 src/dps8/dps8_faults.c cpu . cu . rfi = 0; cpu 561 src/dps8/dps8_faults.c if (cpu.lufRFI) // T&D: lockup on a transfer, g7 fault at a fetch cpu 563 src/dps8/dps8_faults.c cpu.cu.rfi = 1; cpu 564 src/dps8/dps8_faults.c cpu.lufRFI = false; cpu 569 src/dps8/dps8_faults.c cpu.scuRFI = cpu.cu.FIF; cpu 573 src/dps8/dps8_faults.c if (cpu.rptXnSaved) cpu 576 src/dps8/dps8_faults.c cpu.rX[cpu.rptXn] = cpu.rptXnOld; cpu 577 src/dps8/dps8_faults.c cpu.rptXnSaved = false; cpu 581 src/dps8/dps8_faults.c if ((cpu.cu.rpt || cpu.cu.rd) && cpu.cycle == EXEC_cycle && cpu 584 src/dps8/dps8_faults.c if (cpu.rptUndo[k]) cpu 585 src/dps8/dps8_faults.c cpu.rX[cpu.rptUndo[k] - 1] = cpu 586 src/dps8/dps8_faults.c (cpu.rX[cpu.rptUndo[k] - 1] - cpu.cu.delta) & AMASK; cpu 587 src/dps8/dps8_faults.c cpu.rptUndo[0] = cpu.rptUndo[1] = 0; cpu 593 src/dps8/dps8_faults.c if (cpu.cycle == FETCH_cycle && cpu.cu.repeat_first && cpu 594 src/dps8/dps8_faults.c (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl)) cpu 596 src/dps8/dps8_faults.c cpu.PPR.IC = (cpu.PPR.IC - 1) & MASK18; cpu 597 src/dps8/dps8_faults.c cpu.cu.repeat_first = 0; cpu 598 src/dps8/dps8_faults.c cpu.cu.rpt = 0; cpu 599 src/dps8/dps8_faults.c cpu.cu.rd = 0; cpu 600 src/dps8/dps8_faults.c cpu.cu.rl = 0; cpu 601 src/dps8/dps8_faults.c cpu.scuRFI = true; cpu 610 src/dps8/dps8_faults.c SC_I_MIF (cpu.cycle == EXEC_cycle && cpu 611 src/dps8/dps8_faults.c (cpu.currentInstruction.info->ndes > 0 || cpu 613 src/dps8/dps8_faults.c cpu.currentInstruction.opcodeX && cpu 614 src/dps8/dps8_faults.c (cpu.currentInstruction.opcode & 0410) == 0))); cpu 624 src/dps8/dps8_faults.c cpu.scuRFI = true; cpu 626 src/dps8/dps8_faults.c cpu 627 src/dps8/dps8_faults.c cpu 628 src/dps8/dps8_faults.c cpu 630 src/dps8/dps8_faults.c cpu 631 src/dps8/dps8_faults.c cpu 645 src/dps8/dps8_faults.c cpu . cu . IRO_ISN = 1; cpu 647 src/dps8/dps8_faults.c cpu . cu . OEB_IOC = 1; cpu 649 src/dps8/dps8_faults.c cpu . cu . EOFF_IAIM = 1; cpu 651 src/dps8/dps8_faults.c cpu . cu . ORB_ISP = 1; cpu 653 src/dps8/dps8_faults.c cpu . cu . ROFF_IPR = 1; cpu 655 src/dps8/dps8_faults.c cpu . cu . OWB_NEA = 1; cpu 657 src/dps8/dps8_faults.c cpu . cu . WOFF_OOB = 1; cpu 659 src/dps8/dps8_faults.c cpu . cu . NO_GA = 1; cpu 661 src/dps8/dps8_faults.c cpu . cu . OCB = 1; cpu 663 src/dps8/dps8_faults.c cpu . cu . OCALL = 1; cpu 665 src/dps8/dps8_faults.c cpu . cu . BOC = 1; cpu 667 src/dps8/dps8_faults.c cpu . cu . PTWAM_ER = 1; cpu 669 src/dps8/dps8_faults.c cpu . cu . CRT = 1; cpu 671 src/dps8/dps8_faults.c cpu . cu . RALR = 1; cpu 673 src/dps8/dps8_faults.c cpu . cu . SDWAM_ER = 1; cpu 675 src/dps8/dps8_faults.c cpu . cu . OOSB = 1; cpu 680 src/dps8/dps8_faults.c cpu . cu . WOFF_OOB = 1; cpu 689 src/dps8/dps8_faults.c if (cpu.tweaks.tandd_mode && ! cpu.neaNoPort) cpu 691 src/dps8/dps8_faults.c cpu.cu.IA = 02; cpu 692 src/dps8/dps8_faults.c cpu.cu.IACHN = ia_port (cpup); cpu 695 src/dps8/dps8_faults.c cpu . cu . OWB_NEA = 1; cpu 699 src/dps8/dps8_faults.c cpu.cu.IA = 013; // store unit not ready (T&D) cpu 700 src/dps8/dps8_faults.c cpu.cu.IACHN = ia_port (cpup); cpu 708 src/dps8/dps8_faults.c cpu.cu.IA = (word4) (subFault.bits & 017); cpu 709 src/dps8/dps8_faults.c cpu.cu.IACHN = cpu.cu.IA ? ia_port (cpup) : 0; cpu 711 src/dps8/dps8_faults.c cpu.cu.PARU = 1; cpu 713 src/dps8/dps8_faults.c cpu.cu.PARL = 1; cpu 718 src/dps8/dps8_faults.c cpu . cu . OEB_IOC = 1; cpu 720 src/dps8/dps8_faults.c cpu . cu . EOFF_IAIM = 1; cpu 722 src/dps8/dps8_faults.c cpu . cu . ORB_ISP = 1; cpu 724 src/dps8/dps8_faults.c cpu . cu . ROFF_IPR = 1; cpu 729 src/dps8/dps8_faults.c cpu . cu . IA = 0; cpu 731 src/dps8/dps8_faults.c cpu . cu . IA = 010; cpu 741 src/dps8/dps8_faults.c if (cpu.MR.emr && cpu.MR.ihrrs) cpu 743 src/dps8/dps8_faults.c cpu.MR.ihr = 0; cpu 757 src/dps8/dps8_faults.c if (cpu.MR.emr && cpu.MR.ihrrs) cpu 766 src/dps8/dps8_faults.c cpu.MR.ihr = 0; cpu 773 src/dps8/dps8_faults.c cpu.MR.ihr = 0; cpu 779 src/dps8/dps8_faults.c if (cpu.cycle == FAULT_EXEC_cycle) cpu 783 src/dps8/dps8_faults.c cpu.faultNumber = FAULT_TRB; cpu 784 src/dps8/dps8_faults.c cpu.cu.FI_ADDR = FAULT_TRB; cpu 785 src/dps8/dps8_faults.c cpu.subFault.bits = 0; // XXX ??? cpu 786 src/dps8/dps8_faults.c if (cpu.bTroubleFaultCycle) cpu 796 src/dps8/dps8_faults.c cpu.PPR.IC); cpu 797 src/dps8/dps8_faults.c sim_printf("\r\nCycles = %"PRId64"\r\n", cpu.cycleCnt); cpu 798 src/dps8/dps8_faults.c sim_printf("\r\nInstructions = %"PRId64"\r\n", cpu.instrCnt); cpu 800 src/dps8/dps8_faults.c longjmp (cpu.jmpMain, JMP_STOP); cpu 808 src/dps8/dps8_faults.c cpu . bTroubleFaultCycle = true; cpu 813 src/dps8/dps8_faults.c cpu . bTroubleFaultCycle = false; cpu 818 src/dps8/dps8_faults.c if (cpu . cycle == EXEC_cycle) cpu 819 src/dps8/dps8_faults.c cpu.instrCnt ++; cpu 821 src/dps8/dps8_faults.c cpu . cycle = FAULT_cycle; cpu 823 src/dps8/dps8_faults.c longjmp (cpu.jmpMain, JMP_REENTRY); cpu 847 src/dps8/dps8_faults.c cpu.FFV_fault_number = fault_number; cpu 848 src/dps8/dps8_faults.c cpu.faultNumber = fault_number; cpu 856 src/dps8/dps8_faults.c cpu.FFV_faults &= ~lower; cpu 857 src/dps8/dps8_faults.c cpu.FFV_faults_preset &= ~lower; cpu 863 src/dps8/dps8_faults.c cpu.CMR.csh_reg = 0; cpu 867 src/dps8/dps8_faults.c word3 FCT = cpu.cu.APUCycleBits & MASK3; cpu 869 src/dps8/dps8_faults.c cpu.cu.APUCycleBits = (word12) ((cpu.cu.APUCycleBits & 07770) | FCT); cpu 873 src/dps8/dps8_faults.c cpu.faultRegister [0] = 0; cpu 877 src/dps8/dps8_faults.c cpu.cu.IRO_ISN = 0; cpu 878 src/dps8/dps8_faults.c cpu.cu.OEB_IOC = 0; cpu 879 src/dps8/dps8_faults.c cpu.cu.EOFF_IAIM = 0; cpu 880 src/dps8/dps8_faults.c cpu.cu.ORB_ISP = 0; cpu 881 src/dps8/dps8_faults.c cpu.cu.ROFF_IPR = 0; cpu 882 src/dps8/dps8_faults.c cpu.cu.OWB_NEA = 0; cpu 883 src/dps8/dps8_faults.c cpu.cu.WOFF_OOB = 0; cpu 884 src/dps8/dps8_faults.c cpu.cu.NO_GA = 0; cpu 885 src/dps8/dps8_faults.c cpu.cu.OCB = 0; cpu 886 src/dps8/dps8_faults.c cpu.cu.OCALL = 0; cpu 887 src/dps8/dps8_faults.c cpu.cu.BOC = 0; cpu 892 src/dps8/dps8_faults.c cpu.cu.CRT = 0; cpu 893 src/dps8/dps8_faults.c cpu.cu.RALR = 0; cpu 894 src/dps8/dps8_faults.c cpu.cu.SDWAM_ER = 0; cpu 895 src/dps8/dps8_faults.c cpu.cu.OOSB = 0; cpu 896 src/dps8/dps8_faults.c cpu.cu.PARU = 0; cpu 897 src/dps8/dps8_faults.c cpu.cu.PARL = 0; cpu 898 src/dps8/dps8_faults.c cpu.cu.ONC1 = 0; cpu 899 src/dps8/dps8_faults.c cpu.cu.ONC2 = 0; cpu 900 src/dps8/dps8_faults.c cpu.cu.IA = 0; cpu 901 src/dps8/dps8_faults.c cpu.cu.IACHN = 0; cpu 902 src/dps8/dps8_faults.c cpu.cu.CNCHN = 0; cpu 905 src/dps8/dps8_faults.c cpu.cu.FIF = 0; cpu 906 src/dps8/dps8_faults.c cpu.cu.FI_ADDR = (word5) fault_number & MASK5; cpu 912 src/dps8/dps8_faults.c cpu.cu.rfi = 0; cpu 916 src/dps8/dps8_faults.c cpu.lufRFI = false; cpu 923 src/dps8/dps8_faults.c SC_I_MIF (cpu.cycle == EXEC_cycle && cpu 924 src/dps8/dps8_faults.c cpu.currentInstruction.info->ndes > 0); cpu 934 src/dps8/dps8_faults.c if (cpu.MR.emr && cpu.MR.ihrrs) cpu 936 src/dps8/dps8_faults.c cpu.MR.ihr = 0; cpu 939 src/dps8/dps8_faults.c if (cpu.cycle == FAULT_EXEC_cycle) cpu 941 src/dps8/dps8_faults.c cpu.faultNumber = FAULT_TRB; cpu 942 src/dps8/dps8_faults.c cpu.cu.FI_ADDR = FAULT_TRB; cpu 943 src/dps8/dps8_faults.c cpu.subFault.bits = 0; // XXX ??? cpu 944 src/dps8/dps8_faults.c if (cpu.bTroubleFaultCycle) cpu 954 src/dps8/dps8_faults.c cpu.PPR.IC); cpu 955 src/dps8/dps8_faults.c sim_printf("\r\nCycles = %"PRId64"\r\n", cpu.cycleCnt); cpu 956 src/dps8/dps8_faults.c sim_printf("\r\nInstructions = %"PRId64"\r\n", cpu.instrCnt); cpu 957 src/dps8/dps8_faults.c longjmp (cpu.jmpMain, JMP_STOP); cpu 964 src/dps8/dps8_faults.c cpu.bTroubleFaultCycle = true; cpu 966 src/dps8/dps8_faults.c cpu.cycle = FAULT_cycle; cpu 968 src/dps8/dps8_faults.c longjmp (cpu.jmpMain, JMP_REENTRY); cpu 970 src/dps8/dps8_faults.c cpu.bTroubleFaultCycle = false; cpu 974 src/dps8/dps8_faults.c if (cpu . cycle == EXEC_cycle) cpu 975 src/dps8/dps8_faults.c cpu.instrCnt ++; cpu 977 src/dps8/dps8_faults.c cpu.is_FFV = true; cpu 978 src/dps8/dps8_faults.c cpu.cycle = FAULT_cycle; cpu 979 src/dps8/dps8_faults.c longjmp (cpu.jmpMain, JMP_REENTRY); cpu 986 src/dps8/dps8_faults.c cpu.dlyFlt = true; cpu 987 src/dps8/dps8_faults.c cpu.dlyFltNum = faultNumber; cpu 988 src/dps8/dps8_faults.c cpu.dlySubFltNum = subFault; cpu 989 src/dps8/dps8_faults.c cpu.dlyCtx = faultMsg; cpu 1001 src/dps8/dps8_faults.c if (cpu.tweaks.l68_mode) cpu 1002 src/dps8/dps8_faults.c return cpu.g7Faults != 0 || cpu.FFV_faults != 0; // L68 cpu 1004 src/dps8/dps8_faults.c return cpu.g7Faults != 0; // DPS8M cpu 1009 src/dps8/dps8_faults.c if (cpu.tweaks.l68_mode) cpu 1010 src/dps8/dps8_faults.c return (cpu.g7Faults & (~ (1u << FAULT_TRO))) != 0 || cpu.FFV_faults != 0; // L68 cpu 1012 src/dps8/dps8_faults.c return (cpu.g7Faults & (~ (1u << FAULT_TRO))) != 0; // DPS8M cpu 1056 src/dps8/dps8_faults.c cpu.FFV_faults_preset |= 1u << ((f_fault_no / 2) - 1); cpu 1061 src/dps8/dps8_faults.c cpu . g7Faults &= ~(1u << FAULT_TRO); cpu 1076 src/dps8/dps8_faults.c if (cpu.g7Faults & (1u << FAULT_CON)) cpu 1078 src/dps8/dps8_faults.c cpu.g7Faults &= ~(1u << FAULT_CON); cpu 1086 src/dps8/dps8_faults.c if (allowTR && (cpu.g7Faults & (1u << FAULT_TRO))) cpu 1088 src/dps8/dps8_faults.c cpu . g7Faults &= ~(1u << FAULT_TRO); cpu 1100 src/dps8/dps8_faults.c if (cpu . g7Faults & (1u << FAULT_EXF)) cpu 1102 src/dps8/dps8_faults.c cpu . g7Faults &= ~(1u << FAULT_EXF); cpu 1110 src/dps8/dps8_faults.c if (cpu.tweaks.l68_mode) { // L68 cpu 1111 src/dps8/dps8_faults.c if (cpu.FFV_faults & 1u) // FFV + 2 OC TRAP cpu 1113 src/dps8/dps8_faults.c cpu.FFV_faults &= ~1u; cpu 1119 src/dps8/dps8_faults.c if (cpu.FFV_faults & 2u) // FFV + 4 CU HISTORY OVERFLOW TRAP cpu 1121 src/dps8/dps8_faults.c cpu.FFV_faults &= ~2u; cpu 1127 src/dps8/dps8_faults.c if (cpu.FFV_faults & 4u) // FFV + 6 ADR TRAP cpu 1129 src/dps8/dps8_faults.c cpu.FFV_faults &= ~4u; cpu 1139 src/dps8/dps8_faults.c doFault (FAULT_TRB, (_fault_subtype) {.bits=cpu.g7Faults}, "Dazed and confused in doG7Fault"); cpu 1145 src/dps8/dps8_faults.c if (!cpu.g7FaultsPreset && !cpu.FFV_faults_preset) cpu 1152 src/dps8/dps8_faults.c cpu.g7Faults = atomic_exchange_explicit(&cpu.g7FaultsPreset, zero, memory_order_acquire); cpu 1154 src/dps8/dps8_faults.c cpu.g7Faults |= cpu.g7FaultsPreset; cpu 1155 src/dps8/dps8_faults.c cpu.g7FaultsPreset = 0; cpu 1158 src/dps8/dps8_faults.c cpu.FFV_faults |= cpu.FFV_faults_preset; cpu 1159 src/dps8/dps8_faults.c cpu.FFV_faults_preset = 0; cpu 581 src/dps8/dps8_hw_consts.h # define CLR_I_ABS CLRF (cpu.cu.IR, I_ABS) cpu 582 src/dps8/dps8_hw_consts.h # define CLR_I_MIF CLRF (cpu.cu.IR, I_MIF) cpu 583 src/dps8/dps8_hw_consts.h # define CLR_I_TRUNC CLRF (cpu.cu.IR, I_TRUNC) cpu 584 src/dps8/dps8_hw_consts.h # define CLR_I_NBAR CLRF (cpu.cu.IR, I_NBAR) cpu 585 src/dps8/dps8_hw_consts.h # define CLR_I_TALLY CLRF (cpu.cu.IR, I_TALLY) cpu 586 src/dps8/dps8_hw_consts.h # define CLR_I_PMASK CLRF (cpu.cu.IR, I_PMASK) cpu 587 src/dps8/dps8_hw_consts.h # define CLR_I_EOFL CLRF (cpu.cu.IR, I_EOFL) cpu 588 src/dps8/dps8_hw_consts.h # define CLR_I_EUFL CLRF (cpu.cu.IR, I_EUFL) cpu 589 src/dps8/dps8_hw_consts.h # define CLR_I_OFLOW CLRF (cpu.cu.IR, I_OFLOW) cpu 590 src/dps8/dps8_hw_consts.h # define CLR_I_CARRY CLRF (cpu.cu.IR, I_CARRY) cpu 591 src/dps8/dps8_hw_consts.h # define CLR_I_NEG CLRF (cpu.cu.IR, I_NEG) cpu 592 src/dps8/dps8_hw_consts.h # define CLR_I_ZERO CLRF (cpu.cu.IR, I_ZERO) cpu 594 src/dps8/dps8_hw_consts.h # define SET_I_ABS SETF (cpu.cu.IR, I_ABS) cpu 595 src/dps8/dps8_hw_consts.h # define SET_I_NBAR SETF (cpu.cu.IR, I_NBAR) cpu 596 src/dps8/dps8_hw_consts.h # define SET_I_TRUNC SETF (cpu.cu.IR, I_TRUNC) cpu 597 src/dps8/dps8_hw_consts.h # define SET_I_TALLY SETF (cpu.cu.IR, I_TALLY) cpu 598 src/dps8/dps8_hw_consts.h # define SET_I_EOFL SETF (cpu.cu.IR, I_EOFL) cpu 599 src/dps8/dps8_hw_consts.h # define SET_I_EUFL SETF (cpu.cu.IR, I_EUFL) cpu 600 src/dps8/dps8_hw_consts.h # define SET_I_OFLOW SETF (cpu.cu.IR, I_OFLOW) cpu 601 src/dps8/dps8_hw_consts.h # define SET_I_CARRY SETF (cpu.cu.IR, I_CARRY) cpu 602 src/dps8/dps8_hw_consts.h # define SET_I_NEG SETF (cpu.cu.IR, I_NEG) cpu 603 src/dps8/dps8_hw_consts.h # define SET_I_ZERO SETF (cpu.cu.IR, I_ZERO) cpu 605 src/dps8/dps8_hw_consts.h # define TST_I_ABS TSTF (cpu.cu.IR, I_ABS) cpu 606 src/dps8/dps8_hw_consts.h # define TST_I_MIF TSTF (cpu.cu.IR, I_MIF) cpu 607 src/dps8/dps8_hw_consts.h # define TST_I_NBAR TSTF (cpu.cu.IR, I_NBAR) cpu 608 src/dps8/dps8_hw_consts.h # define TST_I_PMASK TSTF (cpu.cu.IR, I_PMASK) cpu 609 src/dps8/dps8_hw_consts.h # define TST_I_TRUNC TSTF (cpu.cu.IR, I_TRUNC) cpu 610 src/dps8/dps8_hw_consts.h # define TST_I_TALLY TSTF (cpu.cu.IR, I_TALLY) cpu 611 src/dps8/dps8_hw_consts.h # define TST_I_OMASK TSTF (cpu.cu.IR, I_OMASK) cpu 612 src/dps8/dps8_hw_consts.h # define TST_I_EUFL TSTF (cpu.cu.IR, I_EUFL ) cpu 613 src/dps8/dps8_hw_consts.h # define TST_I_EOFL TSTF (cpu.cu.IR, I_EOFL ) cpu 614 src/dps8/dps8_hw_consts.h # define TST_I_OFLOW TSTF (cpu.cu.IR, I_OFLOW) cpu 615 src/dps8/dps8_hw_consts.h # define TST_I_CARRY TSTF (cpu.cu.IR, I_CARRY) cpu 616 src/dps8/dps8_hw_consts.h # define TST_I_NEG TSTF (cpu.cu.IR, I_NEG) cpu 617 src/dps8/dps8_hw_consts.h # define TST_I_ZERO TSTF (cpu.cu.IR, I_ZERO) cpu 618 src/dps8/dps8_hw_consts.h # define TST_I_HEX TSTF (cpu.cu.IR, I_HEX) cpu 620 src/dps8/dps8_hw_consts.h # define SC_I_HEX(v) SCF (v, cpu.cu.IR, I_HEX) // DPS8M only cpu 621 src/dps8/dps8_hw_consts.h # define SC_I_MIF(v) SCF (v, cpu.cu.IR, I_MIF) cpu 622 src/dps8/dps8_hw_consts.h # define SC_I_TALLY(v) SCF (v, cpu.cu.IR, I_TALLY) cpu 623 src/dps8/dps8_hw_consts.h # define SC_I_NEG(v) SCF (v, cpu.cu.IR, I_NEG) cpu 624 src/dps8/dps8_hw_consts.h # define SC_I_ZERO(v) SCF (v, cpu.cu.IR, I_ZERO) cpu 625 src/dps8/dps8_hw_consts.h # define SC_I_CARRY(v) SCF (v, cpu.cu.IR, I_CARRY); cpu 626 src/dps8/dps8_hw_consts.h # define SC_I_OFLOW(v) SCF (v, cpu.cu.IR, I_OFLOW); cpu 627 src/dps8/dps8_hw_consts.h # define SC_I_EOFL(v) SCF (v, cpu.cu.IR, I_EOFL); cpu 628 src/dps8/dps8_hw_consts.h # define SC_I_EUFL(v) SCF (v, cpu.cu.IR, I_EUFL); cpu 629 src/dps8/dps8_hw_consts.h # define SC_I_OMASK(v) SCF (v, cpu.cu.IR, I_OMASK); cpu 630 src/dps8/dps8_hw_consts.h # define SC_I_PERR(v) SCF (v, cpu.cu.IR, I_PERR); cpu 631 src/dps8/dps8_hw_consts.h # define SC_I_PMASK(v) SCF (v, cpu.cu.IR, I_PMASK); cpu 632 src/dps8/dps8_hw_consts.h # define SC_I_TRUNC(v) SCF (v, cpu.cu.IR, I_TRUNC); cpu 1473 src/dps8/dps8_hw_consts.h # define N_MODEL_HIST_SIZE (cpu.tweaks.l68_mode ? N_L68_HIST_SIZE : N_DPS8M_HIST_SIZE) cpu 46 src/dps8/dps8_iefp.c #define DBG_CTR cpu.cycleCnt cpu 53 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; cpu 57 src/dps8/dps8_iefp.c if (cpu.cu.XSF || (cyctyp != INSTRUCTION_FETCH && cpu.currentInstruction.b29)) cpu 69 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = get_BAR_address (cpup, address); cpu 73 src/dps8/dps8_iefp.c core_read_lock (cpup, cpu.iefpFinalAddress, result, __func__); cpu 75 src/dps8/dps8_iefp.c core_read (cpup, cpu.iefpFinalAddress, result, __func__); cpu 77 src/dps8/dps8_iefp.c core_read (cpup, cpu.iefpFinalAddress, result, __func__); cpu 84 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress, * result, "Read ABS BAR"); cpu 116 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (address); cpu 117 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 118 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 119 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = do_append_cycle (cpup, cyctyp, result, 1); cpu 123 src/dps8/dps8_iefp.c cpu.iefpFinalAddress, * result); cpu 125 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_read, cpu.TPR.TSR, address, "Read BAR"); cpu 126 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "Read BAR"); cpu 133 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = do_append_cycle (cpup, cyctyp, result, 1); cpu 135 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) cpu 140 src/dps8/dps8_iefp.c cpu.iefpFinalAddress, * result); cpu 142 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_read, cpu.TPR.TSR, address, "Read"); cpu 143 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "Read"); cpu 156 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; cpu 159 src/dps8/dps8_iefp.c if (cpu.cu.XSF || cpu.currentInstruction.b29) cpu 166 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = get_BAR_address (cpup, address); cpu 168 src/dps8/dps8_iefp.c core_read (cpup, cpu.iefpFinalAddress, result, __func__); cpu 174 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress, * result, "ReadAPUDataRead ABS BAR"); cpu 195 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (cpup, address); cpu 196 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 197 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 198 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleAPUDataRead (cpup, result, 1); cpu 201 src/dps8/dps8_iefp.c cpu.iefpFinalAddress, * result); cpu 203 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_read, cpu.TPR.TSR, address, "ReadAPUDataRead BAR"); cpu 204 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "ReadAPUDataRead BAR"); cpu 208 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleAPUDataRead (cpup, result, 1); cpu 210 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { cpu 213 src/dps8/dps8_iefp.c cpu.iefpFinalAddress, * result); cpu 215 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_read, cpu.TPR.TSR, address, "ReadAPUDataRead"); cpu 216 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "ReadAPUDataRead"); cpu 226 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; cpu 229 src/dps8/dps8_iefp.c if (cpu.cu.XSF || cpu.currentInstruction.b29) cpu 236 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = get_BAR_address (cpup, address); cpu 238 src/dps8/dps8_iefp.c core_read (cpup, cpu.iefpFinalAddress, result, __func__); cpu 244 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress, * result, "readOperandRead ABS BAR"); cpu 265 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (cpup, address); cpu 266 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 267 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 268 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleOperandRead (cpup, result, 1); cpu 271 src/dps8/dps8_iefp.c cpu.iefpFinalAddress, * result); cpu 273 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_read, cpu.TPR.TSR, address, "readOperandRead BAR"); cpu 274 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "readOperandRead BAR"); cpu 279 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleOperandRead (cpup, result, 1); cpu 281 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { cpu 284 src/dps8/dps8_iefp.c cpu.iefpFinalAddress, * result); cpu 286 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_read, cpu.TPR.TSR, address, "readOperandRead"); cpu 287 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "readOperandRead"); cpu 298 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; cpu 301 src/dps8/dps8_iefp.c if (cpu.cu.XSF || cpu.currentInstruction.b29) cpu 308 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = get_BAR_address (cpup, address); cpu 310 src/dps8/dps8_iefp.c core_read_lock (cpup, cpu.iefpFinalAddress, result, __func__); cpu 316 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress, * result, "ReadOperandRMW ABS BAR"); cpu 337 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (cpup, address); cpu 338 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 339 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 340 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleOperandRMW (cpup, result, 1); cpu 343 src/dps8/dps8_iefp.c cpu.iefpFinalAddress, * result); cpu 345 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_read, cpu.TPR.TSR, address, "ReadOperandRMW BAR"); cpu 346 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "ReadOperandRMW BAR"); cpu 350 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleOperandRMW (cpup, result, 1); cpu 352 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { cpu 355 src/dps8/dps8_iefp.c cpu.iefpFinalAddress, * result); cpu 357 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_read, cpu.TPR.TSR, address, "ReadOperandRMW"); cpu 358 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "ReadOperandRMW"); cpu 368 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; cpu 371 src/dps8/dps8_iefp.c if (cpu.cu.XSF || cpu.currentInstruction.b29) cpu 378 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = get_BAR_address (cpup, address); cpu 380 src/dps8/dps8_iefp.c core_read_lock (cpup, cpu.iefpFinalAddress, result, __func__); cpu 386 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress, * result, "ReadAPUDataRMW ABS BAR"); cpu 407 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (cpup, address); cpu 408 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 409 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 410 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleAPUDataRMW (cpup, result, 1); cpu 413 src/dps8/dps8_iefp.c cpu.iefpFinalAddress, * result); cpu 415 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_read, cpu.TPR.TSR, address, "ReadAPUDataRMW BAR"); cpu 416 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "ReadAPUDataRMW BAR"); cpu 420 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleAPUDataRMW (cpup, result, 1); cpu 422 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { cpu 425 src/dps8/dps8_iefp.c cpu.iefpFinalAddress, * result); cpu 427 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_read, cpu.TPR.TSR, address, "ReadAPUDataRMW"); cpu 428 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "ReadAPUDataRMW"); cpu 440 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; cpu 443 src/dps8/dps8_iefp.c if (cpu.cu.XSF) cpu 450 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = get_BAR_address (cpup, address); cpu 452 src/dps8/dps8_iefp.c core_read (cpup, cpu.iefpFinalAddress, result, __func__); cpu 458 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress, * result, "ReadInstructionFetch ABS BAR"); cpu 479 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (cpup, address); cpu 480 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 481 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 482 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleInstructionFetch (cpup, result, 1); cpu 485 src/dps8/dps8_iefp.c cpu.iefpFinalAddress, * result); cpu 487 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_read, cpu.TPR.TSR, address, "ReadInstructionFetch BAR"); cpu 488 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "ReadInstructionFetch BAR"); cpu 492 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleInstructionFetch (cpup, result, 1); cpu 494 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { cpu 497 src/dps8/dps8_iefp.c cpu.iefpFinalAddress, * result); cpu 499 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_read, cpu.TPR.TSR, address, "ReadInstructionFetch"); cpu 500 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "ReadInstructionFetch"); cpu 510 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; cpu 513 src/dps8/dps8_iefp.c if (cpu.cu.XSF || cpu.currentInstruction.b29) cpu 520 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = get_BAR_address (cpup, address); cpu 522 src/dps8/dps8_iefp.c core_read (cpup, cpu.iefpFinalAddress, result, __func__); cpu 528 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress, * result, "ReadIndirectWordFetch ABS BAR"); cpu 549 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (cpup, address); cpu 550 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 551 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 552 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleIndirectWordFetch (cpup, result, 1); cpu 555 src/dps8/dps8_iefp.c cpu.iefpFinalAddress, * result); cpu 557 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_read, cpu.TPR.TSR, address, "ReadIndirectWordFetch BAR"); cpu 558 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "ReadIndirectWordFetch BAR"); cpu 562 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleIndirectWordFetch (cpup, result, 1); cpu 564 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) { cpu 567 src/dps8/dps8_iefp.c cpu.iefpFinalAddress, * result); cpu 569 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_read, cpu.TPR.TSR, address, "ReadIndirectWordFetch"); cpu 570 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "ReadIndirectWordFetch"); cpu 582 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; cpu 586 src/dps8/dps8_iefp.c if (cpu.cu.XSF || (cyctyp != INSTRUCTION_FETCH && cpu.currentInstruction.b29) || cyctyp == RTCD_OPERAND_FETCH) // ISOLTS-886 cpu 594 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = get_BAR_address (cpup, address); cpu 597 src/dps8/dps8_iefp.c core_read2 (cpup, cpu.iefpFinalAddress, result + 0, result + 1, __func__); cpu 606 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress, * result, "Read2 ABBR evn"); cpu 607 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress+1, * (result+1), "Read2 ABBR odd"); cpu 622 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress, * result, "Read2 AB evn"); cpu 623 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress+1, * (result+1), "Read2 AB odd"); cpu 632 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (cpup, address); cpu 633 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 634 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 635 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = do_append_cycle (cpup, cyctyp, result, 2); cpu 640 src/dps8/dps8_iefp.c cpu.iefpFinalAddress + i, result [i]); cpu 643 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_read, cpu.TPR.TSR, address, "Read2 BR"); cpu 644 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "Read2 BR evn"); cpu 645 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, * (result+1), "Read2 BR odd"); cpu 649 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = do_append_cycle (cpup, cyctyp, result, 2); cpu 654 src/dps8/dps8_iefp.c cpu.iefpFinalAddress + i, result [i]); cpu 661 src/dps8/dps8_iefp.c cpu.iefpFinalAddress + i, result [i]); cpu 665 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_read, cpu.TPR.TSR, address, "Read2"); cpu 666 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "Read2 evn"); cpu 667 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, * (result+1), "Read2 odd"); cpu 678 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; cpu 682 src/dps8/dps8_iefp.c if (cpu.cu.XSF || cpu.currentInstruction.b29) cpu 689 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = get_BAR_address (cpup, address); cpu 692 src/dps8/dps8_iefp.c core_read2 (cpup, cpu.iefpFinalAddress, result + 0, result + 1, __func__); cpu 701 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress, * result, "Read2OperandRead ABBR evn"); cpu 702 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress+1, * (result+1), "Read2OperandRead ABBR odd"); cpu 717 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress, * result, "Read2OperandRead AB evn"); cpu 718 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress+1, * (result+1), "Read2OperandRead AB odd"); cpu 727 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (cpup, address); cpu 728 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 729 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 730 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleOperandRead (cpup, result, 2); cpu 735 src/dps8/dps8_iefp.c cpu.iefpFinalAddress + i, result [i]); cpu 738 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_read, cpu.TPR.TSR, address, "Read2OperandRead BR"); cpu 739 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "Read2OperandRead BR evn"); cpu 740 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, * (result+1), "Read2OperandRead BR odd"); cpu 744 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleOperandRead (cpup, result, 2); cpu 749 src/dps8/dps8_iefp.c cpu.iefpFinalAddress + i, result [i]); cpu 755 src/dps8/dps8_iefp.c cpu.iefpFinalAddress + i, result [i]); cpu 758 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_read, cpu.TPR.TSR, address, "Read2OperandRead"); cpu 759 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "Read2OperandRead evn"); cpu 760 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, * (result+1), "Read2OperandRead odd"); cpu 770 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; cpu 774 src/dps8/dps8_iefp.c if (cpu.cu.XSF || cpu.currentInstruction.b29) cpu 781 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = get_BAR_address (cpup, address); cpu 784 src/dps8/dps8_iefp.c core_read2 (cpup, cpu.iefpFinalAddress, result + 0, result + 1, __func__); cpu 793 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress, * result, "Read2OperandRMW ABBR evn"); cpu 794 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress+1, * (result+1), "Read2OperandRMW ABBR odd"); cpu 809 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress, * result, "Read2OperandRMW AB evn"); cpu 810 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress+1, * (result+1), "Read2OperandRMW AB odd"); cpu 819 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (cpup, address); cpu 820 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 821 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 822 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleOperandRMW (cpup, result, 2); cpu 827 src/dps8/dps8_iefp.c cpu.iefpFinalAddress + i, result [i]); cpu 830 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_read, cpu.TPR.TSR, address, "Read2OperandRMW BR"); cpu 831 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "Read2OperandRMW BR evn"); cpu 832 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, * (result+1), "Read2OperandRMW BR odd"); cpu 836 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleOperandRMW (cpup, result, 2); cpu 841 src/dps8/dps8_iefp.c cpu.iefpFinalAddress + i, result [i]); cpu 844 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_read, cpu.TPR.TSR, address, "Read2OperandRMW"); cpu 845 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "Read2OperandRMW evn"); cpu 846 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, * (result+1), "Read2OperandRMW odd"); cpu 856 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; cpu 860 src/dps8/dps8_iefp.c if (cpu.cu.XSF) cpu 867 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = get_BAR_address (cpup, address); cpu 870 src/dps8/dps8_iefp.c core_read2 (cpup, cpu.iefpFinalAddress, result + 0, result + 1, __func__); cpu 879 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress, * result, "Read2InstructionFetch ABBR evn"); cpu 880 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress+1, * (result+1), "Read2InstructionFetch ABBR odd"); cpu 895 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress, * result, "Read2InstructionFetch AB evn"); cpu 896 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress+1, * (result+1), "Read2InstructionFetch AB odd"); cpu 905 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (cpup, address); cpu 906 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 907 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 908 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleInstructionFetch (cpup, result, 2); cpu 913 src/dps8/dps8_iefp.c cpu.iefpFinalAddress + i, result [i]); cpu 916 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_read, cpu.TPR.TSR, address, "Read2InstructionFetch BR"); cpu 917 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "Read2InstructionFetch BR evn"); cpu 918 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, * (result+1), "Read2InstructionFetch BR odd"); cpu 922 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleInstructionFetch (cpup, result, 2); cpu 927 src/dps8/dps8_iefp.c cpu.iefpFinalAddress + i, result [i]); cpu 930 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_read, cpu.TPR.TSR, address, "Read2InstructionFetch"); cpu 931 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "Read2InstructionFetch evn"); cpu 932 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, * (result+1), "Read2InstructionFetch odd"); cpu 941 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; cpu 946 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (cpup, address); cpu 947 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 948 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 949 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleRTCDOperandFetch (cpup, result, 2); cpu 954 src/dps8/dps8_iefp.c cpu.iefpFinalAddress + i, result [i]); cpu 957 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_read, cpu.TPR.TSR, address, "Read2 BR"); cpu 958 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "Read2 BR evn"); cpu 959 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, * (result+1), "Read2 BR odd"); cpu 963 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleRTCDOperandFetch (cpup, result, 2); cpu 968 src/dps8/dps8_iefp.c cpu.iefpFinalAddress + i, result [i]); cpu 971 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_read, cpu.TPR.TSR, address, "Read2"); cpu 972 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "Read2 evn"); cpu 973 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, * (result+1), "Read2 odd"); cpu 980 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; cpu 984 src/dps8/dps8_iefp.c if (cpu.cu.XSF || cpu.currentInstruction.b29) cpu 991 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = get_BAR_address (cpup, address); cpu 994 src/dps8/dps8_iefp.c core_read2 (cpup, cpu.iefpFinalAddress, result + 0, result + 1, __func__); cpu 1003 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress, * result, "Read2IndirectWordFetch ABBR evn"); cpu 1004 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress+1, * (result+1), "Read2IndirectWordFetch ABBR odd"); cpu 1019 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress, * result, "Read2IndirectWordFetch AB evn"); cpu 1020 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress+1, * (result+1), "Read2IndirectWordFetch AB odd"); cpu 1029 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (cpup, address); cpu 1030 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 1031 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 1032 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleIndirectWordFetch (cpup, result, 2); cpu 1037 src/dps8/dps8_iefp.c cpu.iefpFinalAddress + i, result [i]); cpu 1040 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_read, cpu.TPR.TSR, address, "Read2IndirectWordFetch BR"); cpu 1041 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "Read2IndirectWordFetch BR evn"); cpu 1042 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, * (result+1), "Read2IndirectWordFetch BR odd"); cpu 1046 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleIndirectWordFetch (cpup, result, 2); cpu 1051 src/dps8/dps8_iefp.c cpu.iefpFinalAddress + i, result [i]); cpu 1054 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_read, cpu.TPR.TSR, address, "Read2IndirectWordFetch"); cpu 1055 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "Read2IndirectWordFetch evn"); cpu 1056 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, * (result+1), "Read2IndirectWordFetch odd"); cpu 1067 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; cpu 1071 src/dps8/dps8_iefp.c if (isAR || cpu.cu.XSF /*get_went_appending ()*/) cpu 1083 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = get_BAR_address (cpup, address); cpu 1086 src/dps8/dps8_iefp.c core_readN (cpup, cpu.iefpFinalAddress, result, 8, __func__); cpu 1098 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress + i, result [i], "Read8 ABBR"); cpu 1129 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (cpup, address); cpu 1130 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 1131 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 1133 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleAPUDataRead (cpup, result, 8); cpu 1140 src/dps8/dps8_iefp.c cpu.iefpFinalAddress + i, result [i]); cpu 1143 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_read, cpu.TPR.TSR, address, "Read8 BAR"); cpu 1145 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, result[i], "Read8 BAR"); cpu 1152 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleAPUDataRead (cpup, result, 8); cpu 1154 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) cpu 1162 src/dps8/dps8_iefp.c cpu.iefpFinalAddress + i, result [i]); cpu 1165 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_read, cpu.TPR.TSR, address, "Read8"); cpu 1167 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, result [i], "Read8"); cpu 1179 src/dps8/dps8_iefp.c Read8 (cpup, address, result, cpu.currentInstruction.b29); cpu 1180 src/dps8/dps8_iefp.c Read8 (cpup, address + 8, result + 8, cpu.currentInstruction.b29); cpu 1191 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; cpu 1195 src/dps8/dps8_iefp.c if (isAR || cpu.cu.XSF /*get_went_appending ()*/) cpu 1207 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = get_BAR_address (cpup, address); cpu 1210 src/dps8/dps8_iefp.c core_readN (cpup, cpu.iefpFinalAddress, result, PGSZ, __func__); cpu 1222 src/dps8/dps8_iefp.c HDBGMRead (cpu.iefpFinalAddress + i, result [i], "ReadPage AB"); cpu 1253 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (cpup, address); cpu 1254 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 1255 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 1257 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleAPUDataRead (cpup, result, PGSZ); cpu 1264 src/dps8/dps8_iefp.c cpu.iefpFinalAddress + i, result [i]); cpu 1267 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_read, cpu.TPR.TSR, address, "ReadPage B"); cpu 1269 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, result [i], "ReadPage B"); cpu 1277 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleAPUDataRead (cpup, result, PGSZ); cpu 1279 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) cpu 1287 src/dps8/dps8_iefp.c cpu.iefpFinalAddress + i, result [i]); cpu 1290 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_read, cpu.TPR.TSR, address, "ReadPage"); cpu 1292 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, result [i], "ReadPage"); cpu 1303 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; cpu 1307 src/dps8/dps8_iefp.c if (cpu.cu.XSF || (cyctyp != INSTRUCTION_FETCH && cpu.currentInstruction.b29)) cpu 1313 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = get_BAR_address (address); cpu 1316 src/dps8/dps8_iefp.c if (cyctyp == OPERAND_STORE && cpu.useZone) cpu 1317 src/dps8/dps8_iefp.c core_write_zone (cpu.iefpFinalAddress, data, __func__); cpu 1319 src/dps8/dps8_iefp.c core_write (cpu.iefpFinalAddress, data, __func__); cpu 1323 src/dps8/dps8_iefp.c HDBGMWrite (cpu.iefpFinalAddress, data, "Write ABBR"); cpu 1329 src/dps8/dps8_iefp.c if (cyctyp == OPERAND_STORE && cpu.useZone) cpu 1347 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (cpup, address); cpu 1348 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 1349 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 1350 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = do_append_cycle (cpup, cyctyp, & data, 1); cpu 1353 src/dps8/dps8_iefp.c cpu.iefpFinalAddress, data); cpu 1355 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_write, cpu.TPR.TSR, address, "Write BR"); cpu 1356 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data, "Write BR"); cpu 1360 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = do_append_cycle (cpup, cyctyp, & data, 1); cpu 1363 src/dps8/dps8_iefp.c cpu.iefpFinalAddress, data); cpu 1365 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_write, cpu.TPR.TSR, address, "Write"); cpu 1366 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data, "Write"); cpu 1377 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; cpu 1381 src/dps8/dps8_iefp.c if (cpu.cu.XSF || cpu.currentInstruction.b29) cpu 1387 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = get_BAR_address (cpup, address); cpu 1390 src/dps8/dps8_iefp.c if (! sdpap_store (cpup, cpu.iefpFinalAddress, & data, 1)) cpu 1391 src/dps8/dps8_iefp.c core_write (cpup, cpu.iefpFinalAddress, data, __func__); cpu 1397 src/dps8/dps8_iefp.c HDBGMWrite (cpu.iefpFinalAddress, data, "WriteAPUDataStore ABBR"); cpu 1419 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (cpup, address); cpu 1420 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 1421 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 1422 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleAPUDataStore (cpup, & data, 1); cpu 1425 src/dps8/dps8_iefp.c cpu.iefpFinalAddress, data); cpu 1427 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_write, cpu.TPR.TSR, address, "WriteAPUDataStore BR"); cpu 1428 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data, "WriteAPUDataStore BR"); cpu 1432 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleAPUDataStore (cpup, & data, 1); cpu 1435 src/dps8/dps8_iefp.c cpu.iefpFinalAddress, data); cpu 1437 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_write, cpu.TPR.TSR, address, "WriteAPUDataStore"); cpu 1438 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data, "WriteAPUDataStore"); cpu 1447 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; cpu 1451 src/dps8/dps8_iefp.c if (cpu.cu.XSF || cpu.currentInstruction.b29) cpu 1457 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = get_BAR_address (cpup, address); cpu 1460 src/dps8/dps8_iefp.c if (cpu.useZone) cpu 1461 src/dps8/dps8_iefp.c { if (! sdpap_store (cpup, cpu.iefpFinalAddress, & data, 1)) core_write_zone (cpup, cpu.iefpFinalAddress, data, __func__); } cpu 1463 src/dps8/dps8_iefp.c { if (! sdpap_store (cpup, cpu.iefpFinalAddress, & data, 1)) core_write (cpup, cpu.iefpFinalAddress, data, __func__); } cpu 1469 src/dps8/dps8_iefp.c HDBGMWrite (cpu.iefpFinalAddress, data, "WriteOperandStore ABBR"); cpu 1475 src/dps8/dps8_iefp.c if (cpu.useZone) cpu 1493 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (cpup, address); cpu 1494 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 1495 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 1496 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleOperandStore (cpup, & data, 1); cpu 1499 src/dps8/dps8_iefp.c cpu.iefpFinalAddress, data); cpu 1501 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_write, cpu.TPR.TSR, address, "WriteOperandStore BR"); cpu 1502 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data, "WriteOperandStore BR"); cpu 1506 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleOperandStore (cpup, & data, 1); cpu 1509 src/dps8/dps8_iefp.c cpu.iefpFinalAddress, data); cpu 1511 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_write, cpu.TPR.TSR, address, "WriteOperandStore"); cpu 1512 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data, "WriteOperandStore"); cpu 1524 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; cpu 1527 src/dps8/dps8_iefp.c if (cpu.cu.XSF /*get_went_appending ()*/ || (cyctyp != INSTRUCTION_FETCH && cpu.currentInstruction.b29)) cpu 1536 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = get_BAR_address (address); cpu 1539 src/dps8/dps8_iefp.c core_write2 (cpu.iefpFinalAddress, data [0], data [1], cpu 1543 src/dps8/dps8_iefp.c HDBGMWrite (cpu.iefpFinalAddress, data [0], "Write2 ABBR evn"); cpu 1544 src/dps8/dps8_iefp.c HDBGMWrite (cpu.iefpFinalAddress+1, data [1], "Write2 ABBR odd"); cpu 1575 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (address); cpu 1576 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 1577 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 1578 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = do_append_cycle (cyctyp, data, 2); cpu 1584 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_write, cpu.TPR.TSR, address, "Write2 BR"); cpu 1585 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data[0], "Write2 BR evn"); cpu 1586 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, data[1], "Write2 BR odd"); cpu 1592 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = do_append_cycle (cyctyp, data, 2); cpu 1598 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_write, cpu.TPR.TSR, address, "Write2"); cpu 1599 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data[0], "Write2 evn"); cpu 1600 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, data[1], "Write2 odd"); cpu 1611 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; cpu 1614 src/dps8/dps8_iefp.c if (cpu.cu.XSF || cpu.currentInstruction.b29) cpu 1620 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = get_BAR_address (cpup, address); cpu 1623 src/dps8/dps8_iefp.c if (! sdpap_store (cpup, cpu.iefpFinalAddress, data, 2)) cpu 1624 src/dps8/dps8_iefp.c core_write2 (cpup, cpu.iefpFinalAddress, data [0], data [1], __func__); cpu 1627 src/dps8/dps8_iefp.c HDBGMWrite (cpu.iefpFinalAddress, data [0], "Write2OperandStore ABBR evn"); cpu 1628 src/dps8/dps8_iefp.c HDBGMWrite (cpu.iefpFinalAddress+1, data [1], "Write2OperandStore ABBR odd"); cpu 1654 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (cpup, address); cpu 1655 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 1656 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 1657 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleOperandStore (cpup, data, 2); cpu 1662 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_write, cpu.TPR.TSR, address, "Write2OperandStore BR"); cpu 1663 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data[0], "Write2OperandStore BR evn"); cpu 1664 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, data[1], "Write2OperandStore BR odd"); cpu 1668 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleOperandStore (cpup, data, 2); cpu 1673 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_write, cpu.TPR.TSR, address, "Write2OperandStore"); cpu 1674 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data[0], "Write2OperandStore evn"); cpu 1675 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, data[1], "Write2OperandStore odd"); cpu 1686 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; cpu 1688 src/dps8/dps8_iefp.c if (isAR || cpu.cu.XSF /*get_went_appending ()*/) cpu 1696 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = get_BAR_address (cpup, address); cpu 1699 src/dps8/dps8_iefp.c if (! sdpap_store (cpup, cpu.iefpFinalAddress, & data, 1)) cpu 1700 src/dps8/dps8_iefp.c core_write (cpup, cpu.iefpFinalAddress, data, __func__); cpu 1707 src/dps8/dps8_iefp.c HDBGMWrite (cpu.iefpFinalAddress, data, "Write1 ABBR"); cpu 1734 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (cpup, address); cpu 1735 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 1736 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 1738 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleAPUDataStore (cpup, & data, 1); cpu 1742 src/dps8/dps8_iefp.c cpu.iefpFinalAddress, data); cpu 1744 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_write, cpu.TPR.TSR, address, "Write1 BR"); cpu 1745 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data, "Write1 BR"); cpu 1752 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleAPUDataStore (cpup, & data, 1); cpu 1756 src/dps8/dps8_iefp.c cpu.iefpFinalAddress, data); cpu 1758 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_write, cpu.TPR.TSR, address, "Write1"); cpu 1759 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data, "Write1"); cpu 1770 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; cpu 1774 src/dps8/dps8_iefp.c if (isAR || cpu.cu.XSF /*get_went_appending ()*/) cpu 1783 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = get_BAR_address (cpup, address); cpu 1786 src/dps8/dps8_iefp.c if (! sdpap_store (cpup, cpu.iefpFinalAddress, data, 8)) cpu 1787 src/dps8/dps8_iefp.c core_writeN (cpup, cpu.iefpFinalAddress, data, 8, __func__); cpu 1799 src/dps8/dps8_iefp.c HDBGMWrite (cpu.iefpFinalAddress + i, data [i], "Write8 ABBR"); cpu 1831 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (cpup, address); cpu 1832 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 1833 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 1835 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleAPUDataStore (cpup, data, 8); cpu 1842 src/dps8/dps8_iefp.c cpu.iefpFinalAddress + i, data [i]); cpu 1845 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_write, cpu.TPR.TSR, address, "Write8 BR"); cpu 1847 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, data [i], "Write8 BR"); cpu 1855 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleAPUDataStore (cpup, data, 8); cpu 1862 src/dps8/dps8_iefp.c cpu.iefpFinalAddress + i, data [i]); cpu 1865 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_write, cpu.TPR.TSR, address, "Write8"); cpu 1867 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, data [i], "Write8"); cpu 1879 src/dps8/dps8_iefp.c Write8 (cpup, address, data, cpu.currentInstruction.b29); cpu 1880 src/dps8/dps8_iefp.c Write8 (cpup, address + 8, data + 8, cpu.currentInstruction.b29); cpu 1888 src/dps8/dps8_iefp.c Write8 (cpup, address, data, cpu.currentInstruction.b29); cpu 1889 src/dps8/dps8_iefp.c Write8 (cpup, address + 8, data + 8, cpu.currentInstruction.b29); cpu 1890 src/dps8/dps8_iefp.c Write8 (cpup, address + 16, data + 16, cpu.currentInstruction.b29); cpu 1891 src/dps8/dps8_iefp.c Write8 (cpup, address + 24, data + 24, cpu.currentInstruction.b29); cpu 1901 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; cpu 1905 src/dps8/dps8_iefp.c if (isAR || cpu.cu.XSF /*get_went_appending ()*/) cpu 1914 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = get_BAR_address (cpup, address); cpu 1917 src/dps8/dps8_iefp.c if (! sdpap_store (cpup, cpu.iefpFinalAddress, data, PGSZ)) cpu 1918 src/dps8/dps8_iefp.c core_writeN (cpup, cpu.iefpFinalAddress, data, PGSZ, __func__); cpu 1930 src/dps8/dps8_iefp.c HDBGMWrite (cpu.iefpFinalAddress + i, data [i], "WritePage ABBR"); cpu 1962 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (cpup, address); cpu 1963 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 1964 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 1966 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleAPUDataStore (cpup, data, PGSZ); cpu 1974 src/dps8/dps8_iefp.c cpu.iefpFinalAddress + i, data [i]); cpu 1977 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_write, cpu.TPR.TSR, address, "WritePage BR"); cpu 1979 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, data [i], "WritePage BR"); cpu 1986 src/dps8/dps8_iefp.c cpu.iefpFinalAddress = doAppendCycleAPUDataStore (cpup, data, PGSZ); cpu 1993 src/dps8/dps8_iefp.c cpu.iefpFinalAddress + i, data [i]); cpu 1996 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_write, cpu.TPR.TSR, address, "WritePage"); cpu 1998 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, data [i], "WritePage"); cpu 2009 src/dps8/dps8_iefp.c if (cpu.TPR.CA & 1) // is odd? cpu 2011 src/dps8/dps8_iefp.c ReadIndirectWordFetch (cpup, cpu.TPR.CA, cpu.itxPair); cpu 2012 src/dps8/dps8_iefp.c cpu.itxPair[1] = MASK36; // fill with ones for debugging cpu 2016 src/dps8/dps8_iefp.c Read2IndirectWordFetch (cpup, cpu.TPR.CA, cpu.itxPair); cpu 57 src/dps8/dps8_ins.c #define DBG_CTR cpu.cycleCnt cpu 123 src/dps8/dps8_ins.c DCDstruct * i = & cpu.currentInstruction; cpu 129 src/dps8/dps8_ins.c PNL (cpu.prepare_state |= ps_RAW); cpu 133 src/dps8/dps8_ins.c rTAG = GET_TAG (cpu.cu.IWB); cpu 149 src/dps8/dps8_ins.c core_read(cpup, cpu.char_word_address, &tmpdata, __func__); cpu 150 src/dps8/dps8_ins.c if (tmpdata != cpu.ou.character_data) cpu 152 src/dps8/dps8_ins.c (long long unsigned int)cpu.ou.character_data, cpu 153 src/dps8/dps8_ins.c (long long unsigned int)tmpdata, cpu.char_word_address); cpu 156 src/dps8/dps8_ins.c switch (cpu.ou.characterOperandSize) cpu 159 src/dps8/dps8_ins.c putChar (& cpu.ou.character_data, cpu.CY & 077, cpu.ou.characterOperandOffset); cpu 163 src/dps8/dps8_ins.c putByte (& cpu.ou.character_data, cpu.CY & 0777, cpu.ou.characterOperandOffset); cpu 171 src/dps8/dps8_ins.c PNL (cpu.prepare_state |= ps_SAW); cpu 175 src/dps8/dps8_ins.c core_write_unlock (cpup, cpu.char_word_address, cpu.ou.character_data, __func__); cpu 177 src/dps8/dps8_ins.c WriteOperandStore (cpup, cpu.ou.character_address, cpu.ou.character_data); cpu 183 src/dps8/dps8_ins.c __func__, cpu.ou.character_data, cpu.ou.character_address, cpu 184 src/dps8/dps8_ins.c cpu.ou.characterOperandSize, cpu.ou.characterOperandOffset); cpu 188 src/dps8/dps8_ins.c cpu.TPR.CA = cpu.ou.character_address; cpu 192 src/dps8/dps8_ins.c write_operand (cpup, cpu.TPR.CA, OPERAND_STORE); cpu 202 src/dps8/dps8_ins.c DCDstruct * i = & cpu.currentInstruction; cpu 208 src/dps8/dps8_ins.c "%s a %d address %08o\r\n", __func__, i->b29, cpu.TPR.CA); cpu 210 src/dps8/dps8_ins.c PNL (cpu.prepare_state |= ps_POA); cpu 214 src/dps8/dps8_ins.c rTAG = GET_TAG (cpu.cu.IWB); cpu 224 src/dps8/dps8_ins.c cpu.CY = 0; cpu 225 src/dps8/dps8_ins.c SETHI (cpu.CY, cpu.TPR.CA); cpu 227 src/dps8/dps8_ins.c "%s DU CY=%012"PRIo64"\r\n", __func__, cpu.CY); cpu 237 src/dps8/dps8_ins.c cpu.CY = 0; cpu 238 src/dps8/dps8_ins.c SETLO (cpu.CY, cpu.TPR.CA); cpu 240 src/dps8/dps8_ins.c "%s DL CY=%012"PRIo64"\r\n", __func__, cpu.CY); cpu 254 src/dps8/dps8_ins.c switch (cpu.ou.characterOperandSize) cpu 257 src/dps8/dps8_ins.c cpu.CY = GETCHAR (cpu.ou.character_data, cpu.ou.characterOperandOffset); cpu 261 src/dps8/dps8_ins.c cpu.CY = GETBYTE (cpu.ou.character_data, cpu.ou.characterOperandOffset); cpu 268 src/dps8/dps8_ins.c __func__, cpu.ou.character_data, cpu.ou.character_address, cpu.CY); cpu 271 src/dps8/dps8_ins.c cpu.TPR.CA = cpu.ou.character_address; cpu 277 src/dps8/dps8_ins.c readOperandRMW (cpup, cpu.TPR.CA); cpu 279 src/dps8/dps8_ins.c readOperandRead (cpup, cpu.TPR.CA); cpu 281 src/dps8/dps8_ins.c readOperandRead (cpup, cpu.TPR.CA); cpu 289 src/dps8/dps8_ins.c if (cpu.TPR.CA & 1) cpu 290 src/dps8/dps8_ins.c ReadOperandRead (cpup, cpu.TPR.CA, &cpu.CY); cpu 292 src/dps8/dps8_ins.c Read2OperandRead (cpup, cpu.TPR.CA, cpu.Ypair); cpu 293 src/dps8/dps8_ins.c cpu.l68PairAddr = cpu.iefpFinalAddress & ~1u; cpu 294 src/dps8/dps8_ins.c cpu.l68PairValid = true; cpu 297 src/dps8/dps8_ins.c if (cpu.tweaks.l68_mode) cpu 299 src/dps8/dps8_ins.c if (! (get_addr_mode (cpup) == APPEND_mode || cpu.cu.TSN_VALID [0] || cpu 300 src/dps8/dps8_ins.c cpu.cu.XSF || cpu.currentInstruction.b29 /*get_went_appending ()*/)) cpu 302 src/dps8/dps8_ins.c if (cpu.currentInstruction.info->flags & TSPN_INS) cpu 305 src/dps8/dps8_ins.c if (cpu.currentInstruction.opcode <= 0273) //-V536 cpu 306 src/dps8/dps8_ins.c n = (cpu.currentInstruction.opcode & 3); cpu 308 src/dps8/dps8_ins.c n = (cpu.currentInstruction.opcode & 3) + 4; cpu 314 src/dps8/dps8_ins.c cpu.PR[n].RNR = cpu.PPR.PRR; cpu 318 src/dps8/dps8_ins.c cpu.PR[n].SNR = cpu.PPR.PSR; cpu 319 src/dps8/dps8_ins.c cpu.PR[n].WORDNO = (cpu.PPR.IC + 1) & MASK18; cpu 325 src/dps8/dps8_ins.c cpu.PPR.IC = cpu.TPR.CA; cpu 330 src/dps8/dps8_ins.c __func__, cpu.PPR.PSR, cpu.PPR.IC); cpu 331 src/dps8/dps8_ins.c if (cpu.PPR.IC & 1) cpu 333 src/dps8/dps8_ins.c cpu.cu.IWB = cpu.CY; cpu 334 src/dps8/dps8_ins.c cpu.cu.IRODD = cpu.CY; cpu 338 src/dps8/dps8_ins.c cpu.cu.IWB = cpu.Ypair[0]; cpu 339 src/dps8/dps8_ins.c cpu.cu.IRODD = cpu.Ypair[1]; cpu 367 src/dps8/dps8_ins.c putbits36_3 (& words[0], 0, cpu.PPR.PRR); cpu 368 src/dps8/dps8_ins.c putbits36_15 (& words[0], 3, cpu.PPR.PSR); cpu 369 src/dps8/dps8_ins.c putbits36_1 (& words[0], 18, cpu.PPR.P); cpu 376 src/dps8/dps8_ins.c putbits36_1 (& words[0], 19, (cpu.cu.FIF || TST_I_ABS) ? cpu.cu.XSF : cpu.xsfScu); cpu 377 src/dps8/dps8_ins.c putbits36_1 (& words[0], 20, cpu.cu.SDWAMM); // Match on SDWAM (PA866 02B) cpu 378 src/dps8/dps8_ins.c putbits36_1 (& words[0], 21, cpu.cu.SD_ON); cpu 379 src/dps8/dps8_ins.c putbits36_1 (& words[0], 22, cpu.cu.PTWAMM); // Match on PTWAM cpu 380 src/dps8/dps8_ins.c putbits36_1 (& words[0], 23, cpu.cu.PT_ON); cpu 382 src/dps8/dps8_ins.c cpu 383 src/dps8/dps8_ins.c cpu 384 src/dps8/dps8_ins.c cpu 385 src/dps8/dps8_ins.c cpu 386 src/dps8/dps8_ins.c cpu 387 src/dps8/dps8_ins.c cpu 388 src/dps8/dps8_ins.c cpu 389 src/dps8/dps8_ins.c cpu 390 src/dps8/dps8_ins.c cpu 397 src/dps8/dps8_ins.c putbits36_12 (& words[0], 24, cpu.cu.APUCycleBits); cpu 402 src/dps8/dps8_ins.c putbits36_1 (& words[1], 0, cpu.cu.IRO_ISN); cpu 403 src/dps8/dps8_ins.c putbits36_1 (& words[1], 1, cpu.cu.OEB_IOC); cpu 404 src/dps8/dps8_ins.c putbits36_1 (& words[1], 2, cpu.cu.EOFF_IAIM); cpu 405 src/dps8/dps8_ins.c putbits36_1 (& words[1], 3, cpu.cu.ORB_ISP); cpu 406 src/dps8/dps8_ins.c putbits36_1 (& words[1], 4, cpu.cu.ROFF_IPR); cpu 407 src/dps8/dps8_ins.c putbits36_1 (& words[1], 5, cpu.cu.OWB_NEA); cpu 408 src/dps8/dps8_ins.c putbits36_1 (& words[1], 6, cpu.cu.WOFF_OOB); cpu 409 src/dps8/dps8_ins.c putbits36_1 (& words[1], 7, cpu.cu.NO_GA); cpu 410 src/dps8/dps8_ins.c putbits36_1 (& words[1], 8, cpu.cu.OCB); cpu 411 src/dps8/dps8_ins.c putbits36_1 (& words[1], 9, cpu.cu.OCALL); cpu 412 src/dps8/dps8_ins.c putbits36_1 (& words[1], 10, cpu.cu.BOC); cpu 413 src/dps8/dps8_ins.c putbits36_1 (& words[1], 11, cpu.cu.PTWAM_ER); cpu 414 src/dps8/dps8_ins.c putbits36_1 (& words[1], 12, cpu.cu.CRT); cpu 415 src/dps8/dps8_ins.c putbits36_1 (& words[1], 13, cpu.cu.RALR); cpu 416 src/dps8/dps8_ins.c putbits36_1 (& words[1], 14, cpu.cu.SDWAM_ER); cpu 417 src/dps8/dps8_ins.c putbits36_1 (& words[1], 15, cpu.cu.OOSB); cpu 418 src/dps8/dps8_ins.c putbits36_1 (& words[1], 16, cpu.cu.PARU); cpu 419 src/dps8/dps8_ins.c putbits36_1 (& words[1], 17, cpu.cu.PARL); cpu 420 src/dps8/dps8_ins.c putbits36_1 (& words[1], 18, cpu.cu.ONC1); cpu 421 src/dps8/dps8_ins.c putbits36_1 (& words[1], 19, cpu.cu.ONC2); cpu 422 src/dps8/dps8_ins.c putbits36_4 (& words[1], 20, cpu.cu.IA); cpu 423 src/dps8/dps8_ins.c putbits36_3 (& words[1], 24, cpu.cu.IACHN); cpu 424 src/dps8/dps8_ins.c putbits36_3 (& words[1], 27, cpu.cu.CNCHN); cpu 425 src/dps8/dps8_ins.c putbits36_5 (& words[1], 30, cpu.cu.FI_ADDR); cpu 426 src/dps8/dps8_ins.c putbits36_1 (& words[1], 35, cpu.cycle == INTERRUPT_cycle ? 0 : 1); cpu 430 src/dps8/dps8_ins.c putbits36_3 (& words[2], 0, cpu.TPR.TRR); cpu 431 src/dps8/dps8_ins.c putbits36_15 (& words[2], 3, cpu.TPR.TSR); cpu 435 src/dps8/dps8_ins.c putbits36_3 (& words[2], 27, (word3) cpu.switches.cpu_num); cpu 436 src/dps8/dps8_ins.c putbits36_6 (& words[2], 30, cpu.cu.delta); cpu 440 src/dps8/dps8_ins.c putbits36_3 (& words[3], 18, cpu.cu.TSN_VALID[0] ? cpu.cu.TSN_PRNO[0] : 0); cpu 441 src/dps8/dps8_ins.c putbits36_1 (& words[3], 21, cpu.cu.TSN_VALID[0]); cpu 442 src/dps8/dps8_ins.c putbits36_3 (& words[3], 22, cpu.cu.TSN_VALID[1] ? cpu.cu.TSN_PRNO[1] : 0); cpu 443 src/dps8/dps8_ins.c putbits36_1 (& words[3], 25, cpu.cu.TSN_VALID[1]); cpu 444 src/dps8/dps8_ins.c putbits36_3 (& words[3], 26, cpu.cu.TSN_VALID[2] ? cpu.cu.TSN_PRNO[2] : 0); cpu 445 src/dps8/dps8_ins.c putbits36_1 (& words[3], 29, cpu.cu.TSN_VALID[2]); cpu 446 src/dps8/dps8_ins.c putbits36_6 (& words[3], 30, cpu.TPR.TBR); cpu 450 src/dps8/dps8_ins.c putbits36_18 (& words[4], 0, cpu.PPR.IC); cpu 455 src/dps8/dps8_ins.c putbits36_18 (& words[4], 18, cpu.cu.IR); cpu 492 src/dps8/dps8_ins.c putbits36 (& words[5], 0, 18, cpu.TPR.CA); cpu 493 src/dps8/dps8_ins.c putbits36 (& words[5], 18, 1, cpu.cu.repeat_first); cpu 494 src/dps8/dps8_ins.c putbits36 (& words[5], 19, 1, cpu.cu.rpt); cpu 495 src/dps8/dps8_ins.c putbits36 (& words[5], 20, 1, cpu.cu.rd); cpu 496 src/dps8/dps8_ins.c putbits36 (& words[5], 21, 1, cpu.cu.rl); cpu 497 src/dps8/dps8_ins.c putbits36 (& words[5], 22, 1, cpu.cu.pot); cpu 499 src/dps8/dps8_ins.c putbits36_1 (& words[5], 24, cpu.cu.xde); cpu 503 src/dps8/dps8_ins.c putbits36_1 (& words[5], 25, cpu.cu.xdo && (! cpu.cu.xde || (cpu.PPR.IC & 1))); cpu 504 src/dps8/dps8_ins.c putbits36_1 (& words[5], 26, cpu.cu.itp); cpu 505 src/dps8/dps8_ins.c putbits36_1 (& words[5], 27, cpu.cu.rfi); cpu 506 src/dps8/dps8_ins.c putbits36_1 (& words[5], 28, cpu.cu.its); cpu 507 src/dps8/dps8_ins.c putbits36_1 (& words[5], 29, cpu.cu.FIF); cpu 510 src/dps8/dps8_ins.c if ((cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl) && ! cpu.cu.CT_HOLD) cpu 511 src/dps8/dps8_ins.c putbits36_6 (& words[5], 30, cpu.lastTag); cpu 513 src/dps8/dps8_ins.c putbits36_6 (& words[5], 30, cpu.cu.CT_HOLD); cpu 517 src/dps8/dps8_ins.c words[6] = cpu.cu.IWB; cpu 521 src/dps8/dps8_ins.c words[7] = cpu.cu.IRODD; cpu 527 src/dps8/dps8_ins.c if (cpu.tweaks.isolts_mode) cpu 623 src/dps8/dps8_ins.c scu2words (cpup, cpu.scu_data); cpu 625 src/dps8/dps8_ins.c cpu.cu_data.PSR = cpu.PPR.PSR; cpu 626 src/dps8/dps8_ins.c cpu.cu_data.PRR = cpu.PPR.PRR; cpu 627 src/dps8/dps8_ins.c cpu.cu_data.IC = cpu.PPR.IC; cpu 638 src/dps8/dps8_ins.c cpu.cu.delta = 0; cpu 639 src/dps8/dps8_ins.c cpu.cu.repeat_first = false; cpu 640 src/dps8/dps8_ins.c cpu.cu.rpt = false; cpu 641 src/dps8/dps8_ins.c cpu.cu.rd = false; cpu 642 src/dps8/dps8_ins.c cpu.cu.rl = false; cpu 643 src/dps8/dps8_ins.c cpu.cu.pot = false; cpu 644 src/dps8/dps8_ins.c cpu.cu.itp = false; cpu 645 src/dps8/dps8_ins.c cpu.cu.its = false; cpu 646 src/dps8/dps8_ins.c cpu.cu.xde = false; cpu 647 src/dps8/dps8_ins.c cpu.cu.xdo = false; cpu 657 src/dps8/dps8_ins.c cpu.PPR.PRR = getbits36_3 (words[0], 0); cpu 658 src/dps8/dps8_ins.c cpu.PPR.PSR = getbits36_15 (words[0], 3); cpu 659 src/dps8/dps8_ins.c cpu.PPR.P = getbits36_1 (words[0], 18); cpu 660 src/dps8/dps8_ins.c cpu.cu.XSF = getbits36_1 (words[0], 19); cpu 661 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "%s sets XSF to %o\r\n", __func__, cpu.cu.XSF); cpu 680 src/dps8/dps8_ins.c cpu.cu.APUCycleBits = (word12) ((cpu.cu.APUCycleBits & 07770) | (word12) getbits36_3 (words[0], 33)); cpu 685 src/dps8/dps8_ins.c cpu 686 src/dps8/dps8_ins.c cpu 687 src/dps8/dps8_ins.c cpu 688 src/dps8/dps8_ins.c cpu 689 src/dps8/dps8_ins.c cpu 690 src/dps8/dps8_ins.c cpu 691 src/dps8/dps8_ins.c cpu 692 src/dps8/dps8_ins.c cpu 693 src/dps8/dps8_ins.c cpu 694 src/dps8/dps8_ins.c cpu 695 src/dps8/dps8_ins.c cpu 696 src/dps8/dps8_ins.c cpu 697 src/dps8/dps8_ins.c cpu 698 src/dps8/dps8_ins.c cpu 699 src/dps8/dps8_ins.c cpu 700 src/dps8/dps8_ins.c cpu 701 src/dps8/dps8_ins.c cpu 702 src/dps8/dps8_ins.c cpu 703 src/dps8/dps8_ins.c cpu 704 src/dps8/dps8_ins.c cpu 705 src/dps8/dps8_ins.c cpu 706 src/dps8/dps8_ins.c cpu 707 src/dps8/dps8_ins.c cpu 708 src/dps8/dps8_ins.c cpu 709 src/dps8/dps8_ins.c cpu 714 src/dps8/dps8_ins.c cpu.TPR.TRR = getbits36_3 (words[2], 0); cpu 715 src/dps8/dps8_ins.c cpu.TPR.TSR = getbits36_15 (words[2], 3); cpu 720 src/dps8/dps8_ins.c cpu.cu.delta = getbits36_6 (words[2], 30); cpu 726 src/dps8/dps8_ins.c cpu.cu.TSN_PRNO[0] = getbits36_3 (words[3], 18); cpu 727 src/dps8/dps8_ins.c cpu.cu.TSN_VALID[0] = getbits36_1 (words[3], 21); cpu 728 src/dps8/dps8_ins.c cpu.cu.TSN_PRNO[1] = getbits36_3 (words[3], 22); cpu 729 src/dps8/dps8_ins.c cpu.cu.TSN_VALID[1] = getbits36_1 (words[3], 25); cpu 730 src/dps8/dps8_ins.c cpu.cu.TSN_PRNO[2] = getbits36_3 (words[3], 26); cpu 731 src/dps8/dps8_ins.c cpu.cu.TSN_VALID[2] = getbits36_1 (words[3], 29); cpu 732 src/dps8/dps8_ins.c cpu.TPR.TBR = getbits36_6 (words[3], 30); cpu 736 src/dps8/dps8_ins.c cpu.cu.IR = getbits36_18 (words[4], 18); // HWR cpu 737 src/dps8/dps8_ins.c cpu.PPR.IC = getbits36_18 (words[4], 0); cpu 743 src/dps8/dps8_ins.c cpu.cu.repeat_first = getbits36_1 (words[5], 18); cpu 744 src/dps8/dps8_ins.c cpu.cu.rpt = getbits36_1 (words[5], 19); cpu 745 src/dps8/dps8_ins.c cpu.cu.rd = getbits36_1 (words[5], 20); cpu 746 src/dps8/dps8_ins.c cpu.cu.rl = getbits36_1 (words[5], 21); cpu 747 src/dps8/dps8_ins.c cpu.cu.pot = getbits36_1 (words[5], 22); cpu 749 src/dps8/dps8_ins.c cpu.cu.xde = getbits36_1 (words[5], 24); cpu 751 src/dps8/dps8_ins.c cpu.cu.xdo = getbits36_1 (words[5], 25) | cpu.cu.xde; cpu 752 src/dps8/dps8_ins.c cpu.cu.itp = getbits36_1 (words[5], 26); cpu 753 src/dps8/dps8_ins.c cpu.cu.rfi = getbits36_1 (words[5], 27); cpu 754 src/dps8/dps8_ins.c cpu.cu.its = getbits36_1 (words[5], 28); cpu 755 src/dps8/dps8_ins.c cpu.cu.FIF = getbits36_1 (words[5], 29); cpu 756 src/dps8/dps8_ins.c cpu.cu.CT_HOLD = getbits36_6 (words[5], 30); cpu 759 src/dps8/dps8_ins.c if (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl) cpu 760 src/dps8/dps8_ins.c cpu.cu.CT_HOLD = 0; cpu 764 src/dps8/dps8_ins.c cpu.cu.IWB = words[6]; cpu 768 src/dps8/dps8_ins.c cpu.cu.IRODD = words[7]; cpu 773 src/dps8/dps8_ins.c words2scu (cpup, cpu.scu_data); cpu 774 src/dps8/dps8_ins.c decode_instruction (cpup, IWB_IRODD, & cpu.currentInstruction); cpu 781 src/dps8/dps8_ins.c if (cpu.tweaks.isolts_mode || cpu.tweaks.tandd_mode) cpu 785 src/dps8/dps8_ins.c words[i] = cpu.du.image[i]; cpu 795 src/dps8/dps8_ins.c putbits36_1 (& words[0], 9, cpu.du.Z); cpu 796 src/dps8/dps8_ins.c putbits36_1 (& words[0], 10, cpu.du.NOP); cpu 797 src/dps8/dps8_ins.c putbits36_24 (& words[0], 12, cpu.du.CHTALLY); cpu 801 src/dps8/dps8_ins.c if (cpu.tweaks.isolts_mode || cpu.tweaks.tandd_mode) cpu 806 src/dps8/dps8_ins.c putbits36_18 (& words[2], 0, cpu.du.D1_PTR_W); cpu 807 src/dps8/dps8_ins.c putbits36_6 (& words[2], 18, cpu.du.D1_PTR_B); cpu 808 src/dps8/dps8_ins.c putbits36_2 (& words[2], 25, cpu.du.TAk[0]); cpu 809 src/dps8/dps8_ins.c putbits36_1 (& words[2], 31, cpu.du.F1); cpu 810 src/dps8/dps8_ins.c putbits36_1 (& words[2], 32, cpu.du.Ak[0]); cpu 814 src/dps8/dps8_ins.c putbits36_10 (& words[3], 0, cpu.du.LEVEL1); cpu 815 src/dps8/dps8_ins.c putbits36_24 (& words[3], 12, cpu.du.D1_RES); cpu 819 src/dps8/dps8_ins.c putbits36_18 (& words[4], 0, cpu.du.D2_PTR_W); cpu 820 src/dps8/dps8_ins.c putbits36_6 (& words[4], 18, cpu.du.D2_PTR_B); cpu 821 src/dps8/dps8_ins.c putbits36_2 (& words[4], 25, cpu.du.TAk[1]); cpu 822 src/dps8/dps8_ins.c putbits36_1 (& words[4], 30, cpu.du.R); cpu 823 src/dps8/dps8_ins.c putbits36_1 (& words[4], 31, cpu.du.F2); cpu 824 src/dps8/dps8_ins.c putbits36_1 (& words[4], 32, cpu.du.Ak[1]); cpu 828 src/dps8/dps8_ins.c putbits36_10 (& words[5], 0, cpu.du.LEVEL2); cpu 829 src/dps8/dps8_ins.c putbits36_24 (& words[5], 12, cpu.du.D2_RES); cpu 833 src/dps8/dps8_ins.c putbits36_18 (& words[6], 0, cpu.du.D3_PTR_W); cpu 834 src/dps8/dps8_ins.c putbits36_6 (& words[6], 18, cpu.du.D3_PTR_B); cpu 835 src/dps8/dps8_ins.c putbits36_2 (& words[6], 25, cpu.du.TAk[2]); cpu 836 src/dps8/dps8_ins.c putbits36_1 (& words[6], 31, cpu.du.F3); cpu 837 src/dps8/dps8_ins.c putbits36_1 (& words[6], 32, cpu.du.Ak[2]); cpu 838 src/dps8/dps8_ins.c putbits36_3 (& words[6], 33, cpu.du.JMP); cpu 842 src/dps8/dps8_ins.c putbits36_24 (& words[7], 12, cpu.du.D3_RES); cpu 851 src/dps8/dps8_ins.c cpu.du.Z = getbits36_1 (words[0], 9); cpu 852 src/dps8/dps8_ins.c cpu.du.NOP = getbits36_1 (words[0], 10); cpu 853 src/dps8/dps8_ins.c cpu.du.CHTALLY = getbits36_24 (words[0], 12); cpu 858 src/dps8/dps8_ins.c cpu.du.D1_PTR_W = getbits36_18 (words[2], 0); cpu 859 src/dps8/dps8_ins.c cpu.du.D1_PTR_B = getbits36_6 (words[2], 18); cpu 860 src/dps8/dps8_ins.c cpu.du.TAk[0] = getbits36_2 (words[2], 25); cpu 861 src/dps8/dps8_ins.c cpu.du.F1 = getbits36_1 (words[2], 31); cpu 862 src/dps8/dps8_ins.c cpu.du.Ak[0] = getbits36_1 (words[2], 32); cpu 866 src/dps8/dps8_ins.c cpu.du.LEVEL1 = getbits36_10 (words[3], 0); cpu 867 src/dps8/dps8_ins.c cpu.du.D1_RES = getbits36_24 (words[3], 12); cpu 871 src/dps8/dps8_ins.c cpu.du.D2_PTR_W = getbits36_18 (words[4], 0); cpu 872 src/dps8/dps8_ins.c cpu.du.D2_PTR_B = getbits36_6 (words[4], 18); cpu 873 src/dps8/dps8_ins.c cpu.du.TAk[1] = getbits36_2 (words[4], 25); cpu 874 src/dps8/dps8_ins.c cpu.du.F2 = getbits36_1 (words[4], 31); cpu 875 src/dps8/dps8_ins.c cpu.du.Ak[1] = getbits36_1 (words[4], 32); cpu 879 src/dps8/dps8_ins.c cpu.du.LEVEL2 = getbits36_10 (words[5], 0); cpu 880 src/dps8/dps8_ins.c cpu.du.D2_RES = getbits36_24 (words[5], 12); cpu 884 src/dps8/dps8_ins.c cpu.du.D3_PTR_W = getbits36_18 (words[6], 0); cpu 885 src/dps8/dps8_ins.c cpu.du.D3_PTR_B = getbits36_6 (words[6], 18); cpu 886 src/dps8/dps8_ins.c cpu.du.TAk[2] = getbits36_2 (words[6], 25); cpu 887 src/dps8/dps8_ins.c cpu.du.F3 = getbits36_1 (words[6], 31); cpu 888 src/dps8/dps8_ins.c cpu.du.Ak[2] = getbits36_1 (words[6], 32); cpu 889 src/dps8/dps8_ins.c cpu.du.JMP = getbits36_3 (words[6], 33); cpu 893 src/dps8/dps8_ins.c cpu.du.D3_RES = getbits36_24 (words[7], 12); cpu 895 src/dps8/dps8_ins.c if (cpu.tweaks.isolts_mode || cpu.tweaks.tandd_mode) cpu 899 src/dps8/dps8_ins.c cpu.du.image[i] = words[i]; cpu 1182 src/dps8/dps8_ins.c cpu.TPR.TRR = 0; cpu 1183 src/dps8/dps8_ins.c cpu.RSDWH_R1 = 0; cpu 1187 src/dps8/dps8_ins.c if (cpu.cu.rd && ((cpu.PPR.IC & 1) != 0)) cpu 1189 src/dps8/dps8_ins.c if (cpu.cu.repeat_first) cpu 1195 src/dps8/dps8_ins.c else if (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl) cpu 1197 src/dps8/dps8_ins.c if (cpu.cu.repeat_first) cpu 1201 src/dps8/dps8_ins.c ReadInstructionFetch (cpup, addr, & cpu.cu.IWB); cpu 1208 src/dps8/dps8_ins.c cpu.cu.IWB = tmp[0]; cpu 1209 src/dps8/dps8_ins.c cpu.cu.IRODD = tmp[1]; cpu 1223 src/dps8/dps8_ins.c if ((cpu.PPR.IC & 1) == 0) // Even cpu 1229 src/dps8/dps8_ins.c cpu.cu.IWB = tmp[0]; cpu 1230 src/dps8/dps8_ins.c cpu.cu.IRODD = tmp[1]; cpu 1234 src/dps8/dps8_ins.c ReadInstructionFetch (cpup, addr, & cpu.cu.IWB); cpu 1235 src/dps8/dps8_ins.c cpu.cu.IRODD = cpu.cu.IWB; cpu 1237 src/dps8/dps8_ins.c cpu.l68PairAddr = cpu.iefpFinalAddress & ~1u; cpu 1238 src/dps8/dps8_ins.c cpu.l68PairValid = true; cpu 1240 src/dps8/dps8_ins.c if (cpu.tweaks.l68_mode) cpu 1244 src/dps8/dps8_ins.c if (cpu.tweaks.l68_mode) cpu 1245 src/dps8/dps8_ins.c cpu.cu.APUCycleBits |= 04000; cpu 1260 src/dps8/dps8_ins.c char * where = lookup_address (cpu.PPR.PSR, cpu.PPR.IC, & compname, cpu 1270 src/dps8/dps8_ins.c cpu.BAR.BASE, cpu.PPR.IC, where); cpu 1274 src/dps8/dps8_ins.c sim_debug (flag, &cpu_dev, "%06o %s\r\n", cpu.PPR.IC, where); cpu 1282 src/dps8/dps8_ins.c cpu.PPR.PSR, cpu 1283 src/dps8/dps8_ins.c cpu.BAR.BASE, cpu.PPR.IC, where); cpu 1288 src/dps8/dps8_ins.c cpu.PPR.PSR, cpu.PPR.IC, where); cpu 1301 src/dps8/dps8_ins.c cpu.BAR.BASE, cpu 1302 src/dps8/dps8_ins.c cpu.PPR.IC, cpu 1305 src/dps8/dps8_ins.c cpu.currentInstruction.address, cpu 1306 src/dps8/dps8_ins.c cpu.currentInstruction.opcode, cpu 1307 src/dps8/dps8_ins.c cpu.currentInstruction.opcodeX, cpu 1308 src/dps8/dps8_ins.c cpu.currentInstruction.b29, cpu 1309 src/dps8/dps8_ins.c cpu.currentInstruction.i, cpu 1310 src/dps8/dps8_ins.c GET_TM (cpu.currentInstruction.tag) >> 4, cpu 1311 src/dps8/dps8_ins.c GET_TD (cpu.currentInstruction.tag) & 017); cpu 1319 src/dps8/dps8_ins.c cpu.PPR.IC, cpu 1322 src/dps8/dps8_ins.c cpu.currentInstruction.address, cpu 1323 src/dps8/dps8_ins.c cpu.currentInstruction.opcode, cpu 1324 src/dps8/dps8_ins.c cpu.currentInstruction.opcodeX, cpu 1325 src/dps8/dps8_ins.c cpu.currentInstruction.b29, cpu 1326 src/dps8/dps8_ins.c cpu.currentInstruction.i, cpu 1327 src/dps8/dps8_ins.c GET_TM (cpu.currentInstruction.tag) >> 4, cpu 1328 src/dps8/dps8_ins.c GET_TD (cpu.currentInstruction.tag) & 017); cpu 1339 src/dps8/dps8_ins.c cpu.PPR.PSR, cpu 1340 src/dps8/dps8_ins.c cpu.BAR.BASE, cpu 1341 src/dps8/dps8_ins.c cpu.PPR.IC, cpu 1342 src/dps8/dps8_ins.c cpu.PPR.PRR, cpu 1345 src/dps8/dps8_ins.c cpu.currentInstruction.address, cpu 1346 src/dps8/dps8_ins.c cpu.currentInstruction.opcode, cpu 1347 src/dps8/dps8_ins.c cpu.currentInstruction.opcodeX, cpu 1348 src/dps8/dps8_ins.c cpu.currentInstruction.b29, cpu.currentInstruction.i, cpu 1349 src/dps8/dps8_ins.c GET_TM (cpu.currentInstruction.tag) >> 4, cpu 1350 src/dps8/dps8_ins.c GET_TD (cpu.currentInstruction.tag) & 017); cpu 1358 src/dps8/dps8_ins.c cpu.PPR.PSR, cpu 1359 src/dps8/dps8_ins.c cpu.PPR.IC, cpu 1360 src/dps8/dps8_ins.c cpu.PPR.PRR, cpu 1363 src/dps8/dps8_ins.c cpu.currentInstruction.address, cpu 1364 src/dps8/dps8_ins.c cpu.currentInstruction.opcode, cpu 1365 src/dps8/dps8_ins.c cpu.currentInstruction.opcodeX, cpu 1366 src/dps8/dps8_ins.c cpu.currentInstruction.b29, cpu 1367 src/dps8/dps8_ins.c cpu.currentInstruction.i, cpu 1368 src/dps8/dps8_ins.c GET_TM (cpu.currentInstruction.tag) >> 4, cpu 1369 src/dps8/dps8_ins.c GET_TD (cpu.currentInstruction.tag) & 017); cpu 1379 src/dps8/dps8_ins.c if (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl) cpu 1383 src/dps8/dps8_ins.c if ((cpu.rX[0] & 00001) == 0) cpu 1395 src/dps8/dps8_ins.c if (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl) cpu 1399 src/dps8/dps8_ins.c if ((cpu.rX[0] & 00001) == 0) cpu 1411 src/dps8/dps8_ins.c trk (cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, IWB_IRODD); cpu 1468 src/dps8/dps8_ins.c DCDstruct * ci = & cpu.currentInstruction; cpu 1475 src/dps8/dps8_ins.c const bool restart = cpu.cu.rfi; // instruction is to be restarted cpu 1476 src/dps8/dps8_ins.c cpu.xsfScu = false; cpu 1477 src/dps8/dps8_ins.c cpu.cu.rfi = 0; cpu 1502 src/dps8/dps8_ins.c if (UNLIKELY (cpu.MR.emr && cpu.MR.OC_TRAP)) { cpu 1503 src/dps8/dps8_ins.c if (cpu.MR.OPCODE == opcode && cpu.MR.OPCODEX == opcodeX) { cpu 1506 src/dps8/dps8_ins.c memcpy (& cpu.MR_cache, & cpu.MR, sizeof (cpu.MR_cache)); cpu 1507 src/dps8/dps8_ins.c cpu.skip_cu_hist = false; cpu 1509 src/dps8/dps8_ins.c if (cpu.MR.ihrrs) { cpu 1510 src/dps8/dps8_ins.c cpu.MR.ihr = 0; cpu 1524 src/dps8/dps8_ins.c cpu.cu.TSN_VALID[0] = 0; cpu 1525 src/dps8/dps8_ins.c cpu.cu.TSN_VALID[1] = 0; cpu 1526 src/dps8/dps8_ins.c cpu.cu.TSN_VALID[2] = 0; cpu 1527 src/dps8/dps8_ins.c cpu.cu.TSN_PRNO[0] = 0; cpu 1528 src/dps8/dps8_ins.c cpu.cu.TSN_PRNO[1] = 0; cpu 1529 src/dps8/dps8_ins.c cpu.cu.TSN_PRNO[2] = 0; cpu 1539 src/dps8/dps8_ins.c cpu.cu.XSF = 0; cpu 1541 src/dps8/dps8_ins.c cpu.cu.pot = 0; cpu 1542 src/dps8/dps8_ins.c cpu.cu.its = 0; cpu 1543 src/dps8/dps8_ins.c cpu.cu.itp = 0; cpu 1547 src/dps8/dps8_ins.c PNL (L68_ (cpu.AR_F_E = false;)) cpu 1550 src/dps8/dps8_ins.c cpu.cu.APUCycleBits &= 07770; cpu 1557 src/dps8/dps8_ins.c if (UNLIKELY (cpu.isXED)) { cpu 1563 src/dps8/dps8_ins.c if (opcode == 0717 && !opcodeX && cpu.cu.xde && cpu.cu.xdo /* even instruction being executed */) cpu 1570 src/dps8/dps8_ins.c if (cpu.cu.xde && cpu.cu.xdo /* even instr being executed */) cpu 1575 src/dps8/dps8_ins.c if (!cpu.cu.xde && cpu.cu.xdo /* odd instr being executed */ && !(cpu.PPR.IC & 1)) cpu 1579 src/dps8/dps8_ins.c } else if (UNLIKELY (cpu.isExec)) { cpu 1582 src/dps8/dps8_ins.c if (opcode == 0560 && !opcodeX && cpu.cu.xde && !(cpu.PPR.IC & 1)) cpu 1593 src/dps8/dps8_ins.c if (UNLIKELY (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl)) { cpu 1600 src/dps8/dps8_ins.c if (cpu.cu.rl) cpu 1627 src/dps8/dps8_ins.c if (UNLIKELY (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl)) { cpu 1632 src/dps8/dps8_ins.c if (UNLIKELY (cpu.cu.rl)) { cpu 1783 src/dps8/dps8_ins.c if (n_dbgevents && (dbgevt = (dbgevent_lookup (cpu.PPR.PSR, cpu.PPR.IC))) >= 0) { cpu 1808 src/dps8/dps8_ins.c cpu.du.JMP = (word3) ndes; cpu 1809 src/dps8/dps8_ins.c cpu.dlyFlt = false; cpu 1815 src/dps8/dps8_ins.c if (UNLIKELY (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl)) { cpu 1876 src/dps8/dps8_ins.c cpu.cu.repeat_first, cpu.cu.rpt, cpu.cu.rd, cpu.PPR.IC & 1, cpu.rX[0], cpu 1877 src/dps8/dps8_ins.c !! (cpu.rX[0] & 01000), !! (cpu.rX[0] & 0400)); cpu 1879 src/dps8/dps8_ins.c "RPT/RPD CA %06o\r\n", cpu.TPR.CA); cpu 1883 src/dps8/dps8_ins.c if (cpu.cu.repeat_first) { cpu 1888 src/dps8/dps8_ins.c bool icOdd = !! (cpu.PPR.IC & 1); cpu 1892 src/dps8/dps8_ins.c if (cpu.cu.rpt || (cpu.cu.rd && icOdd) || cpu.cu.rl) cpu 1893 src/dps8/dps8_ins.c cpu.cu.repeat_first = false; cpu 1898 src/dps8/dps8_ins.c if (cpu.cu.rpt || // rpt cpu 1899 src/dps8/dps8_ins.c (cpu.cu.rd && icEven) || // rpd & even cpu 1900 src/dps8/dps8_ins.c (cpu.cu.rd && icOdd) || // rpd & odd cpu 1901 src/dps8/dps8_ins.c cpu.cu.rl) { // rl cpu 1909 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "rpt/rd/rl repeat first; X%d was %06o\r\n", Xn, cpu.rX[Xn]); cpu 1911 src/dps8/dps8_ins.c cpu.TPR.CA = (cpu.rX[Xn] + offset) & AMASK; cpu 1915 src/dps8/dps8_ins.c cpu.rptXnSaved = true; cpu 1916 src/dps8/dps8_ins.c cpu.rptXn = Xn; cpu 1917 src/dps8/dps8_ins.c cpu.rptXnOld = cpu.rX[Xn]; cpu 1918 src/dps8/dps8_ins.c cpu.rX[Xn] = cpu.TPR.CA; cpu 1922 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "rpt/rd/rl repeat first; X%d now %06o\r\n", Xn, cpu.rX[Xn]); cpu 1943 src/dps8/dps8_ins.c if (!restart && ! (cpu.tweaks.tandd_mode && TST_I_MIF && cpu 1946 src/dps8/dps8_ins.c cpu.du.CHTALLY = 0; cpu 1947 src/dps8/dps8_ins.c cpu.du.Z = 1; cpu 1949 src/dps8/dps8_ins.c cpu.tanddEISstart = cpu.du.CHTALLY; cpu 1960 src/dps8/dps8_ins.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 1961 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 1970 src/dps8/dps8_ins.c word18 saveIC = cpu.PPR.IC; cpu 1972 src/dps8/dps8_ins.c ReadInstructionFetch (cpup, cpu.PPR.IC + 1 + n, & cpu.currentEISinstruction.op[n]); cpu 1973 src/dps8/dps8_ins.c cpu.PPR.IC = saveIC; cpu 1977 src/dps8/dps8_ins.c PNL (cpu.IWRAddr = cpu.currentEISinstruction.op[0]); cpu 2003 src/dps8/dps8_ins.c n, cpu.PAR[n].SNR, cpu.PAR[n].RNR, cpu.PAR[n].WORDNO, GET_PR_BITNO (n)); cpu 2010 src/dps8/dps8_ins.c cpu.TPR.TBR = GET_PR_BITNO (n); cpu 2012 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PAR[n].SNR; cpu 2014 src/dps8/dps8_ins.c cpu.TPR.TRR = max (cpu.PAR[n].RNR, cpu.PPR.PRR); cpu 2016 src/dps8/dps8_ins.c cpu.TPR.TRR = max3 (cpu.PAR[n].RNR, cpu.TPR.TRR, cpu.PPR.PRR); cpu 2020 src/dps8/dps8_ins.c n, offset, cpu.TPR.CA, cpu.TPR.TBR, cpu.TPR.TSR, cpu.TPR.TRR); cpu 2034 src/dps8/dps8_ins.c cpu.cu.TSN_VALID [0] = 0; cpu 2035 src/dps8/dps8_ins.c cpu.TPR.TBR = 0; cpu 2037 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 2038 src/dps8/dps8_ins.c cpu.TPR.TRR = 0; cpu 2039 src/dps8/dps8_ins.c cpu.RSDWH_R1 = 0; cpu 2046 src/dps8/dps8_ins.c cpu.cu.CT_HOLD = 0; // Clear interrupted IR mode flag cpu 2049 src/dps8/dps8_ins.c cpu.ou.directOperandFlag = false; cpu 2050 src/dps8/dps8_ins.c cpu.ou.directOperand = 0; cpu 2051 src/dps8/dps8_ins.c cpu.ou.characterOperandSize = 0; cpu 2052 src/dps8/dps8_ins.c cpu.ou.characterOperandOffset = 0; cpu 2053 src/dps8/dps8_ins.c cpu.ou.crflag = false; cpu 2058 src/dps8/dps8_ins.c PNL (L68_ (cpu.AR_F_E = true;)) cpu 2059 src/dps8/dps8_ins.c cpu.iefpFinalAddress = cpu.TPR.CA; cpu 2066 src/dps8/dps8_ins.c cpu.rmw_address = cpu.iefpFinalAddress; cpu 2068 src/dps8/dps8_ins.c if (cpu.cu.rl) { cpu 2071 src/dps8/dps8_ins.c cpu.lnk = GETHI36 (cpu.CY); cpu 2072 src/dps8/dps8_ins.c cpu.CY &= MASK18; cpu 2076 src/dps8/dps8_ins.c cpu.lnk = GETHI36 (cpu.Ypair[0]); cpu 2077 src/dps8/dps8_ins.c cpu.Ypair[0] &= MASK18; cpu 2085 src/dps8/dps8_ins.c PNL (cpu.IWRAddr = 0); cpu 2090 src/dps8/dps8_ins.c cpu.useZone = false; cpu 2091 src/dps8/dps8_ins.c cpu.zone = MASK36; cpu 2103 src/dps8/dps8_ins.c cpu.last_write = 0; cpu 2106 src/dps8/dps8_ins.c cpu.last_write = cpu.TPR.CA; cpu 2111 src/dps8/dps8_ins.c if (cpu.iefpFinalAddress != cpu.rmw_address) cpu 2112 src/dps8/dps8_ins.c sim_warn("executeInstruction: write addr changed %o %d\r\n", cpu.iefpFinalAddress, cpu.rmw_address); cpu 2113 src/dps8/dps8_ins.c core_write_unlock (cpup, cpu.iefpFinalAddress, cpu.CY, __func__); cpu 2115 src/dps8/dps8_ins.c HDBGMWrite (cpu.iefpFinalAddress, cpu.CY, "Write RMW"); cpu 2128 src/dps8/dps8_ins.c cpu.TPR.TRR = cpu.PPR.PRR; cpu 2129 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PPR.PSR; cpu 2130 src/dps8/dps8_ins.c cpu.TPR.TBR = 0; cpu 2140 src/dps8/dps8_ins.c bool icOdd = !! (cpu.PPR.IC & 1); cpu 2149 src/dps8/dps8_ins.c bool rf = cpu.cu.repeat_first; cpu 2150 src/dps8/dps8_ins.c if (rf && cpu.cu.rd && icEven) cpu 2153 src/dps8/dps8_ins.c if (UNLIKELY ((! rf) && (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl))) { cpu 2159 src/dps8/dps8_ins.c if (cpu.cu.rpt || cpu.cu.rd) { cpu 2162 src/dps8/dps8_ins.c bool rptA = !! (cpu.rX[0] & 01000); cpu 2163 src/dps8/dps8_ins.c bool rptB = !! (cpu.rX[0] & 00400); cpu 2168 src/dps8/dps8_ins.c if (cpu.cu.rpt || ! icOdd) cpu 2169 src/dps8/dps8_ins.c cpu.rptUndo[0] = 0; cpu 2171 src/dps8/dps8_ins.c cpu.rptUndo[1] = 0; cpu 2175 src/dps8/dps8_ins.c cpu.cu.repeat_first, rf, cpu.cu.rpt, cpu.cu.rd, icOdd, cpu.rX[0], rptA, rptB); cpu 2177 src/dps8/dps8_ins.c if (cpu.cu.rpt) { // rpt cpu 2179 src/dps8/dps8_ins.c uint Xn = (uint) getbits36_3 (cpu.cu.IWB, 36 - 3); cpu 2180 src/dps8/dps8_ins.c cpu.TPR.CA = (cpu.rX[Xn] + cpu.cu.delta) & AMASK; cpu 2181 src/dps8/dps8_ins.c cpu.rX[Xn] = cpu.TPR.CA; cpu 2182 src/dps8/dps8_ins.c cpu.rptUndo[0] = Xn + 1; cpu 2186 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "RPT/RPD delta; X%d now %06o\r\n", Xn, cpu.rX[Xn]); cpu 2193 src/dps8/dps8_ins.c if (cpu.cu.rd && icOdd && rptA) { // rpd, even instruction cpu 2196 src/dps8/dps8_ins.c uint Xn = (uint) getbits36_3 (cpu.cu.IWB, 36 - 3); cpu 2197 src/dps8/dps8_ins.c cpu.TPR.CA = (cpu.rX[Xn] + cpu.cu.delta) & AMASK; cpu 2198 src/dps8/dps8_ins.c cpu.rX[Xn] = cpu.TPR.CA; cpu 2199 src/dps8/dps8_ins.c cpu.rptUndo[0] = Xn + 1; cpu 2203 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "RPT/RPD delta; X%d now %06o\r\n", Xn, cpu.rX[Xn]); cpu 2206 src/dps8/dps8_ins.c if (cpu.cu.rd && icOdd && rptB) { // rpdb, odd instruction cpu 2209 src/dps8/dps8_ins.c uint Xn = (uint) getbits36_3 (cpu.cu.IRODD, 36 - 3); cpu 2210 src/dps8/dps8_ins.c cpu.TPR.CA = (cpu.rX[Xn] + cpu.cu.delta) & AMASK; cpu 2211 src/dps8/dps8_ins.c cpu.rX[Xn] = cpu.TPR.CA; cpu 2212 src/dps8/dps8_ins.c cpu.rptUndo[1] = Xn + 1; cpu 2216 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "RPT/RPD delta; X%d now %06o\r\n", Xn, cpu.rX[Xn]); cpu 2234 src/dps8/dps8_ins.c if (cpu.tweaks.l68_mode) cpu 2235 src/dps8/dps8_ins.c flt = (cpu.cu.rl || cpu.cu.rpt || cpu.cu.rd) && cpu.dlyFlt; // L68 cpu 2237 src/dps8/dps8_ins.c flt = cpu.cu.rl && cpu.dlyFlt; cpu 2240 src/dps8/dps8_ins.c doFault (cpu.dlyFltNum, cpu.dlySubFltNum, cpu.dlyCtx); cpu 2247 src/dps8/dps8_ins.c if (cpu.cu.rpt || (cpu.cu.rd && icOdd) || cpu.cu.rl) { cpu 2254 src/dps8/dps8_ins.c uint x = (uint) getbits18 (cpu.rX[0], 0, 8); cpu 2259 src/dps8/dps8_ins.c putbits18 (& cpu.rX[0], 0, 8, x); cpu 2281 src/dps8/dps8_ins.c if (TST_I_ZERO && (cpu.rX[0] & 0100)) { cpu 2286 src/dps8/dps8_ins.c if (!TST_I_ZERO && (cpu.rX[0] & 040)) { cpu 2291 src/dps8/dps8_ins.c if (TST_I_NEG && (cpu.rX[0] & 020)) { cpu 2296 src/dps8/dps8_ins.c if (!TST_I_NEG && (cpu.rX[0] & 010)) { cpu 2301 src/dps8/dps8_ins.c if (TST_I_CARRY && (cpu.rX[0] & 04)) { cpu 2306 src/dps8/dps8_ins.c if (!TST_I_CARRY && (cpu.rX[0] & 02)) { cpu 2311 src/dps8/dps8_ins.c if (TST_I_OFLOW && (cpu.rX[0] & 01)) { cpu 2321 src/dps8/dps8_ins.c cpu.cu.rpt = false; cpu 2322 src/dps8/dps8_ins.c cpu.cu.rd = false; cpu 2323 src/dps8/dps8_ins.c cpu.cu.rl = false; cpu 2329 src/dps8/dps8_ins.c if (cpu.cu.rl) { cpu 2331 src/dps8/dps8_ins.c if (cpu.lnk == 0) { cpu 2333 src/dps8/dps8_ins.c cpu.cu.rpt = false; cpu 2334 src/dps8/dps8_ins.c cpu.cu.rd = false; cpu 2335 src/dps8/dps8_ins.c cpu.cu.rl = false; cpu 2339 src/dps8/dps8_ins.c uint Xn = (uint) getbits36_3 (cpu.cu.IWB, 36 - 3); cpu 2342 src/dps8/dps8_ins.c cpu.rX[Xn] = cpu.lnk; cpu 2350 src/dps8/dps8_ins.c if (UNLIKELY (cpu.dlyFlt)) { cpu 2352 src/dps8/dps8_ins.c doFault (cpu.dlyFltNum, cpu.dlySubFltNum, cpu.dlyCtx); cpu 2359 src/dps8/dps8_ins.c cpu.instrCnt ++; cpu 2364 src/dps8/dps8_ins.c cpu.rA, cpu.rQ, dump_flags (buf, cpu.cu.IR)); cpu 2367 src/dps8/dps8_ins.c cpu.rE, cpu.rA, cpu.rQ, EAQToIEEElongdouble (cpup)); cpu 2370 src/dps8/dps8_ins.c cpu.rE, cpu.rA, cpu.rQ, EAQToIEEEdouble (cpup)); cpu 2373 src/dps8/dps8_ins.c cpu.rX[0], cpu.rX[1], cpu.rX[2], cpu.rX[3]); cpu 2375 src/dps8/dps8_ins.c cpu.rX[4], cpu.rX[5], cpu.rX[6], cpu.rX[7]); cpu 2378 src/dps8/dps8_ins.c n, PRalias[n], cpu.PR[n].SNR, cpu.PR[n].RNR, cpu.PR[n].WORDNO, cpu 2382 src/dps8/dps8_ins.c cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); cpu 2384 src/dps8/dps8_ins.c cpu.DSBR.ADDR, cpu.DSBR.BND, cpu.DSBR.U, cpu.DSBR.STACK); cpu 2410 src/dps8/dps8_ins.c if (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl) cpu 2443 src/dps8/dps8_ins.c DCDstruct * i = & cpu.currentInstruction; cpu 2452 src/dps8/dps8_ins.c cpu.ou.eac = 0; cpu 2453 src/dps8/dps8_ins.c cpu.ou.RB1_FULL = 0; cpu 2454 src/dps8/dps8_ins.c cpu.ou.RP_FULL = 0; cpu 2455 src/dps8/dps8_ins.c cpu.ou.RS_FULL = 0; cpu 2456 src/dps8/dps8_ins.c cpu.ou.STR_OP = 0; cpu 2457 src/dps8/dps8_ins.c cpu.ou.cycle = 0; cpu 2461 src/dps8/dps8_ins.c L68_ (cpu.ou.RS = (word9) i->opcode;) cpu 2463 src/dps8/dps8_ins.c cpu.skip_cu_hist = false; cpu 2468 src/dps8/dps8_ins.c cpu.MR_cache.emr = cpu.MR.emr; cpu 2469 src/dps8/dps8_ins.c cpu.MR_cache.ihr = cpu.MR.ihr; cpu 2470 src/dps8/dps8_ins.c cpu.MR_cache.hrxfr = cpu.MR.hrxfr; cpu 2490 src/dps8/dps8_ins.c if (cpu.tweaks.l68_mode) { // L68 cpu 2494 src/dps8/dps8_ins.c cpu.ou.RB1_FULL = cpu.ou.RP_FULL = cpu.ou.RS_FULL = 1; cpu 2495 src/dps8/dps8_ins.c cpu.ou.cycle |= ou_GIN; cpu 2497 src/dps8/dps8_ins.c cpu.ou.opsz = (opcodes10[i->opcode10].reg_use >> 12) & 037; cpu 2499 src/dps8/dps8_ins.c cpu.ou.reguse = reguse; cpu 2789 src/dps8/dps8_ins.c cpu.PR[n].RNR = cpu.TPR.TRR; cpu 2790 src/dps8/dps8_ins.c cpu.PR[n].SNR = cpu.TPR.TSR; cpu 2791 src/dps8/dps8_ins.c cpu.PR[n].WORDNO = cpu.TPR.CA; cpu 2792 src/dps8/dps8_ins.c SET_PR_BITNO (n, cpu.TPR.TBR); cpu 2833 src/dps8/dps8_ins.c cpu.Ypair[0] = 043; cpu 2834 src/dps8/dps8_ins.c cpu.Ypair[0] |= ((word36) cpu.PR[n].SNR) << 18; cpu 2835 src/dps8/dps8_ins.c cpu.Ypair[0] |= ((word36) cpu.PR[n].RNR) << 15; cpu 2837 src/dps8/dps8_ins.c cpu.Ypair[1] = (word36) cpu.PR[n].WORDNO << 18; cpu 2838 src/dps8/dps8_ins.c cpu.Ypair[1] |= (word36) GET_PR_BITNO (n) << 9; cpu 2843 src/dps8/dps8_ins.c cpu.rA = cpu.CY; cpu 2847 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); cpu 2848 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); cpu 2859 src/dps8/dps8_ins.c cpu.rQ = cpu.CY; cpu 2863 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rQ == 0); cpu 2864 src/dps8/dps8_ins.c SC_I_NEG (cpu.rQ & SIGN36); cpu 2893 src/dps8/dps8_ins.c cpu.CY = cpu.rQ; cpu 2901 src/dps8/dps8_ins.c cmp36 (cpup, cpu.rQ, cpu.CY, &cpu.cu.IR); cpu 2910 src/dps8/dps8_ins.c word72 tmp72 = YPAIRTO72 (cpu.Ypair); cpu 2911 src/dps8/dps8_ins.c word72 trAQ = convert_to_word72 (cpu.rA, cpu.rQ); cpu 2929 src/dps8/dps8_ins.c convert_to_word36 (trAQ, &cpu.rA, &cpu.rQ); cpu 2938 src/dps8/dps8_ins.c cpu.CY = cpu.rA; cpu 2967 src/dps8/dps8_ins.c cpu.PR[n].RNR = cpu.TPR.TRR; cpu 2973 src/dps8/dps8_ins.c if (((cpu.CY >> 34) & 3) != 3) cpu 2975 src/dps8/dps8_ins.c word6 bitno = (cpu.CY >> 30) & 077; cpu 3004 src/dps8/dps8_ins.c word12 oSNR = getbits36_12 (cpu.CY, 6); cpu 3007 src/dps8/dps8_ins.c cpu.PR[n].SNR = 077777; cpu 3009 src/dps8/dps8_ins.c cpu.PR[n].SNR = oSNR; // unsigned word will 0-extend. cpu 3011 src/dps8/dps8_ins.c cpu.PR[n].WORDNO = GETLO (cpu.CY); cpu 3016 src/dps8/dps8_ins.c n, cpu.CY, cpu.PR[n].RNR, GET_PR_BITNO (n), cpu 3017 src/dps8/dps8_ins.c cpu.PR[n].SNR, cpu.PR[n].WORDNO); cpu 3035 src/dps8/dps8_ins.c cpu.rX[n] = cpu.TPR.CA; cpu 3040 src/dps8/dps8_ins.c SC_I_ZERO (cpu.TPR.CA == 0); cpu 3041 src/dps8/dps8_ins.c SC_I_NEG (cpu.TPR.CA & SIGN18); cpu 3061 src/dps8/dps8_ins.c word18 ret = (cpu.PPR.IC + 1) & MASK18; cpu 3064 src/dps8/dps8_ins.c cpu.rX[opcode10 & 07] = ret; cpu 3072 src/dps8/dps8_ins.c cpu.CY = 0; cpu 3101 src/dps8/dps8_ins.c cpu.PR[n].RNR = cpu.TPR.TRR; cpu 3102 src/dps8/dps8_ins.c cpu.PR[n].SNR = cpu.TPR.TSR; cpu 3103 src/dps8/dps8_ins.c cpu.PR[n].WORDNO = 0; cpu 3113 src/dps8/dps8_ins.c cmp36 (cpup, cpu.rA, cpu.CY, &cpu.cu.IR); cpu 3123 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 3125 src/dps8/dps8_ins.c cpu.CY = Add36b (cpup, cpu.CY, 1, 0, I_ZNOC, cpu 3126 src/dps8/dps8_ins.c & cpu.cu.IR, & ovf); cpu 3137 src/dps8/dps8_ins.c word36 trZ = cpu.rA & cpu.CY; cpu 3146 src/dps8/dps8_ins.c cpu.rA = cpu.Ypair[0]; cpu 3150 src/dps8/dps8_ins.c cpu.rQ = cpu.Ypair[1]; cpu 3154 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0 && cpu.rQ == 0) cpu 3155 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); cpu 3162 src/dps8/dps8_ins.c if (! (cpu.cu.IR & I_NEG) && ! (cpu.cu.IR & I_ZERO)) cpu 3181 src/dps8/dps8_ins.c cpu.rX[n] = GETLO (cpu.CY); cpu 3185 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rX[n] == 0); cpu 3186 src/dps8/dps8_ins.c SC_I_NEG (cpu.rX[n] & SIGN18); cpu 3191 src/dps8/dps8_ins.c cpu.Ypair[0] = cpu.rA; cpu 3192 src/dps8/dps8_ins.c cpu.Ypair[1] = cpu.rQ; cpu 3233 src/dps8/dps8_ins.c uint cnt = (uint) cpu.TPR.CA & 0177; // 0-127 cpu 3240 src/dps8/dps8_ins.c capture = cpu.rA & barrelLeftMaskTable[cnt + 1]; cpu 3243 src/dps8/dps8_ins.c cpu.rA <<= cnt; cpu 3244 src/dps8/dps8_ins.c cpu.rA &= DMASK; // keep to 36-bits cpu 3250 src/dps8/dps8_ins.c capture = cpu.rA; cpu 3251 src/dps8/dps8_ins.c cpu.rA = 0; cpu 3260 src/dps8/dps8_ins.c word36 tmp36 = cpu.TPR.CA & 0177; // CY bits 11-17 cpu 3262 src/dps8/dps8_ins.c word36 tmpSign = cpu.rA & SIGN36; cpu 3267 src/dps8/dps8_ins.c cpu.rA <<= 1; cpu 3268 src/dps8/dps8_ins.c if (tmpSign != (cpu.rA & SIGN36)) cpu 3271 src/dps8/dps8_ins.c cpu.rA &= DMASK; // keep to 36-bits cpu 3277 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); cpu 3278 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); cpu 3287 src/dps8/dps8_ins.c Read2RTCDOperandFetch (cpup, cpu.TPR.CA, cpu.Ypair); cpu 3317 src/dps8/dps8_ins.c cpu.CY = ((word36) cpu.rX[n]) << 18; cpu 3318 src/dps8/dps8_ins.c cpu.zone = 0777777000000; cpu 3319 src/dps8/dps8_ins.c cpu.useZone = true; cpu 3349 src/dps8/dps8_ins.c if (cpu.tweaks.l68_mode) cpu 3350 src/dps8/dps8_ins.c tmp18 = GETLO (cpu.CY) & 0777760; // L68 cpu 3352 src/dps8/dps8_ins.c tmp18 = GETLO (cpu.CY) & 0777770; // DPS8M cpu 3392 src/dps8/dps8_ins.c word72 tmp72 = YPAIRTO72 (cpu.Ypair); cpu 3393 src/dps8/dps8_ins.c word72 trAQ = convert_to_word72 (cpu.rA, cpu.rQ); cpu 3408 src/dps8/dps8_ins.c convert_to_word36 (trAQ, &cpu.rA, &cpu.rQ); cpu 3421 src/dps8/dps8_ins.c cpu.rA = cpu.rA | cpu.CY; cpu 3422 src/dps8/dps8_ins.c cpu.rA &= DMASK; cpu 3427 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); cpu 3428 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); cpu 3433 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 3438 src/dps8/dps8_ins.c cpu.rQ = Add36b (cpup, cpu.rQ, cpu.CY, 0, I_ZNOC, cpu 3439 src/dps8/dps8_ins.c & cpu.cu.IR, & ovf); cpu 3451 src/dps8/dps8_ins.c if (cpu.cu.IR & (I_NEG | I_ZERO)) cpu 3485 src/dps8/dps8_ins.c cpu.Ypair[0] = 043; cpu 3486 src/dps8/dps8_ins.c cpu.Ypair[0] |= ((word36) cpu.PR[n].SNR) << 18; cpu 3487 src/dps8/dps8_ins.c cpu.Ypair[0] |= ((word36) cpu.PR[n].RNR) << 15; cpu 3488 src/dps8/dps8_ins.c cpu.Ypair[1] = 0; cpu 3497 src/dps8/dps8_ins.c cpu.rA = cpu.rA & cpu.CY; cpu 3498 src/dps8/dps8_ins.c cpu.rA &= DMASK; cpu 3502 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); cpu 3503 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); cpu 3514 src/dps8/dps8_ins.c cpu.CY &= DMASK; cpu 3515 src/dps8/dps8_ins.c cpu.rE = (cpu.CY >> 28) & 0377; cpu 3516 src/dps8/dps8_ins.c cpu.rA = (cpu.CY & FLOAT36MASK) << 8; cpu 3520 src/dps8/dps8_ins.c cpu.rQ = 0; cpu 3525 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0 && cpu.rQ == 0); cpu 3526 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); cpu 3539 src/dps8/dps8_ins.c cpu.rA = cpu.TPR.TRR & MASK3; cpu 3540 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.TPR.TSR & MASK15) << 18; cpu 3545 src/dps8/dps8_ins.c cpu.rQ = cpu.TPR.TBR & MASK6; cpu 3546 src/dps8/dps8_ins.c cpu.rQ |= (word36) (cpu.TPR.CA & MASK18) << 18; cpu 3551 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0 && cpu.rQ == 0); cpu 3563 src/dps8/dps8_ins.c uint cnt = (uint) cpu.TPR.CA & 0177; // 0-127 cpu 3570 src/dps8/dps8_ins.c capture = cpu.rQ & barrelLeftMaskTable[cnt + 1]; cpu 3573 src/dps8/dps8_ins.c cpu.rQ <<= cnt; cpu 3574 src/dps8/dps8_ins.c cpu.rQ &= DMASK; // keep to 36-bits cpu 3580 src/dps8/dps8_ins.c capture = cpu.rQ; cpu 3581 src/dps8/dps8_ins.c cpu.rQ = 0; cpu 3589 src/dps8/dps8_ins.c word36 tmp36 = cpu.TPR.CA & 0177; // CY bits 11-17 cpu 3590 src/dps8/dps8_ins.c word36 tmpSign = cpu.rQ & SIGN36; cpu 3595 src/dps8/dps8_ins.c cpu.rQ <<= 1; cpu 3596 src/dps8/dps8_ins.c if (tmpSign != (cpu.rQ & SIGN36)) cpu 3599 src/dps8/dps8_ins.c cpu.rQ &= DMASK; // keep to 36-bits cpu 3605 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rQ == 0); cpu 3606 src/dps8/dps8_ins.c SC_I_NEG (cpu.rQ & SIGN36); cpu 3626 src/dps8/dps8_ins.c DPS8M_ (cpu.CY = cpu.cu.IR & 0000000777770LL; ) cpu 3628 src/dps8/dps8_ins.c L68_ (cpu.CY = cpu.cu.IR & 0000000777760LL;) cpu 3630 src/dps8/dps8_ins.c if (cpu.switches.procMode == procModeGCOS) cpu 3631 src/dps8/dps8_ins.c cpu.CY = cpu.cu.IR & 0000000777600LL; cpu 3632 src/dps8/dps8_ins.c cpu.zone = 0000000777777; cpu 3633 src/dps8/dps8_ins.c cpu.useZone = true; cpu 3634 src/dps8/dps8_ins.c SCF (i->stiTally, cpu.CY, I_TALLY); cpu 3642 src/dps8/dps8_ins.c cpu.rA = 0; cpu 3643 src/dps8/dps8_ins.c SETHI (cpu.rA, cpu.TPR.CA); cpu 3647 src/dps8/dps8_ins.c SC_I_ZERO (cpu.TPR.CA == 0); cpu 3648 src/dps8/dps8_ins.c SC_I_NEG (cpu.TPR.CA & SIGN18); cpu 3653 src/dps8/dps8_ins.c cpu.rQ = 0; cpu 3654 src/dps8/dps8_ins.c SETHI (cpu.rQ, cpu.TPR.CA); cpu 3659 src/dps8/dps8_ins.c SC_I_ZERO (cpu.TPR.CA == 0); cpu 3660 src/dps8/dps8_ins.c SC_I_NEG (cpu.TPR.CA & SIGN18); cpu 3677 src/dps8/dps8_ins.c cpu.rA = compl36 (cpup, cpu.CY, & cpu.cu.IR, & ovf); cpu 3688 src/dps8/dps8_ins.c cpu.rQ = compl36 (cpup, cpu.CY, & cpu.cu.IR, & ovf); cpu 3708 src/dps8/dps8_ins.c cpu.rX[n] = compl18 (cpup, GETHI (cpu.CY), & cpu.cu.IR, & ovf); cpu 3724 src/dps8/dps8_ins.c if (cpu.Ypair[0] == 0400000000000LL && cpu.Ypair[1] == 0) cpu 3726 src/dps8/dps8_ins.c cpu.rA = cpu.Ypair[0]; cpu 3730 src/dps8/dps8_ins.c cpu.rQ = cpu.Ypair[1]; cpu 3738 src/dps8/dps8_ins.c else if (cpu.Ypair[0] == 0 && cpu.Ypair[1] == 0) cpu 3740 src/dps8/dps8_ins.c cpu.rA = 0; cpu 3744 src/dps8/dps8_ins.c cpu.rQ = 0; cpu 3754 src/dps8/dps8_ins.c word72 tmp72 = convert_to_word72 (cpu.Ypair[0], cpu.Ypair[1]); cpu 3760 src/dps8/dps8_ins.c convert_to_word36 (tmp72, & cpu.rA, & cpu.rQ); cpu 3766 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0 && cpu.rQ == 0); cpu 3767 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); cpu 3776 src/dps8/dps8_ins.c cpu.rA = cpu.CY; cpu 3780 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); cpu 3781 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); cpu 3782 src/dps8/dps8_ins.c cpu.CY = 0; cpu 3795 src/dps8/dps8_ins.c cpu.rQ = cpu.CY; cpu 3799 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rQ == 0); cpu 3800 src/dps8/dps8_ins.c SC_I_NEG (cpu.rQ & SIGN36); cpu 3801 src/dps8/dps8_ins.c cpu.CY = 0; cpu 3815 src/dps8/dps8_ins.c cpu.rX[n] = GETHI (cpu.CY); cpu 3819 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rX[n] == 0); cpu 3820 src/dps8/dps8_ins.c SC_I_NEG (cpu.rX[n] & SIGN18); cpu 3826 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 3827 src/dps8/dps8_ins.c L68_ (cpu.ou.eac = 0;) cpu 3828 src/dps8/dps8_ins.c cpu.rX[0] = GETHI (cpu.Yblock8[0]); cpu 3832 src/dps8/dps8_ins.c cpu.rX[1] = GETLO (cpu.Yblock8[0]); cpu 3836 src/dps8/dps8_ins.c L68_ (cpu.ou.eac ++;) cpu 3837 src/dps8/dps8_ins.c cpu.rX[2] = GETHI (cpu.Yblock8[1]); cpu 3841 src/dps8/dps8_ins.c cpu.rX[3] = GETLO (cpu.Yblock8[1]); cpu 3845 src/dps8/dps8_ins.c L68_ (cpu.ou.eac ++;) cpu 3846 src/dps8/dps8_ins.c cpu.rX[4] = GETHI (cpu.Yblock8[2]); cpu 3850 src/dps8/dps8_ins.c cpu.rX[5] = GETLO (cpu.Yblock8[2]); cpu 3854 src/dps8/dps8_ins.c L68_ (cpu.ou.eac ++;) cpu 3855 src/dps8/dps8_ins.c cpu.rX[6] = GETHI (cpu.Yblock8[3]); cpu 3859 src/dps8/dps8_ins.c cpu.rX[7] = GETLO (cpu.Yblock8[3]); cpu 3863 src/dps8/dps8_ins.c L68_ (cpu.ou.eac ++;) cpu 3864 src/dps8/dps8_ins.c cpu.rA = cpu.Yblock8[4]; cpu 3868 src/dps8/dps8_ins.c cpu.rQ = cpu.Yblock8[5]; cpu 3872 src/dps8/dps8_ins.c cpu.rE = (GETHI (cpu.Yblock8[6]) >> 10) & 0377; // need checking cpu 3893 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 3894 src/dps8/dps8_ins.c L68_ (cpu.ou.eac = 0;) cpu 3895 src/dps8/dps8_ins.c SETHI (cpu.Yblock8[0], cpu.rX[0]); cpu 3896 src/dps8/dps8_ins.c SETLO (cpu.Yblock8[0], cpu.rX[1]); cpu 3897 src/dps8/dps8_ins.c L68_ (cpu.ou.eac ++;) cpu 3898 src/dps8/dps8_ins.c SETHI (cpu.Yblock8[1], cpu.rX[2]); cpu 3899 src/dps8/dps8_ins.c SETLO (cpu.Yblock8[1], cpu.rX[3]); cpu 3900 src/dps8/dps8_ins.c L68_ (cpu.ou.eac ++;) cpu 3901 src/dps8/dps8_ins.c SETHI (cpu.Yblock8[2], cpu.rX[4]); cpu 3902 src/dps8/dps8_ins.c SETLO (cpu.Yblock8[2], cpu.rX[5]); cpu 3903 src/dps8/dps8_ins.c L68_ (cpu.ou.eac ++;) cpu 3904 src/dps8/dps8_ins.c SETHI (cpu.Yblock8[3], cpu.rX[6]); cpu 3905 src/dps8/dps8_ins.c SETLO (cpu.Yblock8[3], cpu.rX[7]); cpu 3906 src/dps8/dps8_ins.c L68_ (cpu.ou.eac ++;) cpu 3907 src/dps8/dps8_ins.c cpu.Yblock8[4] = cpu.rA; cpu 3908 src/dps8/dps8_ins.c cpu.Yblock8[5] = cpu.rQ; cpu 3909 src/dps8/dps8_ins.c cpu.Yblock8[6] = ((word36)(cpu.rE & MASK8)) << 28; cpu 3910 src/dps8/dps8_ins.c if (cpu.tweaks.isolts_mode) cpu 3911 src/dps8/dps8_ins.c cpu.Yblock8[7] = (((-- cpu.shadowTR) & MASK27) << 9) | (cpu.rRALR & 07); cpu 3913 src/dps8/dps8_ins.c cpu.Yblock8[7] = ((cpu.rTR & MASK27) << 9) | (cpu.rRALR & 07); cpu 3932 src/dps8/dps8_ins.c if (cpu.CY == 0) cpu 3938 src/dps8/dps8_ins.c cpu.CY = cpu.rA; cpu 3948 src/dps8/dps8_ins.c if (cpu.CY == cpu.rQ) cpu 3953 src/dps8/dps8_ins.c cpu.CY = cpu.rA; cpu 3970 src/dps8/dps8_ins.c cpu.CY = cpu.rA; cpu 3971 src/dps8/dps8_ins.c cpu.zone = cpu 3977 src/dps8/dps8_ins.c cpu.useZone = true; cpu 3978 src/dps8/dps8_ins.c cpu.ou.crflag = true; cpu 3988 src/dps8/dps8_ins.c cpu.CY = cpu.rQ; cpu 3989 src/dps8/dps8_ins.c cpu.zone = cpu 3995 src/dps8/dps8_ins.c cpu.useZone = true; cpu 3996 src/dps8/dps8_ins.c cpu.ou.crflag = true; cpu 4002 src/dps8/dps8_ins.c SETHI (cpu.CY, (cpu.PPR.IC + 1) & MASK18); cpu 4005 src/dps8/dps8_ins.c DPS8M_ (SETLO (cpu.CY, cpu.cu.IR & 0777770);) cpu 4006 src/dps8/dps8_ins.c L68_ (SETLO (cpu.CY, cpu.cu.IR & 0777760);) cpu 4007 src/dps8/dps8_ins.c SCF (i->stiTally, cpu.CY, I_TALLY); cpu 4015 src/dps8/dps8_ins.c cpu.CY = ((word36) ((cpu.PPR.IC + 2) & MASK18)) << 18; cpu 4016 src/dps8/dps8_ins.c cpu.zone = 0777777000000; cpu 4017 src/dps8/dps8_ins.c cpu.useZone = true; cpu 4028 src/dps8/dps8_ins.c cpu.CY = cpu.rA; cpu 4029 src/dps8/dps8_ins.c cpu.zone = cpu 4037 src/dps8/dps8_ins.c cpu.useZone = true; cpu 4038 src/dps8/dps8_ins.c cpu.ou.crflag = true; cpu 4048 src/dps8/dps8_ins.c cpu.CY = cpu.rQ; cpu 4049 src/dps8/dps8_ins.c cpu.zone = cpu 4057 src/dps8/dps8_ins.c cpu.useZone = true; cpu 4058 src/dps8/dps8_ins.c cpu.ou.crflag = true; cpu 4078 src/dps8/dps8_ins.c if (cpu.cycle == EXEC_cycle) cpu 4080 src/dps8/dps8_ins.c cpu.Ypair[0] = 0; cpu 4081 src/dps8/dps8_ins.c putbits36_15 (& cpu.Ypair[0], 3, cpu.PPR.PSR); cpu 4082 src/dps8/dps8_ins.c putbits36_3 (& cpu.Ypair[0], 18, cpu.PPR.PRR); cpu 4083 src/dps8/dps8_ins.c putbits36_6 (& cpu.Ypair[0], 30, 043); cpu 4085 src/dps8/dps8_ins.c cpu.Ypair[1] = 0; cpu 4086 src/dps8/dps8_ins.c putbits36_18 (& cpu.Ypair[1], 0, cpu.PPR.IC + 2); cpu 4090 src/dps8/dps8_ins.c cpu.Ypair[0] = 0; cpu 4091 src/dps8/dps8_ins.c putbits36_15 (& cpu.Ypair[0], 3, cpu.cu_data.PSR); cpu 4092 src/dps8/dps8_ins.c putbits36_3 (& cpu.Ypair[0], 18, cpu.cu_data.PRR); cpu 4095 src/dps8/dps8_ins.c cpu.Ypair[1] = 0; cpu 4096 src/dps8/dps8_ins.c putbits36_18 (& cpu.Ypair[1], 0, cpu.cu_data.IC + 2); cpu 4108 src/dps8/dps8_ins.c if (cpu.tweaks.isolts_mode) cpu 4111 src/dps8/dps8_ins.c cpu.CY = (((uint) (((int) cpu.shadowTR) - 1)) & MASK27) << 9; cpu 4113 src/dps8/dps8_ins.c cpu.CY = (cpu.rTR & MASK27) << 9; cpu 4140 src/dps8/dps8_ins.c cpu.CY = cpu.rX[opcode10 & 07]; cpu 4141 src/dps8/dps8_ins.c cpu.zone = 0000000777777; cpu 4142 src/dps8/dps8_ins.c cpu.useZone = true; cpu 4153 src/dps8/dps8_ins.c uint cnt = (uint) cpu.TPR.CA & 0177; // 0-127 cpu 4156 src/dps8/dps8_ins.c word36 highA = cpu.rA & barrelLeftMaskTable[cnt]; cpu 4157 src/dps8/dps8_ins.c cpu.rA <<= cnt; cpu 4160 src/dps8/dps8_ins.c cpu.rA |= highA; cpu 4161 src/dps8/dps8_ins.c cpu.rA &= DMASK; // keep to 36-bits cpu 4163 src/dps8/dps8_ins.c word36 tmp36 = cpu.TPR.CA & 0177; // CY bits 11-17 cpu 4166 src/dps8/dps8_ins.c bool a0 = cpu.rA & SIGN36; // A0 cpu 4167 src/dps8/dps8_ins.c cpu.rA <<= 1; // shift left 1 cpu 4169 src/dps8/dps8_ins.c cpu.rA |= 1; cpu 4171 src/dps8/dps8_ins.c cpu.rA &= DMASK; // keep to 36-bits cpu 4177 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); cpu 4178 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); cpu 4192 src/dps8/dps8_ins.c cpu.rA &= DMASK; // Make sure the shifted in bits are 0 cpu 4193 src/dps8/dps8_ins.c word36 tmp36 = cpu.TPR.CA & 0177; // CY bits 11-17 cpu 4195 src/dps8/dps8_ins.c cpu.rA >>= tmp36; cpu 4196 src/dps8/dps8_ins.c cpu.rA &= DMASK; // keep to 36-bits cpu 4201 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); cpu 4202 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); cpu 4215 src/dps8/dps8_ins.c uint cnt = (uint) cpu.TPR.CA & 0177; // 0-127 cpu 4216 src/dps8/dps8_ins.c bool A0 = (cpu.rA & SIGN36) != 0; cpu 4219 src/dps8/dps8_ins.c cpu.rA = A0 ? MASK36 : 0; cpu 4222 src/dps8/dps8_ins.c cpu.rA >>= cnt; cpu 4225 src/dps8/dps8_ins.c cpu.rA |= barrelLeftMaskTable[cnt]; cpu 4227 src/dps8/dps8_ins.c cpu.rA &= BS_COMPL (barrelLeftMaskTable[cnt]); cpu 4230 src/dps8/dps8_ins.c cpu.rA &= DMASK; // keep to 36-bits cpu 4232 src/dps8/dps8_ins.c cpu.rA &= DMASK; // Make sure the shifted in bits are 0 cpu 4233 src/dps8/dps8_ins.c word18 tmp18 = cpu.TPR.CA & 0177; // CY bits 11-17 cpu 4235 src/dps8/dps8_ins.c bool a0 = cpu.rA & SIGN36; // A0 cpu 4238 src/dps8/dps8_ins.c cpu.rA >>= 1; // shift right 1 cpu 4240 src/dps8/dps8_ins.c cpu.rA |= SIGN36; cpu 4242 src/dps8/dps8_ins.c cpu.rA &= DMASK; // keep to 36-bits cpu 4248 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); cpu 4249 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); cpu 4263 src/dps8/dps8_ins.c uint cnt = (uint) cpu.TPR.CA & 0177; // 0-127 cpu 4267 src/dps8/dps8_ins.c word36 tmp = cpu.rA; cpu 4268 src/dps8/dps8_ins.c cpu.rA = cpu.rQ; cpu 4269 src/dps8/dps8_ins.c cpu.rQ = tmp; cpu 4271 src/dps8/dps8_ins.c word36 highA = cpu.rA & barrelLeftMaskTable[cnt]; cpu 4272 src/dps8/dps8_ins.c word36 lowA = cpu.rA & BS_COMPL(barrelLeftMaskTable[cnt]); cpu 4273 src/dps8/dps8_ins.c word36 highQ = cpu.rQ & barrelLeftMaskTable[cnt]; cpu 4274 src/dps8/dps8_ins.c word36 lowQ = cpu.rQ & BS_COMPL(barrelLeftMaskTable[cnt]); cpu 4275 src/dps8/dps8_ins.c cpu.rA = (lowA << cnt) | (highQ >> (36 - cnt)); cpu 4276 src/dps8/dps8_ins.c cpu.rQ = (lowQ << cnt) | (highA >> (36 - cnt)); cpu 4278 src/dps8/dps8_ins.c word36 tmp36 = cpu.TPR.CA & 0177; // CY bits 11-17 cpu 4281 src/dps8/dps8_ins.c bool a0 = cpu.rA & SIGN36; // A0 cpu 4283 src/dps8/dps8_ins.c cpu.rA <<= 1; // shift left 1 cpu 4285 src/dps8/dps8_ins.c bool b0 = cpu.rQ & SIGN36; // Q0 cpu 4287 src/dps8/dps8_ins.c cpu.rA |= 1; // Q0 => A35 cpu 4289 src/dps8/dps8_ins.c cpu.rQ <<= 1; // shift left 1 cpu 4292 src/dps8/dps8_ins.c cpu.rQ |= 1; cpu 4296 src/dps8/dps8_ins.c cpu.rA &= DMASK; // keep to 36-bits cpu 4297 src/dps8/dps8_ins.c cpu.rQ &= DMASK; cpu 4303 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0 && cpu.rQ == 0); cpu 4304 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); cpu 4317 src/dps8/dps8_ins.c uint cnt = (uint) cpu.TPR.CA & 0177; // 0-127 cpu 4321 src/dps8/dps8_ins.c cpu.rA &= MASK36; cpu 4322 src/dps8/dps8_ins.c cpu.rQ &= MASK36; cpu 4328 src/dps8/dps8_ins.c bool allz = cpu.rA == 0 && cpu.rQ == 0; cpu 4329 src/dps8/dps8_ins.c bool all1 = cpu.rA == MASK36 && cpu.rQ == MASK36; cpu 4334 src/dps8/dps8_ins.c cpu.rA = 0; cpu 4335 src/dps8/dps8_ins.c cpu.rQ = 0; cpu 4346 src/dps8/dps8_ins.c word36 captureA = cpu.rA; cpu 4347 src/dps8/dps8_ins.c word36 captureQ = lmask & cpu.rQ; cpu 4360 src/dps8/dps8_ins.c cpu.rA = (cpu.rQ << cnt36) & MASK36; cpu 4361 src/dps8/dps8_ins.c cpu.rQ = 0; cpu 4369 src/dps8/dps8_ins.c word36 captureA = lmask & cpu.rA; cpu 4379 src/dps8/dps8_ins.c cpu.rA = ((cpu.rA << cnt) & MASK36) | (cpu.rQ >> (36 - cnt)); cpu 4380 src/dps8/dps8_ins.c cpu.rQ = (cpu.rQ << cnt) & MASK36; cpu 4388 src/dps8/dps8_ins.c cpu 4396 src/dps8/dps8_ins.c cpu 4397 src/dps8/dps8_ins.c cpu 4409 src/dps8/dps8_ins.c cpu 4410 src/dps8/dps8_ins.c cpu 4413 src/dps8/dps8_ins.c cpu 4414 src/dps8/dps8_ins.c cpu 4415 src/dps8/dps8_ins.c cpu 4416 src/dps8/dps8_ins.c cpu 4417 src/dps8/dps8_ins.c cpu 4427 src/dps8/dps8_ins.c word36 tmp36 = cpu.TPR.CA & 0177; // CY bits 11-17 cpu 4428 src/dps8/dps8_ins.c word36 tmpSign = cpu.rA & SIGN36; cpu 4431 src/dps8/dps8_ins.c cpu.rA <<= 1; // shift left 1 cpu 4433 src/dps8/dps8_ins.c if (tmpSign != (cpu.rA & SIGN36)) cpu 4436 src/dps8/dps8_ins.c bool b0 = cpu.rQ & SIGN36; // Q0 cpu 4438 src/dps8/dps8_ins.c cpu.rA |= 1; // Q0 => A35 cpu 4440 src/dps8/dps8_ins.c cpu.rQ <<= 1; // shift left 1 cpu 4443 src/dps8/dps8_ins.c cpu.rA &= DMASK; // keep to 36-bits cpu 4444 src/dps8/dps8_ins.c cpu.rQ &= DMASK; cpu 4451 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0 && cpu.rQ == 0); cpu 4452 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); cpu 4465 src/dps8/dps8_ins.c uint cnt = (uint) cpu.TPR.CA & 0177; // 0-127 cpu 4467 src/dps8/dps8_ins.c cpu.rA = 0; cpu 4468 src/dps8/dps8_ins.c cpu.rQ = 0; cpu 4471 src/dps8/dps8_ins.c cpu.rQ >>= cnt; cpu 4473 src/dps8/dps8_ins.c cpu.rQ &= BS_COMPL (barrelLeftMaskTable[cnt]); cpu 4475 src/dps8/dps8_ins.c word36 lowA = cpu.rA & barrelRightMaskTable[cnt]; cpu 4477 src/dps8/dps8_ins.c cpu.rA >>= cnt; cpu 4479 src/dps8/dps8_ins.c cpu.rA &= BS_COMPL (barrelLeftMaskTable[cnt]); cpu 4483 src/dps8/dps8_ins.c cpu.rQ |= lowA; cpu 4486 src/dps8/dps8_ins.c cpu.rQ = cpu.rA >> (cnt - 36); cpu 4488 src/dps8/dps8_ins.c cpu.rQ &= BS_COMPL (barrelLeftMaskTable[cnt - 36]); cpu 4489 src/dps8/dps8_ins.c cpu.rA = 0; cpu 4491 src/dps8/dps8_ins.c cpu.rA &= DMASK; // keep to 36-bits cpu 4492 src/dps8/dps8_ins.c cpu.rQ &= DMASK; cpu 4494 src/dps8/dps8_ins.c cpu.rA &= DMASK; // Make sure the shifted in bits are 0 cpu 4495 src/dps8/dps8_ins.c cpu.rQ &= DMASK; // Make sure the shifted in bits are 0 cpu 4496 src/dps8/dps8_ins.c word36 tmp36 = cpu.TPR.CA & 0177; // CY bits 11-17 cpu 4499 src/dps8/dps8_ins.c bool a35 = cpu.rA & 1; // A35 cpu 4500 src/dps8/dps8_ins.c cpu.rA >>= 1; // shift right 1 cpu 4502 src/dps8/dps8_ins.c cpu.rQ >>= 1; // shift right 1 cpu 4505 src/dps8/dps8_ins.c cpu.rQ |= SIGN36; cpu 4507 src/dps8/dps8_ins.c cpu.rA &= DMASK; // keep to 36-bits cpu 4508 src/dps8/dps8_ins.c cpu.rQ &= DMASK; cpu 4515 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0 && cpu.rQ == 0); cpu 4516 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); cpu 4530 src/dps8/dps8_ins.c uint cnt = (uint) cpu.TPR.CA & 0177; // 0-127 cpu 4531 src/dps8/dps8_ins.c bool AQ0 = (cpu.rA & SIGN36) != 0; cpu 4533 src/dps8/dps8_ins.c cpu.rA = cpu.rQ = AQ0 ? MASK36 : 0; cpu 4536 src/dps8/dps8_ins.c cpu.rQ >>= cnt; cpu 4538 src/dps8/dps8_ins.c cpu.rQ &= BS_COMPL (barrelLeftMaskTable[cnt]); cpu 4540 src/dps8/dps8_ins.c word36 lowA = cpu.rA & barrelRightMaskTable[cnt]; cpu 4542 src/dps8/dps8_ins.c cpu.rA >>= cnt; cpu 4545 src/dps8/dps8_ins.c cpu.rA |= barrelLeftMaskTable[cnt]; cpu 4547 src/dps8/dps8_ins.c cpu.rA &= BS_COMPL (barrelLeftMaskTable[cnt]); cpu 4551 src/dps8/dps8_ins.c cpu.rQ |= lowA; cpu 4554 src/dps8/dps8_ins.c cpu.rQ = cpu.rA >> (cnt - 36); cpu 4557 src/dps8/dps8_ins.c cpu.rQ |= barrelLeftMaskTable[cnt - 36]; cpu 4558 src/dps8/dps8_ins.c cpu.rA = MASK36; cpu 4560 src/dps8/dps8_ins.c cpu.rQ &= BS_COMPL (barrelLeftMaskTable[cnt - 36]); cpu 4561 src/dps8/dps8_ins.c cpu.rA = 0; cpu 4564 src/dps8/dps8_ins.c cpu.rA &= DMASK; // keep to 36-bits cpu 4565 src/dps8/dps8_ins.c cpu.rQ &= DMASK; cpu 4567 src/dps8/dps8_ins.c word36 tmp36 = cpu.TPR.CA & 0177; // CY bits 11-17 cpu 4568 src/dps8/dps8_ins.c cpu.rA &= DMASK; // Make sure the shifted in bits are 0 cpu 4569 src/dps8/dps8_ins.c cpu.rQ &= DMASK; // Make sure the shifted in bits are 0 cpu 4570 src/dps8/dps8_ins.c bool a0 = cpu.rA & SIGN36; // A0 cpu 4574 src/dps8/dps8_ins.c bool a35 = cpu.rA & 1; // A35 cpu 4576 src/dps8/dps8_ins.c cpu.rA >>= 1; // shift right 1 cpu 4578 src/dps8/dps8_ins.c cpu.rA |= SIGN36; cpu 4580 src/dps8/dps8_ins.c cpu.rQ >>= 1; // shift right 1 cpu 4582 src/dps8/dps8_ins.c cpu.rQ |= SIGN36; cpu 4584 src/dps8/dps8_ins.c cpu.rA &= DMASK; // keep to 36-bits (probably ain't necessary) cpu 4585 src/dps8/dps8_ins.c cpu.rQ &= DMASK; cpu 4592 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0 && cpu.rQ == 0); cpu 4593 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); cpu 4605 src/dps8/dps8_ins.c uint cnt = (uint) cpu.TPR.CA & 0177; // 0-127 cpu 4608 src/dps8/dps8_ins.c word36 highQ = cpu.rQ & barrelLeftMaskTable[cnt]; cpu 4609 src/dps8/dps8_ins.c cpu.rQ <<= cnt; cpu 4612 src/dps8/dps8_ins.c cpu.rQ |= highQ; cpu 4613 src/dps8/dps8_ins.c cpu.rQ &= DMASK; // keep to 36-bits cpu 4615 src/dps8/dps8_ins.c word36 tmp36 = cpu.TPR.CA & 0177; // CY bits 11-17 cpu 4618 src/dps8/dps8_ins.c bool q0 = cpu.rQ & SIGN36; // Q0 cpu 4619 src/dps8/dps8_ins.c cpu.rQ <<= 1; // shift left 1 cpu 4621 src/dps8/dps8_ins.c cpu.rQ |= 1; cpu 4623 src/dps8/dps8_ins.c cpu.rQ &= DMASK; // keep to 36-bits cpu 4629 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rQ == 0); cpu 4630 src/dps8/dps8_ins.c SC_I_NEG (cpu.rQ & SIGN36); cpu 4644 src/dps8/dps8_ins.c word36 tmp36 = cpu.TPR.CA & 0177; // CY bits 11-17 cpu 4646 src/dps8/dps8_ins.c cpu.rQ &= DMASK; // Make sure the shifted in bits are 0 cpu 4647 src/dps8/dps8_ins.c cpu.rQ >>= tmp36; cpu 4648 src/dps8/dps8_ins.c cpu.rQ &= DMASK; // keep to 36-bits cpu 4653 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rQ == 0); cpu 4654 src/dps8/dps8_ins.c SC_I_NEG (cpu.rQ & SIGN36); cpu 4668 src/dps8/dps8_ins.c uint cnt = (uint) cpu.TPR.CA & 0177; // 0-127 cpu 4669 src/dps8/dps8_ins.c bool Q0 = (cpu.rQ & SIGN36) != 0; cpu 4672 src/dps8/dps8_ins.c cpu.rQ = Q0 ? MASK36 : 0; cpu 4675 src/dps8/dps8_ins.c cpu.rQ >>= cnt; cpu 4678 src/dps8/dps8_ins.c cpu.rQ |= barrelLeftMaskTable[cnt]; cpu 4680 src/dps8/dps8_ins.c cpu.rQ &= BS_COMPL (barrelLeftMaskTable[cnt]); cpu 4683 src/dps8/dps8_ins.c cpu.rQ &= DMASK; // keep to 36-bits cpu 4685 src/dps8/dps8_ins.c cpu.rQ &= DMASK; // Make sure the shifted in bits are 0 cpu 4686 src/dps8/dps8_ins.c word36 tmp36 = cpu.TPR.CA & 0177; // CY bits 11-17 cpu 4687 src/dps8/dps8_ins.c bool q0 = cpu.rQ & SIGN36; // Q0 cpu 4690 src/dps8/dps8_ins.c cpu.rQ >>= 1; // shift right 1 cpu 4692 src/dps8/dps8_ins.c cpu.rQ |= SIGN36; cpu 4694 src/dps8/dps8_ins.c cpu.rQ &= DMASK; // keep to 36-bits cpu 4700 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rQ == 0); cpu 4701 src/dps8/dps8_ins.c SC_I_NEG (cpu.rQ & SIGN36); cpu 4718 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 4723 src/dps8/dps8_ins.c cpu.rA = Add36b (cpup, cpu.rA, cpu.CY, 0, I_ZNOC, & cpu.cu.IR, & ovf); cpu 4734 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 4740 src/dps8/dps8_ins.c word72 tmp72 = YPAIRTO72 (cpu.Ypair); cpu 4741 src/dps8/dps8_ins.c tmp72 = Add72b (cpup, convert_to_word72 (cpu.rA, cpu.rQ), cpu 4742 src/dps8/dps8_ins.c tmp72, 0, I_ZNOC, & cpu.cu.IR, & ovf); cpu 4743 src/dps8/dps8_ins.c convert_to_word36 (tmp72, & cpu.rA, & cpu.rQ); cpu 4755 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 4761 src/dps8/dps8_ins.c word72 tmp72 = SIGNEXT36_72 (cpu.CY); // sign extend Cy cpu 4762 src/dps8/dps8_ins.c tmp72 = Add72b (cpup, convert_to_word72 (cpu.rA, cpu.rQ), cpu 4763 src/dps8/dps8_ins.c tmp72, 0, I_ZNOC, & cpu.cu.IR, & ovf); cpu 4764 src/dps8/dps8_ins.c convert_to_word36 (tmp72, & cpu.rA, & cpu.rQ); cpu 4779 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 4785 src/dps8/dps8_ins.c word72 tmp72 = YPAIRTO72 (cpu.Ypair); cpu 4787 src/dps8/dps8_ins.c tmp72 = Add72b (cpup, convert_to_word72 (cpu.rA, cpu.rQ), cpu 4788 src/dps8/dps8_ins.c tmp72, 0, I_ZNC, & cpu.cu.IR, & ovf); cpu 4789 src/dps8/dps8_ins.c convert_to_word36 (tmp72, & cpu.rA, & cpu.rQ); cpu 4799 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 4809 src/dps8/dps8_ins.c cpu.rA = Add36b (cpup, cpu.rA, cpu.CY, 0, I_ZNC, & cpu.cu.IR, & ovf); cpu 4823 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 4828 src/dps8/dps8_ins.c cpu.rQ = Add36b (cpup, cpu.rQ, cpu.CY, 0, I_ZNC, & cpu.cu.IR, & ovf); cpu 4845 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 4851 src/dps8/dps8_ins.c cpu.rX[n] = Add18b (cpup, cpu.rX[n], GETHI (cpu.CY), 0, I_ZNC, cpu 4852 src/dps8/dps8_ins.c & cpu.cu.IR, & ovf); cpu 4872 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 4878 src/dps8/dps8_ins.c cpu.rX[n] = Add18b (cpup, cpu.rX[n], GETHI (cpu.CY), 0, cpu 4880 src/dps8/dps8_ins.c & cpu.cu.IR, & ovf); cpu 4895 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 4900 src/dps8/dps8_ins.c cpu.CY = Add36b (cpup, cpu.rA, cpu.CY, 0, I_ZNOC, cpu 4901 src/dps8/dps8_ins.c & cpu.cu.IR, & ovf); cpu 4909 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 4914 src/dps8/dps8_ins.c cpu.CY = Add36b (cpup, cpu.rQ, cpu.CY, 0, I_ZNOC, & cpu.cu.IR, & ovf); cpu 4931 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 4937 src/dps8/dps8_ins.c word18 tmp18 = Add18b (cpup, cpu.rX[n], GETHI (cpu.CY), 0, cpu 4938 src/dps8/dps8_ins.c I_ZNOC, & cpu.cu.IR, & ovf); cpu 4939 src/dps8/dps8_ins.c SETHI (cpu.CY, tmp18); cpu 4949 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 4954 src/dps8/dps8_ins.c cpu.rA = Add36b (cpup, cpu.rA, cpu.CY, TST_I_CARRY ? 1 : 0, cpu 4955 src/dps8/dps8_ins.c I_ZNOC, & cpu.cu.IR, & ovf); cpu 4968 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 4973 src/dps8/dps8_ins.c cpu.rQ = Add36b (cpup, cpu.rQ, cpu.CY, TST_I_CARRY ? 1 : 0, cpu 4974 src/dps8/dps8_ins.c I_ZNOC, & cpu.cu.IR, & ovf); cpu 4988 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 4993 src/dps8/dps8_ins.c cpu.rA = Sub36b (cpup, cpu.rA, cpu.CY, 1, I_ZNOC, & cpu.cu.IR, & ovf); cpu 5004 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 5010 src/dps8/dps8_ins.c word72 tmp72 = YPAIRTO72 (cpu.Ypair); cpu 5011 src/dps8/dps8_ins.c tmp72 = Sub72b (cpup, convert_to_word72 (cpu.rA, cpu.rQ), tmp72, 1, cpu 5012 src/dps8/dps8_ins.c I_ZNOC, & cpu.cu.IR, cpu 5014 src/dps8/dps8_ins.c convert_to_word36 (tmp72, & cpu.rA, & cpu.rQ); cpu 5027 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 5032 src/dps8/dps8_ins.c cpu.rA = Sub36b (cpup, cpu.rA, cpu.CY, 1, I_ZNC, & cpu.cu.IR, & ovf); cpu 5047 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 5053 src/dps8/dps8_ins.c word72 tmp72 = YPAIRTO72 (cpu.Ypair); cpu 5055 src/dps8/dps8_ins.c tmp72 = Sub72b (cpup, convert_to_word72 (cpu.rA, cpu.rQ), tmp72, 1, cpu 5056 src/dps8/dps8_ins.c I_ZNC, & cpu.cu.IR, & ovf); cpu 5057 src/dps8/dps8_ins.c convert_to_word36 (tmp72, & cpu.rA, & cpu.rQ); cpu 5068 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 5073 src/dps8/dps8_ins.c cpu.rQ = Sub36b (cpup, cpu.rQ, cpu.CY, 1, I_ZNC, & cpu.cu.IR, & ovf); cpu 5093 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 5099 src/dps8/dps8_ins.c cpu.rX[n] = Sub18b (cpup, cpu.rX[n], GETHI (cpu.CY), 1, cpu 5100 src/dps8/dps8_ins.c I_ZNC, & cpu.cu.IR, & ovf); cpu 5110 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 5115 src/dps8/dps8_ins.c cpu.rQ = Sub36b (cpup, cpu.rQ, cpu.CY, 1, I_ZNOC, & cpu.cu.IR, & ovf); cpu 5136 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 5142 src/dps8/dps8_ins.c cpu.rX[n] = Sub18b (cpup, cpu.rX[n], GETHI (cpu.CY), 1, cpu 5143 src/dps8/dps8_ins.c I_ZNOC, & cpu.cu.IR, & ovf); cpu 5155 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 5160 src/dps8/dps8_ins.c cpu.CY = Sub36b (cpup, cpu.rA, cpu.CY, 1, I_ZNOC, & cpu.cu.IR, & ovf); cpu 5169 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 5174 src/dps8/dps8_ins.c cpu.CY = Sub36b (cpup, cpu.rQ, cpu.CY, 1, I_ZNOC, & cpu.cu.IR, & ovf); cpu 5192 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 5198 src/dps8/dps8_ins.c word18 tmp18 = Sub18b (cpup, cpu.rX[n], GETHI (cpu.CY), 1, cpu 5199 src/dps8/dps8_ins.c I_ZNOC, & cpu.cu.IR, & ovf); cpu 5200 src/dps8/dps8_ins.c SETHI (cpu.CY, tmp18); cpu 5210 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 5215 src/dps8/dps8_ins.c cpu.rA = Sub36b (cpup, cpu.rA, cpu.CY, TST_I_CARRY ? 1 : 0, cpu 5216 src/dps8/dps8_ins.c I_ZNOC, & cpu.cu.IR, & ovf); cpu 5229 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 5234 src/dps8/dps8_ins.c cpu.rQ = Sub36b (cpup, cpu.rQ, cpu.CY, TST_I_CARRY ? 1 : 0, cpu 5235 src/dps8/dps8_ins.c I_ZNOC, & cpu.cu.IR, & ovf); cpu 5256 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GD1;) cpu 5262 src/dps8/dps8_ins.c word72 tmp72 = multiply_128 (SIGNEXT36_72 (cpu.rA), SIGNEXT36_72 (cpu.CY)); cpu 5268 src/dps8/dps8_ins.c word72 tmp72 = (word72) (((word72s) SIGNEXT36_72 (cpu.rA)) * ((word72s) SIGNEXT36_72 (cpu.CY))); cpu 5272 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GD2;) cpu 5275 src/dps8/dps8_ins.c if (cpu.rA == MAXNEG && cpu.CY == MAXNEG) cpu 5282 src/dps8/dps8_ins.c convert_to_word36 (tmp72, &cpu.rA, &cpu.rQ); cpu 5287 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0 && cpu.rQ == 0); cpu 5288 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); cpu 5296 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 5302 src/dps8/dps8_ins.c SIGNEXT36_128 (cpu.rQ & DMASK), cpu 5303 src/dps8/dps8_ins.c SIGNEXT36_128 (cpu.CY & DMASK)); cpu 5304 src/dps8/dps8_ins.c convert_to_word36 (cast_128 (prod), &cpu.rA, &cpu.rQ); cpu 5306 src/dps8/dps8_ins.c int64_t t0 = SIGNEXT36_64 (cpu.rQ & DMASK); cpu 5307 src/dps8/dps8_ins.c int64_t t1 = SIGNEXT36_64 (cpu.CY & DMASK); cpu 5311 src/dps8/dps8_ins.c convert_to_word36 ((word72)prod, &cpu.rA, &cpu.rQ); cpu 5318 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0 && cpu.rQ == 0); cpu 5319 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); cpu 5341 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GD1;) cpu 5348 src/dps8/dps8_ins.c if ((cpu.rQ == MAXNEG && (cpu.CY == 1 || cpu.CY == NEG136)) || cpu 5349 src/dps8/dps8_ins.c (cpu.CY == 0)) cpu 5355 src/dps8/dps8_ins.c cpu.rA = (cpu.rQ & SIGN36) ? 0 : SIGN36; // works for case 1,2 cpu 5361 src/dps8/dps8_ins.c SC_I_ZERO (cpu.CY == 0); cpu 5362 src/dps8/dps8_ins.c SC_I_NEG (cpu.rQ & SIGN36); cpu 5364 src/dps8/dps8_ins.c if (cpu.rQ & SIGN36) cpu 5368 src/dps8/dps8_ins.c cpu.rQ = ((word36) (- (word36s) cpu.rQ)) & MASK36; cpu 5380 src/dps8/dps8_ins.c t_int64 dividend = (t_int64) (SIGNEXT36_64 (cpu.rQ)); cpu 5381 src/dps8/dps8_ins.c t_int64 divisor = (t_int64) (SIGNEXT36_64 (cpu.CY)); cpu 5387 src/dps8/dps8_ins.c dividend, cpu.rQ); cpu 5390 src/dps8/dps8_ins.c divisor, cpu.CY); cpu 5395 src/dps8/dps8_ins.c L68_ (cpu.ou.cycle |= ou_GD2;) cpu 5443 src/dps8/dps8_ins.c " rQ %012"PRIo64" CY %012"PRIo64"\r\n", cpu.rQ, cpu.CY); cpu 5446 src/dps8/dps8_ins.c cpu.rA = (word36) remainder & DMASK; cpu 5447 src/dps8/dps8_ins.c cpu.rQ = (word36) quotient & DMASK; cpu 5453 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, "rA (rem) %012"PRIo64"\r\n", cpu.rA); cpu 5454 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, "rQ (quot) %012"PRIo64"\r\n", cpu.rQ); cpu 5458 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rQ == 0); cpu 5459 src/dps8/dps8_ins.c SC_I_NEG (cpu.rQ & SIGN36); cpu 5493 src/dps8/dps8_ins.c cpu.rA &= DMASK; cpu 5494 src/dps8/dps8_ins.c if (cpu.rA == 0400000000000ULL) cpu 5503 src/dps8/dps8_ins.c cpu.rA = (word36) (- (word36s) cpu.rA); cpu 5505 src/dps8/dps8_ins.c cpu.rA &= DMASK; // keep to 36-bits cpu 5510 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); cpu 5511 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); cpu 5522 src/dps8/dps8_ins.c cpu.rA &= DMASK; cpu 5523 src/dps8/dps8_ins.c cpu.rQ &= DMASK; cpu 5525 src/dps8/dps8_ins.c if (cpu.rA == 0400000000000ULL && cpu.rQ == 0) cpu 5532 src/dps8/dps8_ins.c word72 tmp72 = convert_to_word72 (cpu.rA, cpu.rQ); cpu 5547 src/dps8/dps8_ins.c convert_to_word36 (tmp72, &cpu.rA, &cpu.rQ); cpu 5570 src/dps8/dps8_ins.c t_int64 a = SIGNEXT36_64 (cpu.rA); cpu 5573 src/dps8/dps8_ins.c t_int64 y = SIGNEXT36_64 (cpu.CY); cpu 5607 src/dps8/dps8_ins.c word36 Z = ~cpu.rQ & (cpu.rA ^ cpu.CY); cpu 5639 src/dps8/dps8_ins.c word72 tmp72 = YPAIRTO72 (cpu.Ypair); cpu 5640 src/dps8/dps8_ins.c word72 trAQ = convert_to_word72 (cpu.rA, cpu.rQ); cpu 5646 src/dps8/dps8_ins.c cmp72 (cpup, trAQ, tmp72, &cpu.cu.IR); cpu 5669 src/dps8/dps8_ins.c cmp18 (cpup, cpu.rX[n], GETHI (cpu.CY), &cpu.cu.IR); cpu 5685 src/dps8/dps8_ins.c cmp36wl (cpup, cpu.rA, cpu.CY, cpu.rQ, &cpu.cu.IR); cpu 5692 src/dps8/dps8_ins.c cpu.CY &= DMASK; cpu 5693 src/dps8/dps8_ins.c SC_I_ZERO (cpu.CY == 0); cpu 5694 src/dps8/dps8_ins.c SC_I_NEG (cpu.CY & SIGN36); cpu 5699 src/dps8/dps8_ins.c cpu.CY &= DMASK; cpu 5700 src/dps8/dps8_ins.c SC_I_ZERO (cpu.CY == 0); cpu 5701 src/dps8/dps8_ins.c SC_I_NEG (cpu.CY & SIGN36); cpu 5703 src/dps8/dps8_ins.c cpu.CY = 0; cpu 5721 src/dps8/dps8_ins.c cpu.rQ = cpu.rQ & cpu.CY; cpu 5722 src/dps8/dps8_ins.c cpu.rQ &= DMASK; cpu 5727 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rQ == 0); cpu 5728 src/dps8/dps8_ins.c SC_I_NEG (cpu.rQ & SIGN36); cpu 5737 src/dps8/dps8_ins.c cpu.CY = cpu.rA & cpu.CY; cpu 5738 src/dps8/dps8_ins.c cpu.CY &= DMASK; cpu 5740 src/dps8/dps8_ins.c SC_I_ZERO (cpu.CY == 0); cpu 5741 src/dps8/dps8_ins.c SC_I_NEG (cpu.CY & SIGN36); cpu 5751 src/dps8/dps8_ins.c cpu.CY = cpu.rQ & cpu.CY; cpu 5752 src/dps8/dps8_ins.c cpu.CY &= DMASK; cpu 5754 src/dps8/dps8_ins.c SC_I_ZERO (cpu.CY == 0); cpu 5755 src/dps8/dps8_ins.c SC_I_NEG (cpu.CY & SIGN36); cpu 5775 src/dps8/dps8_ins.c word18 tmp18 = cpu.rX[n] & GETHI (cpu.CY); cpu 5781 src/dps8/dps8_ins.c SETHI (cpu.CY, tmp18); cpu 5802 src/dps8/dps8_ins.c cpu.rX[n] &= GETHI (cpu.CY); cpu 5803 src/dps8/dps8_ins.c cpu.rX[n] &= MASK18; cpu 5808 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rX[n] == 0); cpu 5809 src/dps8/dps8_ins.c SC_I_NEG (cpu.rX[n] & SIGN18); cpu 5825 src/dps8/dps8_ins.c word72 tmp72 = YPAIRTO72 (cpu.Ypair); cpu 5826 src/dps8/dps8_ins.c word72 trAQ = convert_to_word72 (cpu.rA, cpu.rQ); cpu 5840 src/dps8/dps8_ins.c convert_to_word36 (trAQ, &cpu.rA, &cpu.rQ); cpu 5853 src/dps8/dps8_ins.c cpu.rQ = cpu.rQ | cpu.CY; cpu 5854 src/dps8/dps8_ins.c cpu.rQ &= DMASK; cpu 5859 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rQ == 0); cpu 5860 src/dps8/dps8_ins.c SC_I_NEG (cpu.rQ & SIGN36); cpu 5869 src/dps8/dps8_ins.c cpu.CY = cpu.rA | cpu.CY; cpu 5870 src/dps8/dps8_ins.c cpu.CY &= DMASK; cpu 5872 src/dps8/dps8_ins.c SC_I_ZERO (cpu.CY == 0); cpu 5873 src/dps8/dps8_ins.c SC_I_NEG (cpu.CY & SIGN36); cpu 5881 src/dps8/dps8_ins.c cpu.CY = cpu.rQ | cpu.CY; cpu 5882 src/dps8/dps8_ins.c cpu.CY &= DMASK; cpu 5884 src/dps8/dps8_ins.c SC_I_ZERO (cpu.CY == 0); cpu 5885 src/dps8/dps8_ins.c SC_I_NEG (cpu.CY & SIGN36); cpu 5902 src/dps8/dps8_ins.c word18 tmp18 = cpu.rX[n] | GETHI (cpu.CY); cpu 5908 src/dps8/dps8_ins.c SETHI (cpu.CY, tmp18); cpu 5928 src/dps8/dps8_ins.c cpu.rX[n] |= GETHI (cpu.CY); cpu 5929 src/dps8/dps8_ins.c cpu.rX[n] &= MASK18; cpu 5934 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rX[n] == 0); cpu 5935 src/dps8/dps8_ins.c SC_I_NEG (cpu.rX[n] & SIGN18); cpu 5946 src/dps8/dps8_ins.c cpu.rA = cpu.rA ^ cpu.CY; cpu 5947 src/dps8/dps8_ins.c cpu.rA &= DMASK; cpu 5952 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); cpu 5953 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); cpu 5965 src/dps8/dps8_ins.c cpu.rQ = cpu.rQ ^ cpu.CY; cpu 5966 src/dps8/dps8_ins.c cpu.rQ &= DMASK; cpu 5970 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rQ == 0); cpu 5971 src/dps8/dps8_ins.c SC_I_NEG (cpu.rQ & SIGN36); cpu 5979 src/dps8/dps8_ins.c cpu.CY = cpu.rA ^ cpu.CY; cpu 5980 src/dps8/dps8_ins.c cpu.CY &= DMASK; cpu 5982 src/dps8/dps8_ins.c SC_I_ZERO (cpu.CY == 0); cpu 5983 src/dps8/dps8_ins.c SC_I_NEG (cpu.CY & SIGN36); cpu 5991 src/dps8/dps8_ins.c cpu.CY = cpu.rQ ^ cpu.CY; cpu 5992 src/dps8/dps8_ins.c cpu.CY &= DMASK; cpu 5994 src/dps8/dps8_ins.c SC_I_ZERO (cpu.CY == 0); cpu 5995 src/dps8/dps8_ins.c SC_I_NEG (cpu.CY & SIGN36); cpu 6016 src/dps8/dps8_ins.c word18 tmp18 = cpu.rX[n] ^ GETHI (cpu.CY); cpu 6022 src/dps8/dps8_ins.c SETHI (cpu.CY, tmp18); cpu 6042 src/dps8/dps8_ins.c cpu.rX[n] ^= GETHI (cpu.CY); cpu 6043 src/dps8/dps8_ins.c cpu.rX[n] &= MASK18; cpu 6048 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rX[n] == 0); cpu 6049 src/dps8/dps8_ins.c SC_I_NEG (cpu.rX[n] & SIGN18); cpu 6065 src/dps8/dps8_ins.c word72 tmp72 = YPAIRTO72 (cpu.Ypair); cpu 6066 src/dps8/dps8_ins.c word72 trAQ = convert_to_word72 (cpu.rA, cpu.rQ); cpu 6089 src/dps8/dps8_ins.c word36 trZ = cpu.rQ & cpu.CY; cpu 6113 src/dps8/dps8_ins.c word18 tmp18 = cpu.rX[n] & GETHI (cpu.CY); cpu 6117 src/dps8/dps8_ins.c n, cpu.rX[n], (word18) (GETHI (cpu.CY) & MASK18), cpu 6133 src/dps8/dps8_ins.c word36 trZ = cpu.rA & ~cpu.CY; cpu 6148 src/dps8/dps8_ins.c word72 tmp72 = YPAIRTO72 (cpu.Ypair); cpu 6150 src/dps8/dps8_ins.c word72 trAQ = convert_to_word72 (cpu.rA, cpu.rQ); cpu 6173 src/dps8/dps8_ins.c word36 trZ = cpu.rQ & ~cpu.CY; cpu 6195 src/dps8/dps8_ins.c word18 tmp18 = cpu.rX[n] & ~GETHI (cpu.CY); cpu 6215 src/dps8/dps8_ins.c cpu.rE = (cpu.Ypair[0] >> 28) & MASK8; cpu 6217 src/dps8/dps8_ins.c cpu.rA = (cpu.Ypair[0] & FLOAT36MASK) << 8; cpu 6218 src/dps8/dps8_ins.c cpu.rA |= (cpu.Ypair[1] >> 28) & MASK8; cpu 6220 src/dps8/dps8_ins.c cpu.rQ = (cpu.Ypair[1] & FLOAT36MASK) << 8; cpu 6227 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0 && cpu.rQ == 0); cpu 6228 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); cpu 6245 src/dps8/dps8_ins.c cpu.Ypair[0] = ((word36)cpu.rE << 28) | cpu 6246 src/dps8/dps8_ins.c ((cpu.rA & 0777777777400LLU) >> 8); cpu 6247 src/dps8/dps8_ins.c cpu.Ypair[1] = ((cpu.rA & 0377) << 28) | cpu 6248 src/dps8/dps8_ins.c ((cpu.rQ & 0777777777400LLU) >> 8); cpu 6254 src/dps8/dps8_ins.c dfstr (cpup, cpu.Ypair); cpu 6264 src/dps8/dps8_ins.c cpu.rE &= MASK8; cpu 6265 src/dps8/dps8_ins.c cpu.rA &= DMASK; cpu 6266 src/dps8/dps8_ins.c cpu.CY = ((word36)cpu.rE << 28) | (((cpu.rA >> 8) & 01777777777LL)); cpu 6293 src/dps8/dps8_ins.c fstr (cpup, &cpu.CY); cpu 6475 src/dps8/dps8_ins.c fno (cpup, & cpu.rE, & cpu.rA, & cpu.rQ); cpu 6534 src/dps8/dps8_ins.c int y = SIGNEXT8_int ((cpu.CY >> 28) & 0377); cpu 6535 src/dps8/dps8_ins.c int e = SIGNEXT8_int (cpu.rE); cpu 6538 src/dps8/dps8_ins.c cpu.rE = e & 0377; cpu 6563 src/dps8/dps8_ins.c SC_I_ZERO ((cpu.CY & 001777777777LL) == 0); cpu 6564 src/dps8/dps8_ins.c SC_I_NEG (cpu.CY & 001000000000LL); cpu 6572 src/dps8/dps8_ins.c cpu.rE = (cpu.CY >> 28) & 0377; cpu 6584 src/dps8/dps8_ins.c cpu.CY = ((word36) (cpu.rE & 0377)) << 28; cpu 6585 src/dps8/dps8_ins.c cpu.zone = 0777777000000; cpu 6586 src/dps8/dps8_ins.c cpu.useZone = true; cpu 6598 src/dps8/dps8_ins.c "call6 PRR %o PSR %o\r\n", cpu.PPR.PRR, cpu.PPR.PSR); cpu 6615 src/dps8/dps8_ins.c ReadOperandRead (cpup, cpu.TPR.CA, & cpu.CY); cpu 6617 src/dps8/dps8_ins.c cpu.PPR.IC = GETHI (cpu.CY); cpu 6618 src/dps8/dps8_ins.c word18 tempIR = GETLO (cpu.CY) & 0777770; cpu 6658 src/dps8/dps8_ins.c cpu.cu.IR = tempIR; cpu 6799 src/dps8/dps8_ins.c cpu.TPR.CA = get_BAR_address (cpup, cpu.TPR.CA); cpu 6854 src/dps8/dps8_ins.c cpu.PR[0].SNR = cpu.TPR.CA & MASK15; cpu 6863 src/dps8/dps8_ins.c cpu.PR[1].SNR = cpu.TPR.CA & MASK15; cpu 6872 src/dps8/dps8_ins.c cpu.PR[2].SNR = cpu.TPR.CA & MASK15; cpu 6881 src/dps8/dps8_ins.c cpu.PR[3].SNR = cpu.TPR.CA & MASK15; cpu 6890 src/dps8/dps8_ins.c cpu.PR[4].SNR = cpu.TPR.CA & MASK15; cpu 6899 src/dps8/dps8_ins.c cpu.PR[5].SNR = cpu.TPR.CA & MASK15; cpu 6908 src/dps8/dps8_ins.c cpu.PR[6].SNR = cpu.TPR.CA & MASK15; cpu 6917 src/dps8/dps8_ins.c cpu.PR[7].SNR = cpu.TPR.CA & MASK15; cpu 6930 src/dps8/dps8_ins.c cpu.PR[0].WORDNO = cpu.TPR.CA; cpu 6931 src/dps8/dps8_ins.c SET_PR_BITNO (0, cpu.TPR.TBR); cpu 6942 src/dps8/dps8_ins.c cpu.PR[1].WORDNO = cpu.TPR.CA; cpu 6943 src/dps8/dps8_ins.c SET_PR_BITNO (1, cpu.TPR.TBR); cpu 6954 src/dps8/dps8_ins.c cpu.PR[2].WORDNO = cpu.TPR.CA; cpu 6955 src/dps8/dps8_ins.c SET_PR_BITNO (2, cpu.TPR.TBR); cpu 6966 src/dps8/dps8_ins.c cpu.PR[3].WORDNO = cpu.TPR.CA; cpu 6967 src/dps8/dps8_ins.c SET_PR_BITNO (3, cpu.TPR.TBR); cpu 6978 src/dps8/dps8_ins.c cpu.PR[4].WORDNO = cpu.TPR.CA; cpu 6979 src/dps8/dps8_ins.c SET_PR_BITNO (4, cpu.TPR.TBR); cpu 6990 src/dps8/dps8_ins.c cpu.PR[5].WORDNO = cpu.TPR.CA; cpu 6991 src/dps8/dps8_ins.c SET_PR_BITNO (5, cpu.TPR.TBR); cpu 7002 src/dps8/dps8_ins.c cpu.PR[6].WORDNO = cpu.TPR.CA; cpu 7003 src/dps8/dps8_ins.c SET_PR_BITNO (6, cpu.TPR.TBR); cpu 7014 src/dps8/dps8_ins.c cpu.PR[7].WORDNO = cpu.TPR.CA; cpu 7015 src/dps8/dps8_ins.c SET_PR_BITNO (7, cpu.TPR.TBR); cpu 7053 src/dps8/dps8_ins.c cpu.Ypair[0] = cpu.Yblock16[n * 2 + 0]; cpu 7055 src/dps8/dps8_ins.c cpu.Ypair[1] = cpu.Yblock16[n * 2 + 1]; cpu 7058 src/dps8/dps8_ins.c word3 Crr = (GETLO (cpu.Ypair[0]) >> 15) & 07; cpu 7060 src/dps8/dps8_ins.c cpu.PR[n].RNR = max3 (Crr, cpu.SDW->R1, cpu.TPR.TRR); cpu 7062 src/dps8/dps8_ins.c cpu.PR[n].RNR = Crr; cpu 7063 src/dps8/dps8_ins.c cpu.PR[n].SNR = (cpu.Ypair[0] >> 18) & MASK15; cpu 7064 src/dps8/dps8_ins.c cpu.PR[n].WORDNO = GETHI (cpu.Ypair[1]); cpu 7065 src/dps8/dps8_ins.c word6 bitno = (GETLO (cpu.Ypair[1]) >> 9) & 077; cpu 7122 src/dps8/dps8_ins.c cpu.Yblock16[2 * n] = 043; cpu 7123 src/dps8/dps8_ins.c cpu.Yblock16[2 * n] |= ((word36) cpu.PR[n].SNR) << 18; cpu 7124 src/dps8/dps8_ins.c cpu.Yblock16[2 * n] |= ((word36) cpu.PR[n].RNR) << 15; cpu 7126 src/dps8/dps8_ins.c cpu.Yblock16[2 * n + 1] = (word36) cpu.PR[n].WORDNO << 18; cpu 7127 src/dps8/dps8_ins.c cpu.Yblock16[2 * n + 1] |= (word36) GET_PR_BITNO(n) << 9; cpu 7163 src/dps8/dps8_ins.c if ((cpu.PR[n].SNR & 070000) != 0 && cpu.PR[n].SNR != MASK15) cpu 7166 src/dps8/dps8_ins.c cpu.CY = ((word36) (GET_PR_BITNO(n) & 077)) << 30; cpu 7168 src/dps8/dps8_ins.c cpu.CY |= ((word36) (cpu.PR[n].SNR & 07777)) << 18; cpu 7169 src/dps8/dps8_ins.c cpu.CY |= cpu.PR[n].WORDNO & PAMASK; cpu 7170 src/dps8/dps8_ins.c cpu.CY &= DMASK; // keep to 36-bits cpu 7187 src/dps8/dps8_ins.c cpu.PR[n].WORDNO += GETHI (cpu.CY); cpu 7188 src/dps8/dps8_ins.c cpu.PR[n].WORDNO &= MASK18; cpu 7206 src/dps8/dps8_ins.c cpu.PR[n].WORDNO += GETHI (cpu.CY); cpu 7207 src/dps8/dps8_ins.c cpu.PR[n].WORDNO &= MASK18; cpu 7231 src/dps8/dps8_ins.c if (cpu.tweaks.l68_mode) cpu 7232 src/dps8/dps8_ins.c cpu_port_num = (cpu.TPR.CA >> 15) & 07; cpu 7234 src/dps8/dps8_ins.c cpu_port_num = (cpu.TPR.CA >> 15) & 03; cpu 7244 src/dps8/dps8_ins.c 040, & cpu.rA, & cpu.rQ); cpu 7263 src/dps8/dps8_ins.c word72 big = convert_to_word72 (cpu.rA, cpu.rQ); cpu 7294 src/dps8/dps8_ins.c if (cpu.tweaks.drl_fatal) cpu 7302 src/dps8/dps8_ins.c cpu.cu.xde = 1; cpu 7303 src/dps8/dps8_ins.c cpu.cu.xdo = 0; cpu 7307 src/dps8/dps8_ins.c cpu.cu.IWB = cpu.CY; cpu 7346 src/dps8/dps8_ins.c cpu.cu.xde = 1; cpu 7347 src/dps8/dps8_ins.c cpu.cu.xdo = 1; cpu 7351 src/dps8/dps8_ins.c cpu.cu.IWB = cpu.Ypair[0]; cpu 7352 src/dps8/dps8_ins.c cpu.cu.IRODD = cpu.Ypair[1]; cpu 7404 src/dps8/dps8_ins.c if ((cpu.PPR.IC & 1) == 0) cpu 7406 src/dps8/dps8_ins.c cpu.cu.delta = i->tag; cpu 7411 src/dps8/dps8_ins.c cpu.rX[0] = i->address; // Entire 18 bits cpu 7416 src/dps8/dps8_ins.c cpu.cu.rd = 1; cpu 7417 src/dps8/dps8_ins.c cpu.cu.repeat_first = 1; cpu 7421 src/dps8/dps8_ins.c cpu.rptUndo[0] = cpu.rptUndo[1] = 0; cpu 7428 src/dps8/dps8_ins.c cpu.cu.delta = i->tag; cpu 7431 src/dps8/dps8_ins.c cpu.rX[0] = i->address; // Entire 18 bits cpu 7436 src/dps8/dps8_ins.c cpu.cu.rl = 1; cpu 7437 src/dps8/dps8_ins.c cpu.cu.repeat_first = 1; cpu 7441 src/dps8/dps8_ins.c cpu.rptUndo[0] = cpu.rptUndo[1] = 0; cpu 7448 src/dps8/dps8_ins.c cpu.cu.delta = i->tag; cpu 7451 src/dps8/dps8_ins.c cpu.rX[0] = i->address; // Entire 18 bits cpu 7456 src/dps8/dps8_ins.c cpu.cu.rpt = 1; cpu 7457 src/dps8/dps8_ins.c cpu.cu.repeat_first = 1; cpu 7461 src/dps8/dps8_ins.c cpu.rptUndo[0] = cpu.rptUndo[1] = 0; cpu 7472 src/dps8/dps8_ins.c cpu.CY = (word36)cpu.rRALR; cpu 7482 src/dps8/dps8_ins.c cpu.CY = ((((word36) cpu.BAR.BASE) << 9) | cpu.BAR.BOUND) << 18; cpu 7483 src/dps8/dps8_ins.c cpu.zone = 0777777000000; cpu 7484 src/dps8/dps8_ins.c cpu.useZone = true; cpu 7498 src/dps8/dps8_ins.c word36 tmp1 = cpu.rA & SIGN36; // A0 cpu 7499 src/dps8/dps8_ins.c word36 tmp36 = (cpu.rA << 3) & DMASK; cpu 7500 src/dps8/dps8_ins.c word36 tmp36q = tmp36 / cpu.CY; // this may be more than 4 bits, keep it for remainder calculation cpu 7503 src/dps8/dps8_ins.c tmp36r = tmp36 - tmp36q * cpu.CY; cpu 7512 src/dps8/dps8_ins.c tmp36r = tmp36 + tmp36q * cpu.CY; cpu 7515 src/dps8/dps8_ins.c cpu.rQ <<= 6; // Shift C(Q) left six positions cpu 7516 src/dps8/dps8_ins.c cpu.rQ &= DMASK; cpu 7519 src/dps8/dps8_ins.c cpu.rQ |= (tmp36q & 017); cpu 7524 src/dps8/dps8_ins.c cpu.rA = tmp36r & DMASK; // remainder -> C(A) cpu 7529 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); // If C(A) = 0, then ON; cpu 7540 src/dps8/dps8_ins.c word36 tmp = cpu.rA & MASK36; cpu 7548 src/dps8/dps8_ins.c cpu.rA = tmp; cpu 7553 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); // If C(A) = 0, then ON; cpu 7555 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); // If C(A)0 = 1, then ON; cpu 7566 src/dps8/dps8_ins.c cpu.BAR.BASE = (GETHI (cpu.CY) >> 9) & 0777; cpu 7568 src/dps8/dps8_ins.c cpu.BAR.BOUND = GETHI (cpu.CY) & 0777; cpu 7593 src/dps8/dps8_ins.c uint csh1_on = getbits36_1 (cpu.CY, 54 - 36); cpu 7594 src/dps8/dps8_ins.c uint csh2_on = getbits36_1 (cpu.CY, 55 - 36); cpu 7597 src/dps8/dps8_ins.c cpu.CMR.csh1_on = (word1) csh1_on; cpu 7598 src/dps8/dps8_ins.c cpu.CMR.csh2_on = (word1) csh2_on; cpu 7602 src/dps8/dps8_ins.c L68_ (cpu.CMR.opnd_on = getbits36_1 (cpu.CY, 56 - 36);) cpu 7603 src/dps8/dps8_ins.c cpu.CMR.inst_on = getbits36_1 (cpu.CY, 57 - 36); cpu 7604 src/dps8/dps8_ins.c cpu.CMR.csh_reg = getbits36_1 (cpu.CY, 59 - 36); cpu 7605 src/dps8/dps8_ins.c if (cpu.CMR.csh_reg) cpu 7610 src/dps8/dps8_ins.c DPS8M_ (cpu.CMR.bypass_cache = getbits36_1 (cpu.CY, 68 - 36);) cpu 7611 src/dps8/dps8_ins.c cpu.CMR.luf = getbits36_2 (cpu.CY, 70 - 36); cpu 7618 src/dps8/dps8_ins.c cpu.MR.r = cpu.CY; cpu 7620 src/dps8/dps8_ins.c putbits36_1 (& cpu.MR.r, 32, 0); cpu 7622 src/dps8/dps8_ins.c putbits36_2 (& cpu.MR.r, 33, 0); cpu 7624 src/dps8/dps8_ins.c cpu.MR.FFV = getbits36_15 (cpu.CY, 0); cpu 7625 src/dps8/dps8_ins.c cpu.MR.OC_TRAP = getbits36_1 (cpu.CY, 16); cpu 7626 src/dps8/dps8_ins.c cpu.MR.ADR_TRAP = getbits36_1 (cpu.CY, 17); cpu 7627 src/dps8/dps8_ins.c cpu.MR.OPCODE = getbits36_9 (cpu.CY, 18); cpu 7628 src/dps8/dps8_ins.c cpu.MR.OPCODEX = getbits36_1 (cpu.CY, 27); cpu 7630 src/dps8/dps8_ins.c cpu.MR.sdpap = getbits36_1 (cpu.CY, 20); cpu 7631 src/dps8/dps8_ins.c cpu.MR.separ = getbits36_1 (cpu.CY, 21); cpu 7640 src/dps8/dps8_ins.c if (getbits36_1 (cpu.CY, 16) || getbits36_1 (cpu.CY, 29)) cpu 7641 src/dps8/dps8_ins.c cpu.MR.sdpap = cpu.MR.separ = 0; cpu 7643 src/dps8/dps8_ins.c cpu.MR.hrhlt = getbits36_1 (cpu.CY, 28); cpu 7644 src/dps8/dps8_ins.c DPS8M_ (cpu.MR.hrxfr = getbits36_1 (cpu.CY, 29);) cpu 7645 src/dps8/dps8_ins.c cpu.MR.ihr = getbits36_1 (cpu.CY, 30); cpu 7646 src/dps8/dps8_ins.c cpu.MR.ihrrs = getbits36_1 (cpu.CY, 31); cpu 7647 src/dps8/dps8_ins.c cpu.MR.emr = getbits36_1 (cpu.CY, 35); cpu 7648 src/dps8/dps8_ins.c if (! cpu.tweaks.l68_mode) // DPS8M cpu 7649 src/dps8/dps8_ins.c cpu.MR.hexfp = getbits36_1 (cpu.CY, 33); cpu 7651 src/dps8/dps8_ins.c cpu.MR.hexfp = 0; cpu 7657 src/dps8/dps8_ins.c if (cpu.MR.hrhlt) cpu 7660 src/dps8/dps8_ins.c cpu.history_cyclic[hset] = 0; cpu 7664 src/dps8/dps8_ins.c cpu 7669 src/dps8/dps8_ins.c cpu 7686 src/dps8/dps8_ins.c cpu.skip_cu_hist = true; cpu 7700 src/dps8/dps8_ins.c cpu.skip_cu_hist = true; cpu 7713 src/dps8/dps8_ins.c do_ldbr (cpup, cpu.Ypair); cpu 7719 src/dps8/dps8_ins.c cpu.rTR = (cpu.CY >> 9) & MASK27; cpu 7720 src/dps8/dps8_ins.c cpu.rTRticks = 0; cpu 7721 src/dps8/dps8_ins.c if (cpu.tweaks.isolts_mode) cpu 7723 src/dps8/dps8_ins.c cpu.shadowTR = cpu.TR0 = cpu.rTR; cpu 7724 src/dps8/dps8_ins.c cpu.rTRlsb = 0; cpu 7727 src/dps8/dps8_ins.c cpu.rTR, cpu.rTR); cpu 7730 src/dps8/dps8_ins.c sim_printf (" ldt %d PSR:IC %05o:%06o\r\n", cpu.rTR, cpu.PPR.PSR, cpu.PPR.IC); cpu 7741 src/dps8/dps8_ins.c if (cpu.tweaks.l68_mode) { cpu 7750 src/dps8/dps8_ins.c word4 m = cpu.PTWAM[i].USE; cpu 7751 src/dps8/dps8_ins.c cpu.PTWAM[m].POINTER = getbits36_15 (cpu.Yblock16[i], 0); cpu 7752 src/dps8/dps8_ins.c cpu.PTWAM[m].PAGENO = getbits36_12 (cpu.Yblock16[i], 15); cpu 7753 src/dps8/dps8_ins.c cpu.PTWAM[m].FE = getbits36_1 (cpu.Yblock16[i], 27); cpu 7759 src/dps8/dps8_ins.c if (cpu.tweaks.l68_mode) { cpu 7766 src/dps8/dps8_ins.c word4 m = cpu.PTWAM[i].USE; cpu 7767 src/dps8/dps8_ins.c cpu.PTWAM[m].ADDR = getbits36_18 (cpu.Yblock16[i], 0); cpu 7768 src/dps8/dps8_ins.c cpu.PTWAM[m].M = getbits36_1 (cpu.Yblock16[i], 29); cpu 7775 src/dps8/dps8_ins.c cpu.rRALR = cpu.CY & MASK3; cpu 7776 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "RALR set to %o\r\n", cpu.rRALR); cpu 7781 src/dps8/dps8_ins.c sim_printf (" RALR set to %o PSR:IC %05o:%06o\r\n", cpu.rRALR, cpu.PPR.PSR, cpu.PPR.IC); cpu 7787 src/dps8/dps8_ins.c if (cpu.tweaks.l68_mode) { cpu 7794 src/dps8/dps8_ins.c word4 m = cpu.SDWAM[i].USE; cpu 7795 src/dps8/dps8_ins.c cpu.SDWAM[m].POINTER = getbits36_15 (cpu.Yblock16[i], 0); cpu 7796 src/dps8/dps8_ins.c cpu.SDWAM[m].FE = getbits36_1 (cpu.Yblock16[i], 27); cpu 7802 src/dps8/dps8_ins.c if (cpu.tweaks.l68_mode) { cpu 7812 src/dps8/dps8_ins.c word4 m = cpu.SDWAM[i].USE; cpu 7814 src/dps8/dps8_ins.c cpu.SDWAM[m].ADDR = getbits36_24 (cpu.Yblock32[j], 0); cpu 7815 src/dps8/dps8_ins.c cpu.SDWAM[m].R1 = getbits36_3 (cpu.Yblock32[j], 24); cpu 7816 src/dps8/dps8_ins.c cpu.SDWAM[m].R2 = getbits36_3 (cpu.Yblock32[j], 27); cpu 7817 src/dps8/dps8_ins.c cpu.SDWAM[m].R3 = getbits36_3 (cpu.Yblock32[j], 30); cpu 7819 src/dps8/dps8_ins.c cpu.SDWAM[m].BOUND = getbits36_14 (cpu.Yblock32[j + 1], 37 - 36); cpu 7820 src/dps8/dps8_ins.c cpu.SDWAM[m].R = getbits36_1 (cpu.Yblock32[j + 1], 51 - 36); cpu 7821 src/dps8/dps8_ins.c cpu.SDWAM[m].E = getbits36_1 (cpu.Yblock32[j + 1], 52 - 36); cpu 7822 src/dps8/dps8_ins.c cpu.SDWAM[m].W = getbits36_1 (cpu.Yblock32[j + 1], 53 - 36); cpu 7823 src/dps8/dps8_ins.c cpu.SDWAM[m].P = getbits36_1 (cpu.Yblock32[j + 1], 54 - 36); cpu 7824 src/dps8/dps8_ins.c cpu.SDWAM[m].U = getbits36_1 (cpu.Yblock32[j + 1], 55 - 36); cpu 7825 src/dps8/dps8_ins.c cpu.SDWAM[m].G = getbits36_1 (cpu.Yblock32[j + 1], 56 - 36); cpu 7826 src/dps8/dps8_ins.c cpu.SDWAM[m].C = getbits36_1 (cpu.Yblock32[j + 1], 57 - 36); cpu 7827 src/dps8/dps8_ins.c cpu.SDWAM[m].EB = getbits36_14 (cpu.Yblock32[j + 1], 58 - 36); cpu 7845 src/dps8/dps8_ins.c uint reg = cpu.tweaks.l68_mode ? L68_APU_HIST_REG : DPS8M_APU_HIST_REG; cpu 7846 src/dps8/dps8_ins.c cpu.Ypair[0] = cpu.history[reg] [cpu.history_cyclic[reg]][0]; cpu 7847 src/dps8/dps8_ins.c cpu.Ypair[1] = cpu.history[reg] [cpu.history_cyclic[reg]][1]; cpu 7848 src/dps8/dps8_ins.c cpu.history_cyclic[reg] = (cpu.history_cyclic[reg] + 1) % N_MODEL_HIST_SIZE; cpu 7856 src/dps8/dps8_ins.c cpu.Ypair[0] = cpu.faultRegister[0]; cpu 7857 src/dps8/dps8_ins.c cpu.Ypair[1] = cpu.faultRegister[1]; cpu 7858 src/dps8/dps8_ins.c cpu.faultRegister[0] = 0; cpu 7859 src/dps8/dps8_ins.c cpu.faultRegister[1] = 0; cpu 7867 src/dps8/dps8_ins.c cpu.Ypair[0] = cpu.MR.r; cpu 7870 src/dps8/dps8_ins.c if (! cpu.tweaks.l68_mode || cpu 7871 src/dps8/dps8_ins.c ! (getbits36_1 (cpu.MR.r, 16) || getbits36_1 (cpu.MR.r, 29))) cpu 7873 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[0], 20, cpu.MR.sdpap); cpu 7874 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[0], 21, cpu.MR.separ); cpu 7876 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[0], 30, cpu.MR.ihr); cpu 7877 src/dps8/dps8_ins.c DPS8M_ (putbits36_1 (& cpu.Ypair[0], 33, cpu.MR.hexfp);) cpu 7879 src/dps8/dps8_ins.c cpu.Ypair[1] = 0; cpu 7880 src/dps8/dps8_ins.c putbits36_15 (& cpu.Ypair[1], 36 - 36, cpu 7881 src/dps8/dps8_ins.c cpu.CMR.cache_dir_address); cpu 7882 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 51 - 36, cpu.CMR.par_bit); cpu 7883 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 52 - 36, cpu.CMR.lev_ful); cpu 7884 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 54 - 36, cpu.CMR.csh1_on); cpu 7885 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 55 - 36, cpu.CMR.csh2_on); cpu 7886 src/dps8/dps8_ins.c L68_ (putbits36_1 (& cpu.Ypair[1], 56 - 36, cpu.CMR.opnd_on);) cpu 7887 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 57 - 36, cpu.CMR.inst_on); cpu 7888 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 59 - 36, cpu.CMR.csh_reg); cpu 7889 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 60 - 36, cpu.CMR.str_asd); cpu 7890 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 61 - 36, cpu.CMR.col_ful); cpu 7891 src/dps8/dps8_ins.c putbits36_2 (& cpu.Ypair[1], 62 - 36, cpu.CMR.rro_AB); cpu 7892 src/dps8/dps8_ins.c DPS8M_ (putbits36_1 (& cpu.Ypair[1], 68 - 36, cpu.CMR.bypass_cache);) cpu 7893 src/dps8/dps8_ins.c putbits36_2 (& cpu.Ypair[1], 70 - 36, cpu.CMR.luf); cpu 7899 src/dps8/dps8_ins.c uint reg = cpu.tweaks.l68_mode ? L68_DU_HIST_REG : DPS8M_EAPU_HIST_REG; cpu 7900 src/dps8/dps8_ins.c cpu.Ypair[0] = cpu.history[reg] [cpu.history_cyclic[reg]][0]; cpu 7901 src/dps8/dps8_ins.c cpu.Ypair[1] = cpu.history[reg] [cpu.history_cyclic[reg]][1]; cpu 7902 src/dps8/dps8_ins.c cpu.history_cyclic[reg] = (cpu.history_cyclic[reg] + 1) % N_MODEL_HIST_SIZE; cpu 7908 src/dps8/dps8_ins.c cpu.Ypair[0] = cpu 7909 src/dps8/dps8_ins.c cpu.history[CU_HIST_REG] cpu 7910 src/dps8/dps8_ins.c [cpu.history_cyclic[CU_HIST_REG]][0]; cpu 7911 src/dps8/dps8_ins.c cpu.Ypair[1] = cpu 7912 src/dps8/dps8_ins.c cpu.history[CU_HIST_REG] cpu 7913 src/dps8/dps8_ins.c [cpu.history_cyclic[CU_HIST_REG]][1]; cpu 7914 src/dps8/dps8_ins.c cpu.history_cyclic[CU_HIST_REG] = cpu 7915 src/dps8/dps8_ins.c (cpu.history_cyclic[CU_HIST_REG] + 1) % N_MODEL_HIST_SIZE; cpu 7921 src/dps8/dps8_ins.c uint reg = cpu.tweaks.l68_mode ? L68_OU_HIST_REG : DPS8M_DU_OU_HIST_REG; cpu 7922 src/dps8/dps8_ins.c cpu.Ypair[0] = cpu.history[reg] [cpu.history_cyclic[reg]][0]; cpu 7923 src/dps8/dps8_ins.c cpu.Ypair[1] = cpu.history[reg] [cpu.history_cyclic[reg]][1]; cpu 7924 src/dps8/dps8_ins.c cpu.history_cyclic[reg] = (cpu.history_cyclic[reg] + 1) % N_MODEL_HIST_SIZE; cpu 7944 src/dps8/dps8_ins.c if (cpu.cycle == EXEC_cycle) cpu 7950 src/dps8/dps8_ins.c SC_I_TALLY (cpu.currentInstruction.stiTally); cpu 7952 src/dps8/dps8_ins.c scu2words (cpup, cpu.Yblock8); cpu 7958 src/dps8/dps8_ins.c cpu.Yblock8[j] = cpu.scu_data[j]; cpu 7967 src/dps8/dps8_ins.c cpu.Ypair[0] = ((word36) (cpu.DSBR.ADDR & PAMASK)) << (35 - 23); cpu 7974 src/dps8/dps8_ins.c cpu.Ypair[1] = ((word36) (cpu.DSBR.BND & 037777)) << (71 - 50) | cpu 7975 src/dps8/dps8_ins.c ((word36) (cpu.DSBR.U & 1)) << (71 - 55) | cpu 7976 src/dps8/dps8_ins.c ((word36) (cpu.DSBR.STACK & 07777)) << (71 - 71); cpu 7987 src/dps8/dps8_ins.c DPS8M_ (level = (cpu.TPR.CA >> 4) & 03;) cpu 7991 src/dps8/dps8_ins.c cpu.Yblock16[j] = 0; cpu 7992 src/dps8/dps8_ins.c putbits36_15 (& cpu.Yblock16[j], 0, cpu 7993 src/dps8/dps8_ins.c cpu.PTWAM[toffset + j].POINTER); cpu 7995 src/dps8/dps8_ins.c putbits36_12 (& cpu.Yblock16[j], 15, cpu.PTWAM[toffset + j].PAGENO & 07760); cpu 7999 src/dps8/dps8_ins.c if (cpu.PTWAM[toffset + j].loaded) { cpu 8002 src/dps8/dps8_ins.c parity = ((uint) cpu.PTWAM[toffset + j].POINTER << 4) | (cpu.PTWAM[toffset + j].PAGENO >> 8); cpu 8008 src/dps8/dps8_ins.c putbits36_1 (& cpu.Yblock16[j], 23, (word1) (parity & 1)); cpu 8010 src/dps8/dps8_ins.c L68_ (putbits36_12 (& cpu.Yblock16[j], 15, cpu.PTWAM[toffset + j].PAGENO); ) cpu 8011 src/dps8/dps8_ins.c putbits36_1 (& cpu.Yblock16[j], 27, cpu 8012 src/dps8/dps8_ins.c cpu.PTWAM[toffset + j].FE); cpu 8013 src/dps8/dps8_ins.c DPS8M_ (putbits36_6 (& cpu.Yblock16[j], 30, cpu.PTWAM[toffset + j].USE);) cpu 8014 src/dps8/dps8_ins.c L68_ (putbits36_4 (& cpu.Yblock16[j], 32, cpu.PTWAM[toffset + j].USE);) cpu 8026 src/dps8/dps8_ins.c DPS8M_ (level = (cpu.TPR.CA >> 4) & 03;) cpu 8031 src/dps8/dps8_ins.c cpu.Yblock16[j] = 0; cpu 8032 src/dps8/dps8_ins.c DPS8M_ (putbits36_18 (& cpu.Yblock16[j], 0, cpu.PTWAM[toffset + j].ADDR & 0777760);) cpu 8033 src/dps8/dps8_ins.c L68_ (putbits36_18 (& cpu.Yblock16[j], 0, cpu.PTWAM[toffset + j].ADDR);) cpu 8034 src/dps8/dps8_ins.c putbits36_1 (& cpu.Yblock16[j], 29, cpu 8035 src/dps8/dps8_ins.c cpu.PTWAM[toffset + j].M); cpu 8046 src/dps8/dps8_ins.c DPS8M_ (level = (cpu.TPR.CA >> 4) & 03;) cpu 8051 src/dps8/dps8_ins.c cpu.Yblock16[j] = 0; cpu 8052 src/dps8/dps8_ins.c putbits36_15 (& cpu.Yblock16[j], 0, cpu 8053 src/dps8/dps8_ins.c cpu.SDWAM[toffset + j].POINTER); cpu 8054 src/dps8/dps8_ins.c putbits36_1 (& cpu.Yblock16[j], 27, cpu 8055 src/dps8/dps8_ins.c cpu.SDWAM[toffset + j].FE); cpu 8059 src/dps8/dps8_ins.c if (cpu.SDWAM[toffset + j].loaded) { cpu 8062 src/dps8/dps8_ins.c parity = cpu.SDWAM[toffset + j].POINTER >> 4; cpu 8068 src/dps8/dps8_ins.c putbits36_1 (& cpu.Yblock16[j], 15, (word1) (parity & 1)); cpu 8070 src/dps8/dps8_ins.c putbits36_6 (& cpu.Yblock16[j], 30, cpu.SDWAM[toffset + j].USE); cpu 8072 src/dps8/dps8_ins.c L68_ (putbits36_4 (& cpu.Yblock16[j], 32, cpu.SDWAM[toffset + j].USE);) cpu 8085 src/dps8/dps8_ins.c DPS8M_ (level = (cpu.TPR.CA >> 5) & 03;) cpu 8090 src/dps8/dps8_ins.c cpu.Yblock32[j * 2] = 0; cpu 8091 src/dps8/dps8_ins.c putbits36_24 (& cpu.Yblock32[j * 2], 0, cpu 8092 src/dps8/dps8_ins.c cpu.SDWAM[toffset + j].ADDR); cpu 8093 src/dps8/dps8_ins.c putbits36_3 (& cpu.Yblock32[j * 2], 24, cpu 8094 src/dps8/dps8_ins.c cpu.SDWAM[toffset + j].R1); cpu 8095 src/dps8/dps8_ins.c putbits36_3 (& cpu.Yblock32[j * 2], 27, cpu 8096 src/dps8/dps8_ins.c cpu.SDWAM[toffset + j].R2); cpu 8097 src/dps8/dps8_ins.c putbits36_3 (& cpu.Yblock32[j * 2], 30, cpu 8098 src/dps8/dps8_ins.c cpu.SDWAM[toffset + j].R3); cpu 8099 src/dps8/dps8_ins.c cpu.Yblock32[j * 2 + 1] = 0; cpu 8101 src/dps8/dps8_ins.c putbits36_14 (& cpu.Yblock32[j * 2 + 1], 37 - 36, cpu 8102 src/dps8/dps8_ins.c cpu.SDWAM[toffset + j].BOUND); cpu 8103 src/dps8/dps8_ins.c putbits36_1 (& cpu.Yblock32[j * 2 + 1], 51 - 36, cpu 8104 src/dps8/dps8_ins.c cpu.SDWAM[toffset + j].R); cpu 8105 src/dps8/dps8_ins.c putbits36_1 (& cpu.Yblock32[j * 2 + 1], 52 - 36, cpu 8106 src/dps8/dps8_ins.c cpu.SDWAM[toffset + j].E); cpu 8107 src/dps8/dps8_ins.c putbits36_1 (& cpu.Yblock32[j * 2 + 1], 53 - 36, cpu 8108 src/dps8/dps8_ins.c cpu.SDWAM[toffset + j].W); cpu 8109 src/dps8/dps8_ins.c putbits36_1 (& cpu.Yblock32[j * 2 + 1], 54 - 36, cpu 8110 src/dps8/dps8_ins.c cpu.SDWAM[toffset + j].P); cpu 8111 src/dps8/dps8_ins.c putbits36_1 (& cpu.Yblock32[j * 2 + 1], 55 - 36, cpu 8112 src/dps8/dps8_ins.c cpu.SDWAM[toffset + j].U); cpu 8113 src/dps8/dps8_ins.c putbits36_1 (& cpu.Yblock32[j * 2 + 1], 56 - 36, cpu 8114 src/dps8/dps8_ins.c cpu.SDWAM[toffset + j].G); cpu 8115 src/dps8/dps8_ins.c putbits36_1 (& cpu.Yblock32[j * 2 + 1], 57 - 36, cpu 8116 src/dps8/dps8_ins.c cpu.SDWAM[toffset + j].C); cpu 8117 src/dps8/dps8_ins.c putbits36_14 (& cpu.Yblock32[j * 2 + 1], 58 - 36, cpu 8118 src/dps8/dps8_ins.c cpu.SDWAM[toffset + j].EB); cpu 8132 src/dps8/dps8_ins.c if (cpu.tweaks.enable_wam) cpu 8134 src/dps8/dps8_ins.c if (cpu.tweaks.l68_mode || cpu.cu.PT_ON) // only clear when enabled cpu 8137 src/dps8/dps8_ins.c cpu.PTWAM[i].FE = 0; cpu 8138 src/dps8/dps8_ins.c L68_ (cpu.PTWAM[i].USE = (word4) i;) cpu 8139 src/dps8/dps8_ins.c DPS8M_ (cpu.PTWAM[i].USE = 0;) cpu 8153 src/dps8/dps8_ins.c DPS8M_ (if (cpu.TPR.CA != 0000002 && (cpu.TPR.CA & 3) != 0) cpu 8155 src/dps8/dps8_ins.c if (! warned) { warned = true; sim_warn ("CAMP ignores enable/disable %06o\r\n", cpu.TPR.CA); } }) cpu 8156 src/dps8/dps8_ins.c if ((cpu.TPR.CA & 3) == 02) cpu 8157 src/dps8/dps8_ins.c cpu.cu.PT_ON = 1; cpu 8158 src/dps8/dps8_ins.c else if ((cpu.TPR.CA & 3) == 01) cpu 8159 src/dps8/dps8_ins.c cpu.cu.PT_ON = 0; cpu 8163 src/dps8/dps8_ins.c cpu.PTW0.FE = 0; cpu 8164 src/dps8/dps8_ins.c cpu.PTW0.USE = 0; cpu 8179 src/dps8/dps8_ins.c if (cpu.tweaks.enable_wam) cpu 8181 src/dps8/dps8_ins.c if (cpu.tweaks.l68_mode || cpu.cu.SD_ON) // only clear when enabled cpu 8184 src/dps8/dps8_ins.c cpu.SDWAM[i].FE = 0; cpu 8185 src/dps8/dps8_ins.c L68_ (cpu.SDWAM[i].USE = (word4) i;) cpu 8186 src/dps8/dps8_ins.c DPS8M_ (cpu.SDWAM[i].USE = 0;) cpu 8199 src/dps8/dps8_ins.c DPS8M_ (if (cpu.TPR.CA != 0000006 && (cpu.TPR.CA & 3) != 0) cpu 8201 src/dps8/dps8_ins.c if (! warned) { warned = true; sim_warn ("CAMS ignores enable/disable %06o\r\n", cpu.TPR.CA); } }) cpu 8202 src/dps8/dps8_ins.c if ((cpu.TPR.CA & 3) == 02) cpu 8203 src/dps8/dps8_ins.c cpu.cu.SD_ON = 1; cpu 8204 src/dps8/dps8_ins.c else if ((cpu.TPR.CA & 3) == 01) cpu 8205 src/dps8/dps8_ins.c cpu.cu.SD_ON = 0; cpu 8209 src/dps8/dps8_ins.c cpu.SDW0.FE = 0; cpu 8210 src/dps8/dps8_ins.c cpu.SDW0.USE = 0; cpu 8224 src/dps8/dps8_ins.c DPS8M_ (cpu_port_num = (cpu.TPR.CA >> 15) & 03;) cpu 8225 src/dps8/dps8_ins.c L68_ (cpu_port_num = (cpu.TPR.CA >> 15) & 07;) cpu 8236 src/dps8/dps8_ins.c & cpu.rA, & cpu.rQ); cpu 8243 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); cpu 8244 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); cpu 8288 src/dps8/dps8_ins.c if (! (cpu.tweaks.tandd_mode && scr_port_from_final_address (cpup, & cpu_port_num))) cpu 8290 src/dps8/dps8_ins.c uint shift = cpu.tweaks.tandd_mode ? 15 : 10; cpu 8291 src/dps8/dps8_ins.c DPS8M_ (cpu_port_num = (cpu.TPR.CA >> shift) & 03;) cpu 8292 src/dps8/dps8_ins.c L68_ (cpu_port_num = (cpu.TPR.CA >> shift) & 07;) cpu 8303 src/dps8/dps8_ins.c putbits36 (& cpu.faultRegister[0], 16, 4, 010); cpu 8305 src/dps8/dps8_ins.c putbits36 (& cpu.faultRegister[0], 20, 4, 010); cpu 8307 src/dps8/dps8_ins.c putbits36 (& cpu.faultRegister[0], 24, 4, 010); cpu 8309 src/dps8/dps8_ins.c putbits36 (& cpu.faultRegister[0], 28, 4, 010); cpu 8316 src/dps8/dps8_ins.c uint function = (cpu.iefpFinalAddress >> 3) & 07; cpu 8321 src/dps8/dps8_ins.c cpu.iefpFinalAddress & MASK15, cpu 8322 src/dps8/dps8_ins.c & cpu.rA, & cpu.rQ); cpu 8334 src/dps8/dps8_ins.c if (! cpu.tweaks.l68_mode) { cpu 8342 src/dps8/dps8_ins.c cpu.rA = PROM[cpu.TPR.CA & 1023]; cpu 8346 src/dps8/dps8_ins.c uint select = cpu.TPR.CA & 0x7; cpu 8350 src/dps8/dps8_ins.c cpu.rA = cpu.switches.data_switches; cpu 8380 src/dps8/dps8_ins.c cpu.rA = 0; cpu 8381 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [0] & 07LL) cpu 8383 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [0] & 01LL) cpu 8385 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [0] & 01LL) cpu 8387 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [0] ? 1LL:0LL) cpu 8389 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [0] & 07LL) cpu 8392 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [1] & 07LL) cpu 8394 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [1] & 01LL) cpu 8396 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [1] & 01LL) cpu 8398 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [1] ? 1LL:0LL) cpu 8400 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [1] & 07LL) cpu 8403 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [2] & 07LL) cpu 8405 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [2] & 01LL) cpu 8407 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [2] & 01LL) cpu 8409 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [2] ? 1LL:0LL) cpu 8411 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [2] & 07LL) cpu 8414 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [3] & 07LL) cpu 8416 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [3] & 01LL) cpu 8418 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [3] & 01LL) cpu 8420 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [3] ? 1LL:0LL) cpu 8422 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [3] & 07LL) cpu 8493 src/dps8/dps8_ins.c cpu.rA = 0; cpu 8495 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[0] == 2 ? cpu 8497 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[1] == 2 ? cpu 8499 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[2] == 2 ? cpu 8501 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[3] == 2 ? cpu 8505 src/dps8/dps8_ins.c if (cpu.tweaks.l68_mode) cpu 8511 src/dps8/dps8_ins.c cpu.rA |= (word36) ((01L) /* 0b01 DPS8M */ cpu 8513 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.FLT_BASE & 0177LL) cpu 8515 src/dps8/dps8_ins.c DPS8M_ (cpu.rA |= (word36) ((01L) /* 0b1 ID_PROM installed */ cpu 8526 src/dps8/dps8_ins.c if (cpu.tweaks.l68_mode) cpu 8532 src/dps8/dps8_ins.c cpu.rA |= (word36) ((01L) // 0b1 L68/DPS option: DPS cpu 8538 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.enable_cache ? 1 : 0) cpu 8548 src/dps8/dps8_ins.c cpu.rA |= (word36) (1LL << (35-23)); cpu 8549 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.procMode == procModeMultics ? 1LL : 0LL) cpu 8557 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.options.proc_speed & 017LL) cpu 8568 src/dps8/dps8_ins.c cpu.rA |= (word36) ((016L) // 0b1110 CPU ID cpu 8571 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.cpu_num & 07LL) cpu 8576 src/dps8/dps8_ins.c if (!cpu.tweaks.l68_mode) { // DPS8M cpu 8577 src/dps8/dps8_ins.c cpu.rA = 0; cpu 8607 src/dps8/dps8_ins.c cpu.rA = 0; cpu 8608 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [4] & 07LL) cpu 8610 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [4] & 01LL) cpu 8612 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [4] & 01LL) cpu 8614 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [4] ? 1LL:0LL) cpu 8616 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [4] & 07LL) cpu 8619 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [5] & 07LL) cpu 8621 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [5] & 01LL) cpu 8623 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [5] & 01LL) cpu 8625 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [5] ? 1LL:0LL) cpu 8627 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [5] & 07LL) cpu 8630 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [6] & 07LL) cpu 8632 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [6] & 01LL) cpu 8634 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [6] & 01LL) cpu 8636 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [6] ? 1LL:0LL) cpu 8638 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [6] & 07LL) cpu 8641 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [7] & 07LL) cpu 8643 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [7] & 01LL) cpu 8645 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [7] & 01LL) cpu 8647 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [7] ? 1LL:0LL) cpu 8649 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [7] & 07LL) cpu 8669 src/dps8/dps8_ins.c cpu.rA = 0; cpu 8670 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [0] == 2 ? cpu 8672 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [1] == 2 ? cpu 8674 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [2] == 2 ? cpu 8676 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [3] == 2 ? cpu 8679 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [4] == 2 ? cpu 8681 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [5] == 2 ? cpu 8683 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [6] == 2 ? cpu 8685 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [7] == 2 ? cpu 8699 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); cpu 8700 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); cpu 8714 src/dps8/dps8_ins.c cpu 8726 src/dps8/dps8_ins.c int cpu_port_num = lookup_cpu_mem_map (cpup, cpu.iefpFinalAddress); cpu 8750 src/dps8/dps8_ins.c word8 sub_mask = getbits36_8 (cpu.CY, 0); cpu 8751 src/dps8/dps8_ins.c word3 expander_command = getbits36_3 (cpu.CY, 21); cpu 8752 src/dps8/dps8_ins.c uint scu_port_num = (uint) getbits36_3 (cpu.CY, 33); cpu 8764 src/dps8/dps8_ins.c DPS8M_ (cpu_port_num = (cpu.TPR.CA >> 15) & 03;) cpu 8765 src/dps8/dps8_ins.c L68_ (cpu_port_num = (cpu.TPR.CA >> 15) & 07;) cpu 8778 src/dps8/dps8_ins.c current_running_cpu_idx, cpu.rA, cpu.rQ); cpu 8795 src/dps8/dps8_ins.c DPS8M_ (cpu_port_num = (cpu.TPR.CA >> 15) & 03;) cpu 8796 src/dps8/dps8_ins.c L68_ (cpu_port_num = (cpu.TPR.CA >> 15) & 07;) cpu 8803 src/dps8/dps8_ins.c putbits36_4 (& cpu.faultRegister[0], 16, 010); cpu 8805 src/dps8/dps8_ins.c putbits36_4 (& cpu.faultRegister[0], 20, 010); cpu 8807 src/dps8/dps8_ins.c putbits36_4 (& cpu.faultRegister[0], 24, 010); cpu 8809 src/dps8/dps8_ins.c putbits36 (& cpu.faultRegister[0], 28, 4, 010); cpu 8818 src/dps8/dps8_ins.c cpu_port_num, cpu.rA); cpu 8834 src/dps8/dps8_ins.c if (! (cpu.tweaks.tandd_mode && scr_port_from_final_address (cpup, & cpu_port_num))) cpu 8836 src/dps8/dps8_ins.c uint shift = cpu.tweaks.tandd_mode ? 15 : 10; cpu 8837 src/dps8/dps8_ins.c DPS8M_ (cpu_port_num = (cpu.TPR.CA >> shift) & 03;) cpu 8838 src/dps8/dps8_ins.c L68_ (cpu_port_num = (cpu.TPR.CA >> shift) & 07;) cpu 8844 src/dps8/dps8_ins.c putbits36_4 (& cpu.faultRegister[0], 16, 010); cpu 8846 src/dps8/dps8_ins.c putbits36_4 (& cpu.faultRegister[0], 20, 010); cpu 8848 src/dps8/dps8_ins.c putbits36_4 (& cpu.faultRegister[0], 24, 010); cpu 8850 src/dps8/dps8_ins.c putbits36 (& cpu.faultRegister[0], 28, 4, 010); cpu 8858 src/dps8/dps8_ins.c cpu_port_num, cpu.iefpFinalAddress & MASK15, cpu 8859 src/dps8/dps8_ins.c cpu.rA, cpu.rQ); cpu 8874 src/dps8/dps8_ins.c cpu.rA = result; cpu 8878 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); cpu 8879 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); cpu 8887 src/dps8/dps8_ins.c if (cpu.PPR.PSR == 034 && cpu.PPR.IC == 03535) { cpu 8897 src/dps8/dps8_ins.c if (cpu.forceRestart) { cpu 8898 src/dps8/dps8_ins.c cpu.forceRestart = 0; cpu 8899 src/dps8/dps8_ins.c longjmp (cpu.jmpMain, JMP_FORCE_RESTART); cpu 8903 src/dps8/dps8_ins.c if (! cpu.tweaks.dis_enable) cpu 8915 src/dps8/dps8_ins.c if ((! cpu.tweaks.tro_enable) && cpu 8921 src/dps8/dps8_ins.c " no events in queue\r\n", cpu.PPR.IC); cpu 8927 src/dps8/dps8_ins.c (unsigned long long)cpu.cycleCnt); cpu 8933 src/dps8/dps8_ins.c (unsigned long long)cpu.cycleCnt); cpu 8934 src/dps8/dps8_ins.c longjmp (cpu.jmpMain, JMP_STOP); cpu 8938 src/dps8/dps8_ins.c if (cpu.PPR.PSR == 0430 && cpu.PPR.IC == 012) cpu 8945 src/dps8/dps8_ins.c longjmp (cpu.jmpMain, JMP_STOP); cpu 8955 src/dps8/dps8_ins.c cpu.inMultics = false; cpu 8976 src/dps8/dps8_ins.c if (UNLIKELY (cpu.syncClockModeMaster) && cpu 8977 src/dps8/dps8_ins.c cpu.inMultics && cpu 8978 src/dps8/dps8_ins.c (cpu.PPR.PSR !=0 || cpu.PPR.IC != 0)) { cpu 8980 src/dps8/dps8_ins.c sim_printf ("CPU%c DIS %o:%o gives up master\r\n", cpu.cpuIdx + 'A', cpu.PPR.PSR, cpu.PPR.IC); cpu 8997 src/dps8/dps8_ins.c cpu 8999 src/dps8/dps8_ins.c cpu 9001 src/dps8/dps8_ins.c cpu 9034 src/dps8/dps8_ins.c cpu.interrupt_flag = true; cpu 9038 src/dps8/dps8_ins.c if (cpu.execSwitchesReq) cpu 9043 src/dps8/dps8_ins.c if (GET_I (cpu.cu.IWB) ? bG7PendingNoTRO (cpup) : bG7Pending (cpup)) cpu 9049 src/dps8/dps8_ins.c cpu 9054 src/dps8/dps8_ins.c cpu.g7_flag = true; cpu 9086 src/dps8/dps8_ins.c if (getbits36_1 (cpu.CY, 23) != 0) cpu 9095 src/dps8/dps8_ins.c cpu.AR[n].WORDNO = GETHI (cpu.CY); cpu 9097 src/dps8/dps8_ins.c uint TA = getbits36_2 (cpu.CY, 21); cpu 9098 src/dps8/dps8_ins.c uint CN = getbits36_3 (cpu.CY, 18); cpu 9138 src/dps8/dps8_ins.c cpu.AR[n].WORDNO = 0; cpu 9161 src/dps8/dps8_ins.c cpu.AR[n].WORDNO = 0; cpu 9191 src/dps8/dps8_ins.c cpu.AR[n].WORDNO = GETHI (cpu.CY); cpu 9193 src/dps8/dps8_ins.c SET_AR_CHAR_BITNO (n, getbits36_2 (cpu.CY, 18), cpu 9194 src/dps8/dps8_ins.c getbits36_4 (cpu.CY, 20)); cpu 9209 src/dps8/dps8_ins.c word36 tmp36 = cpu.Yblock8[n]; cpu 9210 src/dps8/dps8_ins.c cpu.AR[n].WORDNO = getbits36_18 (tmp36, 0); cpu 9223 src/dps8/dps8_ins.c words2du (cpup, cpu.Yblock8); cpu 9244 src/dps8/dps8_ins.c cpu.AR[n].WORDNO = GETHI (cpu.CY); cpu 9246 src/dps8/dps8_ins.c uint TN = getbits36_1 (cpu.CY, 21); // C(Y) 21 cpu 9247 src/dps8/dps8_ins.c uint CN = getbits36_3 (cpu.CY, 18); // C(Y) 18-20 cpu 9319 src/dps8/dps8_ins.c uint TA = getbits36_2 (cpu.CY, 21); cpu 9327 src/dps8/dps8_ins.c if (getbits36_1 (cpu.CY, 23) != 0) { cpu 9337 src/dps8/dps8_ins.c putbits36_18 (& cpu.CY, 0, cpu.AR[n].WORDNO & MASK18); cpu 9351 src/dps8/dps8_ins.c putbits36_3 (& cpu.CY, 18, (word3) CN & MASK3); cpu 9358 src/dps8/dps8_ins.c putbits36_3 (& cpu.CY, 18, (word3) CN & MASK3); cpu 9365 src/dps8/dps8_ins.c putbits36_3 (& cpu.CY, 18, cpu 9369 src/dps8/dps8_ins.c cpu.zone = 0777777700000; cpu 9370 src/dps8/dps8_ins.c cpu.useZone = true; cpu 9393 src/dps8/dps8_ins.c uint TN = getbits36_1 (cpu.CY, 21); // C(Y) 21 cpu 9397 src/dps8/dps8_ins.c putbits36_18 (& cpu.CY, 0, cpu.AR[n].WORDNO & MASK18); cpu 9408 src/dps8/dps8_ins.c putbits36_3 (& cpu.CY, 18, CN & MASK3); cpu 9415 src/dps8/dps8_ins.c putbits36_3 (& cpu.CY, 18, cpu 9419 src/dps8/dps8_ins.c cpu.zone = 0777777700000; cpu 9420 src/dps8/dps8_ins.c cpu.useZone = true; cpu 9442 src/dps8/dps8_ins.c putbits36 (& cpu.CY, 0, 18, cpu.PR[n].WORDNO); cpu 9444 src/dps8/dps8_ins.c putbits36 (& cpu.CY, 18, 2, GET_AR_CHAR (n)); cpu 9445 src/dps8/dps8_ins.c putbits36 (& cpu.CY, 20, 4, GET_AR_BITNO (n)); cpu 9447 src/dps8/dps8_ins.c cpu.zone = 0777777770000; cpu 9448 src/dps8/dps8_ins.c cpu.useZone = true; cpu 9458 src/dps8/dps8_ins.c (void)memset (cpu.Yblock8, 0, sizeof (cpu.Yblock8)); cpu 9463 src/dps8/dps8_ins.c putbits36 (& arx, 0, 18, cpu.PR[n].WORDNO); cpu 9466 src/dps8/dps8_ins.c cpu.Yblock8[n] = arx; cpu 9474 src/dps8/dps8_ins.c du2words (cpup, cpu.Yblock8); cpu 9687 src/dps8/dps8_ins.c if (cpu.tweaks.enable_emcall) { cpu 9698 src/dps8/dps8_ins.c if (cpu.tweaks.halt_on_unimp) cpu 9705 src/dps8/dps8_ins.c cpu.ou.STR_OP = (is_ou && (i->info->flags & (STORE_OPERAND | STORE_YPAIR))) ? 1 : 0; cpu 9706 src/dps8/dps8_ins.c cpu.ou.cycle |= ou_GOF; cpu 9707 src/dps8/dps8_ins.c if (cpu.MR_cache.emr && cpu.MR_cache.ihr && is_ou) cpu 9709 src/dps8/dps8_ins.c if (cpu.MR_cache.emr && cpu.MR_cache.ihr && is_du) cpu 9733 src/dps8/dps8_ins.c DCDstruct * i = & cpu.currentInstruction; cpu 9759 src/dps8/dps8_ins.c startInstrCnt = cpu.instrCnt; cpu 9800 src/dps8/dps8_ins.c unsigned long long nInsts = (unsigned long long)((unsigned long long)cpu.instrCnt - cpu 9844 src/dps8/dps8_ins.c cpu 9847 src/dps8/dps8_ins.c cpu 9854 src/dps8/dps8_ins.c cpu 9863 src/dps8/dps8_ins.c cpu 9875 src/dps8/dps8_ins.c cpu 9881 src/dps8/dps8_ins.c cpu 9886 src/dps8/dps8_ins.c cpu 9904 src/dps8/dps8_ins.c cpu 9905 src/dps8/dps8_ins.c cpu 9913 src/dps8/dps8_ins.c cpu 9914 src/dps8/dps8_ins.c cpu 9918 src/dps8/dps8_ins.c cpu 9927 src/dps8/dps8_ins.c cpu 9933 src/dps8/dps8_ins.c cpu 9938 src/dps8/dps8_ins.c cpu 9953 src/dps8/dps8_ins.c cpu 9955 src/dps8/dps8_ins.c cpu 10012 src/dps8/dps8_ins.c cpu 10014 src/dps8/dps8_ins.c cpu 10038 src/dps8/dps8_ins.c if (get_addr_mode (cpup) == ABSOLUTE_mode && ! (cpu.cu.XSF || cpu.currentInstruction.b29)) cpu 10045 src/dps8/dps8_ins.c int n_ports = cpu.tweaks.l68_mode ? N_L68_CPU_PORTS : N_DPS8M_CPU_PORTS; cpu 10048 src/dps8/dps8_ins.c if (! cpu.switches.enable [port_num] || cpu 10051 src/dps8/dps8_ins.c uint store_size = cpu.switches.store_size [port_num]; cpu 10052 src/dps8/dps8_ins.c uint sz_wds = cpu.tweaks.l68_mode ? l68_store_table [store_size] : cpu 10054 src/dps8/dps8_ins.c uint base = sz_wds * cpu.switches.assignment[port_num]; cpu 10067 src/dps8/dps8_ins.c sim_debug (DBG_APPENDING, & cpu_dev, "absa CA:%08o\r\n", cpu.TPR.CA); cpu 10071 src/dps8/dps8_ins.c if (get_addr_mode (cpup) == ABSOLUTE_mode && ! (cpu.cu.XSF || cpu.currentInstruction.b29)) // ISOLTS-860 cpu 10073 src/dps8/dps8_ins.c * result = ((word36) (cpu.TPR.CA & MASK18)) << 12; // 24:12 format cpu 10096 src/dps8/dps8_ins.c (cpu.Yblock8[0]>>18)&MASK15, (cpu.Yblock8[4]>>18)&MASK18, cpu.PPR.PSR, cpu.PPR.IC); cpu 10101 src/dps8/dps8_ins.c dump_words(cpup, cpu.Yblock8); cpu 10109 src/dps8/dps8_ins.c words2scu (cpup, cpu.Yblock8); cpu 10110 src/dps8/dps8_ins.c decode_instruction (cpup, IWB_IRODD, & cpu.currentInstruction); cpu 10116 src/dps8/dps8_ins.c if ((cpu.cu.rpt || cpu.cu.rd) && ! cpu.cu.repeat_first) cpu 10118 src/dps8/dps8_ins.c bool icOdd = getbits36_1 (cpu.Yblock8[4], 17); cpu 10119 src/dps8/dps8_ins.c if (cpu.cu.rpt) cpu 10121 src/dps8/dps8_ins.c uint Xn = (uint) getbits36_3 (cpu.cu.IWB, 36 - 3); cpu 10122 src/dps8/dps8_ins.c cpu.rX[Xn] = (cpu.rX[Xn] + cpu.cu.delta) & AMASK; cpu 10126 src/dps8/dps8_ins.c if (! icOdd && (cpu.rX[0] & 01000)) cpu 10128 src/dps8/dps8_ins.c uint Xn = (uint) getbits36_3 (cpu.cu.IWB, 36 - 3); cpu 10129 src/dps8/dps8_ins.c cpu.rX[Xn] = (cpu.rX[Xn] + cpu.cu.delta) & AMASK; cpu 10131 src/dps8/dps8_ins.c if (cpu.rX[0] & 00400) cpu 10133 src/dps8/dps8_ins.c uint Xn = (uint) getbits36_3 (cpu.cu.IRODD, 36 - 3); cpu 10134 src/dps8/dps8_ins.c cpu.rX[Xn] = (cpu.rX[Xn] + cpu.cu.delta) & AMASK; cpu 10141 src/dps8/dps8_ins.c word1 saveP = cpu.PPR.P; // ISOLTS-870 02m cpu 10146 src/dps8/dps8_ins.c cpu.PPR.P = saveP; cpu 10148 src/dps8/dps8_ins.c if (getbits36_1 (cpu.Yblock8[1], 35) == 0) // cpu.cu.FLT_INT is interrupt, not fault cpu 10151 src/dps8/dps8_ins.c longjmp (cpu.jmpMain, JMP_REFETCH); cpu 10220 src/dps8/dps8_ins.c if (cpu.cu.FIF) // fault occurred during instruction fetch cpu 10228 src/dps8/dps8_ins.c cpu.cu.rfi = 0; cpu 10230 src/dps8/dps8_ins.c longjmp (cpu.jmpMain, JMP_REFETCH); cpu 10234 src/dps8/dps8_ins.c if (cpu.cu.rfi) cpu 10241 src/dps8/dps8_ins.c cpu.cu.rfi = 0; cpu 10242 src/dps8/dps8_ins.c longjmp (cpu.jmpMain, JMP_REFETCH); cpu 10248 src/dps8/dps8_ins.c word5 fi_addr = getbits36_5 (cpu.Yblock8[1], 30); cpu 10258 src/dps8/dps8_ins.c cpu.cu.rfi = 0; cpu 10259 src/dps8/dps8_ins.c longjmp (cpu.jmpMain, JMP_RESTART); cpu 10262 src/dps8/dps8_ins.c if (cpu.cu.rfi || // S/W asked for the instruction to be started cpu 10263 src/dps8/dps8_ins.c cpu.cu.FIF) // fault occurred during instruction fetch cpu 10271 src/dps8/dps8_ins.c cpu.cu.rfi = 0; cpu 10273 src/dps8/dps8_ins.c longjmp (cpu.jmpMain, JMP_REFETCH); cpu 10284 src/dps8/dps8_ins.c cpu.cu.rfi = 1; cpu 10285 src/dps8/dps8_ins.c longjmp (cpu.jmpMain, JMP_RESTART); cpu 10317 src/dps8/dps8_ins.c cpu.cu.rfi = 0; cpu 10319 src/dps8/dps8_ins.c longjmp (cpu.jmpMain, JMP_REFETCH); cpu 10324 src/dps8/dps8_ins.c cpu.cu.rfi = 0; cpu 10325 src/dps8/dps8_ins.c longjmp (cpu.jmpMain, JMP_SYNC_FAULT_RETURN); cpu 10338 src/dps8/dps8_ins.c cpu.cu.rfi = 0; cpu 10339 src/dps8/dps8_ins.c longjmp (cpu.jmpMain, JMP_SYNC_FAULT_RETURN); cpu 10346 src/dps8/dps8_ins.c cpu.cu.rfi = 1; cpu 10348 src/dps8/dps8_ins.c longjmp (cpu.jmpMain, JMP_RESTART); cpu 10369 src/dps8/dps8_ins.c cpu.cu.rfi = 1; cpu 10371 src/dps8/dps8_ins.c longjmp (cpu.jmpMain, JMP_RESTART); cpu 3595 src/dps8/dps8_iom.c sim_printf ("// CIOC %lld\r\n", cpu.cycleCnt); cpu 3757 src/dps8/dps8_iom.c __func__, iomChar (iom_unit_idx), cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC); cpu 47 src/dps8/dps8_math.c #define DBG_CTR cpu.cycleCnt cpu 77 src/dps8/dps8_math.c word72 Mant = convert_to_word72 (cpu.rA, cpu.rQ); cpu 93 src/dps8/dps8_math.c int e = SIGNEXT8_int (cpu . rE & MASK8); // make signed cpu 129 src/dps8/dps8_math.c word72 Mant = convert_to_word72 (cpu.rA, cpu.rQ); cpu 145 src/dps8/dps8_math.c int e = SIGNEXT8_int (cpu . rE & MASK8); // make signed cpu 295 src/dps8/dps8_math.c cpu . rA = 0; cpu 299 src/dps8/dps8_math.c cpu . rQ = 0; cpu 300 src/dps8/dps8_math.c cpu . rE = 0200U; /*-128*/ cpu 337 src/dps8/dps8_math.c cpu . rE = exp & MASK8; cpu 338 src/dps8/dps8_math.c cpu . rA = (result >> 36) & MASK36; cpu 342 src/dps8/dps8_math.c cpu . rQ = result & MASK36; cpu 455 src/dps8/dps8_math.c return (! cpu.tweaks.l68_mode) && (!! cpu.options.hex_mode_installed) && (!! cpu.MR.hexfp) && (!! TST_I_HEX); cpu 485 src/dps8/dps8_math.c word72 m1 = convert_to_word72 (cpu.rA, cpu.rQ); cpu 488 src/dps8/dps8_math.c word72 m2 = lshift_128 (construct_128 (0, (uint64_t) getbits36_28 (cpu.CY, 8)), 44u); // 28-bit mantissa (incl sign) cpu 490 src/dps8/dps8_math.c word72 m2 = ((word72) getbits36_28 (cpu.CY, 8)) << 44; // 28-bit mantissa (incl sign) cpu 493 src/dps8/dps8_math.c int e1 = SIGNEXT8_int (cpu.rE & MASK8); cpu 494 src/dps8/dps8_math.c int e2 = SIGNEXT8_int (getbits36_8 (cpu.CY, 0)); cpu 529 src/dps8/dps8_math.c L68_ (cpu.ou.cycle |= ou_GOE;) cpu 606 src/dps8/dps8_math.c m3 = Add72b (cpup, m1, m2, 0, I_CARRY, & cpu.cu.IR, & ovf); cpu 678 src/dps8/dps8_math.c convert_to_word36 (m3, & cpu.rA, & cpu.rQ); cpu 682 src/dps8/dps8_math.c cpu.rE = e3 & 0377; cpu 684 src/dps8/dps8_math.c SC_I_NEG (cpu.rA & SIGN36); // Do this here instead of in Add72b because cpu 686 src/dps8/dps8_math.c if (cpu.rA == 0 && cpu.rQ == 0) { cpu 688 src/dps8/dps8_math.c cpu.rE = 0200U; /*-128*/ cpu 694 src/dps8/dps8_math.c fno_ext (cpup, & e3, & cpu.rE, & cpu.rA, & cpu.rQ); cpu 740 src/dps8/dps8_math.c L68_ (cpu.ou.cycle |= ou_GON;) cpu 1082 src/dps8/dps8_math.c word72 m = convert_to_word72 (cpu.rA, cpu.rQ); cpu 1097 src/dps8/dps8_math.c if (cpu.rE == 127) { cpu 1102 src/dps8/dps8_math.c cpu.rE ++; cpu 1103 src/dps8/dps8_math.c cpu.rE &= MASK8; cpu 1114 src/dps8/dps8_math.c convert_to_word36 (m, & cpu.rA, & cpu.rQ); cpu 1115 src/dps8/dps8_math.c fno (cpup, & cpu.rE, & cpu.rA, & cpu.rQ); // normalize cpu 1135 src/dps8/dps8_math.c word72 m1 = convert_to_word72 (cpu.rA, cpu.rQ); cpu 1136 src/dps8/dps8_math.c int e1 = SIGNEXT8_int (cpu.rE & MASK8); cpu 1138 src/dps8/dps8_math.c word72 m2 = lshift_128 (construct_128 (0, (uint64_t) getbits36_28 (cpu.CY, 8)), 44u); // 28-bit mantissa (incl sign) cpu 1140 src/dps8/dps8_math.c word72 m2 = ((word72) getbits36_28 (cpu.CY, 8)) << 44; ///< 28-bit mantissa (incl sign) cpu 1142 src/dps8/dps8_math.c int e2 = SIGNEXT8_int (getbits36_8 (cpu.CY, 0)); cpu 1148 src/dps8/dps8_math.c cpu.rE = 0200U; /*-128*/ cpu 1149 src/dps8/dps8_math.c cpu.rA = 0; cpu 1153 src/dps8/dps8_math.c cpu.rQ = 0; cpu 1213 src/dps8/dps8_math.c convert_to_word36 (m3a, & cpu.rA, & cpu.rQ); cpu 1217 src/dps8/dps8_math.c cpu.rE = (word8) e3 & MASK8; cpu 1218 src/dps8/dps8_math.c sim_debug (DBG_TRACEEXT, & cpu_dev, "fmp A %012"PRIo64" Q %012"PRIo64" E %03o\r\n", cpu.rA, cpu.rQ, cpu.rE); cpu 1219 src/dps8/dps8_math.c SC_I_NEG (cpu.rA & SIGN36); cpu 1221 src/dps8/dps8_math.c if (cpu.rA == 0 && cpu.rQ == 0) { cpu 1223 src/dps8/dps8_math.c cpu.rE = 0200U; /*-128*/ cpu 1229 src/dps8/dps8_math.c fno_ext (cpup, & e3, & cpu.rE, & cpu.rA, & cpu.rQ); cpu 1276 src/dps8/dps8_math.c m1 = convert_to_word72 (cpu.rA, cpu.rQ); cpu 1277 src/dps8/dps8_math.c e1 = SIGNEXT8_int (cpu.rE & MASK8); cpu 1280 src/dps8/dps8_math.c m2 = lshift_128 (construct_128 (0, (uint64_t) getbits36_28 (cpu.CY, 8)), 44u); // 28-bit mantissa (incl sign) cpu 1282 src/dps8/dps8_math.c m2 = ((word72) getbits36_28 (cpu.CY, 8)) << 44; ///< 28-bit mantissa (incl sign) cpu 1284 src/dps8/dps8_math.c e2 = SIGNEXT8_int (getbits36_8 (cpu.CY, 0)); cpu 1288 src/dps8/dps8_math.c m2 = convert_to_word72 (cpu.rA, cpu.rQ); cpu 1289 src/dps8/dps8_math.c e2 = SIGNEXT8_int (cpu.rE & MASK8); cpu 1303 src/dps8/dps8_math.c m1 = lshift_128 (construct_128 (0, getbits36_28 (cpu.CY, 8)), 44); ///< 28-bit mantissa (incl sign) cpu 1304 src/dps8/dps8_math.c e1 = SIGNEXT8_int (getbits36_8 (cpu.CY, 0)); cpu 1313 src/dps8/dps8_math.c m1 = ((word72) getbits36_28 (cpu.CY, 8)) << 44; ///< 28-bit mantissa (incl sign) cpu 1314 src/dps8/dps8_math.c e1 = SIGNEXT8_int (getbits36_8 (cpu.CY, 0)); cpu 1322 src/dps8/dps8_math.c cpu.rE = 0200U; /*-128*/ cpu 1323 src/dps8/dps8_math.c cpu.rA = 0; cpu 1327 src/dps8/dps8_math.c cpu.rQ = 0; cpu 1395 src/dps8/dps8_math.c convert_to_word36 (m1, & cpu.rA, & cpu.rQ); cpu 1459 src/dps8/dps8_math.c cpu.rE = (word8) e3 & MASK8; cpu 1461 src/dps8/dps8_math.c cpu.rA = rshift_128 (m3, 36u).l & MASK36; cpu 1463 src/dps8/dps8_math.c cpu.rA = (m3 >> 36) & MASK36; cpu 1468 src/dps8/dps8_math.c cpu.rQ = 0; cpu 1470 src/dps8/dps8_math.c SC_I_ZERO (cpu . rA == 0); cpu 1471 src/dps8/dps8_math.c SC_I_NEG (cpu . rA & SIGN36); cpu 1473 src/dps8/dps8_math.c if (cpu.rA == 0) // set to normalized 0 cpu 1474 src/dps8/dps8_math.c cpu.rE = 0200U; /*-128*/ cpu 1551 src/dps8/dps8_math.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 1553 src/dps8/dps8_math.c word72 m = convert_to_word72 (cpu.rA, cpu.rQ); cpu 1555 src/dps8/dps8_math.c cpu.rE = 0200U; /*-128*/ cpu 1594 src/dps8/dps8_math.c convert_to_word36 (m, & cpu.rA, & cpu.rQ); cpu 1596 src/dps8/dps8_math.c fno (cpup, & cpu.rE, & cpu.rA, & cpu.rQ); cpu 1611 src/dps8/dps8_math.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 1612 src/dps8/dps8_math.c word36 A = cpu . rA, Q = cpu . rQ; cpu 1613 src/dps8/dps8_math.c word8 E = cpu . rE; cpu 1691 src/dps8/dps8_math.c word72 m1= lshift_128 (construct_128 (0, cpu.rA & 0777777777400), 36); cpu 1693 src/dps8/dps8_math.c word72 m1 = ((word72)cpu.rA & 0777777777400LL) << 36; cpu 1695 src/dps8/dps8_math.c int e1 = SIGNEXT8_int (cpu.rE & MASK8); cpu 1699 src/dps8/dps8_math.c word72 m2 = lshift_128 (construct_128 (0, getbits36_28 (cpu.CY, 8)), 44); cpu 1701 src/dps8/dps8_math.c word72 m2 = ((word72) getbits36_28 (cpu.CY, 8)) << 44; cpu 1703 src/dps8/dps8_math.c int e2 = SIGNEXT8_int (getbits36_8 (cpu.CY, 0)); cpu 1707 src/dps8/dps8_math.c L68_ (cpu.ou.cycle = ou_GOE;) cpu 1719 src/dps8/dps8_math.c L68_ (cpu.ou.cycle = ou_GOA;) cpu 1752 src/dps8/dps8_math.c L68_ (cpu.ou.cycle = ou_GOA;) cpu 1822 src/dps8/dps8_math.c L68_ (cpu.ou.cycle = ou_GOS;) cpu 1830 src/dps8/dps8_math.c word72 m1 = lshift_128 (construct_128 (0, cpu.rA & 0777777777400), 36); cpu 1832 src/dps8/dps8_math.c word72 m1 = ((word72)cpu.rA & 0777777777400LL) << 36; cpu 1834 src/dps8/dps8_math.c int e1 = SIGNEXT8_int (cpu.rE & MASK8); cpu 1839 src/dps8/dps8_math.c word72 m2 = lshift_128 (construct_128 (0, getbits36_28 (cpu.CY, 8)), 44); cpu 1841 src/dps8/dps8_math.c word72 m2 = ((word72) getbits36_28 (cpu.CY, 8)) << 44; cpu 1843 src/dps8/dps8_math.c int e2 = SIGNEXT8_int (getbits36_8 (cpu.CY, 0)); cpu 1847 src/dps8/dps8_math.c L68_ (cpu.ou.cycle = ou_GOE;) cpu 1854 src/dps8/dps8_math.c L68_ (cpu.ou.cycle = ou_GOA;) cpu 1887 src/dps8/dps8_math.c L68_ (cpu.ou.cycle = ou_GOA;) cpu 1989 src/dps8/dps8_math.c L68_ (cpu.ou.cycle = ou_GOS;) cpu 1996 src/dps8/dps8_math.c word72 m1 = convert_to_word72 (cpu.rA, cpu.rQ); cpu 1997 src/dps8/dps8_math.c int e1 = SIGNEXT8_int (cpu.rE & MASK8); cpu 2001 src/dps8/dps8_math.c word72 m2 = lshift_128 (construct_128 (0, (uint64_t) getbits36_28 (cpu.Ypair[0], 8)), 44u); // 28-bit mantissa (incl sign) cpu 2002 src/dps8/dps8_math.c m2 = or_128 (m2, lshift_128 (construct_128 (0, cpu.Ypair[1]), 8u)); cpu 2004 src/dps8/dps8_math.c word72 m2 = ((word72) getbits36_28 (cpu.Ypair[0], 8)) << 44; cpu 2005 src/dps8/dps8_math.c m2 |= (word72) cpu.Ypair[1] << 8; cpu 2008 src/dps8/dps8_math.c int e2 = SIGNEXT8_int (getbits36_8 (cpu.Ypair[0], 0)); cpu 2050 src/dps8/dps8_math.c L68_ (cpu.ou.cycle |= ou_GOE;) cpu 2058 src/dps8/dps8_math.c L68_ (cpu.ou.cycle |= ou_GOA;) cpu 2092 src/dps8/dps8_math.c L68_ (cpu.ou.cycle |= ou_GOA;) cpu 2127 src/dps8/dps8_math.c word72 m3 = Add72b (cpup, m1, m2, 0, I_CARRY, & cpu.cu.IR, & ovf); cpu 2192 src/dps8/dps8_math.c convert_to_word36 (m3, & cpu.rA, & cpu.rQ); cpu 2196 src/dps8/dps8_math.c cpu.rE = e3 & 0377; cpu 2198 src/dps8/dps8_math.c SC_I_NEG (cpu.rA & SIGN36); // Do this here instead of in Add72b because cpu 2200 src/dps8/dps8_math.c if (cpu.rA == 0 && cpu.rQ == 0) { cpu 2202 src/dps8/dps8_math.c cpu.rE = 0200U; /*-128*/ cpu 2208 src/dps8/dps8_math.c fno_ext (cpup, & e3, & cpu.rE, & cpu.rA, & cpu.rQ); cpu 2245 src/dps8/dps8_math.c cpu 2274 src/dps8/dps8_math.c cpu 2281 src/dps8/dps8_math.c cpu 2305 src/dps8/dps8_math.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 2306 src/dps8/dps8_math.c word72 m1 = convert_to_word72 (cpu.rA, cpu.rQ); cpu 2307 src/dps8/dps8_math.c int e1 = SIGNEXT8_int (cpu . rE & MASK8); cpu 2315 src/dps8/dps8_math.c word72 m2 = lshift_128 (construct_128 (0, (uint64_t) getbits36_28 (cpu.Ypair[0], 8)), 44u); // 28-bit mantissa (incl sign) cpu 2316 src/dps8/dps8_math.c m2 = or_128 (m2, lshift_128 (construct_128 (0, cpu.Ypair[1]), 8u)); cpu 2318 src/dps8/dps8_math.c word72 m2 = ((word72) getbits36_28 (cpu.Ypair[0], 8)) << 44; cpu 2319 src/dps8/dps8_math.c m2 |= (word72) cpu.Ypair[1] << 8; cpu 2323 src/dps8/dps8_math.c int e2 = SIGNEXT8_int (getbits36_8 (cpu.Ypair[0], 0)); cpu 2334 src/dps8/dps8_math.c cpu.rE = 0200U; /*-128*/ cpu 2335 src/dps8/dps8_math.c cpu.rA = 0; cpu 2339 src/dps8/dps8_math.c cpu.rQ = 0; cpu 2417 src/dps8/dps8_math.c convert_to_word36 (m3a, & cpu.rA, & cpu.rQ); cpu 2421 src/dps8/dps8_math.c cpu.rE = (word8) e3 & MASK8; cpu 2423 src/dps8/dps8_math.c SC_I_NEG (cpu.rA & SIGN36); cpu 2425 src/dps8/dps8_math.c if (cpu.rA == 0 && cpu.rQ == 0) { cpu 2427 src/dps8/dps8_math.c cpu . rE = 0200U; /*-128*/ cpu 2433 src/dps8/dps8_math.c fno_ext (cpup, & e3, & cpu.rE, & cpu.rA, & cpu.rQ); cpu 2466 src/dps8/dps8_math.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 2481 src/dps8/dps8_math.c m1 = convert_to_word72 (cpu.rA, cpu.rQ); cpu 2482 src/dps8/dps8_math.c e1 = SIGNEXT8_int (cpu.rE & MASK8); cpu 2486 src/dps8/dps8_math.c m2 = lshift_128 (construct_128 (0, (uint64_t) getbits36_28 (cpu.Ypair[0], 8)), 44u); // 28-bit mantissa (incl sign) cpu 2487 src/dps8/dps8_math.c m2 = or_128 (m2, lshift_128 (construct_128 (0, cpu.Ypair[1]), 8u)); cpu 2489 src/dps8/dps8_math.c m2 = ((word72) getbits36_28 (cpu.Ypair[0], 8)) << 44; cpu 2490 src/dps8/dps8_math.c m2 |= (word72) cpu.Ypair[1] << 8; cpu 2493 src/dps8/dps8_math.c e2 = SIGNEXT8_int (getbits36_8 (cpu.Ypair[0], 0)); cpu 2495 src/dps8/dps8_math.c m2 = convert_to_word72 (cpu.rA, cpu.rQ); cpu 2496 src/dps8/dps8_math.c e2 = SIGNEXT8_int (cpu.rE & MASK8); cpu 2526 src/dps8/dps8_math.c m1 = lshift_128 (construct_128 (0, (uint64_t) getbits36_28 (cpu.Ypair[0], 8)), 44u); // 28-bit mantissa (incl sign) cpu 2527 src/dps8/dps8_math.c m1 = or_128 (m1, lshift_128 (construct_128 (0, cpu.Ypair[1]), 8u)); cpu 2529 src/dps8/dps8_math.c m1 = ((word72) getbits36_28 (cpu.Ypair[0], 8)) << 44; cpu 2530 src/dps8/dps8_math.c m1 |= (word72) cpu.Ypair[1] << 8; cpu 2533 src/dps8/dps8_math.c e1 = SIGNEXT8_int (getbits36_8 (cpu.Ypair[0], 0)); cpu 2540 src/dps8/dps8_math.c cpu.rE = 0200U; /*-128*/ cpu 2541 src/dps8/dps8_math.c cpu.rA = 0; cpu 2545 src/dps8/dps8_math.c cpu.rQ = 0; cpu 2612 src/dps8/dps8_math.c convert_to_word36 (m1, & cpu.rA, & cpu.rQ); cpu 2620 src/dps8/dps8_math.c L68_ (cpu.ou.cycle |= ou_GOA;) cpu 2644 src/dps8/dps8_math.c L68_ (cpu.ou.cycle |= ou_GD1;) cpu 2654 src/dps8/dps8_math.c L68_ (cpu.ou.cycle |= ou_GD2;) cpu 2666 src/dps8/dps8_math.c convert_to_word36 (m3, & cpu.rA, & cpu.rQ); cpu 2670 src/dps8/dps8_math.c cpu.rE = (word8) e3 & MASK8; cpu 2672 src/dps8/dps8_math.c SC_I_ZERO (cpu.rA == 0 && cpu . rQ == 0); cpu 2673 src/dps8/dps8_math.c SC_I_NEG (cpu.rA & SIGN36); cpu 2675 src/dps8/dps8_math.c if (cpu.rA == 0 && cpu.rQ == 0) // set to normalized 0 cpu 2676 src/dps8/dps8_math.c cpu.rE = 0200U; /*-128*/ cpu 2795 src/dps8/dps8_math.c L68_ (cpu.ou.cycle |= ou_GD1;) cpu 2797 src/dps8/dps8_math.c bool dividendNegative = (getbits36_1 (cpu.rA, 0) != 0); cpu 2798 src/dps8/dps8_math.c bool divisorNegative = (getbits36_1 (cpu.CY, 0) != 0); cpu 2805 src/dps8/dps8_math.c uint128 zFrac = (((uint128) (cpu.rA & MASK35)) << 35) | ((cpu.rQ >> 1) & MASK35); cpu 2822 src/dps8/dps8_math.c cpu 2830 src/dps8/dps8_math.c uint128 dFrac = cpu.CY & MASK35; cpu 2843 src/dps8/dps8_math.c cpu.rA = (zFrac >> 35) & MASK35; cpu 2844 src/dps8/dps8_math.c cpu.rQ = (zFrac & MASK35) << 1; cpu 2846 src/dps8/dps8_math.c SC_I_ZERO (cpu.CY == 0); cpu 2847 src/dps8/dps8_math.c SC_I_NEG (cpu.rA & SIGN36); cpu 2858 src/dps8/dps8_math.c L68_ (cpu.ou.cycle |= ou_GD2;) cpu 2884 src/dps8/dps8_math.c L68_ (cpu.ou.cycle |= ou_GD2;) cpu 2890 src/dps8/dps8_math.c SC_I_ZERO (cpu.rA == 0); cpu 2891 src/dps8/dps8_math.c SC_I_NEG (cpu.rA & SIGN36); cpu 2897 src/dps8/dps8_math.c cpu.rA = quot & MASK36; cpu 2901 src/dps8/dps8_math.c cpu.rQ = remainder & MASK36; cpu 2909 src/dps8/dps8_math.c cpu 2913 src/dps8/dps8_math.c cpu 2915 src/dps8/dps8_math.c cpu 2916 src/dps8/dps8_math.c cpu 2928 src/dps8/dps8_math.c L68_ (cpu.ou.cycle |= ou_GD1;) cpu 2930 src/dps8/dps8_math.c bool dividendNegative = (getbits36_1 (cpu . rA, 0) != 0); cpu 2931 src/dps8/dps8_math.c bool divisorNegative = (getbits36_1 (cpu.CY, 0) != 0); cpu 2939 src/dps8/dps8_math.c uint128 zFrac = lshift_128 (construct_128 (0, cpu.rA & MASK35), 35); cpu 2940 src/dps8/dps8_math.c zFrac = or_128 (zFrac, construct_128 (0, (cpu.rQ >> 1) & MASK35)); cpu 2943 src/dps8/dps8_math.c uint128 zFrac = ((uint128) (cpu . rA & MASK35) << 35) | ((cpu . rQ >> 1) & MASK35); cpu 2980 src/dps8/dps8_math.c uint128 dFrac = convert_to_word72 (0, cpu.CY & MASK35); cpu 3024 src/dps8/dps8_math.c cpu.rQ = cpu.rQ & (MASK35 << 1); cpu 3028 src/dps8/dps8_math.c SC_I_ZERO (cpu.CY == 0); cpu 3029 src/dps8/dps8_math.c SC_I_NEG (cpu.rA & SIGN36); cpu 3037 src/dps8/dps8_math.c L68_ (cpu.ou.cycle |= ou_GD2;) cpu 3066 src/dps8/dps8_math.c bool Aneg = (cpu.rA & SIGN36) != 0; // blood type cpu 3067 src/dps8/dps8_math.c bool AQzero = cpu.rA == 0 && cpu.rQ == 0; cpu 3068 src/dps8/dps8_math.c if (cpu.rA & SIGN36) cpu 3070 src/dps8/dps8_math.c cpu.rA = (~cpu.rA) & MASK36; cpu 3071 src/dps8/dps8_math.c cpu.rQ = (~cpu.rQ) & MASK36; cpu 3072 src/dps8/dps8_math.c cpu.rQ += 1; cpu 3073 src/dps8/dps8_math.c if (cpu.rQ & BIT37) // overflow? cpu 3075 src/dps8/dps8_math.c cpu.rQ &= MASK36; cpu 3076 src/dps8/dps8_math.c cpu.rA = (cpu.rA + 1) & MASK36; cpu 3080 src/dps8/dps8_math.c cpu 3082 src/dps8/dps8_math.c cpu 3083 src/dps8/dps8_math.c cpu 3093 src/dps8/dps8_math.c cpu.rQ = cpu.rQ & (MASK35 << 1); cpu 3122 src/dps8/dps8_math.c cpu.rA = quot.l & MASK36; cpu 3123 src/dps8/dps8_math.c cpu.rQ = remainder.l & MASK36; cpu 3125 src/dps8/dps8_math.c cpu . rA = quot & MASK36; cpu 3126 src/dps8/dps8_math.c cpu . rQ = remainder & MASK36; cpu 3135 src/dps8/dps8_math.c SC_I_ZERO (cpu . rA == 0 && cpu . rQ == 0); cpu 3136 src/dps8/dps8_math.c SC_I_NEG (cpu . rA & SIGN36); cpu 3164 src/dps8/dps8_math.c float72 m = convert_to_word72 (cpu.rA, cpu.rQ); cpu 3166 src/dps8/dps8_math.c cpu.rE = 0200U; /*-128*/ cpu 3205 src/dps8/dps8_math.c convert_to_word36 (m, & cpu.rA, & cpu.rQ); cpu 3207 src/dps8/dps8_math.c fno (cpup, & cpu.rE, & cpu.rA, & cpu.rQ); cpu 3238 src/dps8/dps8_math.c word36 A = cpu . rA, Q = cpu . rQ; cpu 3239 src/dps8/dps8_math.c word8 E = cpu . rE; cpu 3328 src/dps8/dps8_math.c word72 m1 = convert_to_word72 (cpu.rA, cpu.rQ & 0777777777400LL); cpu 3329 src/dps8/dps8_math.c int e1 = SIGNEXT8_int (cpu . rE & MASK8); cpu 3333 src/dps8/dps8_math.c word72 m2 = lshift_128 (construct_128 (0, getbits36_28 (cpu.Ypair[0], 8)), (36 + 8)); cpu 3334 src/dps8/dps8_math.c m2 = or_128 (m2, lshift_128 (construct_128 (0, cpu.Ypair[1]), 8u)); cpu 3336 src/dps8/dps8_math.c word72 m2 = (word72) getbits36_28 (cpu.Ypair[0], 8) << (36 + 8); cpu 3337 src/dps8/dps8_math.c m2 |= cpu.Ypair[1] << 8; cpu 3339 src/dps8/dps8_math.c int e2 = SIGNEXT8_int (getbits36_8 (cpu.Ypair[0], 0)); cpu 3463 src/dps8/dps8_math.c word72 m1 = convert_to_word72 (cpu.rA & MASK36, cpu.rQ & 0777777777400LL); cpu 3464 src/dps8/dps8_math.c int e1 = SIGNEXT8_int (cpu.rE & MASK8); cpu 3468 src/dps8/dps8_math.c word72 m2 = lshift_128 (construct_128 (0, getbits36_28 (cpu.Ypair[0], 8)), (36 + 8)); cpu 3469 src/dps8/dps8_math.c m2 = or_128 (m2, lshift_128 (construct_128 (0, cpu.Ypair[1]), 8u)); cpu 3471 src/dps8/dps8_math.c word72 m2 = (word72) getbits36_28 (cpu.Ypair[0], 8) << (36 + 8); cpu 3472 src/dps8/dps8_math.c m2 |= cpu.Ypair[1] << 8; cpu 3474 src/dps8/dps8_math.c int e2 = SIGNEXT8_int (getbits36_8 (cpu.Ypair[0], 0)); cpu 3477 src/dps8/dps8_math.c L68_ (cpu.ou.cycle = ou_GOE;) cpu 3484 src/dps8/dps8_math.c L68_ (cpu.ou.cycle = ou_GOA;) cpu 1280 src/dps8/dps8_scu.c if (cpu.tweaks.tandd_mode) cpu 1291 src/dps8/dps8_scu.c uint64 Multics_usecs = tandd_base + (cpu.tanddTRTicks * 125u) / 64u; cpu 1304 src/dps8/dps8_scu.c uint128 big = construct_128 (0, cpu.instrCnt); cpu 1317 src/dps8/dps8_scu.c __uint128_t big = cpu.instrCnt; cpu 1538 src/dps8/dps8_scu.c cpu.syncClockModePoll = 0; cpu 1539 src/dps8/dps8_scu.c cpu.syncClockModeCache = true; cpu 1868 src/dps8/dps8_scu.c if (cpup && cpu.tweaks.tandd_mode) cpu 1994 src/dps8/dps8_scu.c word16 b0_15 = (word16) getbits36_16 (cpu.rA, 20); cpu 1995 src/dps8/dps8_scu.c word36 b16_51 = cpu.rQ; cpu 2272 src/dps8/dps8_scu.c cpu.rQ = clk & 0777777777777; // lower 36-bits of clock cpu 2273 src/dps8/dps8_scu.c cpu.rA = (clk >> 36) & 0177777; // upper 16-bits of clock cpu 30 src/dps8/dps8_simh.h (! sim_deb_segno_on) || sim_deb_segno[cpu.PPR.PSR & (DEBUG_SEGNO_LIMIT - 1)]) && \ cpu 31 src/dps8/dps8_simh.h ((dptr != & cpu_dev) || sim_deb_ringno == NO_SUCH_RINGNO || sim_deb_ringno == cpu . PPR. PRR) && \ cpu 33 src/dps8/dps8_simh.h cpu.cycleCnt >= sim_deb_start && \ cpu 34 src/dps8/dps8_simh.h (sim_deb_stop == 0 || cpu.cycleCnt < sim_deb_stop) && \ cpu 90 src/dps8/dps8_sys.c #define DBG_CTR cpu.cycleCnt cpu 1873 src/dps8/dps8_sys.c cpu 1874 src/dps8/dps8_sys.c cpu 1875 src/dps8/dps8_sys.c cpu 1876 src/dps8/dps8_sys.c cpu 1877 src/dps8/dps8_sys.c cpu 1878 src/dps8/dps8_sys.c cpu 1879 src/dps8/dps8_sys.c cpu 1884 src/dps8/dps8_sys.c cpu.restart = true; cpu 1885 src/dps8/dps8_sys.c cpu.restart_address = (uint) n; cpu 2067 src/dps8/dps8_sys.c cpu 2069 src/dps8/dps8_sys.c cpu 2078 src/dps8/dps8_sys.c cpu 2080 src/dps8/dps8_sys.c cpu 2121 src/dps8/dps8_sys.c cpu 2137 src/dps8/dps8_sys.c cpu 2770 src/dps8/dps8_sys.c word15 icSegno = cpu.PPR.PSR; cpu 2771 src/dps8/dps8_sys.c word18 icOffset = cpu.PPR.IC; cpu 2793 src/dps8/dps8_sys.c word15 fpSegno = cpu.PR[6].SNR; cpu 2794 src/dps8/dps8_sys.c word18 fpOffset = cpu.PR[6].WORDNO; cpu 2825 src/dps8/dps8_sys.c where = lookup_address (icSegno, cpu.rX[7] - 1, cpu 2829 src/dps8/dps8_sys.c sim_msg ("%05o:%06o %s\r\n", icSegno, cpu.rX[7] - 1, where); cpu 3210 src/dps8/dps8_sys.c core_read2 (cpup, (cpu.DSBR.ADDR + 2u * segno) & PAMASK, & SDWeven, & SDWodd, cpu 3215 src/dps8/dps8_sys.c sdw0_s *SDW = & cpu._s; cpu 3216 src/dps8/dps8_sys.c (void)memset (SDW, 0, sizeof (cpu._s)); cpu 3242 src/dps8/dps8_sys.c if (cpu.DSBR.U) { cpu 3243 src/dps8/dps8_sys.c for(word15 segno = 0; 2u * segno < 16u * (cpu.DSBR.BND + 1u); segno += 1) cpu 3251 src/dps8/dps8_sys.c 2u * segno < 16u * (cpu.DSBR.BND + 1u); cpu 3257 src/dps8/dps8_sys.c core_read (cpup, (cpu.DSBR.ADDR + x1) & PAMASK, & PTWx1, __func__); cpu 3429 src/dps8/dps8_sys.c if (dbgLookupAddress (cpu.PR[6].SNR, 046, & pa, & msg)) cpu 3437 src/dps8/dps8_sys.c sim_msg ("%05o:%06o\r\n", cpu.PR[2].SNR, cpu.rX[0]); cpu 3439 src/dps8/dps8_sys.c if (dbgLookupAddress (cpu.PR[2].SNR, cpu.rX[0], & pa, & msg)) cpu 3447 src/dps8/dps8_sys.c if (dbgLookupAddress (cpu.PR[2].SNR, cpu.PR[2].WORDNO, & pa, & msg)) cpu 3483 src/dps8/dps8_sys.c if (dbgLookupAddress (cpu.PR[6].SNR, 046, & pa, & msg)) cpu 3492 src/dps8/dps8_sys.c cpu 3494 src/dps8/dps8_sys.c cpu 3517 src/dps8/dps8_sys.c if (dbgLookupAddress (cpu.PR[2].SNR, cpu.PR[2].WORDNO, & pa, & msg)) cpu 3542 src/dps8/dps8_sys.c if (dbgLookupAddress (cpu.PR[6].SNR, 046, & pa, & msg)) cpu 3553 src/dps8/dps8_sys.c cpu 3562 src/dps8/dps8_sys.c if (dbgLookupAddress (cpu.PR[2].SNR, cpu.PR[2].WORDNO, & pa, & msg)) cpu 3586 src/dps8/dps8_sys.c if (dbgLookupAddress (cpu.PR[6].SNR, 046, & pa, & msg)) cpu 3594 src/dps8/dps8_sys.c sim_msg ("%05o:%06o\r\n", cpu.PR[2].SNR, cpu.rX[0]); cpu 3596 src/dps8/dps8_sys.c if (dbgLookupAddress (cpu.PR[2].SNR, cpu.rX[0], & pa, & msg)) cpu 3604 src/dps8/dps8_sys.c if (dbgLookupAddress (cpu.PR[2].SNR, cpu.PR[2].WORDNO, & pa, & msg)) cpu 4709 src/dps8/dps8_sys.c segno = cpu.PR[prt->n].SNR; cpu 4710 src/dps8/dps8_sys.c PRoffset = cpu.PR[prt->n].WORDNO; cpu 4752 src/dps8/dps8_sys.c segno = cpu.PR[prt->n].SNR; cpu 4753 src/dps8/dps8_sys.c offset = cpu.PR[prt->n].WORDNO; cpu 57 src/dps8/dps8_sys.h cpu.rTRticks ++; \ cpu 58 src/dps8/dps8_sys.h if (cpu.syncClockModeCache) \ cpu 59 src/dps8/dps8_sys.h cpu.workAllocation --; \ cpu 64 src/dps8/dps8_sys.h cpu.rTRticks ++; \ cpu 1095 src/dps8/dps8_utils.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 1139 src/dps8/dps8_utils.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 1187 src/dps8/dps8_utils.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 1220 src/dps8/dps8_utils.c L68_ (cpu.ou.cycle |= ou_GOS;) cpu 2134 src/dps8/dps8_utils.c cpu 2149 src/dps8/dps8_utils.c cpu 2155 src/dps8/dps8_utils.c cpu 177 src/dps8/hdbg.c if (filter && hdbgSegNum >= 0 && hdbgSegNum != cpu.PPR.PSR) \ cpu 179 src/dps8/hdbg.c if (filter && hdbgSegNum > 0 && blacklist[cpu.PPR.IC]) \ cpu 186 src/dps8/hdbg.c hevp[p].time = cpu.cycleCnt; \ cpu 201 src/dps8/hdbg.c hevp[p].trace.segno = cpu.PPR.PSR; cpu 202 src/dps8/hdbg.c hevp[p].trace.ic = cpu.PPR.IC; cpu 203 src/dps8/hdbg.c hevp[p].trace.ring = cpu.PPR.PRR; cpu 267 src/dps8/hdbg.c hevp[p].time = cpu.cycleCnt; cpu 80 src/dps8/hdbg.h # define HDBGRegAR(c) hdbgRegR (hreg_A, cpu.rA, c) cpu 81 src/dps8/hdbg.h # define HDBGRegAW(c) hdbgRegW (hreg_A, cpu.rA, c) cpu 82 src/dps8/hdbg.h # define HDBGRegQR(c) hdbgRegR (hreg_Q, cpu.rQ, c) cpu 83 src/dps8/hdbg.h # define HDBGRegQW(c) hdbgRegW (hreg_Q, cpu.rQ, c) cpu 84 src/dps8/hdbg.h # define HDBGRegXR(i, c) hdbgRegR (hreg_X0+(i), (word36) cpu.rX[i], c) cpu 85 src/dps8/hdbg.h # define HDBGRegXW(i, c) hdbgRegW (hreg_X0+(i), (word36) cpu.rX[i], c) cpu 86 src/dps8/hdbg.h # define HDBGRegYR(c) hdbgRegR (hreg_Y, (word36) cpu.rY, c) cpu 87 src/dps8/hdbg.h # define HDBGRegYW(c) hdbgRegW (hreg_Y, (word36) cpu.rY, c) cpu 90 src/dps8/hdbg.h # define HDBGRegPRR(i, c) hdbgPARegR (hreg_PR0+(i), & cpu.PAR[i], c) cpu 91 src/dps8/hdbg.h # define HDBGRegPRW(i, c) hdbgPARegW (hreg_PR0+(i), & cpu.PAR[i], c) cpu 92 src/dps8/hdbg.h # define HDBGRegARR(i, c) hdbgPARegR (hreg_AR0+(i), & cpu.PAR[i], c) cpu 93 src/dps8/hdbg.h # define HDBGRegARW(i, c) hdbgPARegW (hreg_AR0+(i), & cpu.PAR[i], c) cpu 94 src/dps8/hdbg.h # define HDBGRegIR(c) hdbgRegW (hreg_IR, (word36) cpu.cu.IR, c) cpu 106 src/dps8/panelScraper.c uint n = cpu.APU_panel_scroll_select_n_sw; cpu 108 src/dps8/panelScraper.c switch (cpu.APU_panel_scroll_wheel_sw) cpu 113 src/dps8/panelScraper.c if (cpu.APU_panel_scroll_select_ul_sw) cpu 119 src/dps8/panelScraper.c SETL (bank_a, 0+3, cpu.PTWAM[n].POINTER, 15); cpu 120 src/dps8/panelScraper.c SETL (bank_a, 15+3, cpu.PTWAM[n].PAGENO, 12); cpu 121 src/dps8/panelScraper.c SETL1 (bank_a, 27+3, cpu.PTWAM[n].FE); cpu 122 src/dps8/panelScraper.c SETL (bank_a, 32+3, cpu.PTWAM[n].USE, 4); cpu 134 src/dps8/panelScraper.c if (cpu.APU_panel_scroll_select_ul_sw) cpu 138 src/dps8/panelScraper.c SETL (bank_a, 0+3, cpu.PTWAM[n].ADDR, 18); cpu 139 src/dps8/panelScraper.c SETL1 (bank_a, 29+3, cpu.PTWAM[n].M); cpu 151 src/dps8/panelScraper.c if (cpu.APU_panel_scroll_select_ul_sw) cpu 156 src/dps8/panelScraper.c SETL (bank_a, 0+3, cpu.SDWAM[n].POINTER, 15); cpu 157 src/dps8/panelScraper.c SETL1 (bank_a, 27+3, cpu.SDWAM[n].FE); cpu 158 src/dps8/panelScraper.c SETL (bank_a, 32+3, cpu.SDWAM[n].USE, 4); cpu 170 src/dps8/panelScraper.c if (cpu.APU_panel_scroll_select_ul_sw) cpu 176 src/dps8/panelScraper.c SETL (bank_a, 0+3, cpu.SDWAM[n].ADDR, 24); cpu 177 src/dps8/panelScraper.c SETL (bank_a, 24+3, cpu.SDWAM[n].R1, 3); cpu 178 src/dps8/panelScraper.c SETL (bank_a, 27+3, cpu.SDWAM[n].R2, 3); cpu 179 src/dps8/panelScraper.c SETL (bank_a, 30+3, cpu.SDWAM[n].R2, 3); cpu 191 src/dps8/panelScraper.c SETL (bank_a, 1+3, cpu.SDWAM[n].BOUND, 14); cpu 192 src/dps8/panelScraper.c SETL1 (bank_a, 15+3, cpu.SDWAM[n].R); cpu 193 src/dps8/panelScraper.c SETL1 (bank_a, 16+3, cpu.SDWAM[n].E); cpu 194 src/dps8/panelScraper.c SETL1 (bank_a, 17+3, cpu.SDWAM[n].W); cpu 195 src/dps8/panelScraper.c SETL1 (bank_a, 18+3, cpu.SDWAM[n].P); cpu 196 src/dps8/panelScraper.c SETL1 (bank_a, 19+3, cpu.SDWAM[n].U); cpu 197 src/dps8/panelScraper.c SETL1 (bank_a, 20+3, cpu.SDWAM[n].G); cpu 198 src/dps8/panelScraper.c SETL (bank_a, 22+3, cpu.SDWAM[n].EB, 14); cpu 206 src/dps8/panelScraper.c if (cpu.APU_panel_scroll_select_ul_sw) cpu 210 src/dps8/panelScraper.c SETL (bank_a, 0+3, cpu.lastPTWOffset, 18); cpu 211 src/dps8/panelScraper.c SETL1 (bank_a, 26+3, cpu.lastPTWIsDS); cpu 223 src/dps8/panelScraper.c SETL (bank_a, 1+3, cpu.SDWAM[n].BOUND, 14); cpu 224 src/dps8/panelScraper.c SETL1 (bank_a, 15+3, cpu.SDWAM[n].R); cpu 225 src/dps8/panelScraper.c SETL1 (bank_a, 16+3, cpu.SDWAM[n].E); cpu 226 src/dps8/panelScraper.c SETL1 (bank_a, 17+3, cpu.SDWAM[n].W); cpu 227 src/dps8/panelScraper.c SETL1 (bank_a, 18+3, cpu.SDWAM[n].P); cpu 228 src/dps8/panelScraper.c SETL1 (bank_a, 19+3, cpu.SDWAM[n].U); cpu 229 src/dps8/panelScraper.c SETL1 (bank_a, 20+3, cpu.SDWAM[n].G); cpu 230 src/dps8/panelScraper.c SETL (bank_a, 22+3, cpu.SDWAM[n].EB, 14); cpu 238 src/dps8/panelScraper.c if (cpu.APU_panel_scroll_select_ul_sw) cpu 241 src/dps8/panelScraper.c SETL (bank_a, 0+3, cpu.DSBR.ADDR, 24); cpu 245 src/dps8/panelScraper.c SETL (bank_a, 1+3, cpu.SDWAM[n].BOUND, 14); cpu 246 src/dps8/panelScraper.c SETL1 (bank_a, 15+3, cpu.SDWAM[n].R); cpu 247 src/dps8/panelScraper.c SETL1 (bank_a, 16+3, cpu.SDWAM[n].E); cpu 248 src/dps8/panelScraper.c SETL1 (bank_a, 17+3, cpu.SDWAM[n].W); cpu 249 src/dps8/panelScraper.c SETL1 (bank_a, 18+3, cpu.SDWAM[n].P); cpu 250 src/dps8/panelScraper.c SETL1 (bank_a, 19+3, cpu.SDWAM[n].U); cpu 251 src/dps8/panelScraper.c SETL1 (bank_a, 20+3, cpu.SDWAM[n].G); cpu 252 src/dps8/panelScraper.c SETL (bank_a, 22+3, cpu.SDWAM[n].EB, 14); cpu 260 src/dps8/panelScraper.c if (cpu.APU_panel_scroll_select_ul_sw) cpu 266 src/dps8/panelScraper.c SETL (bank_a, 0+3, cpu.SDW0.ADDR, 24); cpu 267 src/dps8/panelScraper.c SETL (bank_a, 24+3, cpu.SDW0.R1, 3); cpu 268 src/dps8/panelScraper.c SETL (bank_a, 27+3, cpu.SDW0.R2, 3); cpu 269 src/dps8/panelScraper.c SETL (bank_a, 30+3, cpu.SDW0.R2, 3); cpu 281 src/dps8/panelScraper.c SETL (bank_a, 1+3, cpu.SDW0.BOUND, 14); cpu 282 src/dps8/panelScraper.c SETL1 (bank_a, 15+3, cpu.SDW0.R); cpu 283 src/dps8/panelScraper.c SETL1 (bank_a, 16+3, cpu.SDW0.E); cpu 284 src/dps8/panelScraper.c SETL1 (bank_a, 17+3, cpu.SDW0.W); cpu 285 src/dps8/panelScraper.c SETL1 (bank_a, 18+3, cpu.SDW0.P); cpu 286 src/dps8/panelScraper.c SETL1 (bank_a, 19+3, cpu.SDW0.U); cpu 287 src/dps8/panelScraper.c SETL1 (bank_a, 20+3, cpu.SDW0.G); cpu 288 src/dps8/panelScraper.c SETL (bank_a, 22+3, cpu.SDW0.EB, 14); cpu 297 src/dps8/panelScraper.c if (cpu.APU_panel_scroll_select_ul_sw) cpu 301 src/dps8/panelScraper.c SETL (bank_a, 0+3, cpu.APUDataBusOffset, 18); cpu 308 src/dps8/panelScraper.c SETL (bank_a, 0+3, cpu.APUDataBusAddr, 24); cpu 316 src/dps8/panelScraper.c if (cpu.APU_panel_scroll_select_ul_sw) cpu 320 src/dps8/panelScraper.c SETL (bank_a, 0+3, cpu.APUMemAddr, 24); cpu 321 src/dps8/panelScraper.c SETL (bank_a, 24+3, cpu.rRALR, 3); cpu 329 src/dps8/panelScraper.c word16 flts = (word16) cpu.acvFaults; cpu 333 src/dps8/panelScraper.c word11 cyc = (cpu.cu.APUCycleBits >> 3) & MASK11; cpu 342 src/dps8/panelScraper.c if (cpu.APU_panel_scroll_select_ul_sw) cpu 348 src/dps8/panelScraper.c SETL (bank_a, 3+3, cpu.PAR[n].SNR, 15); cpu 349 src/dps8/panelScraper.c SETL (bank_a, 18+3, cpu.PAR[n].RNR, 3); cpu 350 src/dps8/panelScraper.c SETL (bank_a, 33+3, cpu.RSDWH_R1, 3); cpu 360 src/dps8/panelScraper.c SETL1 (bank_a, 0+3, cpu.SDW0.DF); cpu 361 src/dps8/panelScraper.c SETL (bank_a, 1+3, cpu.SDW0.FC, 2); cpu 364 src/dps8/panelScraper.c word16 flts = (word16) cpu.acvFaults; cpu 366 src/dps8/panelScraper.c SETL (bank_a, 30+3, cpu.TPR.TBR, 6); cpu 374 src/dps8/panelScraper.c if (cpu.APU_panel_scroll_select_ul_sw) cpu 377 src/dps8/panelScraper.c SETL (bank_a, 0+3, cpu.PPR.PRR, 3); cpu 378 src/dps8/panelScraper.c SETL (bank_a, 3+3, cpu.PPR.PSR, 15); cpu 379 src/dps8/panelScraper.c SETL1 (bank_a, 18+3, cpu.PPR.P); cpu 380 src/dps8/panelScraper.c SETL1 (bank_a, 19+3, cpu.cu.XSF); cpu 381 src/dps8/panelScraper.c SETL1 (bank_a, 20+3, cpu.cu.SDWAMM); cpu 382 src/dps8/panelScraper.c SETL1 (bank_a, 21+3, cpu.cu.SD_ON); cpu 383 src/dps8/panelScraper.c SETL1 (bank_a, 22+3, cpu.cu.PTWAMM); cpu 384 src/dps8/panelScraper.c SETL1 (bank_a, 23+3, cpu.cu.PT_ON); cpu 385 src/dps8/panelScraper.c SETL (bank_a, 24+3, cpu.cu.APUCycleBits, 12); cpu 390 src/dps8/panelScraper.c SETL1 (bank_a, 0+3, cpu.cu.IRO_ISN); cpu 391 src/dps8/panelScraper.c SETL1 (bank_a, 1+3, cpu.cu.OEB_IOC); cpu 392 src/dps8/panelScraper.c SETL1 (bank_a, 2+3, cpu.cu.EOFF_IAIM); cpu 393 src/dps8/panelScraper.c SETL1 (bank_a, 3+3, cpu.cu.ORB_ISP); cpu 394 src/dps8/panelScraper.c SETL1 (bank_a, 4+3, cpu.cu.ROFF_IPR); cpu 395 src/dps8/panelScraper.c SETL1 (bank_a, 5+3, cpu.cu.OWB_NEA); cpu 396 src/dps8/panelScraper.c SETL1 (bank_a, 6+3, cpu.cu.WOFF_OOB); cpu 397 src/dps8/panelScraper.c SETL1 (bank_a, 7+3, cpu.cu.NO_GA); cpu 398 src/dps8/panelScraper.c SETL1 (bank_a, 8+3, cpu.cu.OCB); cpu 399 src/dps8/panelScraper.c SETL1 (bank_a, 9+3, cpu.cu.OCALL); cpu 400 src/dps8/panelScraper.c SETL1 (bank_a, 10+3, cpu.cu.BOC); cpu 401 src/dps8/panelScraper.c SETL1 (bank_a, 11+3, cpu.cu.PTWAM_ER); cpu 402 src/dps8/panelScraper.c SETL1 (bank_a, 12+3, cpu.cu.CRT); cpu 403 src/dps8/panelScraper.c SETL1 (bank_a, 13+3, cpu.cu.RALR); cpu 404 src/dps8/panelScraper.c SETL1 (bank_a, 14+3, cpu.cu.SDWAM_ER); cpu 405 src/dps8/panelScraper.c SETL1 (bank_a, 15+3, cpu.cu.OOSB); cpu 406 src/dps8/panelScraper.c SETL1 (bank_a, 16+3, cpu.cu.PARU); cpu 407 src/dps8/panelScraper.c SETL1 (bank_a, 17+3, cpu.cu.PARL); cpu 408 src/dps8/panelScraper.c SETL1 (bank_a, 18+3, cpu.cu.ONC1); cpu 409 src/dps8/panelScraper.c SETL1 (bank_a, 19+3, cpu.cu.ONC2); cpu 410 src/dps8/panelScraper.c SETL (bank_a, 20+3, cpu.cu.IA, 4); cpu 411 src/dps8/panelScraper.c SETL (bank_a, 24+3, cpu.cu.IACHN, 3); cpu 412 src/dps8/panelScraper.c SETL (bank_a, 27+3, cpu.cu.CNCHN, 3); cpu 413 src/dps8/panelScraper.c SETL (bank_a, 30+3, cpu.cu.FI_ADDR, 5); cpu 414 src/dps8/panelScraper.c word1 fi = cpu.cycle == INTERRUPT_cycle ? 0 : 1; cpu 423 src/dps8/panelScraper.c if (cpu.APU_panel_scroll_select_ul_sw) cpu 426 src/dps8/panelScraper.c SETL (bank_a, 0+3, cpu.TPR.TRR, 3); cpu 427 src/dps8/panelScraper.c SETL (bank_a, 3+3, cpu.TPR.TSR, 15); cpu 428 src/dps8/panelScraper.c SETL (bank_a, 27+3, (word3) cpu.switches.cpu_num, 3); cpu 429 src/dps8/panelScraper.c SETL (bank_a, 30+3, cpu.cu.delta, 6); cpu 440 src/dps8/panelScraper.c SETL (bank_a, 30+3, cpu.TPR.TBR, 6); cpu 449 src/dps8/panelScraper.c if (cpu.APU_panel_scroll_select_ul_sw) cpu 456 src/dps8/panelScraper.c SETL (bank_a, 0+3, cpu.TPR.CA, 18); cpu 457 src/dps8/panelScraper.c SETL1 (bank_a, 18+3, cpu.cu.repeat_first); cpu 458 src/dps8/panelScraper.c SETL1 (bank_a, 19+3, cpu.cu.rpt); cpu 459 src/dps8/panelScraper.c SETL1 (bank_a, 20+3, cpu.cu.rd); cpu 460 src/dps8/panelScraper.c SETL1 (bank_a, 21+3, cpu.cu.rl); cpu 461 src/dps8/panelScraper.c SETL1 (bank_a, 22+3, cpu.cu.pot); cpu 463 src/dps8/panelScraper.c SETL1 (bank_a, 24+3, cpu.cu.xde); cpu 464 src/dps8/panelScraper.c SETL1 (bank_a, 25+3, cpu.cu.xdo); cpu 466 src/dps8/panelScraper.c SETL1 (bank_a, 27+3, cpu.cu.rfi); cpu 468 src/dps8/panelScraper.c SETL1 (bank_a, 29+3, cpu.cu.FIF); cpu 469 src/dps8/panelScraper.c SETL (bank_a, 30+3, cpu.cu.CT_HOLD, 6); cpu 480 src/dps8/panelScraper.c if (cpu.APU_panel_scroll_select_ul_sw) cpu 483 src/dps8/panelScraper.c SETL (bank_a, 0+3, cpu.cu.IWB, 36); cpu 488 src/dps8/panelScraper.c SETL (bank_a, 0+3, cpu.cu.IRODD, 36); cpu 506 src/dps8/panelScraper.c switch (cpu.CP_panel_wheel_sw) cpu 509 src/dps8/panelScraper.c SETLA (bank_b, 0+3, cpu.cpt [0], 36); cpu 510 src/dps8/panelScraper.c SETLA (bank_c, 0+3, cpu.cpt [1], 36); cpu 513 src/dps8/panelScraper.c SETLA (bank_b, 0+3, cpu.cpt [2], 36); cpu 514 src/dps8/panelScraper.c SETLA (bank_c, 0+3, cpu.cpt [3], 36); cpu 517 src/dps8/panelScraper.c SETLA (bank_b, 0+3, cpu.cpt [4], 36); cpu 518 src/dps8/panelScraper.c SETLA (bank_c, 0+3, cpu.cpt [5], 36); cpu 521 src/dps8/panelScraper.c SETLA (bank_b, 0+3, cpu.cpt [6], 36); cpu 522 src/dps8/panelScraper.c SETLA (bank_c, 0+3, cpu.cpt [7], 36); cpu 525 src/dps8/panelScraper.c SETLA (bank_b, 0+3, cpu.cpt [8], 36); cpu 526 src/dps8/panelScraper.c SETLA (bank_c, 0+3, cpu.cpt [9], 36); cpu 529 src/dps8/panelScraper.c SETLA (bank_b, 0+3, cpu.cpt [10], 36); cpu 530 src/dps8/panelScraper.c SETLA (bank_c, 0+3, cpu.cpt [11], 36); cpu 533 src/dps8/panelScraper.c SETLA (bank_b, 0+3, cpu.cpt [12], 36); cpu 534 src/dps8/panelScraper.c SETLA (bank_c, 0+3, cpu.cpt [13], 36); cpu 537 src/dps8/panelScraper.c SETLA (bank_b, 0+3, cpu.cpt [14], 36); cpu 538 src/dps8/panelScraper.c SETLA (bank_c, 0+3, cpu.cpt [15], 36); cpu 541 src/dps8/panelScraper.c SETLA (bank_b, 0+3, cpu.cpt [16], 36); cpu 542 src/dps8/panelScraper.c SETLA (bank_c, 0+3, cpu.cpt [17], 36); cpu 545 src/dps8/panelScraper.c SETLA (bank_b, 0+3, cpu.cpt [18], 36); cpu 546 src/dps8/panelScraper.c SETLA (bank_c, 0+3, cpu.cpt [19], 36); cpu 549 src/dps8/panelScraper.c SETLA (bank_b, 0+3, cpu.cpt [20], 36); cpu 550 src/dps8/panelScraper.c SETLA (bank_c, 0+3, cpu.cpt [21], 36); cpu 553 src/dps8/panelScraper.c SETLA (bank_b, 0+3, cpu.cpt [22], 36); cpu 554 src/dps8/panelScraper.c SETLA (bank_c, 0+3, cpu.cpt [23], 36); cpu 557 src/dps8/panelScraper.c SETLA (bank_b, 0+3, cpu.cpt [24], 36); cpu 558 src/dps8/panelScraper.c SETLA (bank_c, 0+3, cpu.cpt [25], 36); cpu 561 src/dps8/panelScraper.c SETLA (bank_b, 0+3, cpu.cpt [26], 36); cpu 562 src/dps8/panelScraper.c SETLA (bank_c, 0+3, cpu.cpt [27], 36); cpu 566 src/dps8/panelScraper.c SETL1 (bank_b, 36+3, cpu.panel4_red_ready_light_state); cpu 568 src/dps8/panelScraper.c SETL1 (bank_c, 36+3, cpu.panel7_enabled_light_state); cpu 574 src/dps8/panelScraper.c SETL (bank_d, 0+3, cpu.portAddr [cpu.DATA_panel_d1_sw], 24); cpu 575 src/dps8/panelScraper.c SETL (bank_e, 0+3, cpu.portData [cpu.DATA_panel_d1_sw], 36); cpu 594 src/dps8/panelScraper.c SETL (bank_d, 0+3, cpu.PAR[cpu.DATA_panel_d2_sw].PR_BITNO, 6); cpu 595 src/dps8/panelScraper.c SETL (bank_d, 6+3, cpu.PAR[cpu.DATA_panel_d2_sw].SNR, 15); cpu 596 src/dps8/panelScraper.c SETL (bank_d, 18+3, cpu.PAR[cpu.DATA_panel_d2_sw].WORDNO, 18); cpu 598 src/dps8/panelScraper.c SETL (bank_e, 0+3, cpu.PAR[cpu.DATA_panel_d2_sw].WORDNO, 18); cpu 599 src/dps8/panelScraper.c SETL (bank_e, 18+3, cpu.PAR[cpu.DATA_panel_d2_sw].AR_CHAR, 2); cpu 600 src/dps8/panelScraper.c SETL (bank_e, 20+3, cpu.PAR[cpu.DATA_panel_d2_sw].AR_BITNO, 4); cpu 607 src/dps8/panelScraper.c switch (cpu.DATA_panel_d3_sw) cpu 613 src/dps8/panelScraper.c SETL (bank_d, 0+3, cpu.du.D1_PTR_W, 18); cpu 622 src/dps8/panelScraper.c SETL (bank_d, 0+3, cpu.du.D2_PTR_W, 18); cpu 631 src/dps8/panelScraper.c SETL (bank_d, 0+3, cpu.du.D3_PTR_W, 18); cpu 648 src/dps8/panelScraper.c SETL (bank_e, 0+3, cpu.rTR, 27); cpu 657 src/dps8/panelScraper.c SETL (bank_e, 0+3, cpu.PPR.IC, 18); cpu 661 src/dps8/panelScraper.c SETL (bank_e, 0+3, cpu.AM_tally, 12); cpu 673 src/dps8/panelScraper.c switch (cpu.DATA_panel_d3_sw) cpu 697 src/dps8/panelScraper.c SETL (bank_d, 0+3, cpu.du.CHTALLY, 24); cpu 717 src/dps8/panelScraper.c switch (cpu.DATA_panel_wheel_sw) cpu 721 src/dps8/panelScraper.c SETL (bank_d, 0+3, cpu.rA, 36); cpu 722 src/dps8/panelScraper.c SETL (bank_e, 0+3, cpu.rQ, 36); cpu 728 src/dps8/panelScraper.c SETL (bank_d, 0+3, cpu.rX[0], 18); cpu 729 src/dps8/panelScraper.c SETL (bank_d, 18+3, cpu.rX[1], 18); cpu 730 src/dps8/panelScraper.c SETL (bank_e, 0+3, cpu.rX[2], 18); cpu 731 src/dps8/panelScraper.c SETL (bank_e, 18+3, cpu.rX[3], 18); cpu 737 src/dps8/panelScraper.c SETL (bank_d, 0+3, cpu.rX[4], 18); cpu 738 src/dps8/panelScraper.c SETL (bank_d, 18+3, cpu.rX[5], 18); cpu 739 src/dps8/panelScraper.c SETL (bank_e, 0+3, cpu.rX[6], 18); cpu 740 src/dps8/panelScraper.c SETL (bank_e, 18+3, cpu.rX[7], 18); cpu 746 src/dps8/panelScraper.c SETL (bank_d, 0+3, cpu.rE, 8); cpu 747 src/dps8/panelScraper.c SETL (bank_d, 8+3, cpu.rA >> 8, 36 - 8); cpu 748 src/dps8/panelScraper.c SETL (bank_e, 0+3, cpu.rA, 8); cpu 749 src/dps8/panelScraper.c SETL (bank_e, 0+3, cpu.rQ >> 8, 36 - 8); cpu 756 src/dps8/panelScraper.c SETL (bank_d, 0+3, cpu.rE, 8); cpu 770 src/dps8/panelScraper.c SETL (bank_d, 0+3, cpu.history[L68_APU_HIST_REG][cpu.DATA_panel_hr_sel_sw][0], 36); cpu 771 src/dps8/panelScraper.c SETL (bank_e, 0+3, cpu.history[L68_APU_HIST_REG][cpu.DATA_panel_hr_sel_sw][1], 36); cpu 776 src/dps8/panelScraper.c cpu 778 src/dps8/panelScraper.c cpu 780 src/dps8/panelScraper.c cpu 782 src/dps8/panelScraper.c cpu 784 src/dps8/panelScraper.c cpu 786 src/dps8/panelScraper.c cpu 788 src/dps8/panelScraper.c cpu 791 src/dps8/panelScraper.c cpu 793 src/dps8/panelScraper.c cpu 795 src/dps8/panelScraper.c cpu 797 src/dps8/panelScraper.c cpu 799 src/dps8/panelScraper.c cpu 801 src/dps8/panelScraper.c cpu 803 src/dps8/panelScraper.c cpu 805 src/dps8/panelScraper.c cpu 809 src/dps8/panelScraper.c cpu 811 src/dps8/panelScraper.c cpu 813 src/dps8/panelScraper.c cpu 822 src/dps8/panelScraper.c SETL (bank_e, 0+3, cpu.ou.directOperand, 36); cpu 830 src/dps8/panelScraper.c SETL (bank_d, 0+3, cpu.faultRegister [0] & 0777777777760LLU, 36); cpu 838 src/dps8/panelScraper.c SETL (bank_d, 0+3, cpu.MR.r, 36); cpu 846 src/dps8/panelScraper.c SETL (bank_d, 0+3, cpu.history[CU_HIST_REG][cpu.DATA_panel_hr_sel_sw][0], 36); cpu 847 src/dps8/panelScraper.c SETL (bank_e, 0+3, cpu.history[CU_HIST_REG][cpu.DATA_panel_hr_sel_sw][1], 36); cpu 854 src/dps8/panelScraper.c SETL (bank_d, 0+3, cpu.history[L68_OU_HIST_REG][cpu.DATA_panel_hr_sel_sw][0], 36); cpu 855 src/dps8/panelScraper.c SETL (bank_e, 0+3, cpu.history[L68_OU_HIST_REG][cpu.DATA_panel_hr_sel_sw][1], 36); cpu 862 src/dps8/panelScraper.c SETL (bank_d, 0+3, cpu.history[L68_DU_HIST_REG][cpu.DATA_panel_hr_sel_sw][0], 36); cpu 863 src/dps8/panelScraper.c SETL (bank_e, 0+3, cpu.history[L68_DU_HIST_REG][cpu.DATA_panel_hr_sel_sw][1], 36); cpu 870 src/dps8/panelScraper.c SETL (bank_d, 0+3, cpu.cu.IWB, 36); cpu 871 src/dps8/panelScraper.c SETL (bank_e, 0+3, cpu.cu.IRODD, 36); cpu 879 src/dps8/panelScraper.c switch (cpu.DATA_panel_ds_sw) cpu 912 src/dps8/panelScraper.c SETL (bank_f, 0, cpu.cu.IR, 18); cpu 913 src/dps8/panelScraper.c SETL (bank_f, 18, cpu.history_cyclic [0], 4); cpu 914 src/dps8/panelScraper.c SETL (bank_f, 22, cpu.history_cyclic [1], 4); cpu 915 src/dps8/panelScraper.c SETL (bank_f, 26, cpu.history_cyclic [2], 4); cpu 916 src/dps8/panelScraper.c SETL (bank_f, 30, cpu.history_cyclic [3], 4); cpu 917 src/dps8/panelScraper.c SETL (bank_g, 0, cpu.PPR.IC, 18); cpu 920 src/dps8/panelScraper.c SETL (bank_g, 18, cpu.portSelect == 0 ? 1 : 0, 1); cpu 921 src/dps8/panelScraper.c SETL (bank_g, 19, cpu.portSelect == 1 ? 1 : 0, 1); cpu 922 src/dps8/panelScraper.c SETL (bank_g, 20, cpu.portSelect == 2 ? 1 : 0, 1); cpu 923 src/dps8/panelScraper.c SETL (bank_g, 21, cpu.portSelect == 3 ? 1 : 0, 1); cpu 928 src/dps8/panelScraper.c bool exc_int = cpu.cycle == INTERRUPT_cycle || cpu 929 src/dps8/panelScraper.c cpu.cycle == INTERRUPT_EXEC_cycle /*|| cpu 930 src/dps8/panelScraper.c cpu.cycle == INTERRUPT_EXEC2_cycle*/; cpu 934 src/dps8/panelScraper.c bool ins_fch = cpu.cycle == INTERRUPT_cycle || cpu 935 src/dps8/panelScraper.c cpu.cycle == FAULT_cycle || cpu 936 src/dps8/panelScraper.c cpu.cycle == FETCH_cycle; cpu 945 src/dps8/panelScraper.c SETL (bank_h, 3, cpu.cu.IWB, 36); cpu 948 src/dps8/panelScraper.c SETL (bank_i, 3, cpu.IWRAddr, 36); cpu 951 src/dps8/panelScraper.c SETL (bank_j, 3, cpu.PPR.IC, 18); cpu 955 src/dps8/panelScraper.c word2 pia_poa = cpu.prepare_state >> 6; cpu 957 src/dps8/panelScraper.c SETL (bank_j, 23, cpu.du.POL, 2); cpu 958 src/dps8/panelScraper.c SETL (bank_j, 24, cpu.du.POP, 1); cpu 959 src/dps8/panelScraper.c SETL (bank_j, 25, cpu.prepare_state, 6); cpu 961 src/dps8/panelScraper.c SETL (bank_j, 31, cpu.wasXfer, 1); cpu 962 src/dps8/panelScraper.c SETL (bank_j, 32, cpu.cu.xde, 1); cpu 963 src/dps8/panelScraper.c SETL (bank_j, 33, cpu.cu.xdo, 1); cpu 965 src/dps8/panelScraper.c SETL (bank_j, 35, cpu.cu.rpt, 1); cpu 966 src/dps8/panelScraper.c SETL (bank_j, 36, cpu.cu.rl, 1); cpu 967 src/dps8/panelScraper.c SETL (bank_j, 37, cpu.cu.rd, 1); cpu 969 src/dps8/panelScraper.c SETL (bank_j, 38, TSTF (cpu.cu.IR, I_NBAR), 1); cpu 975 src/dps8/panelScraper.c SETL (bank_k, 21, cpu.dataMode, 7); cpu 985 src/dps8/panelScraper.c SETL (bank_l, 3, cpu.TPR.CA, 18); cpu 987 src/dps8/panelScraper.c SETL (bank_m, 3, cpu.ou.RS, 9); cpu 988 src/dps8/panelScraper.c SETL (bank_m, 12, cpu.ou.characterOperandSize ? 1 : 0, 1); cpu 989 src/dps8/panelScraper.c SETL (bank_m, 13, cpu.ou.characterOperandOffset & MASK3, 3); cpu 990 src/dps8/panelScraper.c SETL (bank_m, 16, cpu.ou.crflag, 1); cpu 991 src/dps8/panelScraper.c SETL (bank_m, 17, cpu.ou.directOperandFlag ? 1 : 0, 1); cpu 992 src/dps8/panelScraper.c SETL (bank_m, 18, cpu.ou.RS, 9); cpu 993 src/dps8/panelScraper.c SETL (bank_m, 27, cpu.ou.cycle, 9); cpu 994 src/dps8/panelScraper.c SETL (bank_m, 36, cpu.ou.RB1_FULL, 1); cpu 995 src/dps8/panelScraper.c SETL (bank_m, 37, cpu.ou.RP_FULL, 1); cpu 996 src/dps8/panelScraper.c SETL (bank_m, 38, cpu.ou.RS_FULL, 1); cpu 1000 src/dps8/panelScraper.c SETL1 (bank_n, 3, cpu.du.cycle2 & du2_DUD); cpu 1005 src/dps8/panelScraper.c SETL1 (bank_n, 7, cpu.du.cycle1 & du1_FA_I1); cpu 1009 src/dps8/panelScraper.c SETL1 (bank_n, 10, cpu.du.cycle2 & du2_DGDB); cpu 1011 src/dps8/panelScraper.c SETL1 (bank_n, 11, cpu.du.cycle2 & du2_DGBD); cpu 1015 src/dps8/panelScraper.c SETL1 (bank_n, 14, cpu.du.cycle1 & du1_FA_I2); cpu 1030 src/dps8/panelScraper.c SETL1 (bank_n, 28, cpu.du.cycle1 & du1_FA_I3); cpu 1034 src/dps8/panelScraper.c SETL1 (bank_n, 31, cpu.du.cycle2 & du2_GSTR); cpu 1037 src/dps8/panelScraper.c SETL1 (bank_n, 32, cpu.du.cycle2 & du2_ANSTR); cpu 1044 src/dps8/panelScraper.c SETL1 (bank_n, 39, cpu.du.cycle2 & du2_FRND); cpu 1047 src/dps8/panelScraper.c SETL1 (bank_o, 3, cpu.du.cycle2 & du2_ANLD1); cpu 1049 src/dps8/panelScraper.c SETL1 (bank_o, 4, cpu.du.cycle2 & du2_ANLD2); cpu 1051 src/dps8/panelScraper.c SETL1 (bank_o, 5, cpu.du.cycle2 & du2_NLD1); cpu 1053 src/dps8/panelScraper.c SETL1 (bank_o, 6, cpu.du.cycle2 & du2_NLD2); cpu 1055 src/dps8/panelScraper.c SETL1 (bank_o, 7, cpu.du.cycle2 & du2_LDWRT1); cpu 1057 src/dps8/panelScraper.c SETL1 (bank_o, 8, cpu.du.cycle2 & du2_LDWRT2); cpu 1062 src/dps8/panelScraper.c SETL1 (bank_o, 12, cpu.du.cycle2 & du2_FEXOP); cpu 1064 src/dps8/panelScraper.c SETL1 (bank_o, 13, cpu.du.cycle2 & du2_FBLNK); cpu 1083 src/dps8/panelScraper.c SETL1 (bank_o, 31, !(cpu.du.cycle2 & du2_nFLEN_128)); cpu 1085 src/dps8/panelScraper.c SETL1 (bank_o, 32, !(cpu.du.cycle2 & du2_nFEND_SEQ)); cpu 1094 src/dps8/panelScraper.c SETL (bank_p, 3, cpu.apu.state, 34); cpu 1387 src/dps8/panelScraper.c SETS (cpu.APU_panel_segno_sw, port_data, 0, 15); cpu 1388 src/dps8/panelScraper.c SETS (cpu.APU_panel_enable_match_ptw_sw, port_data, 15, 1); cpu 1389 src/dps8/panelScraper.c SETS (cpu.APU_panel_enable_match_sdw_sw, port_data, 16, 1); cpu 1390 src/dps8/panelScraper.c SETS (cpu.APU_panel_scroll_select_ul_sw, port_data, 17, 1); cpu 1391 src/dps8/panelScraper.c SETS (cpu.APU_panel_scroll_select_n_sw, port_data, 18, 4); cpu 1392 src/dps8/panelScraper.c SETS (cpu.APU_panel_scroll_wheel_sw, port_data, 22, 4); cpu 1396 src/dps8/panelScraper.c SETS (cpu.switches.data_switches, port_data, 0, 36); cpu 1400 src/dps8/panelScraper.c SETS (cpu.switches.addr_switches, port_data, 0, 18); cpu 1401 src/dps8/panelScraper.c SETS (cpu.APU_panel_enter_sw, port_data, 18, 1); cpu 1402 src/dps8/panelScraper.c SETS (cpu.APU_panel_display_sw, port_data, 19, 1); cpu 1403 src/dps8/panelScraper.c SETS (cpu.panelInitialize, port_data, 20, 1); cpu 1404 src/dps8/panelScraper.c SETS (cpu.CP_panel_wheel_sw, port_data, 21, 4); cpu 1408 src/dps8/panelScraper.c SETS (cpu.DATA_panel_ds_sw, port_data, 0, 4); cpu 1413 src/dps8/panelScraper.c switch (cpu.DATA_panel_ds_sw) cpu 1416 src/dps8/panelScraper.c SETS (cpu.DATA_panel_d1_sw, port_data, 4, 4); cpu 1419 src/dps8/panelScraper.c SETS (cpu.DATA_panel_d2_sw, port_data, 4, 4); cpu 1422 src/dps8/panelScraper.c SETS (cpu.DATA_panel_d3_sw, port_data, 4, 4); cpu 1425 src/dps8/panelScraper.c SETS (cpu.DATA_panel_wheel_sw, port_data, 4, 4); cpu 1428 src/dps8/panelScraper.c SETS (cpu.DATA_panel_d4_sw, port_data, 4, 4); cpu 1431 src/dps8/panelScraper.c SETS (cpu.DATA_panel_d5_sw, port_data, 4, 4); cpu 1434 src/dps8/panelScraper.c SETS (cpu.DATA_panel_d6_sw, port_data, 4, 4); cpu 1437 src/dps8/panelScraper.c SETS (cpu.DATA_panel_d7_sw, port_data, 4, 4); cpu 1440 src/dps8/panelScraper.c SETS (cpu.DATA_panel_addr_stop_sw, port_data, 8, 4); cpu 1441 src/dps8/panelScraper.c SETS (cpu.DATA_panel_enable_sw, port_data, 12, 1); cpu 1442 src/dps8/panelScraper.c SETS (cpu.DATA_panel_validate_sw, port_data, 13, 1); cpu 1443 src/dps8/panelScraper.c SETS (cpu.DATA_panel_auto_fast_sw, port_data, 14, 1); cpu 1444 src/dps8/panelScraper.c SETS (cpu.DATA_panel_auto_slow_sw, port_data, 15, 1); cpu 1445 src/dps8/panelScraper.c SETS (cpu.DATA_panel_cycle_sw, port_data, 16, 3); cpu 1446 src/dps8/panelScraper.c SETS (cpu.DATA_panel_step_sw, port_data, 19, 1); cpu 1447 src/dps8/panelScraper.c SETS (cpu.DATA_panel_s_trig_sw, port_data, 20, 1); cpu 1448 src/dps8/panelScraper.c SETS (cpu.DATA_panel_execute_sw, port_data, 21, 1); cpu 1449 src/dps8/panelScraper.c SETS (cpu.DATA_panel_scope_sw, port_data, 22, 1); cpu 1450 src/dps8/panelScraper.c SETS (cpu.DATA_panel_init_sw, port_data, 23, 1); cpu 1451 src/dps8/panelScraper.c SETS (cpu.DATA_panel_exec_sw, port_data, 24, 1); cpu 1452 src/dps8/panelScraper.c SETS (cpu.DATA_panel_hr_sel_sw, port_data, 25, 4); cpu 1453 src/dps8/panelScraper.c SETS (cpu.DATA_panel_trackers_sw, port_data, 29, 4); cpu 563 src/dps8/threadz.c (long) rc, (long) usec, (unsigned long) cpu.rTR, cpu 23 src/dps8/ucache.c (void)memset (cpu.uCache.caches, 0, sizeof (cpu.uCache.caches)); cpu 33 src/dps8/ucache.c ep = & cpu.uCache.caches[ucNum][segno]; cpu 53 src/dps8/ucache.c cpu.uCache.segnoSkips ++; cpu 58 src/dps8/ucache.c ep = & cpu.uCache.caches[ucNum][segno]; cpu 70 src/dps8/ucache.c if (cpu.tweaks.enable_wam && (! cpu.cu.SD_ON || (ep->paged && ! cpu.cu.PT_ON))) cpu 121 src/dps8/ucache.c cpu.uCache.hits[ucNum] ++; cpu 126 src/dps8/ucache.c cpu.uCache.misses[ucNum] ++;