paged 77 src/dps8/doAppendCycleIndirectWordFetch.h bool paged = false; paged 97 src/dps8/doAppendCycleIndirectWordFetch.h if (! ucCacheCheck (this, cpu.TPR.TSR, cpu.TPR.CA, & bound, & p, & pageAddress, & RSDWH_R1, & paged)) paged 100 src/dps8/doAppendCycleIndirectWordFetch.h if (paged) { paged 343 src/dps8/doAppendCycleIndirectWordFetch.h paged = false; paged 373 src/dps8/doAppendCycleIndirectWordFetch.h paged = true; paged 399 src/dps8/doAppendCycleIndirectWordFetch.h ucCacheSave (this, cpu.TPR.TSR, cpu.TPR.CA, bound, p, pageAddress, RSDWH_R1, paged); paged 88 src/dps8/doAppendCycleInstructionFetch.h bool paged = false; paged 151 src/dps8/doAppendCycleInstructionFetch.h if (! ucCacheCheck (this, cpu.TPR.TSR, cpu.TPR.CA, & bound, & p, & pageAddress, & RSDWH_R1, & paged)) paged 155 src/dps8/doAppendCycleInstructionFetch.h if (paged) { paged 474 src/dps8/doAppendCycleInstructionFetch.h paged = false; paged 504 src/dps8/doAppendCycleInstructionFetch.h paged = true; paged 543 src/dps8/doAppendCycleInstructionFetch.h if (cachedPaged != paged) { paged 544 src/dps8/doAppendCycleInstructionFetch.h sim_printf ("cachedPaged %01o != paged %01o\r\n", cachedPaged, paged); paged 567 src/dps8/doAppendCycleInstructionFetch.h if (cachedPaged != paged) sim_printf ("cachedPaged %01o != paged %01o\r\n", cachedPaged, paged); paged 576 src/dps8/doAppendCycleInstructionFetch.h ucCacheSave (this, cpu.TPR.TSR, cpu.TPR.CA, bound, p, pageAddress, RSDWH_R1, paged); paged 87 src/dps8/doAppendCycleOperandRead.h bool paged; paged 143 src/dps8/doAppendCycleOperandRead.h if (! ucCacheCheck (this, cpu.TPR.TSR, cpu.TPR.CA, & bound, & p, & pageAddress, & RSDWH_R1, & paged)) { paged 151 src/dps8/doAppendCycleOperandRead.h if (paged) { paged 577 src/dps8/doAppendCycleOperandRead.h paged = false; paged 608 src/dps8/doAppendCycleOperandRead.h paged = true; paged 652 src/dps8/doAppendCycleOperandRead.h if (cachedPaged != paged) { paged 653 src/dps8/doAppendCycleOperandRead.h sim_printf ("cachedPaged %01o != paged %01o\r\n", cachedPaged, paged); paged 675 src/dps8/doAppendCycleOperandRead.h ucCacheSave (this, cpu.TPR.TSR, cpu.TPR.CA, bound, p, pageAddress, RSDWH_R1, paged); paged 678 src/dps8/doAppendCycleOperandRead.h hdbgNote ("doAppendCycleOperandRead.h", "cache %d %u %05o:%06o %05o %o %08o %o %o", evcnt, this, cpu.TPR.TSR, cpu.TPR.CA, bound, p, pageAddress, RSDWH_R1, paged); paged 29 src/dps8/ucache.c void ucCacheSave (uint ucNum, word15 segno, word18 offset, word14 bound, word1 p, word24 address, word3 r1, bool paged) { paged 42 src/dps8/ucache.c ep->paged = paged; paged 44 src/dps8/ucache.c hdbgNote ("ucache", "save %u %05o:%06o %05o %o %08o %o %o", ucNum, segno, offset, bound, p, address, r1, paged); paged 48 src/dps8/ucache.c bool ucCacheCheck (uint ucNum, word15 segno, word18 offset, word14 * bound, word1 * p, word24 * address, word3 * r1, bool * paged) { paged 74 src/dps8/ucache.c if (ep->paged && ((ep->offset & PG18MASK) != (offset & PG18MASK))) { paged 89 src/dps8/ucache.c hdbgNote ("ucache", "hit %u %05o:%06o %05o %o %08o %o %o", ucNum, segno, offset, ep->bound, ep->p, ep->address, ep->r1, ep->paged); paged 93 src/dps8/ucache.c paged 110 src/dps8/ucache.c * paged = ep->paged; paged 38 src/dps8/ucache.h bool paged; paged 64 src/dps8/ucache.h void ucCacheSave (uint ucNum, word15 segno, word18 offset, word14 bound, word1 p, word24 address, word3 r1, bool paged); paged 65 src/dps8/ucache.h bool ucCacheCheck (uint ucNum, word15 segno, word18 offset, word14 * bound, word1 * p, word24 * address, word3 * r1, bool * paged);