cpus 409 src/dps8/dps8_cable.c cpus[cpu_unit_idx].scu_port[scu_unit_idx] = scu_port_num; cpus 175 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.FLT_BASE); cpus 177 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.cpu_num); cpus 179 src/dps8/dps8_cpu.c (unsigned long long)cpus[cpu_unit_idx].switches.data_switches); cpus 181 src/dps8/dps8_cpu.c PBI_64((unsigned long long)cpus[cpu_unit_idx].switches.data_switches)); cpus 185 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.addr_switches); cpus 187 src/dps8/dps8_cpu.c PBI_32(cpus[cpu_unit_idx].switches.addr_switches)); cpus 190 src/dps8/dps8_cpu.c for (int i = 0; i < (cpus[cpu_unit_idx].tweaks.l68_mode ? N_L68_CPU_PORTS : N_DPS8M_CPU_PORTS); i ++) cpus 193 src/dps8/dps8_cpu.c 'A' + i, cpus[cpu_unit_idx].switches.enable [i]); cpus 195 src/dps8/dps8_cpu.c 'A' + i, cpus[cpu_unit_idx].switches.init_enable [i]); cpus 197 src/dps8/dps8_cpu.c 'A' + i, cpus[cpu_unit_idx].switches.assignment [i]); cpus 199 src/dps8/dps8_cpu.c 'A' + i, cpus[cpu_unit_idx].switches.interlace [i]); cpus 201 src/dps8/dps8_cpu.c 'A' + i, cpus[cpu_unit_idx].switches.store_size [i]); cpus 204 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.procMode == procModeMultics ? "Multics" : cpus[cpu_unit_idx].switches.procMode == procModeGCOS ? "GCOS" : "???", cpus 205 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.procMode); cpus 207 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable_cache ? "Enabled" : "Disabled"); cpus 209 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.sdwam_enable ? "Enabled" : "Disabled"); cpus 211 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.ptwam_enable ? "Enabled" : "Disabled"); cpus 214 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].options.proc_speed); cpus 216 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].tweaks.dis_enable); cpus 220 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].tweaks.halt_on_unimp); cpus 222 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].tweaks.enable_wam); cpus 224 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].tweaks.report_faults); cpus 226 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].tweaks.tro_enable); cpus 230 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].tweaks.drl_fatal); cpus 232 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].tweaks.useMap); cpus 234 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].options.prom_installed); cpus 236 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].options.hex_mode_installed); cpus 238 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].options.cache_installed); cpus 240 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].options.clock_slave_installed); cpus 242 src/dps8/dps8_cpu.c if (cpus[cpu_unit_idx].set_affinity) cpus 243 src/dps8/dps8_cpu.c sim_msg ("CPU affinity: %d\n", cpus[cpu_unit_idx].affinity); cpus 247 src/dps8/dps8_cpu.c sim_msg ("ISOLTS mode: %01o(8)\n", cpus[cpu_unit_idx].tweaks.isolts_mode); cpus 248 src/dps8/dps8_cpu.c sim_msg ("NODIS mode: %01o(8)\n", cpus[cpu_unit_idx].tweaks.nodis); cpus 249 src/dps8/dps8_cpu.c sim_msg ("6180 mode: %01o(8) [%s]\n", cpus[cpu_unit_idx].tweaks.l68_mode, cpus[cpu_unit_idx].tweaks.l68_mode ? "6180" : "DPS8/M"); cpus 503 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.FLT_BASE = (uint) v; cpus 505 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.cpu_num = (uint) v; cpus 507 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.data_switches = (word36) v; cpus 521 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.data_switches = d; cpus 524 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.addr_switches = (word18) v; cpus 526 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.procMode = v ? procModeMultics : procModeGCOS; cpus 528 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].options.proc_speed = (uint) v; cpus 530 src/dps8/dps8_cpu.c if ((! cpus[cpu_unit_idx].tweaks.l68_mode) && (int) v > 4) { cpus 537 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [port_num] = (uint) v; cpus 539 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [port_num] = (uint) v; cpus 541 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [port_num] = (uint) v; cpus 543 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [port_num] = (uint) v; cpus 546 src/dps8/dps8_cpu.c if (cpus[cpu_unit_idx].tweaks.l68_mode) { cpus 570 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [port_num] = (uint) v; cpus 573 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable_cache = (uint) v ? true : false; cpus 575 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.sdwam_enable = (uint) v ? true : false; cpus 577 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.ptwam_enable = (uint) v ? true : false; cpus 579 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].tweaks.dis_enable = (uint) v; cpus 583 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].tweaks.halt_on_unimp = (uint) v; cpus 585 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].tweaks.enable_wam = (uint) v; cpus 587 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].tweaks.report_faults = (uint) v; cpus 589 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].tweaks.tro_enable = (uint) v; cpus 593 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].tweaks.drl_fatal = (uint) v; cpus 595 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].tweaks.useMap = v; cpus 597 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].options.prom_installed = v; cpus 599 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].options.hex_mode_installed = v; cpus 601 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].options.cache_installed = v; cpus 603 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].options.clock_slave_installed = v; cpus 605 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].tweaks.enable_emcall = v; cpus 610 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].set_affinity = false; cpus 614 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].set_affinity = true; cpus 615 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].affinity = (uint) v; cpus 620 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].tweaks.isolts_mode = v; cpus 624 src/dps8/dps8_cpu.c if (cpus[cpu_unit_idx].tweaks.l68_mode) // L68 cpus 628 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].isolts_switches_save = cpus[cpu_unit_idx].switches; cpus 629 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].isolts_switches_saved = true; cpus 631 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.data_switches = 00000030714000; cpus 632 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.addr_switches = 0100150; cpus 633 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].tweaks.useMap = true; cpus 634 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].tweaks.enable_wam = true; cpus 635 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [0] = 0; cpus 636 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [0] = false; cpus 637 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [0] = false; cpus 638 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [0] = false; cpus 639 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [0] = store_sz; cpus 641 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [1] = 0; cpus 642 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [1] = false; cpus 643 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [1] = true; cpus 644 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [1] = false; cpus 645 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [1] = store_sz; cpus 647 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [2] = 0; cpus 648 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [2] = false; cpus 649 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [2] = false; cpus 650 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [2] = false; cpus 651 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [2] = store_sz; cpus 653 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [3] = 0; cpus 654 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [3] = false; cpus 655 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [3] = false; cpus 656 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [3] = false; cpus 657 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [3] = store_sz; cpus 659 src/dps8/dps8_cpu.c if (cpus[cpu_unit_idx].tweaks.l68_mode) { // L68 cpus 660 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [4] = 0; cpus 661 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [4] = false; cpus 662 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [4] = false; cpus 663 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [4] = false; cpus 664 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [4] = 3; cpus 666 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [5] = 0; cpus 667 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [5] = false; cpus 668 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [5] = false; cpus 669 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [5] = false; cpus 670 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [5] = 3; cpus 672 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [6] = 0; cpus 673 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [6] = false; cpus 674 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [6] = false; cpus 675 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [6] = false; cpus 676 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [6] = 3; cpus 678 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [7] = 0; cpus 679 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [7] = false; cpus 680 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [7] = false; cpus 681 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [7] = false; cpus 682 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [7] = 3; cpus 686 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [1] = true; cpus 690 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches = cpus[cpu_unit_idx].isolts_switches_save; cpus 691 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].isolts_switches_saved = false; cpus 698 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].tweaks.nodis = v; cpus 700 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].tweaks.l68_mode= v; cpus 831 src/dps8/dps8_cpu.c cpu_state_t * cpun = cpus + cpuUnitIdx; cpus 856 src/dps8/dps8_cpu.c cpu_state_t * cpun = cpus + cpuUnitIdx; cpus 924 src/dps8/dps8_cpu.c cpup = & cpus [current_running_cpu_idx]; cpus 1003 src/dps8/dps8_cpu.c cpu_state_t * cpun = cpus + cpu_unit_idx; cpus 1425 src/dps8/dps8_cpu.c cpus[cpun].switches.serno = sn; cpus 1429 src/dps8/dps8_cpu.c sim_name, cpun, cpus[cpun].switches.serno); cpus 1478 src/dps8/dps8_cpu.c sim_msg (" %9lld\r\n", (long long int) cpus[i].instrCnt); cpus 1480 src/dps8/dps8_cpu.c sim_msg (" %'9lld\r\n", (long long int) cpus[i].instrCnt); cpus 1482 src/dps8/dps8_cpu.c cpus[i].instrCnt = 0; cpus 1558 src/dps8/dps8_cpu.c cpus = system_state->cpus; cpus 1567 src/dps8/dps8_cpu.c memset (cpus, 0, sizeof (cpu_state_t) * N_CPU_UNITS_MAX); cpus 1568 src/dps8/dps8_cpu.c cpus [0].switches.FLT_BASE = 2; // Some of the UnitTests assume this cpus 1659 src/dps8/dps8_cpu.c { ORDATA (IC, cpus[0].PPR.IC, VASIZE), 0, 0, 0 }, cpus 1719 src/dps8/dps8_cpu.c cpu_state_t * cpus = NULL; cpus 1721 src/dps8/dps8_cpu.c cpu_state_t cpus [N_CPU_UNITS_MAX]; cpus 2194 src/dps8/dps8_cpu.c cpus [0].PPR.IC = dummy_IC; cpus 3244 src/dps8/dps8_cpu.c lockYieldAll = lockYieldAll + (unsigned long long)cpus[n].lockYield; cpus 3246 src/dps8/dps8_cpu.c lockWaitMaxAll = lockWaitMaxAll + (unsigned long long)cpus[n].lockWaitMax; cpus 3247 src/dps8/dps8_cpu.c lockWaitAll = lockWaitAll + (unsigned long long)cpus[n].lockWait; cpus 3248 src/dps8/dps8_cpu.c lockImmediateAll = lockImmediateAll + (unsigned long long)cpus[n].lockImmediate; cpus 3249 src/dps8/dps8_cpu.c lockCntAll = lockCntAll + (unsigned long long)cpus[n].lockCnt; cpus 3250 src/dps8/dps8_cpu.c instrCntAll = instrCntAll + (unsigned long long)cpus[n].instrCnt; cpus 3251 src/dps8/dps8_cpu.c cycleCntAll = cycleCntAll + (unsigned long long)cpus[n].cycleCnt; cpus 4651 src/dps8/dps8_cpu.c putbits36_1 (& rsw2, 20, cpus[cpuNo].options.cache_installed ? 1 : 0); cpus 4661 src/dps8/dps8_cpu.c putbits36_4 (& rsw2, 29, cpus[cpuNo].options.proc_speed & 017LL); cpus 4663 src/dps8/dps8_cpu.c putbits36_3 (& rsw2, 33, cpus[cpuNo].switches.cpu_num & 07LL); cpus 4666 src/dps8/dps8_cpu.c if (cpus[cpuNo].options.hex_mode_installed) cpus 4668 src/dps8/dps8_cpu.c if (cpus[cpuNo].options.clock_slave_installed) cpus 4673 src/dps8/dps8_cpu.c sprintf (serial, "%-11u", cpus[cpuNo].switches.serno); cpus 4922 src/dps8/dps8_cpu.c if (! cpus[cpuNo].cycleCnt) cpus 4936 src/dps8/dps8_cpu.c sim_msg ("\r| cycles %15llu |\r\n", (unsigned long long)cpus[cpuNo].cycleCnt); cpus 4937 src/dps8/dps8_cpu.c sim_msg ("\r| instructions %15llu |\r\n", (unsigned long long)cpus[cpuNo].instrCnt); cpus 4941 src/dps8/dps8_cpu.c sim_msg ("\r| lockCnt %15llu |\r\n", (unsigned long long)cpus[cpuNo].lockCnt); cpus 4942 src/dps8/dps8_cpu.c sim_msg ("\r| lockImmediate %15llu |\r\n", (unsigned long long)cpus[cpuNo].lockImmediate); cpus 4946 src/dps8/dps8_cpu.c sim_msg ("\r| lockWait %15llu |\r\n", (unsigned long long)cpus[cpuNo].lockWait); cpus 4947 src/dps8/dps8_cpu.c sim_msg ("\r| lockWaitMax %15llu |\r\n", (unsigned long long)cpus[cpuNo].lockWaitMax); cpus 4951 src/dps8/dps8_cpu.c sim_msg ("\r| lockYield %15llu |\r\n", (unsigned long long)cpus[cpuNo].lockYield); cpus 4970 src/dps8/dps8_cpu.c sim_msg ("\r| cycles %'15llu |\r\n", (unsigned long long)cpus[cpuNo].cycleCnt); cpus 4971 src/dps8/dps8_cpu.c sim_msg ("\r| instructions %'15llu |\r\n", (unsigned long long)cpus[cpuNo].instrCnt); cpus 4975 src/dps8/dps8_cpu.c sim_msg ("\r| lockCnt %'15llu |\r\n", (unsigned long long)cpus[cpuNo].lockCnt); cpus 4976 src/dps8/dps8_cpu.c sim_msg ("\r| lockImmediate %'15llu |\r\n", (unsigned long long)cpus[cpuNo].lockImmediate); cpus 4980 src/dps8/dps8_cpu.c sim_msg ("\r| lockWait %'15llu |\r\n", (unsigned long long)cpus[cpuNo].lockWait); cpus 4981 src/dps8/dps8_cpu.c sim_msg ("\r| lockWaitMax %'15llu |\r\n", (unsigned long long)cpus[cpuNo].lockWaitMax); cpus 4985 src/dps8/dps8_cpu.c sim_msg ("\r| lockYield %'15llu |\r\n", (unsigned long long)cpus[cpuNo].lockYield); cpus 5011 src/dps8/dps8_cpu.c cpus 5012 src/dps8/dps8_cpu.c cpus 1920 src/dps8/dps8_cpu.h extern cpu_state_t * cpus; cpus 1922 src/dps8/dps8_cpu.h extern cpu_state_t cpus [N_CPU_UNITS_MAX]; cpus 899 src/dps8/dps8_faults.c cpus[cpuNo].g7FaultsPreset |= (1u << faultNo); cpus 901 src/dps8/dps8_faults.c cpus[cpuNo].g7SubFaults [faultNo] = subFault; cpus 1341 src/dps8/dps8_scu.c cpus[cpun].events.XIP[scu_unit_idx] = false; cpus 1397 src/dps8/dps8_scu.c cpus[cpu_unit_udx].events.XIP[scu_unit_idx] = true; cpus 1411 src/dps8/dps8_scu.c cpus[cpu_unit_udx].isRunning = true; cpus 1413 src/dps8/dps8_scu.c cpus[cpu_unit_udx].events.XIP[scu_unit_idx] = true; cpus 1464 src/dps8/dps8_scu.c cpus[cpu_unit_udx].events.XIP[scu_unit_idx] = true; cpus 1478 src/dps8/dps8_scu.c cpus[cpu_unit_udx].isRunning = true; cpus 1480 src/dps8/dps8_scu.c cpus[cpu_unit_udx].events.XIP[scu_unit_idx] = true; cpus 2407 src/dps8/dps8_scu.c cpus[current_running_cpu_idx].scu_port[scu_unit_idx] != port) cpus 89 src/dps8/dps8_state.h cpu_state_t cpus [N_CPU_UNITS_MAX]; cpus 4112 src/dps8/dps8_sys.c { "cpus[]", SYM_STATE_OFFSET, SYM_ARRAY, offsetof (struct system_state_s, cpus) }, cpus 464 src/dps8/segldr.c cpus[0].tweaks.enable_emcall = 1; cpus 536 src/dps8/threadz.c if (cpus[cpuNum].set_affinity) cpus 540 src/dps8/threadz.c CPU_SET (cpus[cpuNum].affinity, & cpuset); cpus 544 src/dps8/threadz.c cpus[cpuNum].affinity, cpuNum, s); cpus 131 src/dps8/ucache.c # define stats(n) args ( (long long unsigned)cpus[cpuNo].uCache.hits [n], \ cpus 132 src/dps8/ucache.c (long long unsigned)cpus[cpuNo].uCache.misses[n], \ cpus 133 src/dps8/ucache.c (long long unsigned)cpus[cpuNo].uCache.skips [n] ) cpus 152 src/dps8/ucache.c sim_msg ("\r| RALR %15llu |\r\n", (long long unsigned)cpus[cpuNo].uCache.ralrSkips); cpus 153 src/dps8/ucache.c sim_msg ("\r| CALL6 %15llu |\r\n", (long long unsigned)cpus[cpuNo].uCache.call6Skips); cpus 154 src/dps8/ucache.c sim_msg ("\r| Segno %15llu |\r\n", (long long unsigned)cpus[cpuNo].uCache.segnoSkips); cpus 173 src/dps8/ucache.c sim_msg ("\r| RALR %'15llu |\r\n", (long long unsigned)cpus[cpuNo].uCache.ralrSkips); cpus 174 src/dps8/ucache.c sim_msg ("\r| CALL6 %'15llu |\r\n", (long long unsigned)cpus[cpuNo].uCache.call6Skips); cpus 175 src/dps8/ucache.c sim_msg ("\r| Segno %'15llu |\r\n", (long long unsigned)cpus[cpuNo].uCache.segnoSkips);