PPR 87 src/dps8/dps8_addrmods.c return cpu.PPR.IC; PPR 1157 src/dps8/dps8_append.c cpu.PPR.PRR, cpu.PPR.PSR); PPR 1397 src/dps8/dps8_append.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 1400 src/dps8/dps8_append.c if (cpu.PPR.PSR != cpu.TPR.TSR) PPR 1430 src/dps8/dps8_append.c if (cpu.TPR.TSR == cpu.PPR.PSR) PPR 1431 src/dps8/dps8_append.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 1447 src/dps8/dps8_append.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 1497 src/dps8/dps8_append.c if (cpu.TPR.TRR > cpu.PPR.PRR) PPR 1499 src/dps8/dps8_append.c cpu.TPR.TRR, cpu.PPR.PRR); PPR 1501 src/dps8/dps8_append.c if (cpu.TPR.TRR < cpu.PPR.PRR) PPR 1522 src/dps8/dps8_append.c if (! (cpu.PPR.PRR < cpu.rRALR)) PPR 1526 src/dps8/dps8_append.c cpu.PPR.PRR, cpu.rRALR); PPR 1550 src/dps8/dps8_append.c cpu.SDW->E, cpu.SDW->G, cpu.PPR.PSR, cpu.TPR.TSR, cpu.TPR.CA, PPR 1552 src/dps8/dps8_append.c cpu.TPR.TRR, cpu.PPR.PRR); PPR 1570 src/dps8/dps8_append.c if (cpu.PPR.PSR == cpu.TPR.TSR && ! TST_I_ABS) PPR 1612 src/dps8/dps8_append.c if (cpu.TPR.TRR > cpu.PPR.PRR) PPR 1615 src/dps8/dps8_append.c if (cpu.PPR.PRR < cpu.SDW->R2) PPR 1678 src/dps8/dps8_append.c if (cpu.PPR.PRR != cpu.TPR.TRR) PPR 1985 src/dps8/dps8_append.c cpu.PPR.PRR = cpu.TPR.TRR = max3 (y, cpu.TPR.TRR, cpu.RSDWH_R1); PPR 2014 src/dps8/dps8_append.c cpu.PR[n].RNR = cpu.PPR.PRR; PPR 2018 src/dps8/dps8_append.c cpu.PR[n].SNR = cpu.PPR.PSR; PPR 2019 src/dps8/dps8_append.c cpu.PR[n].WORDNO = (cpu.PPR.IC + 1) & MASK18; PPR 2066 src/dps8/dps8_append.c cpu.PPR.PSR = cpu.TPR.TSR; PPR 2068 src/dps8/dps8_append.c cpu.PPR.IC = cpu.TPR.CA; PPR 2079 src/dps8/dps8_append.c cpu.PPR.P = cpu.SDW->P; PPR 2084 src/dps8/dps8_append.c cpu.PPR.P = 0; PPR 2093 src/dps8/dps8_append.c if (cpu.TPR.TRR == cpu.PPR.PRR) PPR 2118 src/dps8/dps8_append.c cpu.PPR.PRR = cpu.TPR.TRR; PPR 2120 src/dps8/dps8_append.c cpu.PPR.PSR = cpu.TPR.TSR; PPR 2122 src/dps8/dps8_append.c cpu.PPR.IC = cpu.TPR.CA; PPR 2168 src/dps8/dps8_append.c cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PPR 900 src/dps8/dps8_cpu.c cpu.PPR.IC = 0; PPR 901 src/dps8/dps8_cpu.c cpu.PPR.PRR = 0; PPR 902 src/dps8/dps8_cpu.c cpu.PPR.PSR = 0; PPR 903 src/dps8/dps8_cpu.c cpu.PPR.P = 1; PPR 945 src/dps8/dps8_cpu.c memset (& cpu.PPR, 0, sizeof (struct ppr_s)); PPR 1606 src/dps8/dps8_cpu.c { ORDATA (IC, cpus[0].PPR.IC, VASIZE), 0, 0, 0 }, PPR 1740 src/dps8/dps8_cpu.c sim_brk_test ((cpu.PPR.IC & 0777777) | PPR 1741 src/dps8/dps8_cpu.c ((((t_addr) cpu.PPR.PSR) & 037777) << 18), PPR 2101 src/dps8/dps8_cpu.c cpus [0].PPR.IC = dummy_IC; PPR 2313 src/dps8/dps8_cpu.c cpu.PPR.PRR = 0; PPR 2416 src/dps8/dps8_cpu.c get_BAR_address (cpu.PPR.IC); PPR 2439 src/dps8/dps8_cpu.c (cpu.PPR.IC & 1) == 0 && PPR 2456 src/dps8/dps8_cpu.c if ((cpu.PPR.IC & 1) == 1) PPR 2590 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 2591 src/dps8/dps8_cpu.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 2605 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 2606 src/dps8/dps8_cpu.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 2609 src/dps8/dps8_cpu.c fetchInstruction (cpu.PPR.IC); PPR 2627 src/dps8/dps8_cpu.c if (stall_points[i].segno && stall_points[i].segno == cpu.PPR.PSR && PPR 2628 src/dps8/dps8_cpu.c stall_points[i].offset && stall_points[i].offset == cpu.PPR.IC) PPR 2673 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 2674 src/dps8/dps8_cpu.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 2905 src/dps8/dps8_cpu.c (cpu.cu.rd && (cpu.PPR.IC & 1)) || PPR 2910 src/dps8/dps8_cpu.c -- cpu.PPR.IC; PPR 2931 src/dps8/dps8_cpu.c cpu.PPR.IC += ci->info->ndes; PPR 2932 src/dps8/dps8_cpu.c cpu.PPR.IC ++; PPR 2966 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 2967 src/dps8/dps8_cpu.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 2978 src/dps8/dps8_cpu.c cpu.PPR.IC ++; PPR 2980 src/dps8/dps8_cpu.c cpu.PPR.IC += ci->info->ndes; PPR 3003 src/dps8/dps8_cpu.c if ((cpu.PPR.IC & 1) == 0 && PPR 3007 src/dps8/dps8_cpu.c (cpu.PPR.IC & ~3u) != (cpu.last_write & ~3u)) PPR 3009 src/dps8/dps8_cpu.c cpu.PPR.IC ++; PPR 3016 src/dps8/dps8_cpu.c cpu.PPR.IC ++; PPR 3018 src/dps8/dps8_cpu.c cpu.PPR.IC += ci->info->ndes; PPR 3033 src/dps8/dps8_cpu.c cpu.PPR.IC += ci->info->ndes; PPR 3034 src/dps8/dps8_cpu.c cpu.PPR.IC ++; PPR 3093 src/dps8/dps8_cpu.c cpu.PPR.PRR = 0; PPR 3192 src/dps8/dps8_cpu.c dummy_IC = cpu.PPR.IC; PPR 3396 src/dps8/dps8_cpu.c addr, cpu.PPR.PSR, cpu.PPR.IC, ctx); PPR 3403 src/dps8/dps8_cpu.c (long long unsigned int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, addr, PPR 3437 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); PPR 3480 src/dps8/dps8_cpu.c (long long unsigned int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PPR 3504 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); PPR 3520 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); PPR 3562 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PPR 3600 src/dps8/dps8_cpu.c addr, cpu.PPR.PSR, cpu.PPR.IC, ctx); PPR 3607 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PPR 3618 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); PPR 3637 src/dps8/dps8_cpu.c addr, cpu.PPR.PSR, cpu.PPR.IC, ctx); PPR 3644 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PPR 3655 src/dps8/dps8_cpu.c cpu.PPR.PSR, cpu.PPR.IC); PPR 3696 src/dps8/dps8_cpu.c (unsigned long long int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PPR 3719 src/dps8/dps8_cpu.c (long long unsigned int)cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, PPR 3811 src/dps8/dps8_cpu.c else if (cpu.PPR.P) PPR 3876 src/dps8/dps8_cpu.c cpu.PPR.P = 1; PPR 4234 src/dps8/dps8_cpu.c putbits36_18 (& w1, 54 - 36, cpu.PPR.IC); PPR 1037 src/dps8/dps8_cpu.h #define USE_IRODD (cpu.cu.rd && ((cpu. PPR.IC & 1) != 0)) PPR 1656 src/dps8/dps8_cpu.h struct ppr_s PPR; // Procedure Pointer Register PPR 353 src/dps8/dps8_eis.c return cpu.PPR.IC; PPR 450 src/dps8/dps8_eis.c return cpu.PPR.IC; PPR 525 src/dps8/dps8_eis.c return cpu.PPR.IC; PPR 595 src/dps8/dps8_eis.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 596 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 665 src/dps8/dps8_eis.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 666 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 833 src/dps8/dps8_eis.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 834 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 895 src/dps8/dps8_eis.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 896 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 1278 src/dps8/dps8_eis.c cpu.PPR.PRR); PPR 1426 src/dps8/dps8_eis.c e -> addr [k - 1].RNR = max3 (cpu.PR [n].RNR, cpu.TPR.TRR, cpu.PPR.PRR); PPR 1631 src/dps8/dps8_eis.c e -> addr [k - 1].RNR = max3 (cpu.PR [n].RNR, cpu.TPR.TRR, cpu.PPR.PRR); PPR 1683 src/dps8/dps8_eis.c e->addr[k-1].RNR = max3(cpu.PR[n].RNR, cpu.TPR.TRR, cpu.PPR.PRR); PPR 1865 src/dps8/dps8_eis.c e->addr[k-1].RNR = max3(cpu.PR[n].RNR, cpu.TPR.TRR, cpu.PPR.PRR); PPR 381 src/dps8/dps8_faults.c sim_printf (" TRO PSR:IC %05o:%06o\r\n", cpu.PPR.PSR, cpu.PPR.IC); PPR 386 src/dps8/dps8_faults.c sim_printf (" ACV %012llo PSR:IC %05o:%06o\r\n", subFault.bits, cpu.PPR.PSR, cpu.PPR.IC); PPR 417 src/dps8/dps8_faults.c fault_psr = cpu . PPR.PSR; PPR 418 src/dps8/dps8_faults.c fault_ic = cpu . PPR.IC; PPR 691 src/dps8/dps8_faults.c cpu . PPR.IC); PPR 834 src/dps8/dps8_faults.c cpu.PPR.IC); PPR 119 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 120 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 137 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) PPR 224 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 225 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 341 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 342 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 365 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) PPR 466 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 467 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 491 src/dps8/dps8_iefp.c if (cpu.PPR.PSR != 061 && cpu.PPR.IC != 0307) PPR 579 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 580 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 664 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 665 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 745 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 746 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 841 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 842 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 973 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 974 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 272 src/dps8/dps8_ins.c cpu.PR[n].RNR = cpu.PPR.PRR; PPR 276 src/dps8/dps8_ins.c cpu.PR[n].SNR = cpu.PPR.PSR; PPR 277 src/dps8/dps8_ins.c cpu.PR[n].WORDNO = (cpu.PPR.IC + 1) & MASK18; PPR 283 src/dps8/dps8_ins.c cpu.PPR.IC = cpu.TPR.CA; PPR 288 src/dps8/dps8_ins.c __func__, cpu.PPR.PSR, cpu.PPR.IC); PPR 289 src/dps8/dps8_ins.c if (cpu.PPR.IC & 1) PPR 322 src/dps8/dps8_ins.c putbits36_3 (& words[0], 0, cpu.PPR.PRR); PPR 323 src/dps8/dps8_ins.c putbits36_15 (& words[0], 3, cpu.PPR.PSR); PPR 324 src/dps8/dps8_ins.c putbits36_1 (& words[0], 18, cpu.PPR.P); PPR 399 src/dps8/dps8_ins.c putbits36_18 (& words[4], 0, cpu.PPR.IC); PPR 543 src/dps8/dps8_ins.c cpu.cu_data.PSR = cpu.PPR.PSR; PPR 544 src/dps8/dps8_ins.c cpu.cu_data.PRR = cpu.PPR.PRR; PPR 545 src/dps8/dps8_ins.c cpu.cu_data.IC = cpu.PPR.IC; PPR 576 src/dps8/dps8_ins.c cpu.PPR.PRR = getbits36_3 (words[0], 0); PPR 577 src/dps8/dps8_ins.c cpu.PPR.PSR = getbits36_15 (words[0], 3); PPR 578 src/dps8/dps8_ins.c cpu.PPR.P = getbits36_1 (words[0], 18); PPR 656 src/dps8/dps8_ins.c cpu.PPR.IC = getbits36_18 (words[4], 0); PPR 1098 src/dps8/dps8_ins.c if (cpu.cu.rd && ((cpu.PPR.IC & 1) != 0)) PPR 1130 src/dps8/dps8_ins.c if ((cpu.PPR.IC & 1) == 0) // Even PPR 1155 src/dps8/dps8_ins.c char * where = lookup_address (cpu.PPR.PSR, cpu.PPR.IC, & compname, PPR 1165 src/dps8/dps8_ins.c cpu.BAR.BASE, cpu.PPR.IC, where); PPR 1169 src/dps8/dps8_ins.c sim_debug (flag, &cpu_dev, "%06o %s\n", cpu.PPR.IC, where); PPR 1177 src/dps8/dps8_ins.c cpu.PPR.PSR, PPR 1178 src/dps8/dps8_ins.c cpu.BAR.BASE, cpu.PPR.IC, where); PPR 1183 src/dps8/dps8_ins.c cpu.PPR.PSR, cpu.PPR.IC, where); PPR 1197 src/dps8/dps8_ins.c cpu.PPR.IC, PPR 1214 src/dps8/dps8_ins.c cpu.PPR.IC, PPR 1234 src/dps8/dps8_ins.c cpu.PPR.PSR, PPR 1236 src/dps8/dps8_ins.c cpu.PPR.IC, PPR 1237 src/dps8/dps8_ins.c cpu.PPR.PRR, PPR 1253 src/dps8/dps8_ins.c cpu.PPR.PSR, PPR 1254 src/dps8/dps8_ins.c cpu.PPR.IC, PPR 1255 src/dps8/dps8_ins.c cpu.PPR.PRR, PPR 1306 src/dps8/dps8_ins.c trk (cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC, IWB_IRODD); PPR 1466 src/dps8/dps8_ins.c if (!cpu.cu.xde && cpu.cu.xdo /* odd instr being executed */ && !(cpu.PPR.IC & 1)) PPR 1472 src/dps8/dps8_ins.c if (opcode == 0560 && !opcodeX && cpu.cu.xde && !(cpu.PPR.IC & 1)) PPR 1662 src/dps8/dps8_ins.c if (n_dbgevents && (dbgevt = (dbgevent_lookup (cpu.PPR.PSR, cpu.PPR.IC))) >= 0) { PPR 1753 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "RPT/RPD first %d rpt %d rd %d e/o %d X0 %06o a %d b %d\n", cpu.cu.repeat_first, cpu.cu.rpt, cpu.cu.rd, cpu.PPR.IC & 1, cpu.rX[0], !! (cpu.rX[0] & 01000), !! (cpu.rX[0] & 0400)); PPR 1763 src/dps8/dps8_ins.c bool icOdd = !! (cpu.PPR.IC & 1); PPR 1824 src/dps8/dps8_ins.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 1825 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 1827 src/dps8/dps8_ins.c word18 saveIC = cpu.PPR.IC; PPR 1828 src/dps8/dps8_ins.c Read (cpu.PPR.IC + 1 + n, & cpu.currentEISinstruction.op[n], INSTRUCTION_FETCH); PPR 1829 src/dps8/dps8_ins.c cpu.PPR.IC = saveIC; PPR 1866 src/dps8/dps8_ins.c cpu.TPR.TRR = max (cpu.PAR[n].RNR, cpu.PPR.PRR); PPR 1868 src/dps8/dps8_ins.c cpu.TPR.TRR = max3 (cpu.PAR[n].RNR, cpu.TPR.TRR, cpu.PPR.PRR); PPR 1887 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 1978 src/dps8/dps8_ins.c cpu.TPR.TRR = cpu.PPR.PRR; PPR 1979 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PPR.PSR; PPR 1990 src/dps8/dps8_ins.c bool icOdd = !! (cpu.PPR.IC & 1); PPR 2211 src/dps8/dps8_ins.c sim_debug (DBG_REGDUMPPPR, &cpu_dev, "PRR:%o PSR:%05o P:%o IC:%06o\n", cpu.PPR.PRR, cpu.PPR.PSR, cpu.PPR.P, cpu.PPR.IC); PPR 2882 src/dps8/dps8_ins.c word18 ret = (cpu.PPR.IC + 1) & MASK18; PPR 3766 src/dps8/dps8_ins.c SETHI (cpu.CY, (cpu.PPR.IC + 1) & MASK18); PPR 3779 src/dps8/dps8_ins.c cpu.CY = ((word36) ((cpu.PPR.IC + 2) & MASK18)) << 18; PPR 3845 src/dps8/dps8_ins.c putbits36_15 (& cpu.Ypair[0], 3, cpu.PPR.PSR); PPR 3846 src/dps8/dps8_ins.c putbits36_3 (& cpu.Ypair[0], 18, cpu.PPR.PRR); PPR 3850 src/dps8/dps8_ins.c putbits36_18 (& cpu.Ypair[1], 0, cpu.PPR.IC + 2); PPR 6104 src/dps8/dps8_ins.c "call6 PRR %o PSR %o\n", cpu.PPR.PRR, cpu.PPR.PSR); PPR 6123 src/dps8/dps8_ins.c cpu.PPR.IC = GETHI (cpu.CY); PPR 6911 src/dps8/dps8_ins.c if ((cpu.PPR.IC & 1) == 0) PPR 7213 src/dps8/dps8_ins.c sim_printf (" ldt %d PSR:IC %05o:%06o\r\n", cpu.rTR, cpu.PPR.PSR, cpu.PPR.IC); PPR 7264 src/dps8/dps8_ins.c sim_printf (" RALR set to %o PSR:IC %05o:%06o\r\n", cpu.rRALR, cpu.PPR.PSR, cpu.PPR.IC); PPR 8328 src/dps8/dps8_ins.c " no events in queue\n", cpu.PPR.IC); PPR 8345 src/dps8/dps8_ins.c if (cpu.PPR.PSR == 0430 && cpu.PPR.IC == 012) PPR 8365 src/dps8/dps8_ins.c PPR 8375 src/dps8/dps8_ins.c if (cpu.PPR.PSR == 034 && cpu.PPR.IC == 03535) PPR 9406 src/dps8/dps8_ins.c sim_printf (" rcu to %05o:%06o PSR:IC %05o:%06o\r\n", (cpu.Yblock8[0]>>18)&MASK15, (cpu.Yblock8[4]>>18)&MASK18, cpu.PPR.PSR, cpu.PPR.IC); PPR 9424 src/dps8/dps8_ins.c word1 saveP = cpu.PPR.P; // ISOLTS-870 02m PPR 9429 src/dps8/dps8_ins.c cpu.PPR.P = saveP; PPR 3472 src/dps8/dps8_iom.c __func__, iomChar (iom_unit_idx), cpu.cycleCnt, cpu.PPR.PSR, cpu.PPR.IC); PPR 26 src/dps8/dps8_mp.h struct ppr_s PPR; PPR 32 src/dps8/dps8_simh.h ((dptr != & cpu_dev) || (((dptr)->dctrl & (DBG_INTR | DBG_FAULT))) || (! sim_deb_segno_on) || sim_deb_segno[cpu.PPR.PSR & (DEBUG_SEGNO_LIMIT - 1)]) && \ PPR 33 src/dps8/dps8_simh.h ((dptr != & cpu_dev) || sim_deb_ringno == NO_SUCH_RINGNO || sim_deb_ringno == cpu . PPR. PRR) && \ PPR 2742 src/dps8/dps8_sys.c word15 icSegno = cpu.PPR.PSR; PPR 2743 src/dps8/dps8_sys.c word18 icOffset = cpu.PPR.IC; PPR 4080 src/dps8/dps8_sys.c { "cpus[].PPR", SYM_STRUCT_OFFSET, SYM_PTR, offsetof (cpu_state_t, PPR) }, PPR 166 src/dps8/hdbg.c if (filter && hdbgSegNum >= 0 && hdbgSegNum != cpu.PPR.PSR) \ PPR 168 src/dps8/hdbg.c if (filter && hdbgSegNum > 0 && blacklist[cpu.PPR.IC]) \ PPR 189 src/dps8/hdbg.c hevents[p].trace.segno = cpu.PPR.PSR; PPR 190 src/dps8/hdbg.c hevents[p].trace.ic = cpu.PPR.IC; PPR 191 src/dps8/hdbg.c hevents[p].trace.ring = cpu.PPR.PRR;