cu                233 src/dps8/dps8_addrmods.c     cpu.cu.itp          = 1;
cu                234 src/dps8/dps8_addrmods.c     cpu.cu.TSN_PRNO[0]  = n;
cu                235 src/dps8/dps8_addrmods.c     cpu.cu.TSN_VALID[0] = 1;
cu                276 src/dps8/dps8_addrmods.c     cpu.cu.its = 1;
cu                317 src/dps8/dps8_addrmods.c     cpu.cu.XSF = 1;
cu                325 src/dps8/dps8_addrmods.c       wb = & cpu.cu.IRODD;
cu                327 src/dps8/dps8_addrmods.c       wb = & cpu.cu.IWB;
cu                382 src/dps8/dps8_addrmods.c                 __func__, cpu.cu.CT_HOLD);
cu                414 src/dps8/dps8_addrmods.c     if (cpu.cu.CT_HOLD)
cu                418 src/dps8/dps8_addrmods.c                    __func__, cpu.cu.CT_HOLD);
cu                421 src/dps8/dps8_addrmods.c            GET_TM(cpu.cu.CT_HOLD) == TM_IT && GET_TD (cpu.cu.CT_HOLD) == IT_DIC &&
cu                422 src/dps8/dps8_addrmods.c                 cpu.cu.pot == 1 && GET_ADDR (IWB_IRODD) == cpu.TPR.CA)
cu                429 src/dps8/dps8_addrmods.c            cpu.cu.pot = 1;
cu                435 src/dps8/dps8_addrmods.c         cpu.cu.its = 0;
cu                436 src/dps8/dps8_addrmods.c         cpu.cu.itp = 0;
cu                437 src/dps8/dps8_addrmods.c         cpu.cu.pot = 0;
cu                441 src/dps8/dps8_addrmods.c                __func__, cpu.rTAG, get_mod_string (buf, cpu.rTAG), Tm, Td, cpu.cu.CT_HOLD);
cu                485 src/dps8/dps8_addrmods.c         if (cpu.cu.rpt || cpu.cu.rd | cpu.cu.rl)
cu                532 src/dps8/dps8_addrmods.c             if (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl)
cu                561 src/dps8/dps8_addrmods.c         if (GET_TM(cpu.cu.CT_HOLD) == TM_IR)
cu                587 src/dps8/dps8_addrmods.c             if (!(cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl))
cu                622 src/dps8/dps8_addrmods.c         if (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl)
cu                634 src/dps8/dps8_addrmods.c                    "IR_MOD: CT_HOLD=%o %o\n", cpu.cu.CT_HOLD, Td);
cu                652 src/dps8/dps8_addrmods.c           cpu.cu.CT_HOLD = cpu.rTAG;
cu                673 src/dps8/dps8_addrmods.c                    "IR_MOD: CT_HOLD=%o\n", cpu.cu.CT_HOLD);
cu                689 src/dps8/dps8_addrmods.c                            Td, cpu.cu.CT_HOLD);
cu                728 src/dps8/dps8_addrmods.c                 word6 Td_hold = GET_TD (cpu.cu.CT_HOLD);
cu                950 src/dps8/dps8_addrmods.c                 cpu.cu.pot = 1;
cu                967 src/dps8/dps8_addrmods.c                 cpu.cu.pot = 0;
cu               1369 src/dps8/dps8_addrmods.c                 cpu.cu.pot = 0;
cu               1423 src/dps8/dps8_addrmods.c                 cpu.cu.CT_HOLD = cpu.rTAG;
cu               1481 src/dps8/dps8_addrmods.c                 cpu.cu.pot = 0;
cu               1537 src/dps8/dps8_addrmods.c                 cpu.cu.CT_HOLD = cpu.rTAG;
cu                 65 src/dps8/dps8_append.c 
cu                 66 src/dps8/dps8_append.c 
cu                 68 src/dps8/dps8_append.c 
cu                 69 src/dps8/dps8_append.c 
cu                 70 src/dps8/dps8_append.c 
cu                 71 src/dps8/dps8_append.c 
cu                 72 src/dps8/dps8_append.c 
cu                 73 src/dps8/dps8_append.c 
cu                 74 src/dps8/dps8_append.c 
cu                 75 src/dps8/dps8_append.c 
cu                 76 src/dps8/dps8_append.c 
cu                 80 src/dps8/dps8_append.c 
cu                 86 src/dps8/dps8_append.c 
cu                 89 src/dps8/dps8_append.c 
cu                 92 src/dps8/dps8_append.c 
cu                 98 src/dps8/dps8_append.c 
cu                101 src/dps8/dps8_append.c 
cu                104 src/dps8/dps8_append.c 
cu                107 src/dps8/dps8_append.c 
cu                110 src/dps8/dps8_append.c 
cu                176 src/dps8/dps8_append.c         if (cpu.cu.SD_ON)
cu                189 src/dps8/dps8_append.c         if (cpu.cu.PT_ON)
cu                341 src/dps8/dps8_append.c   if ((! cpu.tweaks.enable_wam || ! cpu.cu.SD_ON)) {
cu                353 src/dps8/dps8_append.c         cpu.cu.SDWAMM = 1;
cu                388 src/dps8/dps8_append.c         cpu.cu.SDWAMM = 1;
cu                411 src/dps8/dps8_append.c   cpu.cu.SDWAMM = 0;
cu                598 src/dps8/dps8_append.c     if (nomatch || (! cpu.tweaks.enable_wam) || (! cpu.cu.SD_ON))
cu                683 src/dps8/dps8_append.c     if ((! cpu.tweaks.enable_wam) || (! cpu.cu.PT_ON))
cu                699 src/dps8/dps8_append.c               cpu.cu.PTWAMM = 1;
cu                739 src/dps8/dps8_append.c               cpu.cu.PTWAMM = 1;
cu                758 src/dps8/dps8_append.c     cpu.cu.PTWAMM = 0;
cu                833 src/dps8/dps8_append.c     if (nomatch || (! cpu.tweaks.enable_wam) || (! cpu.cu.PT_ON))
cu               1186 src/dps8/dps8_append.c     DBGAPP ("do_append_cycle(Entry) XSF %o\n", cpu.cu.XSF);
cu               1225 src/dps8/dps8_append.c         ! (cpu.cu.XSF || cpu.currentInstruction.b29) /*get_went_appending()*/)
cu               1784 src/dps8/dps8_append.c         ! (cpu.cu.XSF || cpu.currentInstruction.b29) /*get_went_appending ()*/)
cu               1845 src/dps8/dps8_append.c         cpu.cu.XSF = 1;
cu                121 src/dps8/dps8_append.h     word12 FCT = cpu.cu.APUCycleBits & MASK3;
cu                122 src/dps8/dps8_append.h     cpu.cu.APUCycleBits = (status & 07770) | FCT;
cu                920 src/dps8/dps8_cpu.c     cpu.cu.SD_ON = cpu.switches.sdwam_enable ? 1 : 0;
cu                921 src/dps8/dps8_cpu.c     cpu.cu.PT_ON = cpu.switches.ptwam_enable ? 1 : 0;
cu                927 src/dps8/dps8_cpu.c       cpu.cu.IWB = 0000000616000; //-V536  // Stuff DIS instruction in instruction buffer
cu               1783 src/dps8/dps8_cpu.c             cpu.cu.IWB = cpu.switches.data_switches;
cu               2075 src/dps8/dps8_cpu.c     cpu.cu.XSF = false;
cu               2084 src/dps8/dps8_cpu.c     return cpu.cu.XSF;
cu               2303 src/dps8/dps8_cpu.c                 cpu.cu.FI_ADDR = (word5) (intr_pair_addr / 2);
cu               2339 src/dps8/dps8_cpu.c                                     & cpu.cu.IWB, & cpu.cu.IRODD, __func__);
cu               2341 src/dps8/dps8_cpu.c                         HDBGMRead (intr_pair_addr, cpu.cu.IWB, "intr even");
cu               2342 src/dps8/dps8_cpu.c                         HDBGMRead (intr_pair_addr + 1, cpu.cu.IRODD, "intr odd");
cu               2344 src/dps8/dps8_cpu.c                         cpu.cu.xde = 1;
cu               2345 src/dps8/dps8_cpu.c                         cpu.cu.xdo = 1;
cu               2425 src/dps8/dps8_cpu.c                                      !(is_dis && GET_I (cpu.cu.IWB) == 0);
cu               2435 src/dps8/dps8_cpu.c                 else if (! (cpu.cu.xde | cpu.cu.xdo |
cu               2436 src/dps8/dps8_cpu.c                        cpu.cu.rpt | cpu.cu.rd | cpu.cu.rl))
cu               2588 src/dps8/dps8_cpu.c                 cpu.cu.XSF           = 0;
cu               2589 src/dps8/dps8_cpu.c                 cpu.cu.TSN_VALID [0] = 0;
cu               2602 src/dps8/dps8_cpu.c                 cpu.cu.XSF               = 0;
cu               2604 src/dps8/dps8_cpu.c                 cpu.cu.TSN_VALID [0]     = 0;
cu               2643 src/dps8/dps8_cpu.c               if (GET_I (cpu.cu.IWB))
cu               2668 src/dps8/dps8_cpu.c                   if (cpu.cu.xdo)
cu               2671 src/dps8/dps8_cpu.c                   cpu.cu.XSF           = 0;
cu               2672 src/dps8/dps8_cpu.c                   cpu.cu.TSN_VALID [0] = 0;
cu               2681 src/dps8/dps8_cpu.c                   cpu.cu.xde  = cpu.cu.xdo = 0;
cu               2721 src/dps8/dps8_cpu.c                   if (TST_I_ABS && cpu.cu.XSF)
cu               2903 src/dps8/dps8_cpu.c               if ((! cpu.cu.repeat_first) &&
cu               2904 src/dps8/dps8_cpu.c                   (cpu.cu.rpt ||
cu               2905 src/dps8/dps8_cpu.c                    (cpu.cu.rd && (cpu.PPR.IC & 1)) ||
cu               2906 src/dps8/dps8_cpu.c                    cpu.cu.rl))
cu               2909 src/dps8/dps8_cpu.c                   if (cpu.cu.rd)
cu               2918 src/dps8/dps8_cpu.c                   !cpu.cu.xde && cpu.cu.xdo)
cu               2940 src/dps8/dps8_cpu.c                   !cpu.cu.xde && cpu.cu.xdo)
cu               2957 src/dps8/dps8_cpu.c               if (cpu.cu.xde && cpu.cu.xdo)
cu               2960 src/dps8/dps8_cpu.c                   cpu.cu.IWB           = cpu.cu.IRODD;
cu               2961 src/dps8/dps8_cpu.c                   cpu.cu.xde           = 0;
cu               2964 src/dps8/dps8_cpu.c                   cpu.cu.XSF           = 0;
cu               2965 src/dps8/dps8_cpu.c                   cpu.cu.TSN_VALID [0] = 0;
cu               2971 src/dps8/dps8_cpu.c               if (cpu.cu.xde || cpu.cu.xdo)  // we are in an XEC/XED
cu               2973 src/dps8/dps8_cpu.c                   cpu.cu.xde        = cpu.cu.xdo = 0;
cu               2990 src/dps8/dps8_cpu.c               cpu.cu.xde = cpu.cu.xdo = 0;
cu               3005 src/dps8/dps8_cpu.c                   !cpu.cu.repeat_first && !cpu.cu.rpt && !cpu.cu.rd && !cpu.cu.rl &&
cu               3011 src/dps8/dps8_cpu.c                   cpu.cu.IWB  = cpu.cu.IRODD;
cu               3064 src/dps8/dps8_cpu.c               if ((cpu.cu.APUCycleBits & 060) || cpu.secret_addressing_mode)
cu               3077 src/dps8/dps8_cpu.c               if (cpu.faultNumber != FAULT_TRB || cpu.cu.xde == 0)
cu               3117 src/dps8/dps8_cpu.c               core_read2 (addr, & cpu.cu.IWB, & cpu.cu.IRODD, __func__);
cu               3119 src/dps8/dps8_cpu.c               HDBGMRead (addr, cpu.cu.IWB, "fault even");
cu               3120 src/dps8/dps8_cpu.c               HDBGMRead (addr + 1, cpu.cu.IRODD, "fault odd");
cu               3122 src/dps8/dps8_cpu.c               cpu.cu.xde = 1;
cu               3123 src/dps8/dps8_cpu.c               cpu.cu.xdo = 1;
cu               4080 src/dps8/dps8_cpu.c     putbits36_1  (& w0, 9, cpu.cu.xde);
cu               4082 src/dps8/dps8_cpu.c     putbits36_1  (& w0, 10, cpu.cu.xdo);
cu               4086 src/dps8/dps8_cpu.c     putbits36_1  (& w0, 12, cpu.cu.rpt);
cu               4095 src/dps8/dps8_cpu.c     putbits36_1  (& w0, 17, TSTF (cpu.cu.IR, I_NBAR)?1:0);
cu               4301 src/dps8/dps8_cpu.c     putbits36_1 (& w0,       25, cpu.cu.SDWAMM);
cu               4305 src/dps8/dps8_cpu.c     putbits36_1 (& w0,       30, cpu.cu.PTWAMM);
cu               1037 src/dps8/dps8_cpu.h #define USE_IRODD (cpu.cu.rd && ((cpu. PPR.IC & 1) != 0))
cu               1038 src/dps8/dps8_cpu.h #define IWB_IRODD (USE_IRODD ? cpu.cu.IRODD : cpu.cu.IWB)
cu               1592 src/dps8/dps8_cpu.h     ctl_unit_data_t cu;
cu                571 src/dps8/dps8_eis.c             cpu.cu.XSF = 0;
cu                597 src/dps8/dps8_eis.c             cpu.cu.XSF = 0;
cu                648 src/dps8/dps8_eis.c         cpu.cu.XSF = 0;
cu                667 src/dps8/dps8_eis.c         cpu.cu.XSF = 0;
cu                812 src/dps8/dps8_eis.c         cpu.cu.XSF = 0;
cu                835 src/dps8/dps8_eis.c         cpu.cu.XSF = 0;
cu                874 src/dps8/dps8_eis.c         cpu.cu.XSF = 0;
cu                897 src/dps8/dps8_eis.c         cpu.cu.XSF = 0;
cu               1166 src/dps8/dps8_eis.c           e -> MF1 = getbits36_7 (cpu.cu.IWB, 29);
cu               1171 src/dps8/dps8_eis.c           e -> MF2 = getbits36_7 (cpu.cu.IWB, 11);
cu               1176 src/dps8/dps8_eis.c           e -> MF3 = getbits36_7 (cpu.cu.IWB,  2);
cu               1273 src/dps8/dps8_eis.c             cpu.cu.TSN_PRNO[k-1] = n;
cu               1274 src/dps8/dps8_eis.c             cpu.cu.TSN_VALID[k-1] = 1;
cu               1423 src/dps8/dps8_eis.c         cpu.cu.TSN_PRNO[k-1] = n;
cu               1424 src/dps8/dps8_eis.c         cpu.cu.TSN_VALID[k-1] = 1;
cu               1628 src/dps8/dps8_eis.c         cpu.cu.TSN_PRNO[k-1] = n;
cu               1629 src/dps8/dps8_eis.c         cpu.cu.TSN_VALID[k-1] = 1;
cu               1680 src/dps8/dps8_eis.c         cpu.cu.TSN_PRNO[k-1] = n;
cu               1681 src/dps8/dps8_eis.c         cpu.cu.TSN_VALID[k-1] = 1;
cu               1862 src/dps8/dps8_eis.c         cpu.cu.TSN_PRNO[k-1] = n;
cu               1863 src/dps8/dps8_eis.c         cpu.cu.TSN_VALID[k-1] = 1;
cu               1960 src/dps8/dps8_eis.c     uint ARn = GET_ARN (cpu.cu.IWB);
cu               1962 src/dps8/dps8_eis.c     int32_t address = SIGNEXT15_32 (GET_OFFSET (cpu.cu.IWB));
cu               1966 src/dps8/dps8_eis.c     word4 reg = GET_TD (cpu.cu.IWB); // 4-bit register modification (None except
cu               1975 src/dps8/dps8_eis.c     if (GET_A (cpu.cu.IWB))
cu               2042 src/dps8/dps8_eis.c     uint ARn = GET_ARN (cpu.cu.IWB);
cu               2044 src/dps8/dps8_eis.c     int32_t address = SIGNEXT15_32 (GET_OFFSET (cpu.cu.IWB));
cu               2045 src/dps8/dps8_eis.c     word4 reg = GET_TD (cpu.cu.IWB); // 4-bit register modification (None except
cu               2052 src/dps8/dps8_eis.c     if (GET_A (cpu.cu.IWB))
cu               2089 src/dps8/dps8_eis.c     uint ARn = GET_ARN (cpu.cu.IWB);
cu               2091 src/dps8/dps8_eis.c     int32_t address = SIGNEXT15_32 (GET_OFFSET (cpu.cu.IWB));
cu               2092 src/dps8/dps8_eis.c     word6 reg = GET_TD (cpu.cu.IWB); // 4-bit register modification (None except
cu               2112 src/dps8/dps8_eis.c     if (GET_A (cpu.cu.IWB))
cu               2120 src/dps8/dps8_eis.c     if (sz == 9 || GET_A (cpu.cu.IWB))
cu               2158 src/dps8/dps8_eis.c     uint ARn = GET_ARN (cpu.cu.IWB);
cu               2161 src/dps8/dps8_eis.c     word18 address = SIGNEXT15_18 (GET_OFFSET (cpu.cu.IWB));
cu               2164 src/dps8/dps8_eis.c     word4 reg = (word4) GET_TD (cpu.cu.IWB);
cu               2177 src/dps8/dps8_eis.c     if (GET_A (cpu.cu.IWB))
cu               2217 src/dps8/dps8_eis.c 
cu               2219 src/dps8/dps8_eis.c 
cu               2226 src/dps8/dps8_eis.c 
cu               2246 src/dps8/dps8_eis.c 
cu               2267 src/dps8/dps8_eis.c 
cu               2360 src/dps8/dps8_eis.c     uint ARn = GET_ARN (cpu.cu.IWB);
cu               2362 src/dps8/dps8_eis.c     int32_t address = SIGNEXT15_32 (GET_OFFSET (cpu.cu.IWB));
cu               2365 src/dps8/dps8_eis.c     word4 reg = (word4) GET_TD (cpu.cu.IWB);
cu               2375 src/dps8/dps8_eis.c     if (GET_A (cpu.cu.IWB))
cu               2399 src/dps8/dps8_eis.c     uint ARn = GET_ARN (cpu.cu.IWB);
cu               2401 src/dps8/dps8_eis.c     word18 address = SIGNEXT15_18 (GET_OFFSET (cpu.cu.IWB));
cu               2402 src/dps8/dps8_eis.c     word4 reg = (word4) GET_TD (cpu.cu.IWB);
cu               2408 src/dps8/dps8_eis.c     if (GET_A (cpu.cu.IWB))
cu               2435 src/dps8/dps8_eis.c     uint ARn = GET_ARN (cpu.cu.IWB);
cu               2437 src/dps8/dps8_eis.c     int32_t address = SIGNEXT15_32 (GET_OFFSET (cpu.cu.IWB));
cu               2440 src/dps8/dps8_eis.c     word4 reg = (word4) GET_TD (cpu.cu.IWB);
cu               2449 src/dps8/dps8_eis.c     if (GET_A (cpu.cu.IWB))
cu               2473 src/dps8/dps8_eis.c     uint ARn = GET_ARN (cpu.cu.IWB);
cu               2475 src/dps8/dps8_eis.c     word18 address = SIGNEXT15_18 (GET_OFFSET (cpu.cu.IWB));
cu               2478 src/dps8/dps8_eis.c     word4 reg = (word4) GET_TD (cpu.cu.IWB);
cu               2487 src/dps8/dps8_eis.c     if (GET_A (cpu.cu.IWB))
cu               2757 src/dps8/dps8_eis.c     uint ARn = GET_ARN (cpu.cu.IWB);
cu               2758 src/dps8/dps8_eis.c     uint address = SIGNEXT15_18 (GET_OFFSET (cpu.cu.IWB));
cu               2759 src/dps8/dps8_eis.c     word4 reg = (word4) GET_TD (cpu.cu.IWB); // 4-bit register modification (None except
cu               2793 src/dps8/dps8_eis.c     if (GET_A (cpu.cu.IWB))
cu               3029 src/dps8/dps8_eis.c     word9 fill = getbits36_9 (cpu.cu.IWB, 0);
cu               3549 src/dps8/dps8_eis.c     uint mask = (uint) getbits36_9 (cpu.cu.IWB, 0);
cu               3721 src/dps8/dps8_eis.c     uint mask = (uint) getbits36_9 (cpu.cu.IWB, 0);
cu               4383 src/dps8/dps8_eis.c     word1 T = getbits36_1 (cpu.cu.IWB, 9);
cu               4385 src/dps8/dps8_eis.c     word9 fill = getbits36_9 (cpu.cu.IWB, 0);
cu               4781 src/dps8/dps8_eis.c     word1 T = getbits36_1 (cpu.cu.IWB, 9);
cu               4783 src/dps8/dps8_eis.c     word9 fill = getbits36_9 (cpu.cu.IWB, 0);
cu               7165 src/dps8/dps8_eis.c     word1 T = getbits36_1 (cpu.cu.IWB, 9);
cu               7167 src/dps8/dps8_eis.c     word9 fill = getbits36_9 (cpu.cu.IWB, 0);
cu               7646 src/dps8/dps8_eis.c     e->P = getbits36_1 (cpu.cu.IWB, 0) != 0;  // 4-bit data sign character
cu               7648 src/dps8/dps8_eis.c     word1 T = getbits36_1 (cpu.cu.IWB, 9);
cu               7649 src/dps8/dps8_eis.c     bool R = getbits36_1 (cpu.cu.IWB, 10) != 0;  // rounding bit
cu               8019 src/dps8/dps8_eis.c     bool F = getbits36_1 (cpu.cu.IWB, 0) != 0;   // fill bit
cu               8020 src/dps8/dps8_eis.c     bool T = getbits36_1 (cpu.cu.IWB, 9) != 0;   // T (enablefault) bit
cu               8022 src/dps8/dps8_eis.c     uint BOLR = getbits36_4 (cpu.cu.IWB, 5);   // T (enablefault) bit
cu               8316 src/dps8/dps8_eis.c     bool F = getbits36_1 (cpu.cu.IWB, 0) != 0;   // fill bit
cu               8317 src/dps8/dps8_eis.c     bool T = getbits36_1 (cpu.cu.IWB, 9) != 0;   // T (enablefault) bit
cu               8319 src/dps8/dps8_eis.c     uint BOLR = getbits36_4 (cpu.cu.IWB, 5);   // T (enablefault) bit
cu               8504 src/dps8/dps8_eis.c     bool F = getbits36_1 (cpu.cu.IWB, 0) != 0;   // fill bit
cu               8505 src/dps8/dps8_eis.c     bool T = getbits36_1 (cpu.cu.IWB, 9) != 0;   // T (enablefault) bit
cu               8507 src/dps8/dps8_eis.c     uint BOLR = getbits36_4 (cpu.cu.IWB, 5);   // T (enablefault) bit
cu               8703 src/dps8/dps8_eis.c     bool F = getbits36_1 (cpu.cu.IWB, 0) != 0;   // fill bit
cu               8704 src/dps8/dps8_eis.c     bool T = getbits36_1 (cpu.cu.IWB, 9) != 0;   // T (enablefault) bit
cu               8706 src/dps8/dps8_eis.c     uint BOLR = getbits36_4 (cpu.cu.IWB, 5);   // T (enablefault) bit
cu               8886 src/dps8/dps8_eis.c     bool F = getbits36_1 (cpu.cu.IWB, 0) != 0;   // fill bit
cu               9533 src/dps8/dps8_eis.c     e->P = getbits36_1 (cpu.cu.IWB, 0) != 0;  // 4-bit data sign character control
cu               10141 src/dps8/dps8_eis.c     e->P = getbits36_1 (cpu.cu.IWB, 0) != 0;  // 4-bit data sign character control
cu               10142 src/dps8/dps8_eis.c     bool T = getbits36_1 (cpu.cu.IWB, 9) != 0;  // truncation bit
cu               10143 src/dps8/dps8_eis.c     bool R = getbits36_1 (cpu.cu.IWB, 10) != 0;  // rounding bit
cu               10492 src/dps8/dps8_eis.c     e->P = getbits36_1 (cpu.cu.IWB, 0) != 0;  // 4-bit data sign character control
cu               10493 src/dps8/dps8_eis.c     bool T = getbits36_1 (cpu.cu.IWB, 9) != 0;  // truncation bit
cu               10494 src/dps8/dps8_eis.c     bool R = getbits36_1 (cpu.cu.IWB, 10) != 0;  // rounding bit
cu               10835 src/dps8/dps8_eis.c     e->P = getbits36_1 (cpu.cu.IWB, 0) != 0;  // 4-bit data sign character control
cu               10836 src/dps8/dps8_eis.c     bool T = getbits36_1 (cpu.cu.IWB, 9) != 0;  // truncation bit
cu               10837 src/dps8/dps8_eis.c     bool R = getbits36_1 (cpu.cu.IWB, 10) != 0;  // rounding bit
cu               11145 src/dps8/dps8_eis.c     e->P = getbits36_1 (cpu.cu.IWB, 0) != 0;  // 4-bit data sign character control
cu               11146 src/dps8/dps8_eis.c     bool T = getbits36_1 (cpu.cu.IWB, 9) != 0;  // truncation bit
cu               11147 src/dps8/dps8_eis.c     bool R = getbits36_1 (cpu.cu.IWB, 10) != 0;  // rounding bit
cu               11474 src/dps8/dps8_eis.c     e->P = getbits36_1 (cpu.cu.IWB, 0) != 0;  // 4-bit data sign character control
cu               11475 src/dps8/dps8_eis.c     bool T = getbits36_1 (cpu.cu.IWB, 9) != 0;  // truncation bit
cu               11476 src/dps8/dps8_eis.c     bool R = getbits36_1 (cpu.cu.IWB, 10) != 0;  // rounding bit
cu               11744 src/dps8/dps8_eis.c     e->P = getbits36_1 (cpu.cu.IWB, 0) != 0;  // 4-bit data sign character control
cu               11745 src/dps8/dps8_eis.c     bool T = getbits36_1 (cpu.cu.IWB, 9) != 0;  // truncation bit
cu               11746 src/dps8/dps8_eis.c     bool R = getbits36_1 (cpu.cu.IWB, 10) != 0;  // rounding bit
cu               12797 src/dps8/dps8_eis.c     e->P = getbits36_1 (cpu.cu.IWB, 0) != 0;  // 4-bit data sign character control
cu               12799 src/dps8/dps8_eis.c     bool R = getbits36_1 (cpu.cu.IWB, 10) != 0;  // rounding bit
cu               13188 src/dps8/dps8_eis.c     e->P = getbits36_1 (cpu.cu.IWB, 0) != 0;  // 4-bit data sign character control
cu               13190 src/dps8/dps8_eis.c     bool R = getbits36_1 (cpu.cu.IWB, 10) != 0;  // rounding bit
cu                442 src/dps8/dps8_faults.c     word3 FCT = cpu.cu.APUCycleBits & MASK3;
cu                444 src/dps8/dps8_faults.c     cpu.cu.APUCycleBits = (word12) ((cpu.cu.APUCycleBits & 07770) | FCT);
cu                501 src/dps8/dps8_faults.c     cpu . cu . IRO_ISN          = 0;
cu                502 src/dps8/dps8_faults.c     cpu . cu . OEB_IOC          = 0;
cu                503 src/dps8/dps8_faults.c     cpu . cu . EOFF_IAIM        = 0;
cu                504 src/dps8/dps8_faults.c     cpu . cu . ORB_ISP          = 0;
cu                505 src/dps8/dps8_faults.c     cpu . cu . ROFF_IPR         = 0;
cu                506 src/dps8/dps8_faults.c     cpu . cu . OWB_NEA          = 0;
cu                507 src/dps8/dps8_faults.c     cpu . cu . WOFF_OOB         = 0;
cu                508 src/dps8/dps8_faults.c     cpu . cu . NO_GA            = 0;
cu                509 src/dps8/dps8_faults.c     cpu . cu . OCB              = 0;
cu                510 src/dps8/dps8_faults.c     cpu . cu . OCALL            = 0;
cu                511 src/dps8/dps8_faults.c     cpu . cu . BOC              = 0;
cu                512 src/dps8/dps8_faults.c     DPS8M_ (cpu . cu . PTWAM_ER = 0;)
cu                513 src/dps8/dps8_faults.c     cpu . cu . CRT              = 0;
cu                514 src/dps8/dps8_faults.c     cpu . cu . RALR             = 0;
cu                515 src/dps8/dps8_faults.c     cpu . cu . SDWAM_ER         = 0;
cu                516 src/dps8/dps8_faults.c     cpu . cu . OOSB             = 0;
cu                517 src/dps8/dps8_faults.c     cpu . cu . PARU             = 0;
cu                518 src/dps8/dps8_faults.c     cpu . cu . PARL             = 0;
cu                519 src/dps8/dps8_faults.c     cpu . cu . ONC1             = 0;
cu                520 src/dps8/dps8_faults.c     cpu . cu . ONC2             = 0;
cu                521 src/dps8/dps8_faults.c     cpu . cu . IA               = 0;
cu                522 src/dps8/dps8_faults.c     cpu . cu . IACHN            = 0;
cu                523 src/dps8/dps8_faults.c     cpu . cu . CNCHN            = (faultNumber == FAULT_CON) ? subFault.fault_con_subtype & MASK3 : 0;
cu                526 src/dps8/dps8_faults.c     cpu . cu . FIF       = cpu . cycle == FETCH_cycle ? 1 : 0;
cu                527 src/dps8/dps8_faults.c     cpu . cu . FI_ADDR   = (word5) faultNumber;
cu                533 src/dps8/dps8_faults.c     cpu . cu . rfi = 0;
cu                567 src/dps8/dps8_faults.c           cpu . cu . IRO_ISN   = 1;
cu                569 src/dps8/dps8_faults.c           cpu . cu . OEB_IOC   = 1;
cu                571 src/dps8/dps8_faults.c           cpu . cu . EOFF_IAIM = 1;
cu                573 src/dps8/dps8_faults.c           cpu . cu . ORB_ISP   = 1;
cu                575 src/dps8/dps8_faults.c           cpu . cu . ROFF_IPR  = 1;
cu                577 src/dps8/dps8_faults.c           cpu . cu . OWB_NEA   = 1;
cu                579 src/dps8/dps8_faults.c           cpu . cu . WOFF_OOB  = 1;
cu                581 src/dps8/dps8_faults.c           cpu . cu . NO_GA     = 1;
cu                583 src/dps8/dps8_faults.c           cpu . cu . OCB       = 1;
cu                585 src/dps8/dps8_faults.c           cpu . cu . OCALL     = 1;
cu                587 src/dps8/dps8_faults.c           cpu . cu . BOC       = 1;
cu                589 src/dps8/dps8_faults.c           cpu . cu . PTWAM_ER  = 1;
cu                591 src/dps8/dps8_faults.c           cpu . cu . CRT       = 1;
cu                593 src/dps8/dps8_faults.c           cpu . cu . RALR      = 1;
cu                595 src/dps8/dps8_faults.c           cpu . cu . SDWAM_ER  = 1;
cu                597 src/dps8/dps8_faults.c           cpu . cu . OOSB      = 1;
cu                602 src/dps8/dps8_faults.c           cpu . cu . WOFF_OOB  = 1;
cu                606 src/dps8/dps8_faults.c           cpu . cu . OWB_NEA   = 1;
cu                611 src/dps8/dps8_faults.c           cpu . cu . OEB_IOC   = 1;
cu                613 src/dps8/dps8_faults.c           cpu . cu . EOFF_IAIM = 1;
cu                615 src/dps8/dps8_faults.c           cpu . cu . ORB_ISP   = 1;
cu                617 src/dps8/dps8_faults.c           cpu . cu . ROFF_IPR  = 1;
cu                622 src/dps8/dps8_faults.c           cpu . cu . IA        = 0;
cu                624 src/dps8/dps8_faults.c           cpu . cu . IA        = 010;
cu                677 src/dps8/dps8_faults.c         cpu.cu.FI_ADDR  = FAULT_TRB;
cu                749 src/dps8/dps8_faults.c     word3 FCT = cpu.cu.APUCycleBits & MASK3;
cu                751 src/dps8/dps8_faults.c     cpu.cu.APUCycleBits = (word12) ((cpu.cu.APUCycleBits & 07770) | FCT);
cu                759 src/dps8/dps8_faults.c     cpu.cu.IRO_ISN   = 0;
cu                760 src/dps8/dps8_faults.c     cpu.cu.OEB_IOC   = 0;
cu                761 src/dps8/dps8_faults.c     cpu.cu.EOFF_IAIM = 0;
cu                762 src/dps8/dps8_faults.c     cpu.cu.ORB_ISP   = 0;
cu                763 src/dps8/dps8_faults.c     cpu.cu.ROFF_IPR  = 0;
cu                764 src/dps8/dps8_faults.c     cpu.cu.OWB_NEA   = 0;
cu                765 src/dps8/dps8_faults.c     cpu.cu.WOFF_OOB  = 0;
cu                766 src/dps8/dps8_faults.c     cpu.cu.NO_GA     = 0;
cu                767 src/dps8/dps8_faults.c     cpu.cu.OCB       = 0;
cu                768 src/dps8/dps8_faults.c     cpu.cu.OCALL     = 0;
cu                769 src/dps8/dps8_faults.c     cpu.cu.BOC       = 0;
cu                774 src/dps8/dps8_faults.c     cpu.cu.CRT      = 0;
cu                775 src/dps8/dps8_faults.c     cpu.cu.RALR     = 0;
cu                776 src/dps8/dps8_faults.c     cpu.cu.SDWAM_ER = 0;
cu                777 src/dps8/dps8_faults.c     cpu.cu.OOSB     = 0;
cu                778 src/dps8/dps8_faults.c     cpu.cu.PARU     = 0;
cu                779 src/dps8/dps8_faults.c     cpu.cu.PARL     = 0;
cu                780 src/dps8/dps8_faults.c     cpu.cu.ONC1     = 0;
cu                781 src/dps8/dps8_faults.c     cpu.cu.ONC2     = 0;
cu                782 src/dps8/dps8_faults.c     cpu.cu.IA       = 0;
cu                783 src/dps8/dps8_faults.c     cpu.cu.IACHN    = 0;
cu                784 src/dps8/dps8_faults.c     cpu.cu.CNCHN    = 0;
cu                787 src/dps8/dps8_faults.c     cpu.cu.FIF       = 0;
cu                788 src/dps8/dps8_faults.c     cpu.cu.FI_ADDR   = (word5) fault_number & MASK5;
cu                794 src/dps8/dps8_faults.c     cpu.cu.rfi = 0;
cu                820 src/dps8/dps8_faults.c         cpu.cu.FI_ADDR    = FAULT_TRB;
cu                581 src/dps8/dps8_hw_consts.h # define CLR_I_ABS   CLRF (cpu.cu.IR, I_ABS)
cu                582 src/dps8/dps8_hw_consts.h # define CLR_I_MIF   CLRF (cpu.cu.IR, I_MIF)
cu                583 src/dps8/dps8_hw_consts.h # define CLR_I_TRUNC CLRF (cpu.cu.IR, I_TRUNC)
cu                584 src/dps8/dps8_hw_consts.h # define CLR_I_NBAR  CLRF (cpu.cu.IR, I_NBAR)
cu                585 src/dps8/dps8_hw_consts.h # define CLR_I_TALLY CLRF (cpu.cu.IR, I_TALLY)
cu                586 src/dps8/dps8_hw_consts.h # define CLR_I_PMASK CLRF (cpu.cu.IR, I_PMASK)
cu                587 src/dps8/dps8_hw_consts.h # define CLR_I_EOFL  CLRF (cpu.cu.IR, I_EOFL)
cu                588 src/dps8/dps8_hw_consts.h # define CLR_I_EUFL  CLRF (cpu.cu.IR, I_EUFL)
cu                589 src/dps8/dps8_hw_consts.h # define CLR_I_OFLOW CLRF (cpu.cu.IR, I_OFLOW)
cu                590 src/dps8/dps8_hw_consts.h # define CLR_I_CARRY CLRF (cpu.cu.IR, I_CARRY)
cu                591 src/dps8/dps8_hw_consts.h # define CLR_I_NEG   CLRF (cpu.cu.IR, I_NEG)
cu                592 src/dps8/dps8_hw_consts.h # define CLR_I_ZERO  CLRF (cpu.cu.IR, I_ZERO)
cu                594 src/dps8/dps8_hw_consts.h # define SET_I_ABS   SETF (cpu.cu.IR, I_ABS)
cu                595 src/dps8/dps8_hw_consts.h # define SET_I_NBAR  SETF (cpu.cu.IR, I_NBAR)
cu                596 src/dps8/dps8_hw_consts.h # define SET_I_TRUNC SETF (cpu.cu.IR, I_TRUNC)
cu                597 src/dps8/dps8_hw_consts.h # define SET_I_TALLY SETF (cpu.cu.IR, I_TALLY)
cu                598 src/dps8/dps8_hw_consts.h # define SET_I_EOFL  SETF (cpu.cu.IR, I_EOFL)
cu                599 src/dps8/dps8_hw_consts.h # define SET_I_EUFL  SETF (cpu.cu.IR, I_EUFL)
cu                600 src/dps8/dps8_hw_consts.h # define SET_I_OFLOW SETF (cpu.cu.IR, I_OFLOW)
cu                601 src/dps8/dps8_hw_consts.h # define SET_I_CARRY SETF (cpu.cu.IR, I_CARRY)
cu                602 src/dps8/dps8_hw_consts.h # define SET_I_NEG   SETF (cpu.cu.IR, I_NEG)
cu                603 src/dps8/dps8_hw_consts.h # define SET_I_ZERO  SETF (cpu.cu.IR, I_ZERO)
cu                605 src/dps8/dps8_hw_consts.h # define TST_I_ABS   TSTF (cpu.cu.IR, I_ABS)
cu                606 src/dps8/dps8_hw_consts.h # define TST_I_MIF   TSTF (cpu.cu.IR, I_MIF)
cu                607 src/dps8/dps8_hw_consts.h # define TST_I_NBAR  TSTF (cpu.cu.IR, I_NBAR)
cu                608 src/dps8/dps8_hw_consts.h # define TST_I_PMASK TSTF (cpu.cu.IR, I_PMASK)
cu                609 src/dps8/dps8_hw_consts.h # define TST_I_TRUNC TSTF (cpu.cu.IR, I_TRUNC)
cu                610 src/dps8/dps8_hw_consts.h # define TST_I_TALLY TSTF (cpu.cu.IR, I_TALLY)
cu                611 src/dps8/dps8_hw_consts.h # define TST_I_OMASK TSTF (cpu.cu.IR, I_OMASK)
cu                612 src/dps8/dps8_hw_consts.h # define TST_I_EUFL  TSTF (cpu.cu.IR, I_EUFL )
cu                613 src/dps8/dps8_hw_consts.h # define TST_I_EOFL  TSTF (cpu.cu.IR, I_EOFL )
cu                614 src/dps8/dps8_hw_consts.h # define TST_I_OFLOW TSTF (cpu.cu.IR, I_OFLOW)
cu                615 src/dps8/dps8_hw_consts.h # define TST_I_CARRY TSTF (cpu.cu.IR, I_CARRY)
cu                616 src/dps8/dps8_hw_consts.h # define TST_I_NEG   TSTF (cpu.cu.IR, I_NEG)
cu                617 src/dps8/dps8_hw_consts.h # define TST_I_ZERO  TSTF (cpu.cu.IR, I_ZERO)
cu                618 src/dps8/dps8_hw_consts.h # define TST_I_HEX   TSTF (cpu.cu.IR, I_HEX)
cu                620 src/dps8/dps8_hw_consts.h # define SC_I_HEX(v)   SCF (v, cpu.cu.IR, I_HEX) // DPS8M only
cu                621 src/dps8/dps8_hw_consts.h # define SC_I_MIF(v)   SCF (v, cpu.cu.IR, I_MIF)
cu                622 src/dps8/dps8_hw_consts.h # define SC_I_TALLY(v) SCF (v, cpu.cu.IR, I_TALLY)
cu                623 src/dps8/dps8_hw_consts.h # define SC_I_NEG(v)   SCF (v, cpu.cu.IR, I_NEG)
cu                624 src/dps8/dps8_hw_consts.h # define SC_I_ZERO(v)  SCF (v, cpu.cu.IR, I_ZERO)
cu                625 src/dps8/dps8_hw_consts.h # define SC_I_CARRY(v) SCF (v, cpu.cu.IR, I_CARRY);
cu                626 src/dps8/dps8_hw_consts.h # define SC_I_OFLOW(v) SCF (v, cpu.cu.IR, I_OFLOW);
cu                627 src/dps8/dps8_hw_consts.h # define SC_I_EOFL(v)  SCF (v, cpu.cu.IR, I_EOFL);
cu                628 src/dps8/dps8_hw_consts.h # define SC_I_EUFL(v)  SCF (v, cpu.cu.IR, I_EUFL);
cu                629 src/dps8/dps8_hw_consts.h # define SC_I_OMASK(v) SCF (v, cpu.cu.IR, I_OMASK);
cu                630 src/dps8/dps8_hw_consts.h # define SC_I_PERR(v)  SCF (v, cpu.cu.IR, I_PERR);
cu                631 src/dps8/dps8_hw_consts.h # define SC_I_PMASK(v) SCF (v, cpu.cu.IR, I_PMASK);
cu                632 src/dps8/dps8_hw_consts.h # define SC_I_TRUNC(v) SCF (v, cpu.cu.IR, I_TRUNC);
cu                 59 src/dps8/dps8_iefp.c     if (cpu.cu.XSF || (cyctyp != INSTRUCTION_FETCH && cpu.currentInstruction.b29))
cu                162 src/dps8/dps8_iefp.c     if (cpu.cu.XSF || (cyctyp != INSTRUCTION_FETCH && cpu.currentInstruction.b29) ||
cu                282 src/dps8/dps8_iefp.c     if (isAR || cpu.cu.XSF /*get_went_appending ()*/)
cu                407 src/dps8/dps8_iefp.c     if (isAR || cpu.cu.XSF /*get_went_appending ()*/)
cu                520 src/dps8/dps8_iefp.c     if (cpu.cu.XSF /*get_went_appending ()*/ || (cyctyp != INSTRUCTION_FETCH && cpu.currentInstruction.b29))
cu                616 src/dps8/dps8_iefp.c     if (cpu.cu.XSF /*get_went_appending ()*/ || (cyctyp != INSTRUCTION_FETCH && cpu.currentInstruction.b29))
cu                700 src/dps8/dps8_iefp.c     if (isAR || cpu.cu.XSF /*get_went_appending ()*/)
cu                785 src/dps8/dps8_iefp.c     if (isAR || cpu.cu.XSF /*get_went_appending ()*/)
cu                917 src/dps8/dps8_iefp.c     if (isAR || cpu.cu.XSF /*get_went_appending ()*/)
cu                100 src/dps8/dps8_ins.c       rTAG = GET_TAG (cpu.cu.IWB);
cu                181 src/dps8/dps8_ins.c       rTAG = GET_TAG (cpu.cu.IWB);
cu                257 src/dps8/dps8_ins.c     if (! (get_addr_mode () == APPEND_mode || cpu.cu.TSN_VALID [0] ||
cu                258 src/dps8/dps8_ins.c            cpu.cu.XSF || cpu.currentInstruction.b29 /*get_went_appending ()*/))
cu                291 src/dps8/dps8_ins.c         cpu.cu.IWB   = cpu.CY;
cu                292 src/dps8/dps8_ins.c         cpu.cu.IRODD = cpu.CY;
cu                296 src/dps8/dps8_ins.c         cpu.cu.IWB   = cpu.Ypair[0];
cu                297 src/dps8/dps8_ins.c         cpu.cu.IRODD = cpu.Ypair[1];
cu                325 src/dps8/dps8_ins.c     putbits36_1 (& words[0], 19,  cpu.cu.XSF);
cu                327 src/dps8/dps8_ins.c     putbits36_1 (& words[0], 21,  cpu.cu.SD_ON);
cu                329 src/dps8/dps8_ins.c     putbits36_1 (& words[0], 23,  cpu.cu.PT_ON);
cu                331 src/dps8/dps8_ins.c 
cu                332 src/dps8/dps8_ins.c 
cu                333 src/dps8/dps8_ins.c 
cu                334 src/dps8/dps8_ins.c 
cu                335 src/dps8/dps8_ins.c 
cu                336 src/dps8/dps8_ins.c 
cu                337 src/dps8/dps8_ins.c 
cu                338 src/dps8/dps8_ins.c 
cu                339 src/dps8/dps8_ins.c 
cu                346 src/dps8/dps8_ins.c     putbits36_12 (& words[0], 24, cpu.cu.APUCycleBits);
cu                351 src/dps8/dps8_ins.c     putbits36_1 (& words[1],  0, cpu.cu.IRO_ISN);
cu                352 src/dps8/dps8_ins.c     putbits36_1 (& words[1],  1, cpu.cu.OEB_IOC);
cu                353 src/dps8/dps8_ins.c     putbits36_1 (& words[1],  2, cpu.cu.EOFF_IAIM);
cu                354 src/dps8/dps8_ins.c     putbits36_1 (& words[1],  3, cpu.cu.ORB_ISP);
cu                355 src/dps8/dps8_ins.c     putbits36_1 (& words[1],  4, cpu.cu.ROFF_IPR);
cu                356 src/dps8/dps8_ins.c     putbits36_1 (& words[1],  5, cpu.cu.OWB_NEA);
cu                357 src/dps8/dps8_ins.c     putbits36_1 (& words[1],  6, cpu.cu.WOFF_OOB);
cu                358 src/dps8/dps8_ins.c     putbits36_1 (& words[1],  7, cpu.cu.NO_GA);
cu                359 src/dps8/dps8_ins.c     putbits36_1 (& words[1],  8, cpu.cu.OCB);
cu                360 src/dps8/dps8_ins.c     putbits36_1 (& words[1],  9, cpu.cu.OCALL);
cu                361 src/dps8/dps8_ins.c     putbits36_1 (& words[1], 10, cpu.cu.BOC);
cu                362 src/dps8/dps8_ins.c     putbits36_1 (& words[1], 11, cpu.cu.PTWAM_ER);
cu                363 src/dps8/dps8_ins.c     putbits36_1 (& words[1], 12, cpu.cu.CRT);
cu                364 src/dps8/dps8_ins.c     putbits36_1 (& words[1], 13, cpu.cu.RALR);
cu                365 src/dps8/dps8_ins.c     putbits36_1 (& words[1], 14, cpu.cu.SDWAM_ER);
cu                366 src/dps8/dps8_ins.c     putbits36_1 (& words[1], 15, cpu.cu.OOSB);
cu                367 src/dps8/dps8_ins.c     putbits36_1 (& words[1], 16, cpu.cu.PARU);
cu                368 src/dps8/dps8_ins.c     putbits36_1 (& words[1], 17, cpu.cu.PARL);
cu                369 src/dps8/dps8_ins.c     putbits36_1 (& words[1], 18, cpu.cu.ONC1);
cu                370 src/dps8/dps8_ins.c     putbits36_1 (& words[1], 19, cpu.cu.ONC2);
cu                371 src/dps8/dps8_ins.c     putbits36_4 (& words[1], 20, cpu.cu.IA);
cu                372 src/dps8/dps8_ins.c     putbits36_3 (& words[1], 24, cpu.cu.IACHN);
cu                373 src/dps8/dps8_ins.c     putbits36_3 (& words[1], 27, cpu.cu.CNCHN);
cu                374 src/dps8/dps8_ins.c     putbits36_5 (& words[1], 30, cpu.cu.FI_ADDR);
cu                385 src/dps8/dps8_ins.c     putbits36_6 (& words[2], 30, cpu.cu.delta);
cu                389 src/dps8/dps8_ins.c     putbits36_3 (& words[3], 18, cpu.cu.TSN_VALID[0] ? cpu.cu.TSN_PRNO[0] : 0);
cu                390 src/dps8/dps8_ins.c     putbits36_1 (& words[3], 21, cpu.cu.TSN_VALID[0]);
cu                391 src/dps8/dps8_ins.c     putbits36_3 (& words[3], 22, cpu.cu.TSN_VALID[1] ? cpu.cu.TSN_PRNO[1] : 0);
cu                392 src/dps8/dps8_ins.c     putbits36_1 (& words[3], 25, cpu.cu.TSN_VALID[1]);
cu                393 src/dps8/dps8_ins.c     putbits36_3 (& words[3], 26, cpu.cu.TSN_VALID[2] ? cpu.cu.TSN_PRNO[2] : 0);
cu                394 src/dps8/dps8_ins.c     putbits36_1 (& words[3], 29, cpu.cu.TSN_VALID[2]);
cu                403 src/dps8/dps8_ins.c     putbits36_18 (& words[4], 18, cpu.cu.IR);
cu                441 src/dps8/dps8_ins.c     putbits36 (& words[5], 18,  1, cpu.cu.repeat_first);
cu                442 src/dps8/dps8_ins.c     putbits36 (& words[5], 19,  1, cpu.cu.rpt);
cu                443 src/dps8/dps8_ins.c     putbits36 (& words[5], 20,  1, cpu.cu.rd);
cu                444 src/dps8/dps8_ins.c     putbits36 (& words[5], 21,  1, cpu.cu.rl);
cu                445 src/dps8/dps8_ins.c     putbits36 (& words[5], 22,  1, cpu.cu.pot);
cu                447 src/dps8/dps8_ins.c     putbits36_1 (& words[5], 24, cpu.cu.xde);
cu                448 src/dps8/dps8_ins.c     putbits36_1 (& words[5], 25, cpu.cu.xdo);
cu                449 src/dps8/dps8_ins.c     putbits36_1 (& words[5], 26, cpu.cu.itp);
cu                450 src/dps8/dps8_ins.c     putbits36_1 (& words[5], 27, cpu.cu.rfi);
cu                451 src/dps8/dps8_ins.c     putbits36_1 (& words[5], 28, cpu.cu.its);
cu                452 src/dps8/dps8_ins.c     putbits36_1 (& words[5], 29, cpu.cu.FIF);
cu                453 src/dps8/dps8_ins.c     putbits36_6 (& words[5], 30, cpu.cu.CT_HOLD);
cu                457 src/dps8/dps8_ins.c     words[6] = cpu.cu.IWB;
cu                461 src/dps8/dps8_ins.c     words[7] = cpu.cu.IRODD;
cu                557 src/dps8/dps8_ins.c     cpu.cu.delta        = 0;
cu                558 src/dps8/dps8_ins.c     cpu.cu.repeat_first = false;
cu                559 src/dps8/dps8_ins.c     cpu.cu.rpt          = false;
cu                560 src/dps8/dps8_ins.c     cpu.cu.rd           = false;
cu                561 src/dps8/dps8_ins.c     cpu.cu.rl           = false;
cu                562 src/dps8/dps8_ins.c     cpu.cu.pot          = false;
cu                563 src/dps8/dps8_ins.c     cpu.cu.itp          = false;
cu                564 src/dps8/dps8_ins.c     cpu.cu.its          = false;
cu                565 src/dps8/dps8_ins.c     cpu.cu.xde          = false;
cu                566 src/dps8/dps8_ins.c     cpu.cu.xdo          = false;
cu                579 src/dps8/dps8_ins.c     cpu.cu.XSF          = getbits36_1  (words[0], 19);
cu                580 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "%s sets XSF to %o\n", __func__, cpu.cu.XSF);
cu                599 src/dps8/dps8_ins.c     cpu.cu.APUCycleBits = (word12) ((cpu.cu.APUCycleBits & 07770) | (word12) getbits36_3 (words[0], 33));
cu                604 src/dps8/dps8_ins.c 
cu                605 src/dps8/dps8_ins.c 
cu                606 src/dps8/dps8_ins.c 
cu                607 src/dps8/dps8_ins.c 
cu                608 src/dps8/dps8_ins.c 
cu                609 src/dps8/dps8_ins.c 
cu                610 src/dps8/dps8_ins.c 
cu                611 src/dps8/dps8_ins.c 
cu                612 src/dps8/dps8_ins.c 
cu                613 src/dps8/dps8_ins.c 
cu                614 src/dps8/dps8_ins.c 
cu                615 src/dps8/dps8_ins.c 
cu                616 src/dps8/dps8_ins.c 
cu                617 src/dps8/dps8_ins.c 
cu                618 src/dps8/dps8_ins.c 
cu                619 src/dps8/dps8_ins.c 
cu                620 src/dps8/dps8_ins.c 
cu                621 src/dps8/dps8_ins.c 
cu                622 src/dps8/dps8_ins.c 
cu                623 src/dps8/dps8_ins.c 
cu                624 src/dps8/dps8_ins.c 
cu                625 src/dps8/dps8_ins.c 
cu                626 src/dps8/dps8_ins.c 
cu                627 src/dps8/dps8_ins.c 
cu                628 src/dps8/dps8_ins.c 
cu                639 src/dps8/dps8_ins.c     cpu.cu.delta        = getbits36_6  (words[2], 30);
cu                645 src/dps8/dps8_ins.c     cpu.cu.TSN_PRNO[0]  = getbits36_3  (words[3], 18);
cu                646 src/dps8/dps8_ins.c     cpu.cu.TSN_VALID[0] = getbits36_1  (words[3], 21);
cu                647 src/dps8/dps8_ins.c     cpu.cu.TSN_PRNO[1]  = getbits36_3  (words[3], 22);
cu                648 src/dps8/dps8_ins.c     cpu.cu.TSN_VALID[1] = getbits36_1  (words[3], 25);
cu                649 src/dps8/dps8_ins.c     cpu.cu.TSN_PRNO[2]  = getbits36_3  (words[3], 26);
cu                650 src/dps8/dps8_ins.c     cpu.cu.TSN_VALID[2] = getbits36_1  (words[3], 29);
cu                655 src/dps8/dps8_ins.c     cpu.cu.IR           = getbits36_18 (words[4], 18); // HWR
cu                662 src/dps8/dps8_ins.c     cpu.cu.repeat_first = getbits36_1  (words[5], 18);
cu                663 src/dps8/dps8_ins.c     cpu.cu.rpt          = getbits36_1  (words[5], 19);
cu                664 src/dps8/dps8_ins.c     cpu.cu.rd           = getbits36_1  (words[5], 20);
cu                665 src/dps8/dps8_ins.c     cpu.cu.rl           = getbits36_1  (words[5], 21);
cu                666 src/dps8/dps8_ins.c     cpu.cu.pot          = getbits36_1  (words[5], 22);
cu                668 src/dps8/dps8_ins.c     cpu.cu.xde          = getbits36_1  (words[5], 24);
cu                669 src/dps8/dps8_ins.c     cpu.cu.xdo          = getbits36_1  (words[5], 25);
cu                670 src/dps8/dps8_ins.c     cpu.cu.itp          = getbits36_1  (words[5], 26);
cu                671 src/dps8/dps8_ins.c     cpu.cu.rfi          = getbits36_1  (words[5], 27);
cu                672 src/dps8/dps8_ins.c     cpu.cu.its          = getbits36_1  (words[5], 28);
cu                673 src/dps8/dps8_ins.c     cpu.cu.FIF          = getbits36_1  (words[5], 29);
cu                674 src/dps8/dps8_ins.c     cpu.cu.CT_HOLD      = getbits36_6  (words[5], 30);
cu                678 src/dps8/dps8_ins.c     cpu.cu.IWB = words[6];
cu                682 src/dps8/dps8_ins.c     cpu.cu.IRODD = words[7];
cu               1098 src/dps8/dps8_ins.c     if (cpu.cu.rd && ((cpu.PPR.IC & 1) != 0))
cu               1100 src/dps8/dps8_ins.c         if (cpu.cu.repeat_first)
cu               1106 src/dps8/dps8_ins.c     else if (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl)
cu               1108 src/dps8/dps8_ins.c         if (cpu.cu.repeat_first)
cu               1112 src/dps8/dps8_ins.c               Read (addr, & cpu.cu.IWB, INSTRUCTION_FETCH);
cu               1117 src/dps8/dps8_ins.c                 cpu.cu.IWB   = tmp[0];
cu               1118 src/dps8/dps8_ins.c                 cpu.cu.IRODD = tmp[1];
cu               1134 src/dps8/dps8_ins.c             cpu.cu.IWB   = tmp[0];
cu               1135 src/dps8/dps8_ins.c             cpu.cu.IRODD = tmp[1];
cu               1139 src/dps8/dps8_ins.c             Read (addr, & cpu.cu.IWB, INSTRUCTION_FETCH);
cu               1140 src/dps8/dps8_ins.c             cpu.cu.IRODD = cpu.cu.IWB;
cu               1274 src/dps8/dps8_ins.c     if (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl)
cu               1290 src/dps8/dps8_ins.c     if (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl)
cu               1370 src/dps8/dps8_ins.c   const bool restart      = cpu.cu.rfi;   // instruction is to be restarted
cu               1371 src/dps8/dps8_ins.c   cpu.cu.rfi              = 0;
cu               1418 src/dps8/dps8_ins.c     cpu.cu.TSN_VALID[0] = 0;
cu               1419 src/dps8/dps8_ins.c     cpu.cu.TSN_VALID[1] = 0;
cu               1420 src/dps8/dps8_ins.c     cpu.cu.TSN_VALID[2] = 0;
cu               1421 src/dps8/dps8_ins.c     cpu.cu.TSN_PRNO[0]  = 0;
cu               1422 src/dps8/dps8_ins.c     cpu.cu.TSN_PRNO[1]  = 0;
cu               1423 src/dps8/dps8_ins.c     cpu.cu.TSN_PRNO[2]  = 0;
cu               1433 src/dps8/dps8_ins.c   cpu.cu.XSF = 0;
cu               1435 src/dps8/dps8_ins.c   cpu.cu.pot = 0;
cu               1436 src/dps8/dps8_ins.c   cpu.cu.its = 0;
cu               1437 src/dps8/dps8_ins.c   cpu.cu.itp = 0;
cu               1444 src/dps8/dps8_ins.c   cpu.cu.APUCycleBits &= 07770;
cu               1456 src/dps8/dps8_ins.c     if (opcode == 0717 && !opcodeX && cpu.cu.xde && cpu.cu.xdo /* even instruction being executed */)
cu               1462 src/dps8/dps8_ins.c       if (cpu.cu.xde && cpu.cu.xdo /* even instr being executed */)
cu               1466 src/dps8/dps8_ins.c       if (!cpu.cu.xde && cpu.cu.xdo /* odd instr being executed */ && !(cpu.PPR.IC & 1))
cu               1472 src/dps8/dps8_ins.c     if (opcode == 0560 && !opcodeX && cpu.cu.xde && !(cpu.PPR.IC & 1))
cu               1482 src/dps8/dps8_ins.c   if (unlikely (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl)) {
cu               1489 src/dps8/dps8_ins.c           if (cpu.cu.rl)
cu               1515 src/dps8/dps8_ins.c     if (unlikely (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl)) {
cu               1520 src/dps8/dps8_ins.c     if (unlikely (cpu.cu.rl)) {
cu               1694 src/dps8/dps8_ins.c   if (unlikely (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl)) {
cu               1753 src/dps8/dps8_ins.c     sim_debug (DBG_TRACEEXT, & cpu_dev, "RPT/RPD first %d rpt %d rd %d e/o %d X0 %06o a %d b %d\n", cpu.cu.repeat_first, cpu.cu.rpt, cpu.cu.rd, cpu.PPR.IC & 1, cpu.rX[0], !! (cpu.rX[0] & 01000), !! (cpu.rX[0] & 0400));
cu               1758 src/dps8/dps8_ins.c     if (cpu.cu.repeat_first) {
cu               1767 src/dps8/dps8_ins.c       if (cpu.cu.rpt || (cpu.cu.rd && icOdd) || cpu.cu.rl)
cu               1768 src/dps8/dps8_ins.c         cpu.cu.repeat_first = false;
cu               1773 src/dps8/dps8_ins.c       if (cpu.cu.rpt ||              // rpt
cu               1774 src/dps8/dps8_ins.c          (cpu.cu.rd && icEven) ||   // rpd & even
cu               1775 src/dps8/dps8_ins.c          (cpu.cu.rd && icOdd)  ||   // rpd & odd
cu               1776 src/dps8/dps8_ins.c           cpu.cu.rl) {               // rl
cu               1884 src/dps8/dps8_ins.c         cpu.cu.TSN_VALID [0] = 0;
cu               1896 src/dps8/dps8_ins.c       cpu.cu.CT_HOLD = 0; // Clear interrupted IR mode flag
cu               1918 src/dps8/dps8_ins.c       if (cpu.cu.rl) {
cu               1999 src/dps8/dps8_ins.c   bool rf = cpu.cu.repeat_first;
cu               2000 src/dps8/dps8_ins.c   if (rf && cpu.cu.rd && icEven)
cu               2003 src/dps8/dps8_ins.c   if (unlikely ((! rf) && (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl))) {
cu               2009 src/dps8/dps8_ins.c     if (cpu.cu.rpt || cpu.cu.rd) {
cu               2015 src/dps8/dps8_ins.c       sim_debug (DBG_TRACEEXT, & cpu_dev, "RPT/RPD delta first %d rf %d rpt %d rd %d " "e/o %d X0 %06o a %d b %d\n", cpu.cu.repeat_first, rf, cpu.cu.rpt, cpu.cu.rd, icOdd, cpu.rX[0], rptA, rptB);
cu               2017 src/dps8/dps8_ins.c       if (cpu.cu.rpt) { // rpt
cu               2019 src/dps8/dps8_ins.c         uint Xn = (uint) getbits36_3 (cpu.cu.IWB, 36 - 3);
cu               2020 src/dps8/dps8_ins.c         cpu.TPR.CA = (cpu.rX[Xn] + cpu.cu.delta) & AMASK;
cu               2032 src/dps8/dps8_ins.c       if (cpu.cu.rd && icOdd && rptA) { // rpd, even instruction
cu               2035 src/dps8/dps8_ins.c         uint Xn = (uint) getbits36_3 (cpu.cu.IWB, 36 - 3);
cu               2036 src/dps8/dps8_ins.c         cpu.TPR.CA = (cpu.rX[Xn] + cpu.cu.delta) & AMASK;
cu               2044 src/dps8/dps8_ins.c       if (cpu.cu.rd && icOdd && rptB) { // rpdb, odd instruction
cu               2047 src/dps8/dps8_ins.c         uint Xn = (uint) getbits36_3 (cpu.cu.IRODD, 36 - 3);
cu               2048 src/dps8/dps8_ins.c         cpu.TPR.CA = (cpu.rX[Xn] + cpu.cu.delta) & AMASK;
cu               2072 src/dps8/dps8_ins.c       flt = (cpu.cu.rl || cpu.cu.rpt || cpu.cu.rd) && cpu.dlyFlt; // L68
cu               2074 src/dps8/dps8_ins.c       flt = cpu.cu.rl && cpu.dlyFlt;
cu               2084 src/dps8/dps8_ins.c     if (cpu.cu.rpt || (cpu.cu.rd && icOdd) || cpu.cu.rl) {
cu               2158 src/dps8/dps8_ins.c         cpu.cu.rpt = false;
cu               2159 src/dps8/dps8_ins.c         cpu.cu.rd = false;
cu               2160 src/dps8/dps8_ins.c         cpu.cu.rl = false;
cu               2166 src/dps8/dps8_ins.c     if (cpu.cu.rl) {
cu               2170 src/dps8/dps8_ins.c         cpu.cu.rpt = false;
cu               2171 src/dps8/dps8_ins.c         cpu.cu.rd = false;
cu               2172 src/dps8/dps8_ins.c         cpu.cu.rl = false;
cu               2176 src/dps8/dps8_ins.c         uint Xn = (uint) getbits36_3 (cpu.cu.IWB, 36 - 3);
cu               2200 src/dps8/dps8_ins.c     sim_debug (DBG_REGDUMPAQI, &cpu_dev, "A=%012"PRIo64" Q=%012"PRIo64" IR:%s\n", cpu.rA, cpu.rQ, dump_flags (buf, cpu.cu.IR));
cu               2238 src/dps8/dps8_ins.c             if (cpu.cu.rpt || cpu.cu.rd || cpu.cu.rl)
cu               2722 src/dps8/dps8_ins.c           cmp36 (cpu.rQ, cpu.CY, &cpu.cu.IR);
cu               2934 src/dps8/dps8_ins.c           cmp36 (cpu.rA, cpu.CY, &cpu.cu.IR);
cu               2947 src/dps8/dps8_ins.c                                  & cpu.cu.IR, & ovf);
cu               2983 src/dps8/dps8_ins.c             if (! (cpu.cu.IR & I_NEG) && ! (cpu.cu.IR & I_ZERO))
cu               3231 src/dps8/dps8_ins.c                                  & cpu.cu.IR, & ovf);
cu               3243 src/dps8/dps8_ins.c             if (cpu.cu.IR & (I_NEG | I_ZERO))
cu               3390 src/dps8/dps8_ins.c           DPS8M_ (cpu.CY = cpu.cu.IR & 0000000777770LL; )
cu               3392 src/dps8/dps8_ins.c           L68_ (cpu.CY = cpu.cu.IR & 0000000777760LL;)
cu               3395 src/dps8/dps8_ins.c             cpu.CY = cpu.cu.IR & 0000000777600LL;
cu               3441 src/dps8/dps8_ins.c             cpu.rA = compl36 (cpu.CY, & cpu.cu.IR, & ovf);
cu               3452 src/dps8/dps8_ins.c             cpu.rQ = compl36 (cpu.CY, & cpu.cu.IR, & ovf);
cu               3472 src/dps8/dps8_ins.c             cpu.rX[n] = compl18 (GETHI (cpu.CY), & cpu.cu.IR, & ovf);
cu               3769 src/dps8/dps8_ins.c           DPS8M_ (SETLO (cpu.CY, cpu.cu.IR & 0777770);)
cu               3770 src/dps8/dps8_ins.c           L68_ (SETLO (cpu.CY, cpu.cu.IR & 0777760);)
cu               4229 src/dps8/dps8_ins.c             cpu.rA = Add36b (cpu.rA, cpu.CY, 0, I_ZNOC, & cpu.cu.IR, & ovf);
cu               4248 src/dps8/dps8_ins.c                                    tmp72, 0, I_ZNOC, & cpu.cu.IR, & ovf);
cu               4269 src/dps8/dps8_ins.c                                    tmp72, 0, I_ZNOC, & cpu.cu.IR, & ovf);
cu               4294 src/dps8/dps8_ins.c                             tmp72, 0, I_ZNC, & cpu.cu.IR, & ovf);
cu               4315 src/dps8/dps8_ins.c             cpu.rA = Add36b (cpu.rA, cpu.CY, 0, I_ZNC, & cpu.cu.IR, & ovf);
cu               4334 src/dps8/dps8_ins.c             cpu.rQ = Add36b (cpu.rQ, cpu.CY, 0, I_ZNC, & cpu.cu.IR, & ovf);
cu               4358 src/dps8/dps8_ins.c                              & cpu.cu.IR, & ovf);
cu               4386 src/dps8/dps8_ins.c                                  & cpu.cu.IR, & ovf);
cu               4407 src/dps8/dps8_ins.c                              & cpu.cu.IR, & ovf);
cu               4420 src/dps8/dps8_ins.c             cpu.CY = Add36b (cpu.rQ, cpu.CY, 0, I_ZNOC, & cpu.cu.IR, & ovf);
cu               4444 src/dps8/dps8_ins.c                                    I_ZNOC, & cpu.cu.IR, & ovf);
cu               4461 src/dps8/dps8_ins.c                                  I_ZNOC, & cpu.cu.IR, & ovf);
cu               4480 src/dps8/dps8_ins.c                              I_ZNOC, & cpu.cu.IR, & ovf);
cu               4499 src/dps8/dps8_ins.c             cpu.rA = Sub36b (cpu.rA, cpu.CY, 1, I_ZNOC, & cpu.cu.IR, & ovf);
cu               4518 src/dps8/dps8_ins.c                             I_ZNOC, & cpu.cu.IR,
cu               4538 src/dps8/dps8_ins.c             cpu.rA = Sub36b (cpu.rA, cpu.CY, 1, I_ZNC, & cpu.cu.IR, & ovf);
cu               4562 src/dps8/dps8_ins.c                             I_ZNC, & cpu.cu.IR, & ovf);
cu               4579 src/dps8/dps8_ins.c             cpu.rQ = Sub36b (cpu.rQ, cpu.CY, 1, I_ZNC, & cpu.cu.IR, & ovf);
cu               4606 src/dps8/dps8_ins.c                              I_ZNC, & cpu.cu.IR, & ovf);
cu               4621 src/dps8/dps8_ins.c             cpu.rQ = Sub36b (cpu.rQ, cpu.CY, 1, I_ZNOC, & cpu.cu.IR, & ovf);
cu               4649 src/dps8/dps8_ins.c                                  I_ZNOC, & cpu.cu.IR, & ovf);
cu               4666 src/dps8/dps8_ins.c             cpu.CY = Sub36b (cpu.rA, cpu.CY, 1, I_ZNOC, & cpu.cu.IR, & ovf);
cu               4680 src/dps8/dps8_ins.c             cpu.CY = Sub36b (cpu.rQ, cpu.CY, 1, I_ZNOC, & cpu.cu.IR, & ovf);
cu               4705 src/dps8/dps8_ins.c                                    I_ZNOC, & cpu.cu.IR, & ovf);
cu               4722 src/dps8/dps8_ins.c                              I_ZNOC, & cpu.cu.IR, & ovf);
cu               4741 src/dps8/dps8_ins.c                                  I_ZNOC, & cpu.cu.IR, & ovf);
cu               5152 src/dps8/dps8_ins.c             cmp72 (trAQ, tmp72, &cpu.cu.IR);
cu               5175 src/dps8/dps8_ins.c             cmp18 (cpu.rX[n], GETHI (cpu.CY), &cpu.cu.IR);
cu               5191 src/dps8/dps8_ins.c           cmp36wl (cpu.rA, cpu.CY, cpu.rQ, &cpu.cu.IR);
cu               6164 src/dps8/dps8_ins.c             cpu.cu.IR = tempIR;
cu               6809 src/dps8/dps8_ins.c           cpu.cu.xde = 1;
cu               6810 src/dps8/dps8_ins.c           cpu.cu.xdo = 0;
cu               6814 src/dps8/dps8_ins.c           cpu.cu.IWB = cpu.CY;
cu               6853 src/dps8/dps8_ins.c           cpu.cu.xde = 1;
cu               6854 src/dps8/dps8_ins.c           cpu.cu.xdo = 1;
cu               6858 src/dps8/dps8_ins.c           cpu.cu.IWB   = cpu.Ypair[0];
cu               6859 src/dps8/dps8_ins.c           cpu.cu.IRODD = cpu.Ypair[1];
cu               6913 src/dps8/dps8_ins.c             cpu.cu.delta = i->tag;
cu               6923 src/dps8/dps8_ins.c             cpu.cu.rd = 1;
cu               6924 src/dps8/dps8_ins.c             cpu.cu.repeat_first = 1;
cu               6931 src/dps8/dps8_ins.c             cpu.cu.delta = i->tag;
cu               6939 src/dps8/dps8_ins.c             cpu.cu.rl           = 1;
cu               6940 src/dps8/dps8_ins.c             cpu.cu.repeat_first = 1;
cu               6947 src/dps8/dps8_ins.c             cpu.cu.delta = i->tag;
cu               6955 src/dps8/dps8_ins.c             cpu.cu.rpt          = 1;
cu               6956 src/dps8/dps8_ins.c             cpu.cu.repeat_first = 1;
cu               7609 src/dps8/dps8_ins.c                 if (cpu.tweaks.l68_mode || cpu.cu.PT_ON) // only clear when enabled
cu               7631 src/dps8/dps8_ins.c                   cpu.cu.PT_ON = 1;
cu               7633 src/dps8/dps8_ins.c                   cpu.cu.PT_ON = 0;
cu               7654 src/dps8/dps8_ins.c                 if (cpu.tweaks.l68_mode || cpu.cu.SD_ON) // only clear when enabled
cu               7675 src/dps8/dps8_ins.c                   cpu.cu.SD_ON = 1;
cu               7677 src/dps8/dps8_ins.c                   cpu.cu.SD_ON = 0;
cu               8365 src/dps8/dps8_ins.c 
cu               8417 src/dps8/dps8_ins.c           if (GET_I (cpu.cu.IWB) ? bG7PendingNoTRO () : bG7Pending ())
cu               8423 src/dps8/dps8_ins.c 
cu               9383 src/dps8/dps8_ins.c     if (get_addr_mode () == ABSOLUTE_mode && ! (cpu.cu.XSF || cpu.currentInstruction.b29)) // ISOLTS-860
cu               9502 src/dps8/dps8_ins.c     if (cpu.cu.FIF) // fault occurred during instruction fetch
cu               9510 src/dps8/dps8_ins.c         cpu.cu.rfi = 0;
cu               9516 src/dps8/dps8_ins.c     if (cpu.cu.rfi)
cu               9523 src/dps8/dps8_ins.c         cpu.cu.rfi = 0;
cu               9540 src/dps8/dps8_ins.c         cpu.cu.rfi = 0;
cu               9544 src/dps8/dps8_ins.c     if (cpu.cu.rfi || // S/W asked for the instruction to be started
cu               9545 src/dps8/dps8_ins.c         cpu.cu.FIF)   // fault occurred during instruction fetch
cu               9554 src/dps8/dps8_ins.c         cpu.cu.rfi = 0;
cu               9567 src/dps8/dps8_ins.c         cpu.cu.rfi = 1;
cu               9598 src/dps8/dps8_ins.c         cpu.cu.rfi = 0;
cu               9612 src/dps8/dps8_ins.c         cpu.cu.rfi = 0;
cu               9620 src/dps8/dps8_ins.c         cpu.cu.rfi = 1;
cu               9637 src/dps8/dps8_ins.c         cpu.cu.rfi = 1;
cu                601 src/dps8/dps8_math.c   m3 = Add72b (m1, m2, 0, I_CARRY, & cpu.cu.IR, & ovf);
cu               2124 src/dps8/dps8_math.c   word72 m3 = Add72b (m1, m2, 0, I_CARRY, & cpu.cu.IR, & ovf);
cu               1847 src/dps8/dps8_sys.c 
cu               1848 src/dps8/dps8_sys.c 
cu               1849 src/dps8/dps8_sys.c 
cu               1850 src/dps8/dps8_sys.c 
cu               4086 src/dps8/dps8_sys.c     { "cpus[].cu",              SYM_STRUCT_OFFSET, SYM_PTR,       offsetof (cpu_state_t,           cu) },
cu                108 src/dps8/hdbg.h #  define HDBGRegIR(c) hdbgRegW (hreg_IR, (word36) cpu.cu.IR, c)