switches 162 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.FLT_BASE); switches 164 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.cpu_num); switches 166 src/dps8/dps8_cpu.c (unsigned long long)cpus[cpu_unit_idx].switches.data_switches); switches 168 src/dps8/dps8_cpu.c PBI_64((unsigned long long)cpus[cpu_unit_idx].switches.data_switches)); switches 172 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.addr_switches); switches 174 src/dps8/dps8_cpu.c PBI_32(cpus[cpu_unit_idx].switches.addr_switches)); switches 180 src/dps8/dps8_cpu.c 'A' + i, cpus[cpu_unit_idx].switches.enable [i]); switches 182 src/dps8/dps8_cpu.c 'A' + i, cpus[cpu_unit_idx].switches.init_enable [i]); switches 184 src/dps8/dps8_cpu.c 'A' + i, cpus[cpu_unit_idx].switches.assignment [i]); switches 186 src/dps8/dps8_cpu.c 'A' + i, cpus[cpu_unit_idx].switches.interlace [i]); switches 188 src/dps8/dps8_cpu.c 'A' + i, cpus[cpu_unit_idx].switches.store_size [i]); switches 191 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.procMode == \ switches 192 src/dps8/dps8_cpu.c procModeMultics ? "Multics" : cpus[cpu_unit_idx].switches.procMode == procModeGCOS ? "GCOS" : "???", switches 193 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.procMode); switches 195 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable_cache ? "Enabled" : "Disabled"); switches 197 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.sdwam_enable ? "Enabled" : "Disabled"); switches 199 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.ptwam_enable ? "Enabled" : "Disabled"); switches 493 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.FLT_BASE = (uint) v; switches 495 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.cpu_num = (uint) v; switches 497 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.data_switches = (word36) v; switches 511 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.data_switches = d; switches 514 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.addr_switches = (word18) v; switches 516 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.procMode = v ? procModeMultics : procModeGCOS; switches 527 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [port_num] = (uint) v; switches 529 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [port_num] = (uint) v; switches 531 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [port_num] = (uint) v; switches 533 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [port_num] = (uint) v; switches 560 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [port_num] = (uint) v; switches 563 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable_cache = (uint) v ? true : false; switches 565 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.sdwam_enable = (uint) v ? true : false; switches 567 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.ptwam_enable = (uint) v ? true : false; switches 618 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].isolts_switches_save = cpus[cpu_unit_idx].switches; switches 620 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.data_switches = 00000030714000; switches 621 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.addr_switches = 0100150; switches 624 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [0] = 0; switches 625 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [0] = false; switches 626 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [0] = false; switches 627 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [0] = false; switches 628 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [0] = store_sz; switches 630 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [1] = 0; switches 631 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [1] = false; switches 632 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [1] = true; switches 633 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [1] = false; switches 634 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [1] = store_sz; switches 636 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [2] = 0; switches 637 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [2] = false; switches 638 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [2] = false; switches 639 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [2] = false; switches 640 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [2] = store_sz; switches 642 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [3] = 0; switches 643 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [3] = false; switches 644 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [3] = false; switches 645 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [3] = false; switches 646 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [3] = store_sz; switches 649 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [4] = 0; switches 650 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [4] = false; switches 651 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [4] = false; switches 652 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [4] = false; switches 653 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [4] = 3; switches 655 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [5] = 0; switches 656 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [5] = false; switches 657 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [5] = false; switches 658 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [5] = false; switches 659 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [5] = 3; switches 661 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [6] = 0; switches 662 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [6] = false; switches 663 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [6] = false; switches 664 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [6] = false; switches 665 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [6] = 3; switches 667 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [7] = 0; switches 668 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [7] = false; switches 669 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [7] = false; switches 670 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [7] = false; switches 671 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [7] = 3; switches 673 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [1] = true; switches 689 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches = cpus[cpu_unit_idx].isolts_switches_save; switches 852 src/dps8/dps8_cpu.c cpun->switches.assignment[port_num] = port_num; switches 853 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; switches 854 src/dps8/dps8_cpu.c cpun->switches.store_size[port_num] = 2; switches 855 src/dps8/dps8_cpu.c cpun->switches.enable[port_num] = 1; switches 856 src/dps8/dps8_cpu.c cpun->switches.init_enable[port_num] = 1; switches 859 src/dps8/dps8_cpu.c cpun->switches.assignment[port_num] = 0; switches 860 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; switches 861 src/dps8/dps8_cpu.c cpun->switches.store_size[port_num] = 0; switches 862 src/dps8/dps8_cpu.c cpun->switches.enable[port_num] = 0; switches 863 src/dps8/dps8_cpu.c cpun->switches.init_enable[port_num] = 0; switches 877 src/dps8/dps8_cpu.c cpun->switches.assignment[port_num] = port_num; switches 878 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; switches 879 src/dps8/dps8_cpu.c cpun->switches.store_size[port_num] = 7; switches 880 src/dps8/dps8_cpu.c cpun->switches.enable[port_num] = 1; switches 881 src/dps8/dps8_cpu.c cpun->switches.init_enable[port_num] = 1; switches 884 src/dps8/dps8_cpu.c cpun->switches.assignment[port_num] = 0; switches 885 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; switches 886 src/dps8/dps8_cpu.c cpun->switches.store_size[port_num] = 0; switches 887 src/dps8/dps8_cpu.c cpun->switches.enable[port_num] = 0; switches 888 src/dps8/dps8_cpu.c cpun->switches.init_enable[port_num] = 0; switches 981 src/dps8/dps8_cpu.c cpu.cu.SD_ON = cpu.switches.sdwam_enable ? 1 : 0; switches 982 src/dps8/dps8_cpu.c cpu.cu.PT_ON = cpu.switches.ptwam_enable ? 1 : 0; switches 1320 src/dps8/dps8_cpu.c if (! cpu.switches.enable [port_num]) switches 1332 src/dps8/dps8_cpu.c uint store_size = cpu.switches.store_size [port_num]; switches 1362 src/dps8/dps8_cpu.c uint base_addr_wds = sz_wds * cpu.switches.assignment[port_num]; switches 1436 src/dps8/dps8_cpu.c if (sscanf (buffer, "sn: %u", & cpu.switches.serno) == 1) switches 1440 src/dps8/dps8_cpu.c sim_msg ("%s CPU serial number: %u\n", sim_name, cpu.switches.serno); switches 1448 src/dps8/dps8_cpu.c cpus[cpun].switches.serno = sn; switches 1452 src/dps8/dps8_cpu.c sim_name, cpun, cpus[cpun].switches.serno); switches 1570 src/dps8/dps8_cpu.c cpus [0].switches.FLT_BASE = 2; // Some of the UnitTests assume this switches 1843 src/dps8/dps8_cpu.c cpu.cu.IWB = cpu.switches.data_switches; switches 3360 src/dps8/dps8_cpu.c uint fltAddress = (cpu.switches.FLT_BASE << 5) & 07740; switches 4814 src/dps8/dps8_cpu.c putbits36_3 (& rsw2, 33, cpus[cpuNo].switches.cpu_num & 07LL); switches 4824 src/dps8/dps8_cpu.c (void)sprintf (serial, "%-11u", cpus[cpuNo].switches.serno); switches 5221 src/dps8/dps8_cpu.c cpus[i].switches.FLT_BASE = 2; // Some of the UnitTests assume this switches 1625 src/dps8/dps8_cpu.h switches_t switches; switches 422 src/dps8/dps8_ins.c putbits36_3 (& words[2], 27, (word3) cpu.switches.cpu_num); switches 3556 src/dps8/dps8_ins.c if (cpu.switches.procMode == procModeGCOS) switches 8165 src/dps8/dps8_ins.c cpu.rA = cpu.switches.data_switches; switches 8196 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [0] & 07LL) switches 8198 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [0] & 01LL) switches 8200 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [0] & 01LL) switches 8202 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [0] ? 1LL:0LL) switches 8204 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [0] & 07LL) switches 8207 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [1] & 07LL) switches 8209 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [1] & 01LL) switches 8211 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [1] & 01LL) switches 8213 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [1] ? 1LL:0LL) switches 8215 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [1] & 07LL) switches 8218 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [2] & 07LL) switches 8220 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [2] & 01LL) switches 8222 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [2] & 01LL) switches 8224 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [2] ? 1LL:0LL) switches 8226 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [2] & 07LL) switches 8229 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [3] & 07LL) switches 8231 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [3] & 01LL) switches 8233 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [3] & 01LL) switches 8235 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [3] ? 1LL:0LL) switches 8237 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [3] & 07LL) switches 8310 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[0] == 2 ? switches 8312 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[1] == 2 ? switches 8314 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[2] == 2 ? switches 8316 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[3] == 2 ? switches 8328 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.FLT_BASE & 0177LL) switches 8353 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.enable_cache ? 1 : 0) switches 8358 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.procMode) /* 0b1 DPS8M */ switches 8360 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.procMode & 1U) switches 8382 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.cpu_num & 07LL) switches 8419 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [4] & 07LL) switches 8421 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [4] & 01LL) switches 8423 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [4] & 01LL) switches 8425 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [4] ? 1LL:0LL) switches 8427 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [4] & 07LL) switches 8430 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [5] & 07LL) switches 8432 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [5] & 01LL) switches 8434 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [5] & 01LL) switches 8436 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [5] ? 1LL:0LL) switches 8438 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [5] & 07LL) switches 8441 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [6] & 07LL) switches 8443 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [6] & 01LL) switches 8445 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [6] & 01LL) switches 8447 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [6] ? 1LL:0LL) switches 8449 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [6] & 07LL) switches 8452 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [7] & 07LL) switches 8454 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [7] & 01LL) switches 8456 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [7] & 01LL) switches 8458 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [7] ? 1LL:0LL) switches 8460 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [7] & 07LL) switches 8481 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [0] == 2 ? switches 8483 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [1] == 2 ? switches 8485 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [2] == 2 ? switches 8487 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [3] == 2 ? switches 8490 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [4] == 2 ? switches 8492 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [5] == 2 ? switches 8494 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [6] == 2 ? switches 8496 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [7] == 2 ? switches 434 src/dps8/panelScraper.c SETL (bank_a, 27+3, (word3) cpu.switches.cpu_num, 3); switches 1402 src/dps8/panelScraper.c SETS (cpu.switches.data_switches, port_data, 0, 36); switches 1406 src/dps8/panelScraper.c SETS (cpu.switches.addr_switches, port_data, 0, 18); switches 9729 src/simh/scp.c t_stat sim_exp_set (EXPECT *exp, const char *match, int32 cnt, uint32 after, int32 switches, const char *act) switches 9740 src/simh/scp.c if (switches & EXP_TYP_REGEX) { switches 9745 src/simh/scp.c if (switches & EXP_TYP_REGEX_I) { switches 9758 src/simh/scp.c (exp->rules[i].switches & EXP_TYP_PERSIST)) switches 9784 src/simh/scp.c ep->switches = switches; /* set switches */ switches 9791 src/simh/scp.c if (switches & EXP_TYP_REGEX) { switches 9829 src/simh/scp.c size_t compare_size = (exp->rules[i].switches & EXP_TYP_REGEX) ? MAX(10 * strlen(ep->match_pattern), 1024) : exp->rules[i].size; switches 9845 src/simh/scp.c if (ep->switches & EXP_TYP_PERSIST) switches 9847 src/simh/scp.c if (ep->switches & EXP_TYP_CLEARALL) switches 9849 src/simh/scp.c if (ep->switches & EXP_TYP_REGEX) switches 9851 src/simh/scp.c if (ep->switches & EXP_TYP_REGEX_I) switches 9930 src/simh/scp.c if (ep->switches & EXP_TYP_REGEX) { switches 9998 src/simh/scp.c int32 switches = ep->switches; switches 10006 src/simh/scp.c if (ep->switches & EXP_TYP_CLEARALL) /* Clear-all expect rule? */ switches 10009 src/simh/scp.c if (!(ep->switches & EXP_TYP_PERSIST)) /* One shot expect rule? */ switches 10013 src/simh/scp.c (switches & EXP_TYP_TIME) ? switches 187 src/simh/scp.h t_stat sim_exp_set (EXPECT *exp, const char *match, int32 cnt, uint32 after, int32 switches, const char *act); switches 624 src/simh/scp.h const char *switches, switches 630 src/simh/sim_defs.h int32 switches; /* flags */