port_num 583 src/dps8/dps8_cable.c uint ctlr_unit_idx, uint port_num, port_num 642 src/dps8/dps8_cable.c p->port_num = port_num; port_num 1602 src/dps8/dps8_cable.c u, c, p->ctlr_unit_idx, p->port_num, ctlr_type_strs[p->ctlr_type], port_num 153 src/dps8/dps8_cable.h uint port_num; // port# port_num 494 src/dps8/dps8_cpu.c static int port_num = 0; port_num 546 src/dps8/dps8_cpu.c port_num = (int) v; port_num 549 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [port_num] = (uint) v; port_num 551 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [port_num] = (uint) v; port_num 553 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [port_num] = (uint) v; port_num 555 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [port_num] = (uint) v; port_num 582 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [port_num] = (uint) v; port_num 871 src/dps8/dps8_cpu.c for (uint port_num = 0; port_num < N_DPS8M_CPU_PORTS; port_num ++) { port_num 872 src/dps8/dps8_cpu.c cpun->switches.assignment[port_num] = port_num; port_num 873 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; port_num 874 src/dps8/dps8_cpu.c cpun->switches.store_size[port_num] = 2; port_num 875 src/dps8/dps8_cpu.c cpun->switches.enable[port_num] = 1; port_num 876 src/dps8/dps8_cpu.c cpun->switches.init_enable[port_num] = 1; port_num 878 src/dps8/dps8_cpu.c for (uint port_num = N_DPS8M_CPU_PORTS; port_num < N_L68_CPU_PORTS; port_num ++) { port_num 879 src/dps8/dps8_cpu.c cpun->switches.assignment[port_num] = 0; port_num 880 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; port_num 881 src/dps8/dps8_cpu.c cpun->switches.store_size[port_num] = 0; port_num 882 src/dps8/dps8_cpu.c cpun->switches.enable[port_num] = 0; port_num 883 src/dps8/dps8_cpu.c cpun->switches.init_enable[port_num] = 0; port_num 896 src/dps8/dps8_cpu.c for (uint port_num = 0; port_num < N_DPS8M_CPU_PORTS; port_num ++) { port_num 897 src/dps8/dps8_cpu.c cpun->switches.assignment[port_num] = port_num; port_num 898 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; port_num 899 src/dps8/dps8_cpu.c cpun->switches.store_size[port_num] = 7; port_num 900 src/dps8/dps8_cpu.c cpun->switches.enable[port_num] = 1; port_num 901 src/dps8/dps8_cpu.c cpun->switches.init_enable[port_num] = 1; port_num 903 src/dps8/dps8_cpu.c for (uint port_num = N_DPS8M_CPU_PORTS; port_num < N_L68_CPU_PORTS; port_num ++) { port_num 904 src/dps8/dps8_cpu.c cpun->switches.assignment[port_num] = 0; port_num 905 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; port_num 906 src/dps8/dps8_cpu.c cpun->switches.store_size[port_num] = 0; port_num 907 src/dps8/dps8_cpu.c cpun->switches.enable[port_num] = 0; port_num 908 src/dps8/dps8_cpu.c cpun->switches.init_enable[port_num] = 0; port_num 1355 src/dps8/dps8_cpu.c for (int port_num = 0; port_num < n_ports; port_num ++) port_num 1357 src/dps8/dps8_cpu.c if (! cpu.switches.enable [port_num]) port_num 1359 src/dps8/dps8_cpu.c if (! cables->cpu_to_scu[current_running_cpu_idx][port_num].in_use) port_num 1362 src/dps8/dps8_cpu.c uint store_size = cpu.switches.store_size [port_num]; port_num 1371 src/dps8/dps8_cpu.c uint base_addr_bks = (sz_wds * cpu.switches.assignment[port_num]) / SCBANK_SZ; port_num 1374 src/dps8/dps8_cpu.c uint scu_unit_idx = cables->cpu_to_scu[current_running_cpu_idx][port_num].scu_unit_idx; port_num 1419 src/dps8/dps8_cpu.c uint base_wds = sz_wds * cpu.switches.assignment[port_num]; port_num 1448 src/dps8/dps8_cpu.c cpu.sc_num_banks[port_num] = (lower_wds + upper_wds) / SCBANK_SZ; port_num 1449 src/dps8/dps8_cpu.c if (cpu.sc_num_banks[port_num] > port_banks) port_num 1450 src/dps8/dps8_cpu.c cpu.sc_num_banks[port_num] = port_banks; port_num 1454 src/dps8/dps8_cpu.c cpu.sc_fine_port[port_num] = true; port_num 1455 src/dps8/dps8_cpu.c cpu.sc_fine_interlace[port_num] = up->interlace != 0; port_num 1456 src/dps8/dps8_cpu.c cpu.sc_fine_base[port_num] = base_wds; port_num 1457 src/dps8/dps8_cpu.c cpu.sc_fine_window[port_num] = sz_wds; port_num 1458 src/dps8/dps8_cpu.c cpu.sc_fine_scu_base[port_num] = scu_base_wds; port_num 1459 src/dps8/dps8_cpu.c cpu.sc_fine_lower_wds[port_num] = lower_wds; port_num 1460 src/dps8/dps8_cpu.c cpu.sc_fine_upper_wds[port_num] = upper_wds; port_num 1461 src/dps8/dps8_cpu.c cpu.sc_fine_nea_wds[port_num] = nea_wds; port_num 1466 src/dps8/dps8_cpu.c cpu.sc_fine_phys[port_num][slot][unit] = -1; port_num 1475 src/dps8/dps8_cpu.c cpu.sc_fine_phys[port_num][slot][unit] = port_num 1476 src/dps8/dps8_cpu.c (int) port_num * (int) ZONE_SZ + (int) rel; port_num 1504 src/dps8/dps8_cpu.c cpu.sc_addr_map[addr_bks] = (int) port_num * (int) ZONE_SZ + phys_bank * (int) SCBANK_SZ; port_num 1505 src/dps8/dps8_cpu.c cpu.sc_scu_map[addr_bks] = port_num; port_num 1518 src/dps8/dps8_cpu.c for (uint port_num = 0; port_num < N_SCU_PORTS; port_num ++) port_num 1520 src/dps8/dps8_cpu.c if (! cpu.sc_fine_port[port_num]) port_num 1522 src/dps8/dps8_cpu.c uint base = cpu.sc_fine_base[port_num]; port_num 1523 src/dps8/dps8_cpu.c if (addr >= base && addr - base < cpu.sc_fine_window[port_num]) port_num 1524 src/dps8/dps8_cpu.c return (int) port_num; port_num 1723 src/dps8/dps8_cpu.c for (uint port_num = 0; port_num < N_SCU_PORTS; port_num ++) port_num 1725 src/dps8/dps8_cpu.c if (! cpu.sc_fine_port[port_num]) port_num 1727 src/dps8/dps8_cpu.c uint base = cpu.sc_fine_base[port_num]; port_num 1728 src/dps8/dps8_cpu.c if (addr < base || addr - base >= cpu.sc_fine_window[port_num]) port_num 1730 src/dps8/dps8_cpu.c uint scu = cpu.sc_fine_scu_base[port_num] + (addr - base); port_num 1731 src/dps8/dps8_cpu.c uint lower = cpu.sc_fine_lower_wds[port_num]; port_num 1732 src/dps8/dps8_cpu.c uint upper = cpu.sc_fine_upper_wds[port_num]; port_num 1735 src/dps8/dps8_cpu.c if (cpu.sc_fine_interlace[port_num]) port_num 1761 src/dps8/dps8_cpu.c if (present && scu < cpu.sc_fine_nea_wds[port_num] && word < (4u << 20)) port_num 1762 src/dps8/dps8_cpu.c phys = cpu.sc_fine_phys[port_num][store][word / SC_FINE_UNIT]; port_num 1785 src/dps8/dps8_cpu.c for (int port_num = 0; port_num < n_ports; port_num ++) port_num 1787 src/dps8/dps8_cpu.c if (! cpu.switches.enable [port_num]) port_num 1789 src/dps8/dps8_cpu.c uint store_size = cpu.switches.store_size [port_num]; port_num 1798 src/dps8/dps8_cpu.c uint base = sz_wds * cpu.switches.assignment[port_num]; port_num 1801 src/dps8/dps8_cpu.c cpu.neaPort = (word3) port_num; port_num 1833 src/dps8/dps8_cpu.c for (int port_num = 0; port_num < (cpu.tweaks.l68_mode ? N_L68_CPU_PORTS : N_DPS8M_CPU_PORTS); port_num ++) port_num 1836 src/dps8/dps8_cpu.c if (! cpu.switches.enable [port_num]) port_num 1842 src/dps8/dps8_cpu.c if (! cables->cpu_to_scu[current_running_cpu_idx][port_num].in_use) port_num 1848 src/dps8/dps8_cpu.c uint store_size = cpu.switches.store_size [port_num]; port_num 1878 src/dps8/dps8_cpu.c uint base_addr_wds = sz_wds * cpu.switches.assignment[port_num]; port_num 1882 src/dps8/dps8_cpu.c cpu.sc_num_banks[port_num] = num_banks; port_num 1898 src/dps8/dps8_cpu.c addr_bks, addr_bks, cpu.sc_addr_map [addr_bks], port_num); port_num 1903 src/dps8/dps8_cpu.c cpu.sc_addr_map[addr_bks] = (int)((int)port_num * (int)ZONE_SZ + (int)pg * (int)SCBANK_SZ); port_num 1904 src/dps8/dps8_cpu.c cpu.sc_scu_map[addr_bks] = port_num; port_num 1911 src/dps8/dps8_cpu.c port_num, addr_bks, addr_bks, N_SCBANKS, N_SCBANKS); port_num 10087 src/dps8/dps8_ins.c for (int port_num = 0; port_num < n_ports; port_num ++) port_num 10089 src/dps8/dps8_ins.c if (! cpu.switches.enable [port_num] || port_num 10090 src/dps8/dps8_ins.c ! cables->cpu_to_scu[current_running_cpu_idx][port_num].in_use) port_num 10092 src/dps8/dps8_ins.c uint store_size = cpu.switches.store_size [port_num]; port_num 10095 src/dps8/dps8_ins.c uint base = sz_wds * cpu.switches.assignment[port_num]; port_num 10098 src/dps8/dps8_ins.c * portp = (uint) port_num; port_num 1130 src/dps8/dps8_iom.c static uint port_num = 0; port_num 1215 src/dps8/dps8_iom.c port_num = (uint) v; port_num 1221 src/dps8/dps8_iom.c p -> configSwPortAddress[port_num] = (uint) v; port_num 1227 src/dps8/dps8_iom.c p -> configSwPortInterface[port_num] = (uint) v; port_num 1233 src/dps8/dps8_iom.c p -> configSwPortEnable[port_num] = (uint) v; port_num 1239 src/dps8/dps8_iom.c p -> configSwPortSysinitEnable[port_num] = (uint) v; port_num 1245 src/dps8/dps8_iom.c p -> configSwPortHalfsize[port_num] = (uint) v; port_num 1251 src/dps8/dps8_iom.c p -> configSwPortStoresize[port_num] = (uint) v; port_num 1557 src/dps8/dps8_iom.c for (int port_num = 0; port_num < N_SCU_PORTS; port_num ++) port_num 1559 src/dps8/dps8_iom.c if (! cables->iom_to_scu[iom_unit_idx][port_num].in_use) port_num 1561 src/dps8/dps8_iom.c uint scu_unit_idx = cables->iom_to_scu[iom_unit_idx][port_num].scu_unit_idx; port_num 1148 src/dps8/dps8_scu.c for (uint port_num = 0; port_num < N_SCU_PORTS; port_num ++) port_num 1150 src/dps8/dps8_scu.c struct ports * portp = & scu [scu_unit_idx].ports [port_num]; port_num 1891 src/dps8/dps8_scu.c uint port_num = (addr >> 6) & 07; port_num 1894 src/dps8/dps8_scu.c port_num, rega, regq); port_num 1905 src/dps8/dps8_scu.c if (scu [scu_unit_idx ].mask_assignment [p] == port_num) port_num 1918 src/dps8/dps8_scu.c __func__, port_num); port_num 1930 src/dps8/dps8_scu.c __func__, port_num); port_num 1952 src/dps8/dps8_scu.c scu_unit_idx, port_num, mask_num, port_num 2207 src/dps8/dps8_scu.c uint port_num = (addr >> 6) & MASK3; port_num 2213 src/dps8/dps8_scu.c if (up -> mask_assignment [0] == port_num) port_num 2217 src/dps8/dps8_scu.c else if (up -> mask_assignment [1] == port_num) port_num 2242 src/dps8/dps8_scu.c scu_unit_idx, port_num, up -> mask_assignment [0],