rTR               968 src/dps8/dps8_cpu.c     cpu.rTR      = MASK27;
rTR              2520 src/dps8/dps8_cpu.c 
rTR              2528 src/dps8/dps8_cpu.c         cpu.rTR = (word27) (((word27s) cpu.rTR) - (word27s) (cpu.rTRticks / TR_RATE));
rTR              2533 src/dps8/dps8_cpu.c         if (cpu.rTR & ~MASK27)
rTR              2535 src/dps8/dps8_cpu.c             cpu.rTR &= MASK27;
rTR              3066 src/dps8/dps8_cpu.c                   if (cpu.rTR <= ticks)
rTR              3071 src/dps8/dps8_cpu.c                       cpu.rTR = (cpu.rTR - ticks) & MASK27;
rTR              3074 src/dps8/dps8_cpu.c                     cpu.rTR = (cpu.rTR - ticks) & MASK27;
rTR              3076 src/dps8/dps8_cpu.c                   if (cpu.rTR == 0)
rTR              3077 src/dps8/dps8_cpu.c                     cpu.rTR = MASK27;
rTR              3081 src/dps8/dps8_cpu.c                   unsigned long left = (unsigned long) ((uint64) (cpu.rTR) * 125u / 64u);
rTR              3094 src/dps8/dps8_cpu.c                         cpu.rTR = (word27) (left * 64 / 125);
rTR              3106 src/dps8/dps8_cpu.c                       cpu.rTR = MASK27;
rTR              3140 src/dps8/dps8_cpu.c                   if (cpu.rTR <= sys_opts.sys_poll_interval * 512)
rTR              3146 src/dps8/dps8_cpu.c                       cpu.rTR = (cpu.rTR - sys_opts.sys_poll_interval * 512) & MASK27;
rTR              3149 src/dps8/dps8_cpu.c                     cpu.rTR = (cpu.rTR - sys_opts.sys_poll_interval * 512) & MASK27;
rTR              3150 src/dps8/dps8_cpu.c                   if (cpu.rTR == 0)
rTR              3151 src/dps8/dps8_cpu.c                     cpu.rTR = MASK27;
rTR              1644 src/dps8/dps8_cpu.h     word27   rTR;    // timer [map: TR, 9 0's]
rTR              3839 src/dps8/dps8_ins.c             cpu.Yblock8[7] = ((cpu.rTR & MASK27) << 9) | (cpu.rRALR & 07);
rTR              4039 src/dps8/dps8_ins.c             cpu.CY = (cpu.rTR & MASK27) << 9;
rTR              7553 src/dps8/dps8_ins.c           cpu.rTR = (cpu.CY >> 9) & MASK27;
rTR              7557 src/dps8/dps8_ins.c               cpu.shadowTR = cpu.TR0 = cpu.rTR;
rTR              7561 src/dps8/dps8_ins.c                      cpu.rTR, cpu.rTR);
rTR              7564 src/dps8/dps8_ins.c  sim_printf (" ldt %d  PSR:IC %05o:%06o\r\n", cpu.rTR, cpu.PPR.PSR, cpu.PPR.IC);
rTR              4074 src/dps8/dps8_sys.c     { "cpus[].rTR",             SYM_STRUCT_OFFSET, SYM_UINT32_27, offsetof (cpu_state_t,           rTR)         },
rTR              2042 src/dps8/dps8_utils.c 
rTR              2048 src/dps8/dps8_utils.c 
rTR               654 src/dps8/panelScraper.c           SETL (bank_e, 0+3, cpu.rTR, 27);
rTR               541 src/dps8/threadz.c                 (long) rc, (long) usec, (unsigned long) cpu.rTR,