rX                 53 src/dps8/dps8_addrmods.c       return cpu.rX [X (Tdes)];
rX               1670 src/dps8/dps8_cpu.h     word18   rX [8]; // index
rX                327 src/dps8/dps8_eis.c       return cpu.rX [X (reg)];
rX                471 src/dps8/dps8_eis.c           return cpu.rX [n - 8];
rX                546 src/dps8/dps8_eis.c             return cpu.rX [n - 8];
rX               1345 src/dps8/dps8_ins.c         if ((cpu.rX[0] & 00001) == 0)
rX               1361 src/dps8/dps8_ins.c         if ((cpu.rX[0] & 00001) == 0)
rX               1837 src/dps8/dps8_ins.c                cpu.cu.repeat_first, cpu.cu.rpt, cpu.cu.rd, cpu.PPR.IC & 1, cpu.rX[0],
rX               1838 src/dps8/dps8_ins.c                !! (cpu.rX[0] & 01000), !! (cpu.rX[0] & 0400));
rX               1870 src/dps8/dps8_ins.c         sim_debug (DBG_TRACEEXT, & cpu_dev, "rpt/rd/rl repeat first; X%d was %06o\n", Xn, cpu.rX[Xn]);
rX               1872 src/dps8/dps8_ins.c         cpu.TPR.CA = (cpu.rX[Xn] + offset) & AMASK;
rX               1873 src/dps8/dps8_ins.c         cpu.rX[Xn] = cpu.TPR.CA;
rX               1877 src/dps8/dps8_ins.c         sim_debug (DBG_TRACEEXT, & cpu_dev, "rpt/rd/rl repeat first; X%d now %06o\n", Xn, cpu.rX[Xn]);
rX               2112 src/dps8/dps8_ins.c       bool rptA = !! (cpu.rX[0] & 01000);
rX               2113 src/dps8/dps8_ins.c       bool rptB = !! (cpu.rX[0] & 00400);
rX               2117 src/dps8/dps8_ins.c                  cpu.cu.repeat_first, rf, cpu.cu.rpt, cpu.cu.rd, icOdd, cpu.rX[0], rptA, rptB);
rX               2122 src/dps8/dps8_ins.c         cpu.TPR.CA = (cpu.rX[Xn] + cpu.cu.delta) & AMASK;
rX               2123 src/dps8/dps8_ins.c         cpu.rX[Xn] = cpu.TPR.CA;
rX               2127 src/dps8/dps8_ins.c         sim_debug (DBG_TRACEEXT, & cpu_dev, "RPT/RPD delta; X%d now %06o\n", Xn, cpu.rX[Xn]);
rX               2138 src/dps8/dps8_ins.c         cpu.TPR.CA = (cpu.rX[Xn] + cpu.cu.delta) & AMASK;
rX               2139 src/dps8/dps8_ins.c         cpu.rX[Xn] = cpu.TPR.CA;
rX               2143 src/dps8/dps8_ins.c         sim_debug (DBG_TRACEEXT, & cpu_dev, "RPT/RPD delta; X%d now %06o\n", Xn, cpu.rX[Xn]);
rX               2150 src/dps8/dps8_ins.c         cpu.TPR.CA = (cpu.rX[Xn] + cpu.cu.delta) & AMASK;
rX               2151 src/dps8/dps8_ins.c         cpu.rX[Xn] = cpu.TPR.CA;
rX               2155 src/dps8/dps8_ins.c         sim_debug (DBG_TRACEEXT, & cpu_dev, "RPT/RPD delta; X%d now %06o\n", Xn, cpu.rX[Xn]);
rX               2193 src/dps8/dps8_ins.c       uint x = (uint) getbits18 (cpu.rX[0], 0, 8);
rX               2198 src/dps8/dps8_ins.c       putbits18 (& cpu.rX[0], 0, 8, x);
rX               2220 src/dps8/dps8_ins.c       if (TST_I_ZERO && (cpu.rX[0] & 0100)) {
rX               2225 src/dps8/dps8_ins.c       if (!TST_I_ZERO && (cpu.rX[0] & 040)) {
rX               2230 src/dps8/dps8_ins.c       if (TST_I_NEG && (cpu.rX[0] & 020)) {
rX               2235 src/dps8/dps8_ins.c       if (!TST_I_NEG && (cpu.rX[0] & 010)) {
rX               2240 src/dps8/dps8_ins.c       if (TST_I_CARRY && (cpu.rX[0] & 04)) {
rX               2245 src/dps8/dps8_ins.c       if (!TST_I_CARRY && (cpu.rX[0] & 02)) {
rX               2250 src/dps8/dps8_ins.c       if (TST_I_OFLOW && (cpu.rX[0] & 01)) {
rX               2281 src/dps8/dps8_ins.c         cpu.rX[Xn] = cpu.lnk;
rX               2312 src/dps8/dps8_ins.c                cpu.rX[0], cpu.rX[1], cpu.rX[2], cpu.rX[3]);
rX               2314 src/dps8/dps8_ins.c                cpu.rX[4], cpu.rX[5], cpu.rX[6], cpu.rX[7]);
rX               2966 src/dps8/dps8_ins.c             cpu.rX[n] = cpu.TPR.CA;
rX               2995 src/dps8/dps8_ins.c             cpu.rX[opcode10 & 07] = ret;
rX               3112 src/dps8/dps8_ins.c             cpu.rX[n] = GETLO (cpu.CY);
rX               3116 src/dps8/dps8_ins.c             SC_I_ZERO (cpu.rX[n] == 0);
rX               3117 src/dps8/dps8_ins.c             SC_I_NEG (cpu.rX[n] & SIGN18);
rX               3247 src/dps8/dps8_ins.c             cpu.CY      = ((word36) cpu.rX[n]) << 18;
rX               3638 src/dps8/dps8_ins.c             cpu.rX[n] = compl18 (cpup, GETHI (cpu.CY), & cpu.cu.IR, & ovf);
rX               3745 src/dps8/dps8_ins.c             cpu.rX[n] = GETHI (cpu.CY);
rX               3749 src/dps8/dps8_ins.c             SC_I_ZERO (cpu.rX[n] == 0);
rX               3750 src/dps8/dps8_ins.c             SC_I_NEG (cpu.rX[n] & SIGN18);
rX               3758 src/dps8/dps8_ins.c           cpu.rX[0] = GETHI (cpu.Yblock8[0]);
rX               3762 src/dps8/dps8_ins.c           cpu.rX[1] = GETLO (cpu.Yblock8[0]);
rX               3767 src/dps8/dps8_ins.c           cpu.rX[2] = GETHI (cpu.Yblock8[1]);
rX               3771 src/dps8/dps8_ins.c           cpu.rX[3] = GETLO (cpu.Yblock8[1]);
rX               3776 src/dps8/dps8_ins.c           cpu.rX[4] = GETHI (cpu.Yblock8[2]);
rX               3780 src/dps8/dps8_ins.c           cpu.rX[5] = GETLO (cpu.Yblock8[2]);
rX               3785 src/dps8/dps8_ins.c           cpu.rX[6] = GETHI (cpu.Yblock8[3]);
rX               3789 src/dps8/dps8_ins.c           cpu.rX[7] = GETLO (cpu.Yblock8[3]);
rX               3825 src/dps8/dps8_ins.c           SETHI (cpu.Yblock8[0], cpu.rX[0]);
rX               3826 src/dps8/dps8_ins.c           SETLO (cpu.Yblock8[0], cpu.rX[1]);
rX               3828 src/dps8/dps8_ins.c           SETHI (cpu.Yblock8[1], cpu.rX[2]);
rX               3829 src/dps8/dps8_ins.c           SETLO (cpu.Yblock8[1], cpu.rX[3]);
rX               3831 src/dps8/dps8_ins.c           SETHI (cpu.Yblock8[2], cpu.rX[4]);
rX               3832 src/dps8/dps8_ins.c           SETLO (cpu.Yblock8[2], cpu.rX[5]);
rX               3834 src/dps8/dps8_ins.c           SETHI (cpu.Yblock8[3], cpu.rX[6]);
rX               3835 src/dps8/dps8_ins.c           SETLO (cpu.Yblock8[3], cpu.rX[7]);
rX               4070 src/dps8/dps8_ins.c           cpu.CY      = cpu.rX[opcode10 & 07];
rX               4712 src/dps8/dps8_ins.c             cpu.rX[n] = Add18b (cpup, cpu.rX[n], GETHI (cpu.CY), 0, I_ZNC,
rX               4739 src/dps8/dps8_ins.c             cpu.rX[n] = Add18b (cpup, cpu.rX[n], GETHI (cpu.CY), 0,
rX               4798 src/dps8/dps8_ins.c             word18 tmp18 = Add18b (cpup, cpu.rX[n], GETHI (cpu.CY), 0,
rX               4960 src/dps8/dps8_ins.c             cpu.rX[n] = Sub18b (cpup, cpu.rX[n], GETHI (cpu.CY), 1,
rX               5003 src/dps8/dps8_ins.c             cpu.rX[n] = Sub18b (cpup, cpu.rX[n], GETHI (cpu.CY), 1,
rX               5059 src/dps8/dps8_ins.c             word18 tmp18 = Sub18b (cpup, cpu.rX[n], GETHI (cpu.CY), 1,
rX               5530 src/dps8/dps8_ins.c             cmp18 (cpup, cpu.rX[n], GETHI (cpu.CY), &cpu.cu.IR);
rX               5636 src/dps8/dps8_ins.c             word18 tmp18 = cpu.rX[n] & GETHI (cpu.CY);
rX               5663 src/dps8/dps8_ins.c               cpu.rX[n] &= GETHI (cpu.CY);
rX               5664 src/dps8/dps8_ins.c               cpu.rX[n] &= MASK18;
rX               5669 src/dps8/dps8_ins.c               SC_I_ZERO (cpu.rX[n] == 0);
rX               5670 src/dps8/dps8_ins.c               SC_I_NEG (cpu.rX[n] & SIGN18);
rX               5763 src/dps8/dps8_ins.c             word18 tmp18  = cpu.rX[n] | GETHI (cpu.CY);
rX               5789 src/dps8/dps8_ins.c               cpu.rX[n] |= GETHI (cpu.CY);
rX               5790 src/dps8/dps8_ins.c               cpu.rX[n] &= MASK18;
rX               5795 src/dps8/dps8_ins.c               SC_I_ZERO (cpu.rX[n] == 0);
rX               5796 src/dps8/dps8_ins.c               SC_I_NEG (cpu.rX[n] & SIGN18);
rX               5877 src/dps8/dps8_ins.c             word18 tmp18  = cpu.rX[n] ^ GETHI (cpu.CY);
rX               5903 src/dps8/dps8_ins.c             cpu.rX[n] ^= GETHI (cpu.CY);
rX               5904 src/dps8/dps8_ins.c             cpu.rX[n] &= MASK18;
rX               5909 src/dps8/dps8_ins.c             SC_I_ZERO (cpu.rX[n] == 0);
rX               5910 src/dps8/dps8_ins.c             SC_I_NEG (cpu.rX[n] & SIGN18);
rX               5974 src/dps8/dps8_ins.c             word18 tmp18  = cpu.rX[n] & GETHI (cpu.CY);
rX               5978 src/dps8/dps8_ins.c                        n, cpu.rX[n], (word18) (GETHI (cpu.CY) & MASK18),
rX               6056 src/dps8/dps8_ins.c             word18 tmp18 = cpu.rX[n] & ~GETHI (cpu.CY);
rX               7272 src/dps8/dps8_ins.c                 cpu.rX[0] = i->address;    // Entire 18 bits
rX               7288 src/dps8/dps8_ins.c                 cpu.rX[0] = i->address;    // Entire 18 bits
rX               7304 src/dps8/dps8_ins.c                 cpu.rX[0] = i->address;    // Entire 18 bits
rX               9604 src/dps8/dps8_ins.c 
rX               9605 src/dps8/dps8_ins.c 
rX               2780 src/dps8/dps8_sys.c                 where = lookup_address (icSegno, cpu.rX[7] - 1,
rX               2784 src/dps8/dps8_sys.c                     sim_msg ("%05o:%06o %s\n", icSegno, cpu.rX[7] - 1, where);
rX               3392 src/dps8/dps8_sys.c sim_msg ("%05o:%06o\n", cpu.PR[2].SNR, cpu.rX[0]);
rX               3394 src/dps8/dps8_sys.c     if (dbgLookupAddress (cpu.PR[2].SNR, cpu.rX[0], & pa, & msg))
rX               3447 src/dps8/dps8_sys.c 
rX               3449 src/dps8/dps8_sys.c 
rX               3508 src/dps8/dps8_sys.c 
rX               3549 src/dps8/dps8_sys.c sim_msg ("%05o:%06o\n", cpu.PR[2].SNR, cpu.rX[0]);
rX               3551 src/dps8/dps8_sys.c     if (dbgLookupAddress (cpu.PR[2].SNR, cpu.rX[0], & pa, & msg))
rX               4069 src/dps8/dps8_sys.c     { "cpus[].rX[]",            SYM_STRUCT_OFFSET, SYM_ARRAY,     offsetof (cpu_state_t,           rX)          },
rX                 84 src/dps8/hdbg.h #  define HDBGRegXR(i, c) hdbgRegR (hreg_X0+(i), (word36) cpu.rX[i], c)
rX                 85 src/dps8/hdbg.h #  define HDBGRegXW(i, c) hdbgRegW (hreg_X0+(i), (word36) cpu.rX[i], c)
rX                734 src/dps8/panelScraper.c             SETL (bank_d, 0+3, cpu.rX[0], 18);
rX                735 src/dps8/panelScraper.c             SETL (bank_d, 18+3, cpu.rX[1], 18);
rX                736 src/dps8/panelScraper.c             SETL (bank_e, 0+3, cpu.rX[2], 18);
rX                737 src/dps8/panelScraper.c             SETL (bank_e, 18+3, cpu.rX[3], 18);
rX                743 src/dps8/panelScraper.c             SETL (bank_d, 0+3, cpu.rX[4], 18);
rX                744 src/dps8/panelScraper.c             SETL (bank_d, 18+3, cpu.rX[5], 18);
rX                745 src/dps8/panelScraper.c             SETL (bank_e, 0+3, cpu.rX[6], 18);
rX                746 src/dps8/panelScraper.c             SETL (bank_e, 18+3, cpu.rX[7], 18);