interlace 203 src/dps8/dps8_cpu.c 'A' + i, cpus[cpu_unit_idx].switches.interlace [i]); interlace 540 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [port_num] = (uint) v; interlace 634 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [0] = false; interlace 640 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [1] = false; interlace 646 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [2] = false; interlace 652 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [3] = false; interlace 659 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [4] = false; interlace 665 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [5] = false; interlace 671 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [6] = false; interlace 677 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [7] = false; interlace 860 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; interlace 867 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; interlace 885 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; interlace 892 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; interlace 709 src/dps8/dps8_cpu.h uint interlace [N_CPU_PORTS]; // 0/2/4 interlace 8271 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [0] ? 1LL:0LL) interlace 8282 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [1] ? 1LL:0LL) interlace 8293 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [2] ? 1LL:0LL) interlace 8304 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [3] ? 1LL:0LL) interlace 8379 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[0] == 2 ? interlace 8381 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[1] == 2 ? interlace 8383 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[2] == 2 ? interlace 8385 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[3] == 2 ? interlace 8494 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [4] ? 1LL:0LL) interlace 8505 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [5] ? 1LL:0LL) interlace 8516 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [6] ? 1LL:0LL) interlace 8527 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [7] ? 1LL:0LL) interlace 8550 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [0] == 2 ? interlace 8552 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [1] == 2 ? interlace 8554 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [2] == 2 ? interlace 8556 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [3] == 2 ? interlace 8559 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [4] == 2 ? interlace 8561 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [5] == 2 ? interlace 8563 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [6] == 2 ? interlace 8565 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [7] == 2 ? interlace 595 src/dps8/dps8_scu.c uint interlace; // 1 bit interlace 685 src/dps8/dps8_scu.c sim_printf("Interlace: %o\r\n", scup -> interlace); interlace 937 src/dps8/dps8_scu.c sw -> interlace = (uint) v; interlace 1140 src/dps8/dps8_scu.c up -> interlace = sw -> interlace; interlace 1745 src/dps8/dps8_scu.c up -> interlace = (rega >> 5) & 1; interlace 2055 src/dps8/dps8_scu.c putbits36_1 (& a, 30, (word1) up -> interlace); interlace 49 src/dps8/dps8_scu.h uint interlace; // 1 bit