cpt1U 2113 src/dps8/dps8_cpu.c CPT (cpt1U, 16); // LUF cpt1U 2470 src/dps8/dps8_cpu.c CPT (cpt1U, 0); // Interrupt cycle cpt1U 2491 src/dps8/dps8_cpu.c CPT (cpt1U, 1); // safe store complete cpt1U 2508 src/dps8/dps8_cpu.c CPT (cpt1U, 2); // interrupt pending cpt1U 2517 src/dps8/dps8_cpu.c CPT (cpt1U, 3); // interrupt identified cpt1U 2531 src/dps8/dps8_cpu.c CPT (cpt1U, 4); // interrupt pair fetched cpt1U 2540 src/dps8/dps8_cpu.c CPT (cpt1U, 5); // interrupt pair spurious cpt1U 2558 src/dps8/dps8_cpu.c CPT (cpt1U, 13); // fetch cycle cpt1U 2624 src/dps8/dps8_cpu.c CPT (cpt1U, 14); // sampling interrupts cpt1U 2691 src/dps8/dps8_cpu.c CPT (cpt1U, 15); // interrupt cpt1U 2740 src/dps8/dps8_cpu.c cpt1U 2778 src/dps8/dps8_cpu.c CPT (cpt1U, 20); // not XEC or RPx cpt1U 2794 src/dps8/dps8_cpu.c CPT (cpt1U, 21); // go to exec cycle cpt1U 2937 src/dps8/dps8_cpu.c CPT (cpt1U, 22); // exec cycle cpt1U 2964 src/dps8/dps8_cpu.c CPT (cpt1U, 23); // execution complete cpt1U 2979 src/dps8/dps8_cpu.c CPT (cpt1U, 27); // XEx instruction cpt1U 2994 src/dps8/dps8_cpu.c CPT (cpt1U, 24); // transfer instruction cpt1U 3012 src/dps8/dps8_cpu.c CPT (cpt1U, 9); // nbar set cpt1U 3021 src/dps8/dps8_cpu.c CPT (cpt1U, 10); // temporary absolute mode cpt1U 3052 src/dps8/dps8_cpu.c CPT (cpt1U, 25); // DIS instruction cpt1U 3230 src/dps8/dps8_cpu.c CPT (cpt1U, 26); // RPx instruction cpt1U 3244 src/dps8/dps8_cpu.c CPT (cpt1U, 12); // cu restored cpt1U 3269 src/dps8/dps8_cpu.c CPT (cpt1U, 12); // cu restored cpt1U 3298 src/dps8/dps8_cpu.c CPT (cpt1U, 27); // XEx instruction cpt1U 3342 src/dps8/dps8_cpu.c CPT (cpt1U, 28); // enter fetch cycle cpt1U 3350 src/dps8/dps8_cpu.c CPT (cpt1U, 29); // sync. fault return cpt1U 3364 src/dps8/dps8_cpu.c CPT (cpt1U, 30); // fault cycle cpt1U 3409 src/dps8/dps8_cpu.c CPT (cpt1U, 31); // safe store complete cpt1U 3449 src/dps8/dps8_cpu.c CPT (cpt1U, 33); // set fault exec cycle cpt1U 1903 src/dps8/dps8_cpu.h #define cpt1U 0 // Instruction processing tracking