cpus              404 src/dps8/dps8_cable.c         cpus[cpu_unit_idx].scu_port[scu_unit_idx]                       = scu_port_num;
cpus              162 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.FLT_BASE);
cpus              164 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.cpu_num);
cpus              166 src/dps8/dps8_cpu.c                 (unsigned long long)cpus[cpu_unit_idx].switches.data_switches);
cpus              168 src/dps8/dps8_cpu.c                     PBI_64((unsigned long long)cpus[cpu_unit_idx].switches.data_switches));
cpus              172 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.addr_switches);
cpus              174 src/dps8/dps8_cpu.c                     PBI_32(cpus[cpu_unit_idx].switches.addr_switches));
cpus              177 src/dps8/dps8_cpu.c     for (int i = 0; i < (cpus[cpu_unit_idx].tweaks.l68_mode ? N_L68_CPU_PORTS : N_DPS8M_CPU_PORTS); i ++)
cpus              180 src/dps8/dps8_cpu.c                     'A' + i, cpus[cpu_unit_idx].switches.enable [i]);
cpus              182 src/dps8/dps8_cpu.c                     'A' + i, cpus[cpu_unit_idx].switches.init_enable [i]);
cpus              184 src/dps8/dps8_cpu.c                     'A' + i, cpus[cpu_unit_idx].switches.assignment [i]);
cpus              186 src/dps8/dps8_cpu.c                     'A' + i, cpus[cpu_unit_idx].switches.interlace [i]);
cpus              188 src/dps8/dps8_cpu.c                     'A' + i, cpus[cpu_unit_idx].switches.store_size [i]);
cpus              191 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.procMode == \
cpus              192 src/dps8/dps8_cpu.c                     procModeMultics ? "Multics" : cpus[cpu_unit_idx].switches.procMode == procModeGCOS ? "GCOS" : "???",
cpus              193 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.procMode);
cpus              195 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.enable_cache ? "Enabled" : "Disabled");
cpus              197 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.sdwam_enable ? "Enabled" : "Disabled");
cpus              199 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.ptwam_enable ? "Enabled" : "Disabled");
cpus              202 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].options.proc_speed);
cpus              204 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.dis_enable);
cpus              208 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.halt_on_unimp);
cpus              210 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.enable_wam);
cpus              212 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.report_faults);
cpus              214 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.tro_enable);
cpus              218 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.drl_fatal);
cpus              220 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.useMap);
cpus              222 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].options.prom_installed);
cpus              224 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].options.hex_mode_installed);
cpus              226 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].options.cache_installed);
cpus              228 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].options.clock_slave_installed);
cpus              230 src/dps8/dps8_cpu.c     if (cpus[cpu_unit_idx].set_affinity)
cpus              231 src/dps8/dps8_cpu.c       sim_msg ("CPU affinity:                 %d\n", cpus[cpu_unit_idx].affinity);
cpus              235 src/dps8/dps8_cpu.c     sim_msg ("ISOLTS mode:                  %01o(8)\n", cpus[cpu_unit_idx].tweaks.isolts_mode);
cpus              236 src/dps8/dps8_cpu.c     sim_msg ("NODIS mode:                   %01o(8)\n", cpus[cpu_unit_idx].tweaks.nodis);
cpus              238 src/dps8/dps8_cpu.c              cpus[cpu_unit_idx].tweaks.l68_mode, cpus[cpu_unit_idx].tweaks.l68_mode ? "6180" : "DPS8/M");
cpus              492 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.FLT_BASE = (uint) v;
cpus              494 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.cpu_num = (uint) v;
cpus              496 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.data_switches = (word36) v;
cpus              510 src/dps8/dps8_cpu.c             cpus[cpu_unit_idx].switches.data_switches = d;
cpus              513 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.addr_switches = (word18) v;
cpus              515 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.procMode = v ? procModeMultics : procModeGCOS;
cpus              517 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].options.proc_speed = (uint) v;
cpus              519 src/dps8/dps8_cpu.c           if ((! cpus[cpu_unit_idx].tweaks.l68_mode) && (int) v > 4) {
cpus              526 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.assignment [port_num] = (uint) v;
cpus              528 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.interlace [port_num] = (uint) v;
cpus              530 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.enable [port_num] = (uint) v;
cpus              532 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.init_enable [port_num] = (uint) v;
cpus              535 src/dps8/dps8_cpu.c             if (cpus[cpu_unit_idx].tweaks.l68_mode) {
cpus              559 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.store_size [port_num] = (uint) v;
cpus              562 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.enable_cache = (uint) v ? true : false;
cpus              564 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.sdwam_enable = (uint) v ? true : false;
cpus              566 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.ptwam_enable = (uint) v ? true : false;
cpus              568 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.dis_enable = (uint) v;
cpus              572 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.halt_on_unimp = (uint) v;
cpus              574 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.enable_wam = (uint) v;
cpus              576 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.report_faults = (uint) v;
cpus              578 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.tro_enable = (uint) v;
cpus              582 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.drl_fatal = (uint) v;
cpus              584 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.useMap = v;
cpus              586 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].options.prom_installed = v;
cpus              588 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].options.hex_mode_installed = v;
cpus              590 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].options.cache_installed = v;
cpus              592 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].options.clock_slave_installed = v;
cpus              594 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.enable_emcall = v;
cpus              599 src/dps8/dps8_cpu.c               cpus[cpu_unit_idx].set_affinity = false;
cpus              603 src/dps8/dps8_cpu.c               cpus[cpu_unit_idx].set_affinity = true;
cpus              604 src/dps8/dps8_cpu.c               cpus[cpu_unit_idx].affinity = (uint) v;
cpus              609 src/dps8/dps8_cpu.c             cpus[cpu_unit_idx].tweaks.isolts_mode = v;
cpus              613 src/dps8/dps8_cpu.c                 if (cpus[cpu_unit_idx].tweaks.l68_mode) // L68
cpus              617 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].isolts_switches_save     = cpus[cpu_unit_idx].switches;
cpus              618 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].isolts_switches_saved    = true;
cpus              620 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.data_switches   = 00000030714000;
cpus              621 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.addr_switches   = 0100150;
cpus              622 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.useMap            = true;
cpus              623 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.enable_wam        = true;
cpus              624 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.assignment  [0] = 0;
cpus              625 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.interlace   [0] = false;
cpus              626 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.enable      [0] = false;
cpus              627 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.init_enable [0] = false;
cpus              628 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.store_size  [0] = store_sz;
cpus              630 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.assignment  [1] = 0;
cpus              631 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.interlace   [1] = false;
cpus              632 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.enable      [1] = true;
cpus              633 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.init_enable [1] = false;
cpus              634 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.store_size  [1] = store_sz;
cpus              636 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.assignment  [2] = 0;
cpus              637 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.interlace   [2] = false;
cpus              638 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.enable      [2] = false;
cpus              639 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.init_enable [2] = false;
cpus              640 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.store_size  [2] = store_sz;
cpus              642 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.assignment  [3] = 0;
cpus              643 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.interlace   [3] = false;
cpus              644 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.enable      [3] = false;
cpus              645 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.init_enable [3] = false;
cpus              646 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.store_size  [3] = store_sz;
cpus              648 src/dps8/dps8_cpu.c                 if (cpus[cpu_unit_idx].tweaks.l68_mode) { // L68
cpus              649 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.assignment  [4] = 0;
cpus              650 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.interlace   [4] = false;
cpus              651 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.enable      [4] = false;
cpus              652 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.init_enable [4] = false;
cpus              653 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.store_size  [4] = 3;
cpus              655 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.assignment  [5] = 0;
cpus              656 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.interlace   [5] = false;
cpus              657 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.enable      [5] = false;
cpus              658 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.init_enable [5] = false;
cpus              659 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.store_size  [5] = 3;
cpus              661 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.assignment  [6] = 0;
cpus              662 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.interlace   [6] = false;
cpus              663 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.enable      [6] = false;
cpus              664 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.init_enable [6] = false;
cpus              665 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.store_size  [6] = 3;
cpus              667 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.assignment  [7] = 0;
cpus              668 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.interlace   [7] = false;
cpus              669 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.enable      [7] = false;
cpus              670 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.init_enable [7] = false;
cpus              671 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.store_size  [7] = 3;
cpus              675 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.enable      [1] = true;
cpus              679 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches = cpus[cpu_unit_idx].isolts_switches_save;
cpus              680 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].isolts_switches_saved    = false;
cpus              687 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.nodis = v;
cpus              689 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.l68_mode= v;
cpus              825 src/dps8/dps8_cpu.c   cpu_state_t * cpun = cpus + cpuUnitIdx;
cpus              850 src/dps8/dps8_cpu.c   cpu_state_t * cpun = cpus + cpuUnitIdx;
cpus              918 src/dps8/dps8_cpu.c     _cpup = & cpus [current_running_cpu_idx];
cpus              998 src/dps8/dps8_cpu.c     cpu_state_t * cpun = cpus + cpu_unit_idx;
cpus             1422 src/dps8/dps8_cpu.c                 cpus[cpun].switches.serno = sn;
cpus             1426 src/dps8/dps8_cpu.c                                      sim_name, cpun, cpus[cpun].switches.serno);
cpus             1471 src/dps8/dps8_cpu.c             sim_msg (" %9lld\r\n", (long long int) cpus[i].instrCnt);
cpus             1473 src/dps8/dps8_cpu.c             sim_msg (" %'9lld\r\n", (long long int) cpus[i].instrCnt);
cpus             1475 src/dps8/dps8_cpu.c             cpus[i].instrCnt = 0;
cpus             1534 src/dps8/dps8_cpu.c     cpus = system_state->cpus;
cpus             1543 src/dps8/dps8_cpu.c     (void)memset (cpus, 0, sizeof (cpu_state_t) * N_CPU_UNITS_MAX);
cpus             1544 src/dps8/dps8_cpu.c     cpus [0].switches.FLT_BASE = 2; // Some of the UnitTests assume this
cpus             1639 src/dps8/dps8_cpu.c     { ORDATA (IC, cpus[0].PPR.IC, VASIZE), 0, 0, 0 },
cpus             1699 src/dps8/dps8_cpu.c cpu_state_t * cpus = NULL;
cpus             1701 src/dps8/dps8_cpu.c cpu_state_t cpus [N_CPU_UNITS_MAX];
cpus             2154 src/dps8/dps8_cpu.c     cpus [0].PPR.IC = dummy_IC;
cpus             3202 src/dps8/dps8_cpu.c         lockYieldAll     = lockYieldAll     + (unsigned long long)cpus[n].coreLockState.lockYield;
cpus             3204 src/dps8/dps8_cpu.c         lockWaitMaxAll   = lockWaitMaxAll   + (unsigned long long)cpus[n].coreLockState.lockWaitMax;
cpus             3205 src/dps8/dps8_cpu.c         lockWaitAll      = lockWaitAll      + (unsigned long long)cpus[n].coreLockState.lockWait;
cpus             3206 src/dps8/dps8_cpu.c         lockImmediateAll = lockImmediateAll + (unsigned long long)cpus[n].coreLockState.lockImmediate;
cpus             3207 src/dps8/dps8_cpu.c         lockCntAll       = lockCntAll       + (unsigned long long)cpus[n].coreLockState.lockCnt;
cpus             3208 src/dps8/dps8_cpu.c         instrCntAll      = instrCntAll      + (unsigned long long)cpus[n].instrCnt;
cpus             3209 src/dps8/dps8_cpu.c         cycleCntAll      = cycleCntAll      + (unsigned long long)cpus[n].cycleCnt;
cpus             4598 src/dps8/dps8_cpu.c   putbits36_1 (& rsw2,  20,  cpus[cpuNo].options.cache_installed ? 1 : 0);
cpus             4608 src/dps8/dps8_cpu.c   putbits36_4 (& rsw2,  29,  cpus[cpuNo].options.proc_speed & 017LL);
cpus             4610 src/dps8/dps8_cpu.c   putbits36_3 (& rsw2,  33,  cpus[cpuNo].switches.cpu_num & 07LL);
cpus             4613 src/dps8/dps8_cpu.c   if (cpus[cpuNo].options.hex_mode_installed)
cpus             4615 src/dps8/dps8_cpu.c   if (cpus[cpuNo].options.clock_slave_installed)
cpus             4620 src/dps8/dps8_cpu.c   (void)sprintf (serial, "%-11u", cpus[cpuNo].switches.serno);
cpus             4892 src/dps8/dps8_cpu.c   if (! cpus[cpuNo].cycleCnt)
cpus             4906 src/dps8/dps8_cpu.c   sim_msg ("\r|  cycles        %15llu  |\r\n", (unsigned long long)cpus[cpuNo].cycleCnt);
cpus             4907 src/dps8/dps8_cpu.c   sim_msg ("\r|  instructions  %15llu  |\r\n", (unsigned long long)cpus[cpuNo].instrCnt);
cpus             4911 src/dps8/dps8_cpu.c   sim_msg ("\r|  lockCnt       %15llu  |\r\n", (unsigned long long)cpus[cpuNo].coreLockState.lockCnt);
cpus             4912 src/dps8/dps8_cpu.c   sim_msg ("\r|  lockImmediate %15llu  |\r\n", (unsigned long long)cpus[cpuNo].coreLockState.lockImmediate);
cpus             4916 src/dps8/dps8_cpu.c   sim_msg ("\r|  lockWait      %15llu  |\r\n", (unsigned long long)cpus[cpuNo].coreLockState.lockWait);
cpus             4917 src/dps8/dps8_cpu.c   sim_msg ("\r|  lockWaitMax   %15llu  |\r\n", (unsigned long long)cpus[cpuNo].coreLockState.lockWaitMax);
cpus             4921 src/dps8/dps8_cpu.c   sim_msg ("\r|  lockYield     %15llu  |\r\n", (unsigned long long)cpus[cpuNo].coreLockState.lockYield);
cpus             4940 src/dps8/dps8_cpu.c   sim_msg ("\r|  cycles        %'15llu  |\r\n", (unsigned long long)cpus[cpuNo].cycleCnt);
cpus             4941 src/dps8/dps8_cpu.c   sim_msg ("\r|  instructions  %'15llu  |\r\n", (unsigned long long)cpus[cpuNo].instrCnt);
cpus             4945 src/dps8/dps8_cpu.c   sim_msg ("\r|  lockCnt       %'15llu  |\r\n", (unsigned long long)cpus[cpuNo].coreLockState.lockCnt);
cpus             4946 src/dps8/dps8_cpu.c   sim_msg ("\r|  lockImmediate %'15llu  |\r\n", (unsigned long long)cpus[cpuNo].coreLockState.lockImmediate);
cpus             4950 src/dps8/dps8_cpu.c   sim_msg ("\r|  lockWait      %'15llu  |\r\n", (unsigned long long)cpus[cpuNo].coreLockState.lockWait);
cpus             4951 src/dps8/dps8_cpu.c   sim_msg ("\r|  lockWaitMax   %'15llu  |\r\n", (unsigned long long)cpus[cpuNo].coreLockState.lockWaitMax);
cpus             4955 src/dps8/dps8_cpu.c   sim_msg ("\r|  lockYield     %'15llu  |\r\n", (unsigned long long)cpus[cpuNo].coreLockState.lockYield);
cpus             4981 src/dps8/dps8_cpu.c 
cpus             4982 src/dps8/dps8_cpu.c 
cpus             5013 src/dps8/dps8_cpu.c   cpus = system_state->cpus;
cpus             5015 src/dps8/dps8_cpu.c   (void) memset (cpus, 0, sizeof (cpu_state_t) * N_CPU_UNITS_MAX);
cpus             5017 src/dps8/dps8_cpu.c     cpus[i].switches.FLT_BASE = 2; // Some of the UnitTests assume this
cpus             5018 src/dps8/dps8_cpu.c     cpus[i].instrCnt = 0;
cpus             5019 src/dps8/dps8_cpu.c     cpus[i].cycleCnt = 0;
cpus             5021 src/dps8/dps8_cpu.c       cpus[i].faultCnt [j] = 0;
cpus             5024 src/dps8/dps8_cpu.c   cpus[0].tweaks.enable_emcall = 1;
cpus             5027 src/dps8/dps8_cpu.c   set_cpu_cycle (& cpus[0], FETCH_cycle);
cpus             5029 src/dps8/dps8_cpu.c   _cpup = & cpus[0];
cpus             1928 src/dps8/dps8_cpu.h extern cpu_state_t * cpus;
cpus             1930 src/dps8/dps8_cpu.h extern cpu_state_t cpus [N_CPU_UNITS_MAX];
cpus              899 src/dps8/dps8_faults.c     cpu_state_t * cpup = &cpus[cpuNo];
cpus             1352 src/dps8/dps8_scu.c         cpus[cpun].events.XIP[scu_unit_idx] = false;
cpus             1408 src/dps8/dps8_scu.c                 cpus[cpu_unit_udx].events.XIP[scu_unit_idx] = true;
cpus             1422 src/dps8/dps8_scu.c                 cpus[cpu_unit_udx].isRunning = true;
cpus             1424 src/dps8/dps8_scu.c                 cpus[cpu_unit_udx].events.XIP[scu_unit_idx] = true;
cpus             1475 src/dps8/dps8_scu.c                 cpus[cpu_unit_udx].events.XIP[scu_unit_idx] = true;
cpus             1489 src/dps8/dps8_scu.c                 cpus[cpu_unit_udx].isRunning = true;
cpus             1491 src/dps8/dps8_scu.c                 cpus[cpu_unit_udx].events.XIP[scu_unit_idx] = true;
cpus             2428 src/dps8/dps8_scu.c                 cpus[current_running_cpu_idx].scu_port[scu_unit_idx] != port)
cpus               86 src/dps8/dps8_state.h   cpu_state_t cpus [N_CPU_UNITS_MAX];
cpus             4050 src/dps8/dps8_sys.c     { "cpus[]",                 SYM_STATE_OFFSET,  SYM_ARRAY,     offsetof (struct system_state_s, cpus)        },
cpus             1471 src/dps8/panelScraper.c     panel_cpup = cpus + cpuNum;
cpus              465 src/dps8/segldr.c     cpus[0].tweaks.enable_emcall = 1;
cpus              472 src/dps8/threadz.c     if (cpus[cpuNum].set_affinity)
cpus              476 src/dps8/threadz.c         CPU_SET (cpus[cpuNum].affinity, & cpuset);
cpus              480 src/dps8/threadz.c                       cpus[cpuNum].affinity, cpuNum, s);
cpus              133 src/dps8/ucache.c # define stats(n) args ( (long long unsigned)cpus[cpuNo].uCache.hits  [n], \
cpus              134 src/dps8/ucache.c                          (long long unsigned)cpus[cpuNo].uCache.misses[n], \
cpus              135 src/dps8/ucache.c                          (long long unsigned)cpus[cpuNo].uCache.skips [n] )
cpus              164 src/dps8/ucache.c            (long long unsigned)cpus[cpuNo].uCache.ralrSkips);
cpus              166 src/dps8/ucache.c            (long long unsigned)cpus[cpuNo].uCache.call6Skips);
cpus              168 src/dps8/ucache.c            (long long unsigned)cpus[cpuNo].uCache.segnoSkips);
cpus              197 src/dps8/ucache.c            (long long unsigned)cpus[cpuNo].uCache.ralrSkips);
cpus              199 src/dps8/ucache.c            (long long unsigned)cpus[cpuNo].uCache.call6Skips);
cpus              201 src/dps8/ucache.c            (long long unsigned)cpus[cpuNo].uCache.segnoSkips);