sim_debug 331 src/dps8/doAppendCycleAPUDataRMW.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\r\n"); sim_debug 289 src/dps8/doAppendCycleAPUDataRead.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\r\n"); sim_debug 293 src/dps8/doAppendCycleAPUDataStore.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\r\n"); sim_debug 406 src/dps8/doAppendCycleIndirectWordFetch.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\r\n"); sim_debug 592 src/dps8/doAppendCycleInstructionFetch.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\r\n"); sim_debug 332 src/dps8/doAppendCycleOperandRMW.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\r\n"); sim_debug 706 src/dps8/doAppendCycleOperandRead.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\r\n"); sim_debug 292 src/dps8/doAppendCycleOperandStore.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\r\n"); sim_debug 328 src/dps8/doAppendCycleRTCDOperandFetch.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\r\n"); sim_debug 268 src/dps8/dps8_absi.c sim_debug (DBG_TRACE, & absi_dev, sim_debug 77 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 103 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 195 src/dps8/dps8_addrmods.c sim_debug (DBG_APPENDING, & cpu_dev, sim_debug 239 src/dps8/dps8_addrmods.c sim_debug (DBG_APPENDING, & cpu_dev, sim_debug 259 src/dps8/dps8_addrmods.c sim_debug (DBG_APPENDING, & cpu_dev, sim_debug 283 src/dps8/dps8_addrmods.c sim_debug (DBG_APPENDING, & cpu_dev, sim_debug 316 src/dps8/dps8_addrmods.c sim_debug (DBG_APPENDING, & cpu_dev, "do_ITS_ITP sets XSF to 1\r\n"); sim_debug 326 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 335 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 375 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 378 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 414 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 437 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 471 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, "R_MOD: Cr=%06o\r\n", Cr); sim_debug 475 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 505 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, "R_MOD: TPR.CA=%06o\r\n", sim_debug 514 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, "RI_MOD: Td=%o\r\n", Td); sim_debug 527 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 552 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 611 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 629 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 639 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 668 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 673 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 683 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 733 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 740 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 743 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 792 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 831 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 846 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 858 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 954 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 990 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1017 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1031 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1038 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1059 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1075 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1078 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1108 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1138 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1145 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1148 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1176 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1197 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1213 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1216 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1234 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1266 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1281 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1305 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1348 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1366 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1388 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1411 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1460 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1478 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1499 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1525 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 53 src/dps8/dps8_append.c # define DBGAPP(...) sim_debug (DBG_APPENDING, & cpu_dev, __VA_ARGS__) sim_debug 1907 src/dps8/dps8_append.c sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\r\n"); sim_debug 1347 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & opc_dev, "%s: Status request\r\n", __func__); sim_debug 1353 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Read BCD echoed\r\n", __func__); sim_debug 1362 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & opc_dev, "%s: Write BCD\r\n", __func__); sim_debug 1371 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Read ASCII echoed\r\n", __func__); sim_debug 1380 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & opc_dev, "%s: Write ASCII\r\n", __func__); sim_debug 1398 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & opc_dev, "%s: Reset\r\n", __func__); sim_debug 1410 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Read ASCII unechoed\r\n", __func__); sim_debug 1419 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & opc_dev, "%s: Alert\r\n", __func__); sim_debug 1435 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & opc_dev, "%s: Read ID\r\n", __func__); sim_debug 1444 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & opc_dev, "%s: Lock\r\n", __func__); sim_debug 1450 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & opc_dev, "%s: Unlock\r\n", __func__); sim_debug 1456 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & opc_dev, "%s: Unknown command 0%o\r\n", __func__, p->IDCW_DEV_CMD); sim_debug 942 src/dps8/dps8_cpu.c sim_debug (DBG_CYCLE, & cpu_dev, "Setting cycle to %s\r\n", sim_debug 1999 src/dps8/dps8_cpu.c sim_debug (DBG_INFO, & cpu_dev, "CPU reset: Running\r\n"); sim_debug 2574 src/dps8/dps8_cpu.c sim_debug (DBG_TRACEEXT, & cpu_dev, "set_temporary_absolute_mode bit 29 sets XSF to 0\r\n"); sim_debug 2884 src/dps8/dps8_cpu.c sim_debug (DBG_CYCLE, & cpu_dev, "Cycle is %s\r\n", sim_debug 2929 src/dps8/dps8_cpu.c sim_debug (DBG_INTR, & cpu_dev, "intr_pair_addr %u flag %d\r\n", sim_debug 3173 src/dps8/dps8_cpu.c sim_debug (DBG_CYCLE, & cpu_dev, sim_debug 3283 src/dps8/dps8_cpu.c sim_debug (DBG_TRACEEXT, & cpu_dev, "fetchCycle bit 29 sets XSF to 0\r\n"); sim_debug 3529 src/dps8/dps8_cpu.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 3537 src/dps8/dps8_cpu.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 4334 src/dps8/dps8_cpu.c sim_debug (DBG_WARN, & cpu_dev, sim_debug 4360 src/dps8/dps8_cpu.c sim_debug (DBG_CORE, & cpu_dev, sim_debug 4430 src/dps8/dps8_cpu.c sim_debug (DBG_CORE, & cpu_dev, sim_debug 4513 src/dps8/dps8_cpu.c sim_debug (DBG_CORE, & cpu_dev, sim_debug 4534 src/dps8/dps8_cpu.c sim_debug (DBG_MSG, & cpu_dev, sim_debug 4543 src/dps8/dps8_cpu.c sim_debug (DBG_WARN, & cpu_dev, sim_debug 4571 src/dps8/dps8_cpu.c sim_debug (DBG_CORE, & cpu_dev, sim_debug 4580 src/dps8/dps8_cpu.c sim_debug (DBG_WARN, & cpu_dev, sim_debug 4607 src/dps8/dps8_cpu.c sim_debug (DBG_CORE, & cpu_dev, sim_debug 4623 src/dps8/dps8_cpu.c sim_debug (DBG_MSG, & cpu_dev, sim_debug 4657 src/dps8/dps8_cpu.c sim_debug (DBG_CORE, & cpu_dev, "core_write2 %08o %012llo (%s)\r\n", addr - 1, sim_debug 4681 src/dps8/dps8_cpu.c sim_debug (DBG_CORE, & cpu_dev, "core_write2 %08o %012"PRIo64" (%s)\r\n", addr, odd, ctx); sim_debug 4821 src/dps8/dps8_cpu.c sim_debug (DBG_DEBUG, & cpu_dev, "APU: Setting absolute mode.\r\n"); sim_debug 4830 src/dps8/dps8_cpu.c sim_debug (DBG_DEBUG, & cpu_dev, "APU: Keeping append mode.\r\n"); sim_debug 4832 src/dps8/dps8_cpu.c sim_debug (DBG_DEBUG, & cpu_dev, "APU: Setting append mode.\r\n"); sim_debug 4838 src/dps8/dps8_cpu.c sim_debug (DBG_ERR, & cpu_dev, sim_debug 1261 src/dps8/dps8_crdpun.c sim_debug (DBG_TRACE, & pun_dev, "%s: PUN %c%02o_%02o\r\n", sim_debug 1275 src/dps8/dps8_crdpun.c sim_debug (DBG_DEBUG, & pun_dev, "%s: Punch Binary\r\n", __func__); sim_debug 1281 src/dps8/dps8_crdpun.c sim_debug (DBG_DEBUG, & pun_dev, "%s: Set Diagnostic Mode\r\n", __func__); sim_debug 1286 src/dps8/dps8_crdpun.c sim_debug (DBG_DEBUG, & pun_dev, "%s: Reset Status\r\n", __func__); sim_debug 1301 src/dps8/dps8_crdpun.c sim_debug (DBG_DEBUG, & pun_dev, "%s: stati %04o\r\n", __func__, p->stati); sim_debug 428 src/dps8/dps8_decimal.c sim_debug 430 src/dps8/dps8_decimal.c sim_debug 473 src/dps8/dps8_decimal.c sim_debug 477 src/dps8/dps8_decimal.c sim_debug 492 src/dps8/dps8_decimal.c sim_debug 512 src/dps8/dps8_decimal.c sim_debug 541 src/dps8/dps8_decimal.c sim_debug 558 src/dps8/dps8_decimal.c sim_debug 580 src/dps8/dps8_decimal.c sim_debug 592 src/dps8/dps8_decimal.c sim_debug 610 src/dps8/dps8_decimal.c sim_debug 614 src/dps8/dps8_decimal.c sim_debug 630 src/dps8/dps8_decimal.c sim_debug 655 src/dps8/dps8_decimal.c sim_debug 679 src/dps8/dps8_decimal.c sim_debug 697 src/dps8/dps8_decimal.c sim_debug 705 src/dps8/dps8_decimal.c sim_debug 86 src/dps8/dps8_dia.c sim_debug (DBG_ERR, & dia_dev, "DIA SET CONFIG: Invalid unit number %ld\r\n", sim_debug 132 src/dps8/dps8_dia.c sim_debug (DBG_ERR, & dia_dev, sim_debug 152 src/dps8/dps8_dia.c sim_debug (DBG_ERR, & dia_dev, sim_debug 482 src/dps8/dps8_dia.c sim_debug (DBG_TRACE, & dia_dev, "CS interrupt %u\r\n", cell); sim_debug 497 src/dps8/dps8_dia.c sim_debug (DBG_ERR, & dia_dev, "fnp illegal cell number %d\r\n", cell); sim_debug 634 src/dps8/dps8_dia.c sim_debug (DBG_TRACE, & dia_dev, "FNP reset??\r\n"); sim_debug 786 src/dps8/dps8_dia.c sim_debug (DBG_TRACE, & dia_dev, "FNP data xfer??\r\n"); sim_debug 825 src/dps8/dps8_dia.c sim_debug (DBG_NOTIFY, & dia_dev, "Request status\r\n"); sim_debug 1188 src/dps8/dps8_disk.c sim_debug (DBG_NOTIFY, & dsk_dev, "Read %d\r\n", dev_unit_idx); sim_debug 556 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISWriteCache addr %06o\r\n", p->cachedAddr); sim_debug 571 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 577 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Write8 TRR %o TSR %05o\r\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } sim_debug 599 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 605 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Write8 NO PR TRR %o TSR %05o\r\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } sim_debug 620 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISReadCache addr %06o\r\n", address); sim_debug 644 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Read8 TRR %o TSR %05o\r\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } sim_debug 650 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 665 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Read8 NO PR TRR %o TSR %05o\r\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } sim_debug 670 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 688 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISWriteIdx addr %06o n %u\r\n", cpu.du.Dk_PTR_W[eisaddr_idx], n); sim_debug 691 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISWriteIdx addr %06o n %u\r\n", p->address, n); sim_debug 727 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISReadIdx addr %06o n %u\r\n", cpu.du.Dk_PTR_W[eisaddr_idx], n); sim_debug 731 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISReadIdx %ld addr %06o n %u\r\n", eisaddr_idx, p->address, n); sim_debug 757 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISRead addr %06o\r\n", cpu.du.Dk_PTR_W[eisaddr_idx]); sim_debug 759 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISRead addr %06o\r\n", p->address); sim_debug 770 src/dps8/dps8_eis.c sim_debug 772 src/dps8/dps8_eis.c sim_debug 792 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "%s addr %06o\r\n", __func__, addressN); sim_debug 812 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 816 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 835 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 854 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "%s addr %06o\r\n", __func__, addressN); sim_debug 874 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 878 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 897 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 959 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISGet469 : k: %u TAk %u coffset %u c %o\r\n", k, cpu.du.TAk[k - 1], residue, c); sim_debug 961 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISGet469 : k: %u TAk %u coffset %u c %o\r\n", k, e -> TA [k - 1], residue, c); sim_debug 1274 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "AR n %u k %u\r\n", n, k - 1); sim_debug 1279 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "No ARb %u\r\n", k - 1); sim_debug 1306 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "No ARa %u\r\n", k - 1); sim_debug 1422 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "AR n %u k %u\r\n", n, k - 1); sim_debug 1429 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "initial CN%u %u\r\n", k, CN); sim_debug 1464 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "N%u %o\r\n", k, e->N[k-1]); sim_debug 1510 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "CN%d set to %d by CTA4\r\n", sim_debug 1546 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "CN%d set to %d by CTA6\r\n", sim_debug 1560 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 1573 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "CN%d set to %d by CTA9\r\n", sim_debug 1728 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "parseNumericOperandDescriptor(cpup, ): N%u %0o\r\n", k, e->N[k-1]); sim_debug 1831 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 1835 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 1874 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "bitstring k %d AR%d\r\n", k, n); sim_debug 1894 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "bitstring k %d RL reg %u val %"PRIo64"\r\n", k, reg, (word36)e->N[k-1]); sim_debug 1901 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "bitstring k %d opdesc %012"PRIo64"\r\n", k, opDesc); sim_debug 1902 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "N%u %u\r\n", k, e->N[k-1]); sim_debug 2205 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2212 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2218 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2226 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2247 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, "axbd augend 0%o addend 0%o sum 0%o\r\n", augend, addend, sum); sim_debug 2361 src/dps8/dps8_eis.c sim_debug 2393 src/dps8/dps8_eis.c sim_debug 2444 src/dps8/dps8_eis.c sim_debug 2484 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2491 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2500 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2507 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2567 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2574 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2583 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2589 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2612 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, "s9bd r 0%o\r\n", r); sim_debug 2614 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, "s9bd ARn 0%o address 0%o reg 0%o r 0%o\r\n", ARn, address, reg, r); sim_debug 2900 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, "asxbd sz %d r 0%"PRIo64"\r\n", sz, rcnt); sim_debug 2916 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, "asxbd sz %d ARn 0%o address 0%o reg 0%o r 0%o\r\n", sz, ARn, address, reg, r); sim_debug 2993 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, "asxbd augend 0%o addend 0%o sum 0%o\r\n", augend, addend, sum); sim_debug 3173 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "cmpc tally %d c1 %03o c2 %03o\r\n", cpu.du.CHTALLY, c1, c2); sim_debug 4056 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 4059 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 4123 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 4151 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 4252 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 4255 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 4319 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 4348 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 4577 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 4581 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 4618 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MLR special case #3\r\n"); sim_debug 4658 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MLR special case #4\r\n"); sim_debug 4698 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MLR special case #1\r\n"); sim_debug 4729 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MLR special case #2\r\n"); sim_debug 4998 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MRL special case #1\r\n"); sim_debug 5030 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MRL special case #2\r\n"); sim_debug 5196 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "src: %d: %o\r\n", n, c); sim_debug 5322 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "inBuffer:"); sim_debug 5324 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, " %02o", * q); sim_debug 5325 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "\r\n"); sim_debug 6005 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "LTE IT[%d]<=%d\r\n", e -> mopIF - 1, next); sim_debug 6056 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLC IF %d, srcTally %d, dstTally %d\r\n", e->mopIF, e->srcTally, e->dstTally); sim_debug 6059 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLC n %d, srcTally %d, dstTally %d\r\n", n, e->srcTally, e->dstTally); sim_debug 6071 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLC c %d (0%o)\r\n", c, c); sim_debug 6074 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLC ES off\r\n"); sim_debug 6076 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLC is zero\r\n"); sim_debug 6083 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLC is not zero\r\n"); sim_debug 6097 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLC ES on\r\n"); sim_debug 6167 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLS n %d c %o\r\n", n, c); sim_debug 6173 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 6186 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 6210 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 6227 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "ES is ON, the character is moved to the receiving field.\r\n"); sim_debug 6269 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MORS mopIF %d src %d dst %d\r\n", e->mopIF, e->srcTally, e->dstTally); sim_debug 6311 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MVC mopIF %d\r\n", e->mopIF); sim_debug 6315 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MVC n %d srcTally %d dstTally %d\r\n", n, e->srcTally, e->dstTally); sim_debug 6323 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MVC write to output buffer %o\r\n", *e->in); sim_debug 6332 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MVC done\r\n"); sim_debug 6663 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MOP %s(%o) %o\r\n", m -> mopName, mop, e->mopIF); sim_debug 6667 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "getMop(e->m == NULL || e->m->f == NULL): mop:%d IF:%d\r\n", mop, e->mopIF); sim_debug 6715 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 6721 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "mopExecutor EISgetMop forced break\r\n"); sim_debug 6746 src/dps8/dps8_eis.c sim_debug 6752 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 6772 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "mop faults %o src %d dst %d mop %d\r\n", sim_debug 6790 src/dps8/dps8_eis.c sim_debug 6808 src/dps8/dps8_eis.c sim_debug 6829 src/dps8/dps8_eis.c sim_debug(DBG_TRACEEXT, & cpu_dev, "mve\r\n"); sim_debug 7126 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 7130 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 7358 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 7841 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, sim_debug 7844 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, sim_debug 7847 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, sim_debug 7886 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "n1 %d sc1 %d\r\n", n1, sc1); sim_debug 7917 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "n2 %d\r\n", n2); sim_debug 7950 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "mvn res: '%s'\r\n", res); sim_debug 8072 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "is neg %o\r\n", decNumberIsNegative(op1)); sim_debug 8073 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "is zero %o\r\n", decNumberIsZero(op1)); sim_debug 8074 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "R %o\r\n", R); sim_debug 8075 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "Trunc %o\r\n", Trunc); sim_debug 8076 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "TRUNC %o\r\n", TST_I_TRUNC); sim_debug 8077 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "OMASK %o\r\n", TST_I_OMASK); sim_debug 8078 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "tstOVFfault %o\r\n", tstOVFfault (cpup)); sim_debug 8079 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "T %o\r\n", T); sim_debug 8080 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "EOvr %o\r\n", EOvr); sim_debug 8081 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "Ovr %o\r\n", Ovr); sim_debug 8214 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 8485 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 8489 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 8703 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 8874 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 8878 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 9080 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "cmpb N1 %d N2 %d\r\n", e -> N1, e -> N2); sim_debug 9118 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "cmpb(min(e->N1, e->N2)) i %d b1 %d b2 %d\r\n", i, b1, b2); sim_debug 9139 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "cmpb(e->N1 < e->N2) i %d b1fill %d b2 %d\r\n", i, b1, b2); sim_debug 9160 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "cmpb(e->N1 > e->N2) i %d b1 %d b2fill %d\r\n", i, b1, b2); sim_debug 9756 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, sim_debug 9932 src/dps8/dps8_eis.c sim_debug 9957 src/dps8/dps8_eis.c sim_debug 9968 src/dps8/dps8_eis.c sim_debug 9990 src/dps8/dps8_eis.c sim_debug 10011 src/dps8/dps8_eis.c sim_debug 10032 src/dps8/dps8_eis.c sim_debug 10052 src/dps8/dps8_eis.c sim_debug 10059 src/dps8/dps8_eis.c sim_debug 12641 src/dps8/dps8_eis.c sim_debug 12643 src/dps8/dps8_eis.c sim_debug 12686 src/dps8/dps8_eis.c sim_debug 12690 src/dps8/dps8_eis.c sim_debug 12707 src/dps8/dps8_eis.c sim_debug 12727 src/dps8/dps8_eis.c sim_debug 12817 src/dps8/dps8_eis.c sim_debug 12834 src/dps8/dps8_eis.c sim_debug 12856 src/dps8/dps8_eis.c sim_debug 12868 src/dps8/dps8_eis.c sim_debug 12882 src/dps8/dps8_eis.c sim_debug 12886 src/dps8/dps8_eis.c sim_debug 12902 src/dps8/dps8_eis.c sim_debug 12948 src/dps8/dps8_eis.c sim_debug 12985 src/dps8/dps8_eis.c sim_debug 13003 src/dps8/dps8_eis.c sim_debug 13011 src/dps8/dps8_eis.c sim_debug 13193 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv2d: clz1 %d clz2 %d\r\n",clz1,clz2); sim_debug 13199 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv2d S1 %d S2 %d N1 %d N2 %d clz1 %d clz2 %d E1 %d E2 %d SF2 %d NQ %d\r\n", sim_debug 13222 src/dps8/dps8_eis.c ) { sim_debug (DBG_TRACEEXT, & cpu_dev, "oops! dv2d anomalous results"); } // divide by zero has already been checked before sim_debug 13276 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv2d: exp1 %d exp2 %d digits op1 %d op2 %d op1a %d op2a %d\r\n", sim_debug 13288 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv2d: addzero n2 %d %s exp %d\r\n",n2,res,op3->exponent); sim_debug 13635 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv3d: clz1 %d clz2 %d\r\n",clz1,clz2); sim_debug 13642 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv3d S1 %d S2 %d N1 %d N2 %d clz1 %d clz2 %d E1 %d E2 %d SF3 %d NQ %d\r\n", sim_debug 13665 src/dps8/dps8_eis.c ) { sim_debug (DBG_TRACEEXT, & cpu_dev, "oops! dv3d anomalous results"); } // divide by zero has already been checked before sim_debug 13719 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 13733 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv3d: addzero n3 %d %s exp %d\r\n",n3,res,op3->exponent); sim_debug 402 src/dps8/dps8_faults.c sim_debug (DBG_FAULT, & cpu_dev, sim_debug 615 src/dps8/dps8_faults.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MIF %o\r\n", TST_I_MIF); sim_debug 626 src/dps8/dps8_faults.c sim_debug 781 src/dps8/dps8_faults.c sim_debug (DBG_CYCLE, & cpu_dev, "Changing fault number to Trouble fault\r\n"); sim_debug 822 src/dps8/dps8_faults.c sim_debug (DBG_CYCLE, & cpu_dev, "Setting cycle to FAULT_cycle\r\n"); sim_debug 832 src/dps8/dps8_faults.c sim_debug (DBG_FAULT, & cpu_dev, sim_debug 925 src/dps8/dps8_faults.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MIF %o\r\n", TST_I_MIF); sim_debug 967 src/dps8/dps8_faults.c sim_debug (DBG_CYCLE, & cpu_dev, "Setting cycle to FAULT_cycle\r\n"); sim_debug 1018 src/dps8/dps8_faults.c sim_debug (DBG_FAULT, & cpu_dev, "setG7fault CPU %d fault %d (%o)\r\n", sim_debug 1053 src/dps8/dps8_faults.c sim_debug (DBG_FAULT, & cpu_dev, "set_FFV_fault CPU f_fault_no %u\r\n", sim_debug 437 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "[%d]notifyCS %d %d\r\n", lineno, mbx, chan_num); sim_debug 444 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "[%d]rcd ack_echnego_init\r\n", lineno); sim_debug 466 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "[%d]rcd ack_echnego_stop\r\n", lineno); sim_debug 488 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "[%d]rcd line_disconnected\r\n", lineno); sim_debug 510 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "[%d]rcd input_in_mailbox\r\n", lineno); sim_debug 620 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "[%d]rcd accept_input\r\n", lineno); sim_debug 666 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "[%d]rcd line_break\r\n", lineno); sim_debug 688 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "[%d]rcd send_output\r\n", lineno); sim_debug 710 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "[%d]rcd acu_dial_failure\r\n", lineno); sim_debug 733 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "[%d]rcd accept_new_terminal\r\n", lineno); sim_debug 801 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "[%d]rcd wru_timeout\r\n", lineno); sim_debug 1370 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "set_3270_write_complete\r\n"); sim_debug 1420 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "fnp2 send_stn_in_buffer\r\n"); sim_debug 1482 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "handling in used %u %u\r\n", stnp->stn_in_used, n_to_send); sim_debug 1555 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "fnp2 3270 poll\r\n"); sim_debug 1590 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "fnp2 specific poll\r\n"); sim_debug 1805 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "FNP input_in_mailbox\r\n"); sim_debug 2000 src/dps8/dps8_fnp2.c sim_debug (DBG_ERR, & fnp_dev, sim_debug 2237 src/dps8/dps8_fnp2.c sim_debug (DBG_ERR, & fnp_dev, sim_debug 2263 src/dps8/dps8_fnp2.c sim_debug (DBG_ERR, & fnp_dev, sim_debug 2390 src/dps8/dps8_fnp2.c sim_debug (DBG_ERR, & fnp_dev, "fnpSetConfig: Invalid unit number %ld\r\n", (long) fnpUnitIdx); sim_debug 2854 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "process3270Input nread %ld\r\n", (long)nread); sim_debug 2855 src/dps8/dps8_fnp2.c for (int i = 0; i < nread; i ++) sim_debug (DBG_TRACE, & fnp_dev, "%c", isgraph (e2a[buf[i]]) ? e2a[buf[i]] : '.'); sim_debug 2856 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "\r\n"); sim_debug 2857 src/dps8/dps8_fnp2.c for (int i = 0; i < nread; i ++) sim_debug (DBG_TRACE, & fnp_dev, " %02x", buf[i]); sim_debug 2858 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "\r\n"); sim_debug 2921 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, sim_debug 167 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] wcd op_code %u 0%o\r\n", sim_debug 179 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] disconnect_this_line\r\n", decoded_p->slot_no); sim_debug 198 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] dont_accept_calls\r\n", decoded_p->slot_no); sim_debug 205 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] accept_calls\r\n", decoded_p->slot_no); sim_debug 218 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] set_framing_chars\r\n", decoded_p->slot_no); sim_debug 229 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] dial out\r\n", decoded_p->slot_no); sim_debug 239 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] line_control\r\n", decoded_p->slot_no); sim_debug 260 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "ACCEPT_BID\r\n"); sim_debug 288 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "REPORT_WRITE_STATUS\r\n"); sim_debug 291 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "SET_3270_MODE\r\n"); sim_debug 295 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "SET_POLLING_ADDR\r\n"); sim_debug 304 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, " char1 %u\r\n", c1); sim_debug 305 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, " char3 %u\r\n", c3); sim_debug 316 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "START_POLL\r\n"); sim_debug 321 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "SET_SELECT_ADDR\r\n"); sim_debug 327 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, " char1 %u\r\n", c1); sim_debug 328 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, " char3 %u\r\n", c3); sim_debug 368 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "STOP_AUTO_POLL\r\n"); sim_debug 383 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "SET_HASP_MODE\r\n"); sim_debug 386 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "SET_NAK_LIMIT\r\n"); sim_debug 389 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "SET_HASP_TIMERS\r\n"); sim_debug 454 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, sim_debug 546 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, sim_debug 576 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, sim_debug 590 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, sim_debug 621 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] input_fc_chars\r\n", sim_debug 655 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] output_fc_chars\r\n", sim_debug 689 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters\r\n", sim_debug 701 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters fullduplex %u\r\n", sim_debug 710 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters crecho %u\r\n", sim_debug 720 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters lfecho %u\r\n", sim_debug 728 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters dumpoutput\r\n", sim_debug 739 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters tabecho %u\r\n", sim_debug 748 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters listen %u\r\n", sim_debug 773 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters handlequit%u \r\n", sim_debug 784 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters chngstring %u\r\n", sim_debug 792 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters wru\r\n", sim_debug 800 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters echoplex %u\r\n", sim_debug 809 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters dumpinput\r\n", sim_debug 824 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters replay %u\r\n", sim_debug 833 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters polite %u\r\n", sim_debug 844 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters block_xfer %u %u\r\n", sim_debug 861 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters set_buffer_size %u\r\n", sim_debug 870 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters breakall %u\r\n", sim_debug 879 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters prefixnl %u\r\n", sim_debug 888 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters input_flow_control %u\r\n", sim_debug 897 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters output_flow_control %u\r\n", sim_debug 906 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters odd_parity %u\r\n", sim_debug 915 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters eight_bit_in %u\r\n", sim_debug 924 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters eight_bit_out %u\r\n", sim_debug 943 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters unimplemented\r\n", sim_debug 952 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters illegal\r\n", sim_debug 964 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] set_delay_table\r\n", decoded_p->slot_no); sim_debug 1060 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] report_meters\r\n", decoded_p->slot_no); sim_debug 1092 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] unimplemented opcode\r\n", decoded_p->slot_no); sim_debug 1103 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u]fnp illegal opcode %d (%o)\r\n", sim_debug 1168 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u]rcd wtx_output\r\n", decoded_p->slot_no); sim_debug 1237 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u]wtx op_code %u 0%o\r\n", decoded_p->slot_no, decoded_p->op_code, decoded_p->op_code); sim_debug 1244 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] unimplemented opcode\r\n", decoded_p->slot_no); sim_debug 1245 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_ERR, & fnp_dev, "[%u]fnp wtx unimplemented opcode %d (%o)\r\n", sim_debug 1469 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "io_cmd %u\r\n", io_cmd); sim_debug 1499 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u]rcd unimplemented\r\n", decoded_p->slot_no); sim_debug 1500 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_ERR, & fnp_dev, "[%u]fnp unimplemented io_cmd %d\r\n", decoded_p->slot_no, io_cmd); sim_debug 1507 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u]rcd illegal opcode\r\n", decoded_p->slot_no); sim_debug 1508 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_ERR, & fnp_dev, "[%u]fnp illegal io_cmd %d\r\n", decoded_p->slot_no, io_cmd); sim_debug 1555 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u]fnp interrupt\r\n", decoded_p->slot_no); sim_debug 1560 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] rtx\r\n", decoded_p->slot_no); sim_debug 1565 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] input_accepted\r\n", decoded_p->slot_no); sim_debug 1570 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] illegal rtx ack\r\n", decoded_p->slot_no); sim_debug 1578 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] wcd\r\n", decoded_p->slot_no); sim_debug 1583 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] terminal accepted\r\n", decoded_p->slot_no); sim_debug 1599 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] disconnect_this_line\r\n", decoded_p->slot_no); sim_debug 1606 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] reject_request_temp\r\n", decoded_p->slot_no); sim_debug 1671 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] unimplemented opcode\r\n", decoded_p->slot_no); sim_debug 1672 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_ERR, & fnp_dev, "[%u]fnp reply unimplemented opcode %d (%o)\r\n", sim_debug 1681 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] illegal opcode\r\n", decoded_p->slot_no); sim_debug 1682 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_ERR, & fnp_dev, "[%u]fnp reply illegal opcode %d (%o)\r\n", sim_debug 1714 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] illegal io_cmd\r\n", decoded_p->slot_no); sim_debug 1715 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_ERR, & fnp_dev, "[%u]illegal/unimplemented io_cmd (%d) in fnp submbx\r\n", sim_debug 1739 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_ERR, & fnp_dev, "odd -- Multics marked an unused mbx as unused? cell %d (mbx %d)\r\n", sim_debug 1741 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_ERR, & fnp_dev, " %d %d %d %d\r\n", sim_debug 1747 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "Multics marked cell %d (mbx %d) as unused; was %o\r\n", sim_debug 1775 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, &fnp_dev, "clearing wait; was %d\r\n", linep->waitForMbxDone); sim_debug 1782 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, " %d %d %d %d\r\n", sim_debug 1838 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "CS interrupt %u\r\n", decoded_p->cell); sim_debug 1853 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_ERR, & fnp_dev, "fnp illegal cell number %d\r\n", decoded_p->cell); sim_debug 1879 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "3270 controller found at unit %u line %u\r\n", devUnitIdx, lineno); sim_debug 1939 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, sim_debug 2048 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, sim_debug 79 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 100 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 120 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 137 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 169 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 181 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 199 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 211 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 239 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 251 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 269 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 282 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 311 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 323 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 341 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 353 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 381 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 393 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 411 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 423 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 453 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 465 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 483 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 495 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 523 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 535 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 553 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 565 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 600 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 616 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 638 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 652 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 659 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 695 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 711 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 733 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 747 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 753 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 787 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 803 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 825 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 839 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 873 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 889 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 911 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 925 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 952 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 966 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 997 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1013 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1035 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1049 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1090 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1110 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1137 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1159 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1214 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1234 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1261 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1284 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1320 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, "Write(Actual) Write: bar address=%08o writeData=%012"PRIo64"\r\n", address, data); sim_debug 1333 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1351 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1361 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1392 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1405 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1423 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1433 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1464 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1479 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1497 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1507 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1546 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1557 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1579 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1593 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1630 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1639 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1658 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1669 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1701 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1717 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1739 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1753 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1791 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1812 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1839 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1859 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1922 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1943 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1970 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1990 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 125 src/dps8/dps8_ins.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 180 src/dps8/dps8_ins.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 204 src/dps8/dps8_ins.c sim_debug (DBG_ADDRMOD, &cpu_dev, sim_debug 207 src/dps8/dps8_ins.c sim_debug (DBG_ADDRMOD, &cpu_dev, sim_debug 226 src/dps8/dps8_ins.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 239 src/dps8/dps8_ins.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 265 src/dps8/dps8_ins.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 329 src/dps8/dps8_ins.c sim_debug (DBG_TRACE, & cpu_dev, "%s %05o:%06o\r\n", sim_debug 345 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, sim_debug 349 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, sim_debug 355 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, sim_debug 661 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "%s sets XSF to %o\r\n", __func__, cpu.cu.XSF); sim_debug 1269 src/dps8/dps8_ins.c sim_debug (flag, &cpu_dev, "%06o|%06o %s\r\n", sim_debug 1274 src/dps8/dps8_ins.c sim_debug (flag, &cpu_dev, "%06o %s\r\n", cpu.PPR.IC, where); sim_debug 1281 src/dps8/dps8_ins.c sim_debug (flag, &cpu_dev, "%05o:%06o|%06o %s\r\n", sim_debug 1287 src/dps8/dps8_ins.c sim_debug (flag, &cpu_dev, "%05o:%06o %s\r\n", sim_debug 1297 src/dps8/dps8_ins.c sim_debug (flag, &cpu_dev, sim_debug 1315 src/dps8/dps8_ins.c sim_debug (flag, &cpu_dev, sim_debug 1335 src/dps8/dps8_ins.c sim_debug (flag, &cpu_dev, sim_debug 1354 src/dps8/dps8_ins.c sim_debug (flag, &cpu_dev, sim_debug 1874 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 1878 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 1905 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "rpt/rd/rl repeat first; offset is %06o\r\n", offset); sim_debug 1909 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "rpt/rd/rl repeat first; X%d was %06o\r\n", Xn, cpu.rX[Xn]); sim_debug 1922 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "rpt/rd/rl repeat first; X%d now %06o\r\n", Xn, cpu.rX[Xn]); sim_debug 1938 src/dps8/dps8_ins.c sim_debug (DBG_APPENDING, &cpu_dev, "initialize EIS descriptors\r\n"); sim_debug 2001 src/dps8/dps8_ins.c sim_debug (DBG_APPENDING, &cpu_dev, sim_debug 2018 src/dps8/dps8_ins.c sim_debug (DBG_APPENDING, &cpu_dev, sim_debug 2173 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 2186 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "RPT/RPD delta; X%d now %06o\r\n", Xn, cpu.rX[Xn]); sim_debug 2203 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "RPT/RPD delta; X%d now %06o\r\n", Xn, cpu.rX[Xn]); sim_debug 2216 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "RPT/RPD delta; X%d now %06o\r\n", Xn, cpu.rX[Xn]); sim_debug 2268 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "tally %d\r\n", x); sim_debug 2270 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "tally runout\r\n"); sim_debug 2274 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "not tally runout\r\n"); sim_debug 2282 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "is zero terminate\r\n"); sim_debug 2287 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "is not zero terminate\r\n"); sim_debug 2292 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "is neg terminate\r\n"); sim_debug 2297 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "is not neg terminate\r\n"); sim_debug 2302 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "is carry terminate\r\n"); sim_debug 2307 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "is not carry terminate\r\n"); sim_debug 2312 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "is overflow terminate\r\n"); sim_debug 2325 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "not terminate\r\n"); sim_debug 2363 src/dps8/dps8_ins.c sim_debug (DBG_REGDUMPAQI, &cpu_dev, "A=%012"PRIo64" Q=%012"PRIo64" IR:%s\r\n", sim_debug 2366 src/dps8/dps8_ins.c sim_debug (DBG_REGDUMPFLT, &cpu_dev, "E=%03o A=%012"PRIo64" Q=%012"PRIo64" %.10Lg\r\n", sim_debug 2369 src/dps8/dps8_ins.c sim_debug (DBG_REGDUMPFLT, &cpu_dev, "E=%03o A=%012"PRIo64" Q=%012"PRIo64" %.10g\r\n", sim_debug 2372 src/dps8/dps8_ins.c sim_debug (DBG_REGDUMPIDX, &cpu_dev, "X[0]=%06o X[1]=%06o X[2]=%06o X[3]=%06o\r\n", sim_debug 2374 src/dps8/dps8_ins.c sim_debug (DBG_REGDUMPIDX, &cpu_dev, "X[4]=%06o X[5]=%06o X[6]=%06o X[7]=%06o\r\n", sim_debug 2377 src/dps8/dps8_ins.c sim_debug (DBG_REGDUMPPR, &cpu_dev, "PR%d/%s: SNR=%05o RNR=%o WORDNO=%06o BITNO:%02o ARCHAR:%o ARBITNO:%02o\r\n", sim_debug 2381 src/dps8/dps8_ins.c sim_debug (DBG_REGDUMPPPR, &cpu_dev, "PRR:%o PSR:%05o P:%o IC:%06o\r\n", sim_debug 2383 src/dps8/dps8_ins.c sim_debug (DBG_REGDUMPDSBR, &cpu_dev, "ADDR:%08o BND:%05o U:%o STACK:%04o\r\n", sim_debug 3013 src/dps8/dps8_ins.c sim_debug (DBG_APPENDING, & cpu_dev, sim_debug 5384 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, "\r\n"); sim_debug 5385 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, sim_debug 5388 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, sim_debug 5399 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, ">>> quot 1 %"PRId64"\r\n", quotient); sim_debug 5400 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, ">>> rem 1 %"PRId64"\r\n", remainder); sim_debug 5416 src/dps8/dps8_ins.c sim_debug 5418 src/dps8/dps8_ins.c sim_debug 5426 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, sim_debug 5428 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, sim_debug 5433 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, sim_debug 5441 src/dps8/dps8_ins.c sim_debug (DBG_ERR, & cpu_dev, sim_debug 5453 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, "rA (rem) %012"PRIo64"\r\n", cpu.rA); sim_debug 5454 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, "rQ (quot) %012"PRIo64"\r\n", cpu.rQ); sim_debug 6115 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 6597 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 7271 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 7279 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 7726 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "ldt TR %d (%o)\r\n", sim_debug 7776 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "RALR set to %o\r\n", cpu.rRALR); sim_debug 8941 src/dps8/dps8_ins.c sim_debug (DBG_MSG, & cpu_dev, "BCE DIS causes CPU halt\r\n"); sim_debug 9000 src/dps8/dps8_ins.c sim_debug 9006 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "entered DIS_cycle\r\n"); sim_debug 9033 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "DIS sees an interrupt\r\n"); sim_debug 9053 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "DIS sees a TRO\r\n"); sim_debug 9059 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "DIS refetches\r\n"); sim_debug 10067 src/dps8/dps8_ins.c sim_debug (DBG_APPENDING, & cpu_dev, "absa CA:%08o\r\n", cpu.TPR.CA); sim_debug 10150 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, "RCU interrupt return\r\n"); sim_debug 10229 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, "RCU FIF REFETCH return\r\n"); sim_debug 10237 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, "RCU rfi refetch return\r\n"); sim_debug 10257 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, "RCU MME2 restart return\r\n"); sim_debug 10272 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, "RCU rfi/FIF REFETCH return\r\n"); sim_debug 10283 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, "RCU MME2 restart return\r\n"); sim_debug 10318 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, "RCU OFL/DIV refetch return\r\n"); sim_debug 10323 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, "RCU sync fault return\r\n"); sim_debug 10337 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, "RCU MMEx sync fault return\r\n"); sim_debug 10347 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, "RCU LUF RESTART return\r\n"); sim_debug 10370 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, "RCU ACV RESTART return\r\n"); sim_debug 1771 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, "%s: Status: 0%012"PRIo64" 0%012"PRIo64"\r\n", sim_debug 1775 src/dps8/dps8_iom.c sim_debug (DBG_WARN, &iom_dev, sim_debug 1818 src/dps8/dps8_iom.c sim_debug (DBG_WARN, & iom_dev, sim_debug 2509 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, sim_debug 2560 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, sim_debug 2578 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, sim_debug 2653 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, "%s: addr %08o\r\n", __func__, addr); sim_debug 2696 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, sim_debug 2702 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, sim_debug 2707 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, sim_debug 2832 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, sim_debug 2888 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, sim_debug 3308 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, "%s: Payload channel %c%02o\r\n", __func__, iomChar (iomUnitIdx), chan); sim_debug 3570 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, "%s: Connect channel\r\n", __func__); sim_debug 3625 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, "%s: PCW %012llo %012llo chan %02o\r\n", __func__, q->PCW0, q->PCW1, q->PCW_CHAN); sim_debug 3755 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, sim_debug 3767 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, sim_debug 3828 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, sim_debug 1218 src/dps8/dps8_math.c sim_debug (DBG_TRACEEXT, & cpu_dev, "fmp A %012"PRIo64" Q %012"PRIo64" E %03o\r\n", cpu.rA, cpu.rQ, cpu.rE); sim_debug 2310 src/dps8/dps8_math.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dufm e1 %d %03o m1 %012"PRIo64" %012"PRIo64"\r\n", sim_debug 2326 src/dps8/dps8_math.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dufm e2 %d %03o m2 %012"PRIo64" %012"PRIo64"\r\n", sim_debug 890 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, sim_debug 895 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, sim_debug 1152 src/dps8/dps8_mgp.c sim_debug(DBG_TRACE, &mgp_dev, sim_debug 1166 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, "mgp_cmd %#o (%s)\r\n", sim_debug 1174 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, "mgp request status\r\n"); sim_debug 1180 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, "%s:%d: mgp_dev_$read\r\n", __func__, __LINE__); sim_debug 1240 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, sim_debug 1273 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, "%s:%d: mgp_dev_$write\r\n", __func__, __LINE__); sim_debug 1349 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, sim_debug 1426 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, "mgp cmd 006 (handled)\r\n"); sim_debug 1433 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, "mgp host switch down\r\n"); sim_debug 1446 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, "mgp disable bus back\r\n"); sim_debug 1453 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, "mgp enable bus back\r\n"); sim_debug 1460 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, "mgp host switch up\r\n"); sim_debug 1773 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, sim_debug 1816 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, sim_debug 1838 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, sim_debug 1868 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, sim_debug 1945 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, sim_debug 1966 src/dps8/dps8_mgp.c sim_debug (DBG_DEBUG, &mgp_dev, sim_debug 1974 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, sim_debug 2011 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, sim_debug 2119 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, sim_debug 2153 src/dps8/dps8_mgp.c sim_debug (DBG_DEBUG, &mgp_dev, sim_debug 737 src/dps8/dps8_mt.c sim_debug (DBG_ERR, & tape_dev, sim_debug 995 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Read %s record\r\n", __func__, sim_debug 1006 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: sim_tape_rdrecf returned %d, with tbc %d\r\n", sim_debug 1011 src/dps8/dps8_mt.c sim_debug (DBG_NOTIFY, & tape_dev, sim_debug 1025 src/dps8/dps8_mt.c sim_debug (DBG_NOTIFY, & tape_dev, sim_debug 1044 src/dps8/dps8_mt.c sim_debug (DBG_ERR, & tape_dev, sim_debug 1047 src/dps8/dps8_mt.c sim_debug (DBG_ERR, & tape_dev, sim_debug 1067 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, sim_debug 1073 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, sim_debug 1111 src/dps8/dps8_mt.c sim_debug (DBG_WARN, & tape_dev, sim_debug 1248 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Write %s record\r\n", __func__, sim_debug 1256 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, sim_debug 1262 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, sim_debug 1320 src/dps8/dps8_mt.c sim_debug (DBG_WARN, & tape_dev, sim_debug 1340 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: sim_tape_wrrecf returned %d, with tbc %d\r\n", sim_debug 1352 src/dps8/dps8_mt.c sim_debug (DBG_NOTIFY, & tape_dev, sim_debug 1385 src/dps8/dps8_mt.c sim_debug (DBG_INFO, & tape_dev, sim_debug 1414 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, sim_debug 1446 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, sim_debug 1504 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Tape %c%02o_%02o\r\n", __func__, iomChar (iomUnitIdx), chan, dev_code); sim_debug 1532 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: IDCW_DEV_CMD %oo %d.\r\n", __func__, p->IDCW_DEV_CMD, p->IDCW_DEV_CMD); sim_debug 1541 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: controller suspend\r\n", __func__); sim_debug 1547 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Request status: %04o control %0o chan_cmd %02o\r\n", __func__, sim_debug 1609 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Read controller main memory\r\n", __func__); sim_debug 1619 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Read 9 record\r\n", __func__); sim_debug 1635 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Read binary record\r\n", __func__); sim_debug 1669 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: initiate read data transfer\r\n", __func__); sim_debug 1686 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Write 9 record\r\n", __func__); sim_debug 1701 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Write binary record\r\n", __func__); sim_debug 1714 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Write Control Registers\r\n", __func__); sim_debug 1724 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Release controller\r\n", __func__); sim_debug 1726 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Release status: %04o control %0o chan_cmd %02o\r\n", sim_debug 1760 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Write controller main memory\r\n", __func__); sim_debug 1777 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s Reset status\r\n", __func__); sim_debug 1795 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Set 6250 cpi\r\n", __func__); sim_debug 1803 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Set 800 bpi\r\n", __func__); sim_debug 1816 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Set 800 bpi\r\n", __func__); sim_debug 1829 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Set 556 bpi\r\n", __func__); sim_debug 1846 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Tally of zero interpreted as 64\r\n", __func__); sim_debug 1849 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Forward skip record %d\r\n", __func__, tally); sim_debug 1902 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s:: Forward Skip File\r\n", __func__); sim_debug 1929 src/dps8/dps8_mt.c sim_debug (DBG_NOTIFY, & tape_dev, "%s: Forward space %d files\r\n", __func__, tally); sim_debug 1955 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Backspace Record\r\n", __func__); sim_debug 1963 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Tally of zero interpreted as 64\r\n", __func__); sim_debug 1967 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Backspace record tally %d\r\n", __func__, tally); sim_debug 1995 src/dps8/dps8_mt.c sim_debug (DBG_NOTIFY, & tape_dev, "%s: Backspace %d records\r\n", __func__, skipped); sim_debug 2018 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Backspace File\r\n", __func__); sim_debug 2029 src/dps8/dps8_mt.c sim_debug 2033 src/dps8/dps8_mt.c sim_debug 2062 src/dps8/dps8_mt.c sim_debug (DBG_NOTIFY, & tape_dev, "%s: Backspace %d records\r\n", __func__, tally); sim_debug 2090 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Request device status: %o\r\n", __func__, p->stati); sim_debug 2115 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Reset device status: %o\r\n", __func__, p->stati); sim_debug 2130 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Write tape mark\r\n", __func__); sim_debug 2141 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: returned %d\r\n", __func__, ret); sim_debug 2146 src/dps8/dps8_mt.c sim_debug (DBG_NOTIFY, & tape_dev, "%s: EOM: %s\r\n", __func__, simh_tape_msg (ret)); sim_debug 2170 src/dps8/dps8_mt.c sim_debug (DBG_INFO, & tape_dev, "%s: Wrote tape mark; status %04o\r\n", __func__, p->stati); sim_debug 2183 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: survey_devices\r\n", __func__); sim_debug 2196 src/dps8/dps8_mt.c sim_debug (DBG_WARN, & tape_dev, "%s: Set file permit\r\n", __func__); sim_debug 2213 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Set 200 bpi\r\n", __func__); sim_debug 2225 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Set 1600 CPI\r\n", __func__); sim_debug 2234 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Rewind\r\n", __func__); sim_debug 2262 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Rewind/unload\r\n", __func__); sim_debug 2293 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: stati %04o\r\n", __func__, p->stati); sim_debug 918 src/dps8/dps8_net.c sim_debug(DBG_DEBUG, &net_dev, sim_debug 923 src/dps8/dps8_net.c sim_debug(DBG_DEBUG, &net_dev, sim_debug 1222 src/dps8/dps8_net.c sim_debug(DBG_TRACE, &net_dev, sim_debug 1236 src/dps8/dps8_net.c sim_debug(DBG_DEBUG, &net_dev, "net_cmd %#o (%s)\r\n", sim_debug 1244 src/dps8/dps8_net.c sim_debug(DBG_DEBUG, &net_dev, "net request status\r\n"); sim_debug 1275 src/dps8/dps8_net.c sim_debug(DBG_DEBUG, &net_dev, "%s: net_dev_$read\r\n", __func__); sim_debug 1335 src/dps8/dps8_net.c sim_debug(DBG_DEBUG, &net_dev, sim_debug 1390 src/dps8/dps8_net.c sim_debug(DBG_DEBUG, &net_dev, "%s: net_dev_$write\r\n", __func__); sim_debug 1483 src/dps8/dps8_net.c sim_debug(DBG_DEBUG, &net_dev, sim_debug 1569 src/dps8/dps8_net.c sim_debug(DBG_DEBUG, &net_dev, "net cmd 006 (handled)\r\n"); sim_debug 1576 src/dps8/dps8_net.c sim_debug(DBG_DEBUG, &net_dev, "net host switch down\r\n"); sim_debug 1590 src/dps8/dps8_net.c sim_debug(DBG_DEBUG, &net_dev, sim_debug 1606 src/dps8/dps8_net.c sim_debug(DBG_DEBUG, &net_dev, "net disable bus back\r\n"); sim_debug 1613 src/dps8/dps8_net.c sim_debug(DBG_DEBUG, &net_dev, "net enable bus back\r\n"); sim_debug 1620 src/dps8/dps8_net.c sim_debug(DBG_DEBUG, &net_dev, "net host switch up\r\n"); sim_debug 1639 src/dps8/dps8_net.c sim_debug(DBG_DEBUG, &net_dev, sim_debug 1836 src/dps8/dps8_net.c sim_debug(DBG_DEBUG, &net_dev, sim_debug 1880 src/dps8/dps8_net.c sim_debug(DBG_DEBUG, &net_dev, sim_debug 1902 src/dps8/dps8_net.c sim_debug(DBG_DEBUG, &net_dev, sim_debug 1932 src/dps8/dps8_net.c sim_debug(DBG_DEBUG, &net_dev, sim_debug 2131 src/dps8/dps8_net.c sim_debug(DBG_DEBUG, &net_dev, sim_debug 2187 src/dps8/dps8_net.c sim_debug(DBG_DEBUG, &net_dev, sim_debug 2195 src/dps8/dps8_net.c sim_debug(DBG_DEBUG, &net_dev, sim_debug 766 src/dps8/dps8_prt.c sim_debug 772 src/dps8/dps8_prt.c sim_debug 1330 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, sim_debug 1400 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Request Status\r\n", __func__); sim_debug 1405 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Nonedited BCD, Slew One Line\r\n", __func__); sim_debug 1415 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Edited BCD, Slew Zero Lines\r\n", __func__); sim_debug 1425 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Reset Status\r\n", __func__); sim_debug 1438 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: stati %04o\r\n", __func__, p->stati); sim_debug 1484 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Request Status\r\n", __func__); sim_debug 1489 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Nonedited ASCII, Slew One Line\r\n", __func__); sim_debug 1499 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Load Image Buffer\r\n", __func__); sim_debug 1505 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Edited ASCII, Slew Zero Lines\r\n", __func__); sim_debug 1515 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Reset Status\r\n", __func__); sim_debug 1528 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: stati %04o\r\n", __func__, p->stati); sim_debug 1580 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Request Status\r\n", __func__); sim_debug 1585 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Load Image Buffer\r\n", __func__); sim_debug 1591 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Nonedited ASCII, Slew One Line\r\n", __func__); sim_debug 1601 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Edited ASCII, Slew Zero Lines\r\n", __func__); sim_debug 1611 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Reset Status\r\n", __func__); sim_debug 1624 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: stati %04o\r\n", __func__, p->stati); sim_debug 1676 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Request Status\r\n", __func__); sim_debug 1681 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Load Image Buffer\r\n", __func__); sim_debug 1687 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Load Image Buffer\r\n", __func__); sim_debug 1717 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Load VFC Image\r\n", __func__); sim_debug 1723 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Nonedited BCD, Slew Zero Lines\r\n", __func__); sim_debug 1733 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Nonedited BCD, Slew One Line\r\n", __func__); sim_debug 1743 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Nonedited BCD, Slew Two Lines\r\n", __func__); sim_debug 1753 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Nonedited BCD, Slew Top Of Page\r\n", __func__); sim_debug 1763 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Nonedited ASCII, Slew Zero Lines\r\n", __func__); sim_debug 1773 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Nonedited ASCII, Slew One Line\r\n", __func__); sim_debug 1783 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Nonedited ASCII, Slew Two Lines\r\n", __func__); sim_debug 1793 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Nonedited ASCII, Slew Top Of Page\r\n", __func__); sim_debug 1803 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Edited BCD, Slew Zero Lines\r\n", __func__); sim_debug 1813 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Edited BCD, Slew One Line\r\n", __func__); sim_debug 1823 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Edited BCD, Slew Two Lines\r\n", __func__); sim_debug 1833 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Edited BCD, Slew Top Of Page\r\n", __func__); sim_debug 1843 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Edited ASCII, Slew Zero Lines\r\n", __func__); sim_debug 1853 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Edited ASCII, Slew One Line\r\n", __func__); sim_debug 1863 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Edited ASCII, Slew Two Lines\r\n", __func__); sim_debug 1873 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Edited ASCII, Slew Top Of Page\r\n", __func__); sim_debug 1883 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Reset Status\r\n", __func__); sim_debug 1889 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Slew One Line\r\n", __func__); sim_debug 1905 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Slew Two Lines\r\n", __func__); sim_debug 1921 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Slew To Top Of Page\r\n", __func__); sim_debug 1937 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Reserve Device\r\n", __func__); sim_debug 1943 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Release Device\r\n", __func__); sim_debug 1956 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: stati %04o\r\n", __func__, p->stati); sim_debug 2300 src/dps8/dps8_prt.c sim_debug (DBG_ERR, & prt_dev, sim_debug 641 src/dps8/dps8_scu.c sim_debug (DBG_ERR, & scu_dev, sim_debug 709 src/dps8/dps8_scu.c sim_debug (DBG_ERR, & scu_dev, sim_debug 864 src/dps8/dps8_scu.c sim_debug (DBG_ERR, & scu_dev, sim_debug 1063 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, sim_debug 1067 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, sim_debug 1072 src/dps8/dps8_scu.c sim_debug 1076 src/dps8/dps8_scu.c sim_debug 1078 src/dps8/dps8_scu.c sim_debug 1080 src/dps8/dps8_scu.c sim_debug 1084 src/dps8/dps8_scu.c sim_debug 1086 src/dps8/dps8_scu.c sim_debug 1358 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, "finagle clock\r\n"); sim_debug 1455 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, "deliver_interrupts %o\r\n", scu_unit_idx); sim_debug 1481 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, "trying to deliver %d\r\n", inum); sim_debug 1482 src/dps8/dps8_scu.c sim_debug (DBG_INTR, & scu_dev, sim_debug 1551 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, sim_debug 1556 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, "interrupt set for CPU %d SCU %d\r\n", cpu_unit_udx, scu_unit_idx); sim_debug 1557 src/dps8/dps8_scu.c sim_debug (DBG_INTR, & scu_dev, sim_debug 1568 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, "trying to deliver %d\r\n", inum); sim_debug 1569 src/dps8/dps8_scu.c sim_debug (DBG_INTR, & scu_dev, sim_debug 1636 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, sim_debug 1641 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, "interrupt set for CPU %d SCU %d\r\n", cpu_unit_udx, scu_unit_idx); sim_debug 1642 src/dps8/dps8_scu.c sim_debug (DBG_INTR, & scu_dev, sim_debug 1667 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, sim_debug 1679 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, sim_debug 1691 src/dps8/dps8_scu.c sim_debug 1703 src/dps8/dps8_scu.c sim_debug 1749 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, "sscr SCU unit %o\r\n", scu_unit_idx); sim_debug 1800 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, sim_debug 1814 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, sim_debug 1821 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, sim_debug 1837 src/dps8/dps8_scu.c sim_debug (DBG_INTR, & scu_dev, sim_debug 1886 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, "Set mask register port %d to " sim_debug 1910 src/dps8/dps8_scu.c sim_debug (DBG_WARN, & scu_dev, sim_debug 1922 src/dps8/dps8_scu.c sim_debug (DBG_WARN, & scu_dev, sim_debug 1935 src/dps8/dps8_scu.c sim_debug 1943 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, sim_debug 1950 src/dps8/dps8_scu.c sim_debug (DBG_INTR, & scu_dev, sim_debug 1976 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, sim_debug 1979 src/dps8/dps8_scu.c sim_debug (DBG_INTR, & scu_dev, sim_debug 2115 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, "rscr 1 %d\r\n", scu_unit_idx); sim_debug 2193 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, sim_debug 2234 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, sim_debug 2355 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, sim_debug 2369 src/dps8/dps8_scu.c sim_debug (DBG_ERR, & scu_dev, sim_debug 2371 src/dps8/dps8_scu.c sim_debug (DBG_ERR, & scu_dev, sim_debug 2435 src/dps8/dps8_scu.c sim_debug (DBG_INFO, & scu_dev, sim_debug 2513 src/dps8/dps8_scu.c sim_debug (DBG_ERR, & scu_dev, sim_debug 2544 src/dps8/dps8_scu.c sim_debug (DBG_WARN, & scu_dev, sim_debug 2594 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, sim_debug 2692 src/dps8/dps8_scu.c sim_debug (DBG_ERR, & scu_dev, sim_debug 2707 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, "rmcm selected scu port %u\r\n", sim_debug 2716 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, "rmcm got mask %011o from pima A\r\n", sim_debug 2722 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, "rmcm got mask %011o from pima B\r\n", sim_debug 2744 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, sim_debug 2756 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, sim_debug 2792 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, "SMCM SCU port num %d\r\n", scu_port_num); sim_debug 2810 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, "SMCM intr mask 0 set to %011o\r\n", sim_debug 2816 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, "SMCM intr mask 1 set to %011o\r\n", sim_debug 833 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 839 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 855 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, "IDCW_DEV_CODE %d\r\n", p->IDCW_DEV_CODE); sim_debug 864 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 866 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 868 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 875 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 899 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 932 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 958 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 984 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 1014 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 1039 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 1068 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 1096 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 1113 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, "stati %04o\r\n", p->stati); sim_debug 2608 src/dps8/dps8_sys.c sim_debug (dflag, & cpu_dev, "%s", line); sim_debug 2729 src/dps8/dps8_sys.c sim_debug (dflag, & cpu_dev, "%s", line); sim_debug 2748 src/dps8/dps8_sys.c sim_debug (dflag, & cpu_dev, "%s", line); sim_debug 230 src/dps8/dps8_urp.c sim_debug (DBG_DEBUG, & urp_dev, "%s: Request Status\r\n", __func__); sim_debug 236 src/dps8/dps8_urp.c sim_debug (DBG_DEBUG, & urp_dev, "%s: Initiate Read Data Xfer\r\n", __func__); sim_debug 246 src/dps8/dps8_urp.c sim_debug (DBG_DEBUG, & urp_dev, "%s: Set Diagnostic Mode\r\n", __func__); sim_debug 253 src/dps8/dps8_urp.c sim_debug (DBG_DEBUG, & urp_dev, "%s: Reset Status\r\n", __func__); sim_debug 267 src/dps8/dps8_urp.c sim_debug (DBG_DEBUG, & urp_dev, "%s: stati %04o\r\n", __func__, p->stati); sim_debug 283 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 356 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "Add36b res %012"PRIo64" flags %06o ovf %o\r\n", res, * flags, * ovf); sim_debug 722 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 730 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 776 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 784 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 800 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "Sub72b res %012"PRIo64"%012"PRIo64" flags %06o ovf %o\r\n", sim_debug 803 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "Sub72b res %012"PRIo64"%012"PRIo64" flags %06o ovf %o\r\n", sim_debug 882 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "Sub72b res %012"PRIo64"%012"PRIo64" flags %06o ovf %o\r\n", sim_debug 885 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "Sub72b res %012"PRIo64"%012"PRIo64" flags %06o ovf %o\r\n", sim_debug 1222 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op1 %016"PRIx64"%016"PRIx64"\r\n", op1.h, op1.l); sim_debug 1223 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op2 %016"PRIx64"%016"PRIx64"\r\n", op2.h, op2.l); sim_debug 1226 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op1s %016"PRIx64"%016"PRIx64"\r\n", op1s.h, op1s.l); sim_debug 1227 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op2s %016"PRIx64"%016"PRIx64"\r\n", op2s.h, op2s.l); sim_debug 1229 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op1 %016"PRIx64"%016"PRIx64"\r\n", (uint64_t) (op1>>64), (uint64_t) op1); sim_debug 1230 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op2 %016"PRIx64"%016"PRIx64"\r\n", (uint64_t) (op2>>64), (uint64_t) op2); sim_debug 1233 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op1s %016"PRIx64"%016"PRIx64"\r\n", (uint64_t) (op1s>>64), (uint64_t) op1s); sim_debug 1234 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op2s %016"PRIx64"%016"PRIx64"\r\n", (uint64_t) (op2s>>64), (uint64_t) op2s); sim_debug 8934 src/simh/scp.c sim_debug (SIM_DBG_EVENT, sim_dflt_dev, sim_debug 8950 src/simh/scp.c sim_debug (SIM_DBG_EVENT, sim_dflt_dev, sim_debug 8963 src/simh/scp.c sim_debug (SIM_DBG_EVENT, sim_dflt_dev, sim_debug 8968 src/simh/scp.c sim_debug (SIM_DBG_EVENT, sim_dflt_dev, sim_debug 9012 src/simh/scp.c sim_debug (SIM_DBG_ACTIVATE, sim_dflt_dev, "Activating %s delay=%d\r\n", sim_uname (uptr), event_time); sim_debug 9094 src/simh/scp.c sim_debug (SIM_DBG_EVENT, sim_dflt_dev, "Canceling Event for %s\r\n", sim_uname(uptr)); sim_debug 10127 src/simh/scp.c sim_debug (exp->dbit, exp->dptr, "Checking String[0:%lld]: %s\r\n", sim_debug 10129 src/simh/scp.c sim_debug (exp->dbit, exp->dptr, "Against Match Data: %s\r\n", mstr); sim_debug 10140 src/simh/scp.c sim_debug (exp->dbit, exp->dptr, "Checking String[%lld:%lld]: %s\r\n", sim_debug 10143 src/simh/scp.c sim_debug (exp->dbit, exp->dptr, "Against Match Data: %s\r\n", mstr); sim_debug 10156 src/simh/scp.c sim_debug (exp->dbit, exp->dptr, "Checking String[%lld:%lld]: %s\r\n", sim_debug 10159 src/simh/scp.c sim_debug (exp->dbit, exp->dptr, "Against Match Data: %s\r\n", mstr); sim_debug 10171 src/simh/scp.c sim_debug (exp->dbit, exp->dptr, "Buffer wrapping\r\n"); sim_debug 10174 src/simh/scp.c sim_debug (exp->dbit, exp->dptr, "Matched expect pattern!\r\n"); sim_debug 10177 src/simh/scp.c sim_debug (exp->dbit, exp->dptr, "Waiting for %lld more match%s before stopping\r\n", sim_debug 10184 src/simh/scp.c sim_debug (exp->dbit, exp->dptr, "Initiating actions: %s\r\n", ep->act); sim_debug 10187 src/simh/scp.c sim_debug (exp->dbit, exp->dptr, "No actions specified, stopping...\r\n"); sim_debug 10299 src/simh/scp.c sim_debug (snd->dbit, snd->dptr, "Too soon to inject next byte\r\n"); sim_debug 10307 src/simh/scp.c sim_debug (snd->dbit, snd->dptr, "Byte value: 0x%02X%s injected\r\n", *stat & 0xFF, dstr); sim_debug 10712 src/simh/scp.c sim_debug (reason, dptr, "%s %s %slen: %08X\r\n", sim_uname(uptr), txt, position, (unsigned int)len); sim_debug 10759 src/simh/scp.c sim_debug (reason, dptr, "%04lx thru %04lx same as above\r\n", sim_debug 10804 src/simh/scp.c sim_debug (reason, dptr, "%04lx%-48s %s%s%s\r\n", sim_debug 10808 src/simh/scp.c sim_debug (reason, dptr, "%04lx thru %04lx same as above\r\n", sim_debug 753 src/simh/sim_console.c sim_debug (DBG_XMT, &sim_remote_console, "Prompt Written: %s\r\n", sim_is_running ? "SIM> " : "sim> "); sim_debug 832 src/simh/sim_console.c sim_debug (DBG_RCV, &sim_remote_console, sim_debug 2049 src/simh/sim_console.c sim_debug (DBG_TRC, &sim_con_telnet, "sim_os_poll_kbd()\r\n"); sim_debug 249 src/simh/sim_disk.c sim_debug (ctx->dbit, ctx->dptr, "_sim_disk_rdsect(unit=%lu, lba=0x%X, sects=%lu)\r\n", sim_debug 274 src/simh/sim_disk.c sim_debug (ctx->dbit, ctx->dptr, "sim_disk_rdsect(unit=%lu, lba=0x%X, sects=%lu)\r\n", sim_debug 351 src/simh/sim_disk.c sim_debug (ctx->dbit, ctx->dptr, "_sim_disk_wrsect(unit=%lu, lba=0x%X, sects=%lu)\r\n", sim_debug 375 src/simh/sim_disk.c sim_debug (ctx->dbit, ctx->dptr, "sim_disk_wrsect(unit=%lu, lba=0x%X, sects=%lu)\r\n", sim_debug 824 src/simh/sim_disk.c sim_debug (ctx->dbit, ctx->dptr, "sim_disk_attach(unit=%lu,filename='%s')\r\n", sim_debug 1142 src/simh/sim_disk.c sim_debug (ctx->dbit, ctx->dptr, "sim_disk_reset(unit=%lu)\r\n", (unsigned long)(uptr-ctx->dptr->units)); sim_debug 579 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, ctx->dptr, "rd_lnt: st: %lld, lnt: %lld, pos: %" T_ADDR_FMT "u\r\n", sim_debug 768 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, ctx->dptr, "rd_lnt: st: %lld, lnt: %lld, pos: %" T_ADDR_FMT "u\r\n", sim_debug 804 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_rdrecf(unit=%d, buf=%p, max=%lld)\r\n", sim_debug 868 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_rdrecr(unit=%d, buf=%p, max=%lld)\r\n", sim_debug 919 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_wrrecf(unit=%d, buf=%p, bc=%lld)\r\n", sim_debug 989 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, ctx->dptr, "wr_lnt: lnt: %lld, pos: %" T_ADDR_FMT "u\r\n", sim_debug 1003 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_wrtmk(unit=%d)\r\n", (int)(uptr-ctx->dptr->units)); sim_debug 1027 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_wreom(unit=%d)\r\n", (int)(uptr-ctx->dptr->units)); sim_debug 1055 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_wreomrw(unit=%d)\r\n", (int)(uptr-ctx->dptr->units)); sim_debug 1186 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_wrgap(unit=%d, gaplen=%u)\r\n", (int)(uptr-ctx->dptr->units), gaplen); sim_debug 1353 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_sprecf(unit=%d)\r\n", (int)(uptr-ctx->dptr->units)); sim_debug 1394 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_sprecsf(unit=%d, count=%lld)\r\n", sim_debug 1440 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_sprecr(unit=%d)\r\n", (int)(uptr-ctx->dptr->units)); sim_debug 1487 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_sprecsr(unit=%d, count=%lld)\r\n", sim_debug 1537 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_spfilebyrecf(unit=%d, count=%lld, check_leot=%lld)\r\n", sim_debug 1608 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_spfilef(unit=%d, count=%lld)\r\n", sim_debug 1652 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_spfilebyrecr(unit=%d, count=%lld)\r\n", sim_debug 1704 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_spfiler(unit=%d, count=%lld)\r\n", sim_debug 1726 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_rewind(unit=%d)\r\n", (int)(uptr-ctx->dptr->units)); sim_debug 1750 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_position(unit=%d, flags=0x%X, recs=%lld, files=%lld)\r\n", sim_debug 1817 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_reset(unit=%d)\r\n", (int)(uptr-ctx->dptr->units)); sim_debug 1932 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, dptr, "tpc_map: tape_size: %" T_ADDR_FMT "u\r\n", tape_size); sim_debug 1944 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, dptr, "tpc_map: %lld byte count at pos: %" T_ADDR_FMT "u\r\n", sim_debug 1952 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, dptr, "tpc_map: tape mark at pos: %" T_ADDR_FMT "u\r\n", tpos); sim_debug 1961 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, dptr, "tpc_map: objc: %u, different record sizes: %u\r\n", objc, sizec); sim_debug 1965 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, dptr, "tpc_map: summary - %u tape marks\r\n", sim_debug 1968 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, dptr, "tpc_map: summary - %u %d byte record%s\r\n", sim_debug 1979 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, dptr, sim_debug 1983 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, dptr, sim_debug 1987 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, dptr, sim_debug 1995 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, dptr, sim_debug 2003 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, dptr, "tpc_map: OK objc: %lld\r\n", (long long)objc); sim_debug 398 src/simh/sim_timer.c sim_debug (DBG_CAL, &sim_timer_dev, "_sim_rtcn_init_unit(unit=%s, time=%d, tmr=%d)\r\n", sim_uname(uptr), time, tmr); sim_debug 461 src/simh/sim_timer.c sim_debug (DBG_TRC, &sim_timer_dev, "sim_timer_init()\r\n"); sim_debug 803 src/simh/sim_timer.c sim_debug (DBG_CAL, &sim_timer_dev, sim_debug 817 src/simh/sim_timer.c sim_debug (DBG_CAL, &sim_timer_dev, sim_debug 831 src/simh/sim_timer.c sim_debug (DBG_CAL, &sim_timer_dev, sim_debug 841 src/simh/sim_timer.c sim_debug (DBG_TRC, &sim_timer_dev, "sim_timer_clock_reset()\r\n"); sim_debug 852 src/simh/sim_timer.c sim_debug (DBG_TRC, &sim_timer_dev, "sim_start_timer_services()\r\n"); sim_debug 860 src/simh/sim_timer.c sim_debug (DBG_TRC, &sim_timer_dev, "sim_stop_timer_services()\r\n"); sim_debug 931 src/simh/sim_timer.c sim_debug (DBG_TIM, &sim_timer_dev, "sim_timer_activate_after() - queue addition %s at %d (%d usecs)\r\n", sim_debug 986 src/simh/sim_timer.c sim_debug (SIM_DBG_EVENT, &sim_timer_dev, "Canceled Clock Coscheduled Event for %s\r\n", sim_uname(uptr)); sim_debug 283 src/simh/sim_tmxr.h sim_debug (dbits, (lp)->mp->dptr, "%s", msg); } while (0) sim_debug 287 src/simh/sim_tmxr.h { if ((lp)->rxbps) sim_debug (TMXR_DBG_RET, (lp)->mp->dptr, "Ln%d: 0x%x - Next after: %.0f\r\n", \ sim_debug 289 src/simh/sim_tmxr.h else sim_debug (TMXR_DBG_RET, (lp)->mp->dptr, "Ln%d: 0x%x\r\n", (int)((lp)-(lp)->mp->ldsc), val); \ sim_debug 294 src/simh/sim_tmxr.h sim_debug (TMXR_DBG_TRC, mp->dptr, "%s\r\n", (msg)); } while (0) sim_debug 298 src/simh/sim_tmxr.h sim_debug (TMXR_DBG_TRC, (lp)->mp->dptr, "Ln%d:%s\r\n", (int)((lp)-(lp)->mp->ldsc), (msg)); } while (0) sim_debug 302 src/simh/sim_tmxr.h sim_debug (TMXR_DBG_CON, mp->dptr, "%s\r\n", (msg)); } while (0) sim_debug 306 src/simh/sim_tmxr.h sim_debug (TMXR_DBG_CON, (lp)->mp->dptr, "Ln%d:%s\r\n", (int)((lp)-(lp)->mp->ldsc), (msg)); } while (0)