DBG_TRACEEXT 331 src/dps8/doAppendCycleAPUDataRMW.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\n"); DBG_TRACEEXT 287 src/dps8/doAppendCycleAPUDataRead.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\n"); DBG_TRACEEXT 291 src/dps8/doAppendCycleAPUDataStore.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\n"); DBG_TRACEEXT 402 src/dps8/doAppendCycleIndirectWordFetch.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\n"); DBG_TRACEEXT 581 src/dps8/doAppendCycleInstructionFetch.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\n"); DBG_TRACEEXT 329 src/dps8/doAppendCycleOperandRMW.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\n"); DBG_TRACEEXT 701 src/dps8/doAppendCycleOperandRead.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\n"); DBG_TRACEEXT 289 src/dps8/doAppendCycleOperandStore.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\n"); DBG_TRACEEXT 326 src/dps8/doAppendCycleRTCDOperandFetch.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\n"); DBG_TRACEEXT 1891 src/dps8/dps8_append.c sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\n"); DBG_TRACEEXT 1156 src/dps8/dps8_cpu.c { "TRACEEXT", DBG_TRACEEXT, NULL }, DBG_TRACEEXT 2117 src/dps8/dps8_cpu.c sim_debug (DBG_TRACEEXT, & cpu_dev, "set_temporary_absolute_mode bit 29 sets XSF to 0\n"); DBG_TRACEEXT 2657 src/dps8/dps8_cpu.c sim_debug (DBG_TRACEEXT, & cpu_dev, "fetchCycle bit 29 sets XSF to 0\n"); DBG_TRACEEXT 2759 src/dps8/dps8_cpu.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 2767 src/dps8/dps8_cpu.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 428 src/dps8/dps8_decimal.c DBG_TRACEEXT 430 src/dps8/dps8_decimal.c DBG_TRACEEXT 458 src/dps8/dps8_decimal.c DBG_TRACEEXT 473 src/dps8/dps8_decimal.c DBG_TRACEEXT 477 src/dps8/dps8_decimal.c DBG_TRACEEXT 486 src/dps8/dps8_decimal.c DBG_TRACEEXT 492 src/dps8/dps8_decimal.c DBG_TRACEEXT 512 src/dps8/dps8_decimal.c DBG_TRACEEXT 541 src/dps8/dps8_decimal.c DBG_TRACEEXT 558 src/dps8/dps8_decimal.c DBG_TRACEEXT 580 src/dps8/dps8_decimal.c DBG_TRACEEXT 592 src/dps8/dps8_decimal.c DBG_TRACEEXT 610 src/dps8/dps8_decimal.c DBG_TRACEEXT 614 src/dps8/dps8_decimal.c DBG_TRACEEXT 621 src/dps8/dps8_decimal.c DBG_TRACEEXT 630 src/dps8/dps8_decimal.c DBG_TRACEEXT 655 src/dps8/dps8_decimal.c DBG_TRACEEXT 679 src/dps8/dps8_decimal.c DBG_TRACEEXT 697 src/dps8/dps8_decimal.c DBG_TRACEEXT 705 src/dps8/dps8_decimal.c DBG_TRACEEXT 29 src/dps8/dps8_decimal.h if_sim_debug (DBG_TRACEEXT, & cpu_dev) \ DBG_TRACEEXT 39 src/dps8/dps8_decimal.h if_sim_debug (DBG_TRACEEXT, & cpu_dev) \ DBG_TRACEEXT 556 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISWriteCache addr %06o\n", p->cachedAddr); DBG_TRACEEXT 566 src/dps8/dps8_eis.c if_sim_debug (DBG_TRACEEXT, & cpu_dev) DBG_TRACEEXT 571 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 577 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Write8 TRR %o TSR %05o\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } DBG_TRACEEXT 594 src/dps8/dps8_eis.c if_sim_debug (DBG_TRACEEXT, & cpu_dev) DBG_TRACEEXT 599 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 605 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Write8 NO PR TRR %o TSR %05o\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } DBG_TRACEEXT 620 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISReadCache addr %06o\n", address); DBG_TRACEEXT 644 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Read8 TRR %o TSR %05o\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } DBG_TRACEEXT 647 src/dps8/dps8_eis.c if_sim_debug (DBG_TRACEEXT, & cpu_dev) DBG_TRACEEXT 650 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 665 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Read8 NO PR TRR %o TSR %05o\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } DBG_TRACEEXT 667 src/dps8/dps8_eis.c if_sim_debug (DBG_TRACEEXT, & cpu_dev) DBG_TRACEEXT 670 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 688 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISWriteIdx addr %06o n %u\n", cpu.du.Dk_PTR_W[eisaddr_idx], n); DBG_TRACEEXT 691 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISWriteIdx addr %06o n %u\n", p->address, n); DBG_TRACEEXT 727 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISReadIdx addr %06o n %u\n", cpu.du.Dk_PTR_W[eisaddr_idx], n); DBG_TRACEEXT 731 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISReadIdx %ld addr %06o n %u\n", eisaddr_idx, p->address, n); DBG_TRACEEXT 757 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISRead addr %06o\n", cpu.du.Dk_PTR_W[eisaddr_idx]); DBG_TRACEEXT 759 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISRead addr %06o\n", p->address); DBG_TRACEEXT 770 src/dps8/dps8_eis.c DBG_TRACEEXT 772 src/dps8/dps8_eis.c DBG_TRACEEXT 792 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "%s addr %06o\n", __func__, addressN); DBG_TRACEEXT 808 src/dps8/dps8_eis.c if_sim_debug (DBG_TRACEEXT, & cpu_dev) DBG_TRACEEXT 812 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 816 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 832 src/dps8/dps8_eis.c if_sim_debug (DBG_TRACEEXT, & cpu_dev) DBG_TRACEEXT 835 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 854 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "%s addr %06o\n", __func__, addressN); DBG_TRACEEXT 870 src/dps8/dps8_eis.c if_sim_debug (DBG_TRACEEXT, & cpu_dev) DBG_TRACEEXT 874 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 878 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 894 src/dps8/dps8_eis.c if_sim_debug (DBG_TRACEEXT, & cpu_dev) DBG_TRACEEXT 897 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 959 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISGet469 : k: %u TAk %u coffset %u c %o \n", k, cpu.du.TAk[k - 1], residue, c); DBG_TRACEEXT 961 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISGet469 : k: %u TAk %u coffset %u c %o \n", k, e -> TA [k - 1], residue, c); DBG_TRACEEXT 1274 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "AR n %u k %u\n", n, k - 1); DBG_TRACEEXT 1279 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "No ARb %u\n", k - 1); DBG_TRACEEXT 1306 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "No ARa %u\n", k - 1); DBG_TRACEEXT 1422 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "AR n %u k %u\n", n, k - 1); DBG_TRACEEXT 1429 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "initial CN%u %u\n", k, CN); DBG_TRACEEXT 1464 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "N%u %o\n", k, e->N[k-1]); DBG_TRACEEXT 1508 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "CN%d set to %d by CTA4\n", DBG_TRACEEXT 1532 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "CN%d set to %d by CTA6\n", DBG_TRACEEXT 1546 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 1558 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "CN%d set to %d by CTA9\n", DBG_TRACEEXT 1713 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "parseNumericOperandDescriptor(cpup, ): N%u %0o\n", k, e->N[k-1]); DBG_TRACEEXT 1813 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 1817 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 1856 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "bitstring k %d AR%d\n", k, n); DBG_TRACEEXT 1876 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "bitstring k %d RL reg %u val %"PRIo64"\n", k, reg, (word36)e->N[k-1]); DBG_TRACEEXT 1883 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "bitstring k %d opdesc %012"PRIo64"\n", k, opDesc); DBG_TRACEEXT 1884 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "N%u %u\n", k, e->N[k-1]); DBG_TRACEEXT 2109 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, DBG_TRACEEXT 2116 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, DBG_TRACEEXT 2122 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, DBG_TRACEEXT 2130 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, DBG_TRACEEXT 2151 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, "axbd augend 0%o addend 0%o sum 0%o\n", augend, addend, sum); DBG_TRACEEXT 2265 src/dps8/dps8_eis.c DBG_TRACEEXT 2297 src/dps8/dps8_eis.c DBG_TRACEEXT 2348 src/dps8/dps8_eis.c DBG_TRACEEXT 2388 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, DBG_TRACEEXT 2395 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, DBG_TRACEEXT 2404 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, DBG_TRACEEXT 2411 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, DBG_TRACEEXT 2471 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, DBG_TRACEEXT 2478 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, DBG_TRACEEXT 2487 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, DBG_TRACEEXT 2493 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, DBG_TRACEEXT 2516 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, "s9bd r 0%o\n", r); DBG_TRACEEXT 2518 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, "s9bd ARn 0%o address 0%o reg 0%o r 0%o\n", ARn, address, reg, r); DBG_TRACEEXT 2804 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, "asxbd sz %d r 0%"PRIo64"\n", sz, rcnt); DBG_TRACEEXT 2820 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, "asxbd sz %d ARn 0%o address 0%o reg 0%o r 0%o\n", sz, ARn, address, reg, r); DBG_TRACEEXT 2897 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, "asxbd augend 0%o addend 0%o sum 0%o\n", augend, addend, sum); DBG_TRACEEXT 3076 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "cmpc tally %d c1 %03o c2 %03o\n", cpu.du.CHTALLY, c1, c2); DBG_TRACEEXT 3953 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 3956 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 4020 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 4047 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 4148 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 4151 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 4215 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 4243 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 4472 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 4476 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 4513 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MLR special case #3\n"); DBG_TRACEEXT 4553 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MLR special case #4\n"); DBG_TRACEEXT 4593 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MLR special case #1\n"); DBG_TRACEEXT 4623 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MLR special case #2\n"); DBG_TRACEEXT 4888 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MRL special case #1\n"); DBG_TRACEEXT 4919 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MRL special case #2\n"); DBG_TRACEEXT 5082 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "src: %d: %o\n", n, c); DBG_TRACEEXT 5206 src/dps8/dps8_eis.c if_sim_debug (DBG_TRACEEXT, & cpu_dev) DBG_TRACEEXT 5208 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "inBuffer:"); DBG_TRACEEXT 5210 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, " %02o", * q); DBG_TRACEEXT 5211 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "\n"); DBG_TRACEEXT 5883 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "LTE IT[%d]<=%d\n", e -> mopIF - 1, next); DBG_TRACEEXT 5934 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLC IF %d, srcTally %d, dstTally %d\n", e->mopIF, e->srcTally, e->dstTally); DBG_TRACEEXT 5937 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLC n %d, srcTally %d, dstTally %d\n", n, e->srcTally, e->dstTally); DBG_TRACEEXT 5949 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLC c %d (0%o)\n", c, c); DBG_TRACEEXT 5952 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLC ES off\n"); DBG_TRACEEXT 5954 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLC is zero\n"); DBG_TRACEEXT 5961 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLC is not zero\n"); DBG_TRACEEXT 5975 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLC ES on\n"); DBG_TRACEEXT 6045 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLS n %d c %o\n", n, c); DBG_TRACEEXT 6051 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 6064 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 6088 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 6105 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "ES is ON, the character is moved to the receiving field.\n"); DBG_TRACEEXT 6147 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MORS mopIF %d src %d dst %d\n", e->mopIF, e->srcTally, e->dstTally); DBG_TRACEEXT 6189 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MVC mopIF %d\n", e->mopIF); DBG_TRACEEXT 6193 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MVC n %d srcTally %d dstTally %d\n", n, e->srcTally, e->dstTally); DBG_TRACEEXT 6201 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MVC write to output buffer %o\n", *e->in); DBG_TRACEEXT 6210 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MVC done\n"); DBG_TRACEEXT 6541 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MOP %s(%o) %o\n", m -> mopName, mop, e->mopIF); DBG_TRACEEXT 6545 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "getMop(e->m == NULL || e->m->f == NULL): mop:%d IF:%d\n", mop, e->mopIF); DBG_TRACEEXT 6593 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 6599 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "mopExecutor EISgetMop forced break\n"); DBG_TRACEEXT 6624 src/dps8/dps8_eis.c DBG_TRACEEXT 6630 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 6650 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "mop faults %o src %d dst %d mop %d\n", DBG_TRACEEXT 6668 src/dps8/dps8_eis.c DBG_TRACEEXT 6686 src/dps8/dps8_eis.c DBG_TRACEEXT 6707 src/dps8/dps8_eis.c sim_debug(DBG_TRACEEXT, & cpu_dev, "mve\n"); DBG_TRACEEXT 7004 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 7008 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 7233 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 8085 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 8354 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 8358 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 8570 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 8739 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 8743 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 8943 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "cmpb N1 %d N2 %d\n", e -> N1, e -> N2); DBG_TRACEEXT 8970 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "cmpb(min(e->N1, e->N2)) i %d b1 %d b2 %d\n", i, b1, b2); DBG_TRACEEXT 8990 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "cmpb(e->N1 < e->N2) i %d b1fill %d b2 %d\n", i, b1, b2); DBG_TRACEEXT 9010 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "cmpb(e->N1 > e->N2) i %d b1 %d b2fill %d\n", i, b1, b2); DBG_TRACEEXT 9782 src/dps8/dps8_eis.c DBG_TRACEEXT 9807 src/dps8/dps8_eis.c DBG_TRACEEXT 9818 src/dps8/dps8_eis.c DBG_TRACEEXT 9840 src/dps8/dps8_eis.c DBG_TRACEEXT 9861 src/dps8/dps8_eis.c DBG_TRACEEXT 9882 src/dps8/dps8_eis.c DBG_TRACEEXT 9902 src/dps8/dps8_eis.c DBG_TRACEEXT 9909 src/dps8/dps8_eis.c DBG_TRACEEXT 12491 src/dps8/dps8_eis.c DBG_TRACEEXT 12493 src/dps8/dps8_eis.c DBG_TRACEEXT 12521 src/dps8/dps8_eis.c DBG_TRACEEXT 12536 src/dps8/dps8_eis.c DBG_TRACEEXT 12540 src/dps8/dps8_eis.c DBG_TRACEEXT 12551 src/dps8/dps8_eis.c DBG_TRACEEXT 12557 src/dps8/dps8_eis.c DBG_TRACEEXT 12577 src/dps8/dps8_eis.c DBG_TRACEEXT 12667 src/dps8/dps8_eis.c DBG_TRACEEXT 12684 src/dps8/dps8_eis.c DBG_TRACEEXT 12706 src/dps8/dps8_eis.c DBG_TRACEEXT 12718 src/dps8/dps8_eis.c DBG_TRACEEXT 12732 src/dps8/dps8_eis.c DBG_TRACEEXT 12736 src/dps8/dps8_eis.c DBG_TRACEEXT 12743 src/dps8/dps8_eis.c DBG_TRACEEXT 12752 src/dps8/dps8_eis.c DBG_TRACEEXT 12798 src/dps8/dps8_eis.c DBG_TRACEEXT 12835 src/dps8/dps8_eis.c DBG_TRACEEXT 12853 src/dps8/dps8_eis.c DBG_TRACEEXT 12861 src/dps8/dps8_eis.c DBG_TRACEEXT 13043 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv2d: clz1 %d clz2 %d\n",clz1,clz2); DBG_TRACEEXT 13049 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv2d S1 %d S2 %d N1 %d N2 %d clz1 %d clz2 %d E1 %d E2 %d SF2 %d NQ %d\n", DBG_TRACEEXT 13072 src/dps8/dps8_eis.c ) { sim_debug (DBG_TRACEEXT, & cpu_dev, "oops! dv2d anomalous results"); } // divide by zero has already been checked before DBG_TRACEEXT 13126 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv2d: exp1 %d exp2 %d digits op1 %d op2 %d op1a %d op2a %d\n", DBG_TRACEEXT 13138 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv2d: addzero n2 %d %s exp %d\n",n2,res,op3->exponent); DBG_TRACEEXT 13485 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv3d: clz1 %d clz2 %d\n",clz1,clz2); DBG_TRACEEXT 13492 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv3d S1 %d S2 %d N1 %d N2 %d clz1 %d clz2 %d E1 %d E2 %d SF3 %d NQ %d\n", DBG_TRACEEXT 13515 src/dps8/dps8_eis.c ) { sim_debug (DBG_TRACEEXT, & cpu_dev, "oops! dv3d anomalous results"); } // divide by zero has already been checked before DBG_TRACEEXT 13569 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 13583 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv3d: addzero n3 %d %s exp %d\n",n3,res,op3->exponent); DBG_TRACEEXT 545 src/dps8/dps8_faults.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MIF %o\n", TST_I_MIF); DBG_TRACEEXT 805 src/dps8/dps8_faults.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MIF %o\n", TST_I_MIF); DBG_TRACEEXT 640 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "%s sets XSF to %o\n", __func__, cpu.cu.XSF); DBG_TRACEEXT 1835 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 1839 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 1866 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "rpt/rd/rl repeat first; offset is %06o\n", offset); DBG_TRACEEXT 1870 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "rpt/rd/rl repeat first; X%d was %06o\n", Xn, cpu.rX[Xn]); DBG_TRACEEXT 1877 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "rpt/rd/rl repeat first; X%d now %06o\n", Xn, cpu.rX[Xn]); DBG_TRACEEXT 2115 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 2127 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "RPT/RPD delta; X%d now %06o\n", Xn, cpu.rX[Xn]); DBG_TRACEEXT 2143 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "RPT/RPD delta; X%d now %06o\n", Xn, cpu.rX[Xn]); DBG_TRACEEXT 2155 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "RPT/RPD delta; X%d now %06o\n", Xn, cpu.rX[Xn]); DBG_TRACEEXT 2207 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "tally %d\n", x); DBG_TRACEEXT 2209 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "tally runout\n"); DBG_TRACEEXT 2213 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "not tally runout\n"); DBG_TRACEEXT 2221 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "is zero terminate\n"); DBG_TRACEEXT 2226 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "is not zero terminate\n"); DBG_TRACEEXT 2231 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "is neg terminate\n"); DBG_TRACEEXT 2236 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "is not neg terminate\n"); DBG_TRACEEXT 2241 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "is carry terminate\n"); DBG_TRACEEXT 2246 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "is not carry terminate\n"); DBG_TRACEEXT 2251 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "is overflow terminate\n"); DBG_TRACEEXT 2264 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "not terminate\n"); DBG_TRACEEXT 5976 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 6458 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 7113 src/dps8/dps8_ins.c if_sim_debug (DBG_TRACEEXT, & cpu_dev) DBG_TRACEEXT 7132 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 7140 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 7564 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "ldt TR %d (%o)\n", DBG_TRACEEXT 7614 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "RALR set to %o\n", cpu.rRALR); DBG_TRACEEXT 8740 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "entered DIS_cycle\n"); DBG_TRACEEXT 8767 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "DIS sees an interrupt\n"); DBG_TRACEEXT 8784 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "DIS sees a TRO\n"); DBG_TRACEEXT 8790 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "DIS refetches\n"); DBG_TRACEEXT 1218 src/dps8/dps8_math.c sim_debug (DBG_TRACEEXT, & cpu_dev, "fmp A %012"PRIo64" Q %012"PRIo64" E %03o\n", cpu.rA, cpu.rQ, cpu.rE); DBG_TRACEEXT 2310 src/dps8/dps8_math.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dufm e1 %d %03o m1 %012"PRIo64" %012"PRIo64"\n", DBG_TRACEEXT 2326 src/dps8/dps8_math.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dufm e2 %d %03o m2 %012"PRIo64" %012"PRIo64"\n", DBG_TRACEEXT 175 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 248 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "Add36b res %012"PRIo64" flags %06o ovf %o\n", res, * flags, * ovf); DBG_TRACEEXT 614 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 622 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 668 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 676 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, DBG_TRACEEXT 692 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "Sub72b res %012"PRIo64"%012"PRIo64" flags %06o ovf %o\n", DBG_TRACEEXT 695 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "Sub72b res %012"PRIo64"%012"PRIo64" flags %06o ovf %o\n", DBG_TRACEEXT 774 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "Sub72b res %012"PRIo64"%012"PRIo64" flags %06o ovf %o\n", DBG_TRACEEXT 777 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "Sub72b res %012"PRIo64"%012"PRIo64" flags %06o ovf %o\n", DBG_TRACEEXT 1114 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op1 %016"PRIx64"%016"PRIx64"\n", op1.h, op1.l); DBG_TRACEEXT 1115 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op2 %016"PRIx64"%016"PRIx64"\n", op2.h, op2.l); DBG_TRACEEXT 1118 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op1s %016"PRIx64"%016"PRIx64"\n", op1s.h, op1s.l); DBG_TRACEEXT 1119 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op2s %016"PRIx64"%016"PRIx64"\n", op2s.h, op2s.l); DBG_TRACEEXT 1121 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op1 %016"PRIx64"%016"PRIx64"\n", (uint64_t) (op1>>64), (uint64_t) op1); DBG_TRACEEXT 1122 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op2 %016"PRIx64"%016"PRIx64"\n", (uint64_t) (op2>>64), (uint64_t) op2); DBG_TRACEEXT 1125 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op1s %016"PRIx64"%016"PRIx64"\n", (uint64_t) (op1s>>64), (uint64_t) op1s); DBG_TRACEEXT 1126 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op2s %016"PRIx64"%016"PRIx64"\n", (uint64_t) (op2s>>64), (uint64_t) op2s);