rA 67 src/dps8/dps8_addrmods.c return GETHI (cpu.rA); rA 93 src/dps8/dps8_addrmods.c return GETLO (cpu.rA); rA 943 src/dps8/dps8_cpu.c cpu.rA = 0; rA 1550 src/dps8/dps8_cpu.h word36 rA; // accumulator rA 344 src/dps8/dps8_eis.c return GETHI (cpu.rA); rA 359 src/dps8/dps8_eis.c return cpu.rA; // See AL36, Table 4-1 rA 407 src/dps8/dps8_eis.c return GETHI (cpu.rA); rA 456 src/dps8/dps8_eis.c return GETLO (cpu.rA); rA 499 src/dps8/dps8_eis.c return GETHI (cpu.rA); rA 531 src/dps8/dps8_eis.c return cpu.rA; rA 2220 src/dps8/dps8_ins.c sim_debug (DBG_REGDUMPAQI, &cpu_dev, "A=%012"PRIo64" Q=%012"PRIo64" IR:%s\n", cpu.rA, cpu.rQ, dump_flags (buf, cpu.cu.IR)); rA 2222 src/dps8/dps8_ins.c sim_debug (DBG_REGDUMPFLT, &cpu_dev, "E=%03o A=%012"PRIo64" Q=%012"PRIo64" %.10Lg\n", cpu.rE, cpu.rA, cpu.rQ, EAQToIEEElongdouble ()); rA 2224 src/dps8/dps8_ins.c sim_debug (DBG_REGDUMPFLT, &cpu_dev, "E=%03o A=%012"PRIo64" Q=%012"PRIo64" %.10g\n", cpu.rE, cpu.rA, cpu.rQ, EAQToIEEEdouble ()); rA 2684 src/dps8/dps8_ins.c cpu.rA = cpu.CY; rA 2688 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); rA 2689 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); rA 2752 src/dps8/dps8_ins.c word72 trAQ = convert_to_word72 (cpu.rA, cpu.rQ); rA 2770 src/dps8/dps8_ins.c convert_to_word36 (trAQ, &cpu.rA, &cpu.rQ); rA 2779 src/dps8/dps8_ins.c cpu.CY = cpu.rA; rA 2954 src/dps8/dps8_ins.c cmp36 (cpu.rA, cpu.CY, &cpu.cu.IR); rA 2978 src/dps8/dps8_ins.c word36 trZ = cpu.rA & cpu.CY; rA 2987 src/dps8/dps8_ins.c cpu.rA = cpu.Ypair[0]; rA 2995 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0 && cpu.rQ == 0) rA 2996 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); rA 3032 src/dps8/dps8_ins.c cpu.Ypair[0] = cpu.rA; rA 3075 src/dps8/dps8_ins.c word36 tmpSign = cpu.rA & SIGN36; rA 3080 src/dps8/dps8_ins.c cpu.rA <<= 1; rA 3081 src/dps8/dps8_ins.c if (tmpSign != (cpu.rA & SIGN36)) rA 3084 src/dps8/dps8_ins.c cpu.rA &= DMASK; // keep to 36-bits rA 3089 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); rA 3090 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); rA 3205 src/dps8/dps8_ins.c word72 trAQ = convert_to_word72 (cpu.rA, cpu.rQ); rA 3220 src/dps8/dps8_ins.c convert_to_word36 (trAQ, &cpu.rA, &cpu.rQ); rA 3233 src/dps8/dps8_ins.c cpu.rA = cpu.rA | cpu.CY; rA 3234 src/dps8/dps8_ins.c cpu.rA &= DMASK; rA 3239 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); rA 3240 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); rA 3309 src/dps8/dps8_ins.c cpu.rA = cpu.rA & cpu.CY; rA 3310 src/dps8/dps8_ins.c cpu.rA &= DMASK; rA 3314 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); rA 3315 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); rA 3328 src/dps8/dps8_ins.c cpu.rA = (cpu.CY & FLOAT36MASK) << 8; rA 3337 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0 && cpu.rQ == 0); rA 3338 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); rA 3351 src/dps8/dps8_ins.c cpu.rA = cpu.TPR.TRR & MASK3; rA 3352 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.TPR.TSR & MASK15) << 18; rA 3363 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0 && cpu.rQ == 0); rA 3426 src/dps8/dps8_ins.c cpu.rA = 0; rA 3427 src/dps8/dps8_ins.c SETHI (cpu.rA, cpu.TPR.CA); rA 3461 src/dps8/dps8_ins.c cpu.rA = compl36 (cpu.CY, & cpu.cu.IR, & ovf); rA 3510 src/dps8/dps8_ins.c cpu.rA = cpu.Ypair[0]; rA 3524 src/dps8/dps8_ins.c cpu.rA = 0; rA 3544 src/dps8/dps8_ins.c convert_to_word36 (tmp72, & cpu.rA, & cpu.rQ); rA 3550 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0 && cpu.rQ == 0); rA 3551 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); rA 3560 src/dps8/dps8_ins.c cpu.rA = cpu.CY; rA 3564 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); rA 3565 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); rA 3648 src/dps8/dps8_ins.c cpu.rA = cpu.Yblock8[4]; rA 3691 src/dps8/dps8_ins.c cpu.Yblock8[4] = cpu.rA; rA 3722 src/dps8/dps8_ins.c cpu.CY = cpu.rA; rA 3737 src/dps8/dps8_ins.c cpu.CY = cpu.rA; rA 3754 src/dps8/dps8_ins.c cpu.CY = cpu.rA; rA 3812 src/dps8/dps8_ins.c cpu.CY = cpu.rA; rA 3939 src/dps8/dps8_ins.c bool a0 = cpu.rA & SIGN36; // A0 rA 3940 src/dps8/dps8_ins.c cpu.rA <<= 1; // shift left 1 rA 3942 src/dps8/dps8_ins.c cpu.rA |= 1; rA 3944 src/dps8/dps8_ins.c cpu.rA &= DMASK; // keep to 36-bits rA 3949 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); rA 3950 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); rA 3964 src/dps8/dps8_ins.c cpu.rA &= DMASK; // Make sure the shifted in bits are 0 rA 3967 src/dps8/dps8_ins.c cpu.rA >>= tmp36; rA 3968 src/dps8/dps8_ins.c cpu.rA &= DMASK; // keep to 36-bits rA 3973 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); rA 3974 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); rA 3986 src/dps8/dps8_ins.c cpu.rA &= DMASK; // Make sure the shifted in bits are 0 rA 3989 src/dps8/dps8_ins.c bool a0 = cpu.rA & SIGN36; // A0 rA 3992 src/dps8/dps8_ins.c cpu.rA >>= 1; // shift right 1 rA 3994 src/dps8/dps8_ins.c cpu.rA |= SIGN36; rA 3996 src/dps8/dps8_ins.c cpu.rA &= DMASK; // keep to 36-bits rA 4001 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); rA 4002 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); rA 4018 src/dps8/dps8_ins.c bool a0 = cpu.rA & SIGN36; // A0 rA 4020 src/dps8/dps8_ins.c cpu.rA <<= 1; // shift left 1 rA 4024 src/dps8/dps8_ins.c cpu.rA |= 1; // Q0 => A35 rA 4032 src/dps8/dps8_ins.c cpu.rA &= DMASK; // keep to 36-bits rA 4039 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0 && cpu.rQ == 0); rA 4040 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); rA 4056 src/dps8/dps8_ins.c word36 tmpSign = cpu.rA & SIGN36; rA 4059 src/dps8/dps8_ins.c cpu.rA <<= 1; // shift left 1 rA 4061 src/dps8/dps8_ins.c if (tmpSign != (cpu.rA & SIGN36)) rA 4066 src/dps8/dps8_ins.c cpu.rA |= 1; // Q0 => A35 rA 4071 src/dps8/dps8_ins.c cpu.rA &= DMASK; // keep to 36-bits rA 4078 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0 && cpu.rQ == 0); rA 4079 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); rA 4091 src/dps8/dps8_ins.c cpu.rA &= DMASK; // Make sure the shifted in bits are 0 rA 4096 src/dps8/dps8_ins.c bool a35 = cpu.rA & 1; // A35 rA 4097 src/dps8/dps8_ins.c cpu.rA >>= 1; // shift right 1 rA 4104 src/dps8/dps8_ins.c cpu.rA &= DMASK; // keep to 36-bits rA 4111 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0 && cpu.rQ == 0); rA 4112 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); rA 4126 src/dps8/dps8_ins.c cpu.rA &= DMASK; // Make sure the shifted in bits are 0 rA 4128 src/dps8/dps8_ins.c bool a0 = cpu.rA & SIGN36; // A0 rA 4132 src/dps8/dps8_ins.c bool a35 = cpu.rA & 1; // A35 rA 4134 src/dps8/dps8_ins.c cpu.rA >>= 1; // shift right 1 rA 4136 src/dps8/dps8_ins.c cpu.rA |= SIGN36; rA 4142 src/dps8/dps8_ins.c cpu.rA &= DMASK; // keep to 36-bits (probably ain't necessary) rA 4149 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0 && cpu.rQ == 0); rA 4150 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); rA 4249 src/dps8/dps8_ins.c cpu.rA = Add36b (cpu.rA, cpu.CY, 0, I_ZNOC, & cpu.cu.IR, & ovf); rA 4267 src/dps8/dps8_ins.c tmp72 = Add72b (convert_to_word72 (cpu.rA, cpu.rQ), rA 4269 src/dps8/dps8_ins.c convert_to_word36 (tmp72, & cpu.rA, & cpu.rQ); rA 4288 src/dps8/dps8_ins.c tmp72 = Add72b (convert_to_word72 (cpu.rA, cpu.rQ), rA 4290 src/dps8/dps8_ins.c convert_to_word36 (tmp72, & cpu.rA, & cpu.rQ); rA 4313 src/dps8/dps8_ins.c tmp72 = Add72b (convert_to_word72 (cpu.rA, cpu.rQ), rA 4315 src/dps8/dps8_ins.c convert_to_word36 (tmp72, & cpu.rA, & cpu.rQ); rA 4335 src/dps8/dps8_ins.c cpu.rA = Add36b (cpu.rA, cpu.CY, 0, I_ZNC, & cpu.cu.IR, & ovf); rA 4426 src/dps8/dps8_ins.c cpu.CY = Add36b (cpu.rA, cpu.CY, 0, I_ZNOC, rA 4480 src/dps8/dps8_ins.c cpu.rA = Add36b (cpu.rA, cpu.CY, TST_I_CARRY ? 1 : 0, rA 4519 src/dps8/dps8_ins.c cpu.rA = Sub36b (cpu.rA, cpu.CY, 1, I_ZNOC, & cpu.cu.IR, & ovf); rA 4537 src/dps8/dps8_ins.c tmp72 = Sub72b (convert_to_word72 (cpu.rA, cpu.rQ), tmp72, 1, rA 4540 src/dps8/dps8_ins.c convert_to_word36 (tmp72, & cpu.rA, & cpu.rQ); rA 4558 src/dps8/dps8_ins.c cpu.rA = Sub36b (cpu.rA, cpu.CY, 1, I_ZNC, & cpu.cu.IR, & ovf); rA 4581 src/dps8/dps8_ins.c tmp72 = Sub72b (convert_to_word72 (cpu.rA, cpu.rQ), tmp72, 1, rA 4583 src/dps8/dps8_ins.c convert_to_word36 (tmp72, & cpu.rA, & cpu.rQ); rA 4686 src/dps8/dps8_ins.c cpu.CY = Sub36b (cpu.rA, cpu.CY, 1, I_ZNOC, & cpu.cu.IR, & ovf); rA 4741 src/dps8/dps8_ins.c cpu.rA = Sub36b (cpu.rA, cpu.CY, TST_I_CARRY ? 1 : 0, rA 4788 src/dps8/dps8_ins.c word72 tmp72 = multiply_128 (SIGNEXT36_72 (cpu.rA), SIGNEXT36_72 (cpu.CY)); rA 4794 src/dps8/dps8_ins.c word72 tmp72 = (word72) (((word72s) SIGNEXT36_72 (cpu.rA)) * ((word72s) SIGNEXT36_72 (cpu.CY))); rA 4801 src/dps8/dps8_ins.c if (cpu.rA == MAXNEG && cpu.CY == MAXNEG) rA 4808 src/dps8/dps8_ins.c convert_to_word36 (tmp72, &cpu.rA, &cpu.rQ); rA 4813 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0 && cpu.rQ == 0); rA 4814 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); rA 4830 src/dps8/dps8_ins.c convert_to_word36 (cast_128 (prod), &cpu.rA, &cpu.rQ); rA 4837 src/dps8/dps8_ins.c convert_to_word36 ((word72)prod, &cpu.rA, &cpu.rQ); rA 4844 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0 && cpu.rQ == 0); rA 4845 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); rA 4881 src/dps8/dps8_ins.c cpu.rA = (cpu.rQ & SIGN36) ? 0 : SIGN36; // works for case 1,2 rA 4972 src/dps8/dps8_ins.c cpu.rA = (word36) remainder & DMASK; rA 4979 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, "rA (rem) %012"PRIo64"\n", cpu.rA); rA 5019 src/dps8/dps8_ins.c cpu.rA &= DMASK; rA 5020 src/dps8/dps8_ins.c if (cpu.rA == 0400000000000ULL) rA 5029 src/dps8/dps8_ins.c cpu.rA = (word36) (- (word36s) cpu.rA); rA 5031 src/dps8/dps8_ins.c cpu.rA &= DMASK; // keep to 36-bits rA 5036 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); rA 5037 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); rA 5048 src/dps8/dps8_ins.c cpu.rA &= DMASK; rA 5051 src/dps8/dps8_ins.c if (cpu.rA == 0400000000000ULL && cpu.rQ == 0) rA 5058 src/dps8/dps8_ins.c word72 tmp72 = convert_to_word72 (cpu.rA, cpu.rQ); rA 5073 src/dps8/dps8_ins.c convert_to_word36 (tmp72, &cpu.rA, &cpu.rQ); rA 5096 src/dps8/dps8_ins.c t_int64 a = SIGNEXT36_64 (cpu.rA); rA 5133 src/dps8/dps8_ins.c word36 Z = ~cpu.rQ & (cpu.rA ^ cpu.CY); rA 5166 src/dps8/dps8_ins.c word72 trAQ = convert_to_word72 (cpu.rA, cpu.rQ); rA 5211 src/dps8/dps8_ins.c cmp36wl (cpu.rA, cpu.CY, cpu.rQ, &cpu.cu.IR); rA 5263 src/dps8/dps8_ins.c cpu.CY = cpu.rA & cpu.CY; rA 5352 src/dps8/dps8_ins.c word72 trAQ = convert_to_word72 (cpu.rA, cpu.rQ); rA 5366 src/dps8/dps8_ins.c convert_to_word36 (trAQ, &cpu.rA, &cpu.rQ); rA 5395 src/dps8/dps8_ins.c cpu.CY = cpu.rA | cpu.CY; rA 5472 src/dps8/dps8_ins.c cpu.rA = cpu.rA ^ cpu.CY; rA 5473 src/dps8/dps8_ins.c cpu.rA &= DMASK; rA 5478 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); rA 5479 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); rA 5505 src/dps8/dps8_ins.c cpu.CY = cpu.rA ^ cpu.CY; rA 5592 src/dps8/dps8_ins.c word72 trAQ = convert_to_word72 (cpu.rA, cpu.rQ); rA 5659 src/dps8/dps8_ins.c word36 trZ = cpu.rA & ~cpu.CY; rA 5676 src/dps8/dps8_ins.c word72 trAQ = convert_to_word72 (cpu.rA, cpu.rQ); rA 5743 src/dps8/dps8_ins.c cpu.rA = (cpu.Ypair[0] & FLOAT36MASK) << 8; rA 5744 src/dps8/dps8_ins.c cpu.rA |= (cpu.Ypair[1] >> 28) & MASK8; rA 5753 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0 && cpu.rQ == 0); rA 5754 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); rA 5772 src/dps8/dps8_ins.c ((cpu.rA & 0777777777400LLU) >> 8); rA 5773 src/dps8/dps8_ins.c cpu.Ypair[1] = ((cpu.rA & 0377) << 28) | rA 5791 src/dps8/dps8_ins.c cpu.rA &= DMASK; rA 5792 src/dps8/dps8_ins.c cpu.CY = ((word36)cpu.rE << 28) | (((cpu.rA >> 8) & 01777777777LL)); rA 6001 src/dps8/dps8_ins.c fno (& cpu.rE, & cpu.rA, & cpu.rQ); rA 6770 src/dps8/dps8_ins.c 040, & cpu.rA, & cpu.rQ); rA 6789 src/dps8/dps8_ins.c word72 big = convert_to_word72 (cpu.rA, cpu.rQ); rA 7012 src/dps8/dps8_ins.c word36 tmp1 = cpu.rA & SIGN36; // A0 rA 7013 src/dps8/dps8_ins.c word36 tmp36 = (cpu.rA << 3) & DMASK; rA 7038 src/dps8/dps8_ins.c cpu.rA = tmp36r & DMASK; // remainder -> C(A) rA 7043 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); // If C(A) = 0, then ON; rA 7054 src/dps8/dps8_ins.c word36 tmp = cpu.rA & MASK36; rA 7062 src/dps8/dps8_ins.c cpu.rA = tmp; rA 7067 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); // If C(A) = 0, then ON; rA 7069 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); // If C(A)0 = 1, then ON; rA 7729 src/dps8/dps8_ins.c & cpu.rA, & cpu.rQ); rA 7736 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); rA 7737 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); rA 7806 src/dps8/dps8_ins.c & cpu.rA, & cpu.rQ); rA 7826 src/dps8/dps8_ins.c cpu.rA = PROM[cpu.TPR.CA & 1023]; rA 7834 src/dps8/dps8_ins.c cpu.rA = cpu.switches.data_switches; rA 7864 src/dps8/dps8_ins.c cpu.rA = 0; rA 7865 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [0] & 07LL) rA 7867 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [0] & 01LL) rA 7869 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [0] & 01LL) rA 7871 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [0] ? 1LL:0LL) rA 7873 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [0] & 07LL) rA 7876 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [1] & 07LL) rA 7878 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [1] & 01LL) rA 7880 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [1] & 01LL) rA 7882 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [1] ? 1LL:0LL) rA 7884 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [1] & 07LL) rA 7887 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [2] & 07LL) rA 7889 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [2] & 01LL) rA 7891 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [2] & 01LL) rA 7893 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [2] ? 1LL:0LL) rA 7895 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [2] & 07LL) rA 7898 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [3] & 07LL) rA 7900 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [3] & 01LL) rA 7902 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [3] & 01LL) rA 7904 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [3] ? 1LL:0LL) rA 7906 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [3] & 07LL) rA 7977 src/dps8/dps8_ins.c cpu.rA = 0; rA 7979 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[0] == 2 ? rA 7981 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[1] == 2 ? rA 7983 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[2] == 2 ? rA 7985 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[3] == 2 ? rA 7995 src/dps8/dps8_ins.c cpu.rA |= (word36) ((01L) /* 0b01 DPS8M */ rA 7997 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.FLT_BASE & 0177LL) rA 7999 src/dps8/dps8_ins.c DPS8M_ (cpu.rA |= (word36) ((01L) /* 0b1 ID_PROM installed */ rA 8016 src/dps8/dps8_ins.c cpu.rA |= (word36) ((01L) // 0b1 L68/DPS option: DPS rA 8022 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.enable_cache ? 1 : 0) rA 8027 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.procMode) /* 0b1 DPS8M */ rA 8029 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.procMode & 1U) rA 8037 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.options.proc_speed & 017LL) rA 8048 src/dps8/dps8_ins.c cpu.rA |= (word36) ((016L) // 0b1110 CPU ID rA 8051 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.cpu_num & 07LL) rA 8057 src/dps8/dps8_ins.c cpu.rA = 0; rA 8087 src/dps8/dps8_ins.c cpu.rA = 0; rA 8088 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [4] & 07LL) rA 8090 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [4] & 01LL) rA 8092 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [4] & 01LL) rA 8094 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [4] ? 1LL:0LL) rA 8096 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [4] & 07LL) rA 8099 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [5] & 07LL) rA 8101 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [5] & 01LL) rA 8103 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [5] & 01LL) rA 8105 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [5] ? 1LL:0LL) rA 8107 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [5] & 07LL) rA 8110 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [6] & 07LL) rA 8112 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [6] & 01LL) rA 8114 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [6] & 01LL) rA 8116 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [6] ? 1LL:0LL) rA 8118 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [6] & 07LL) rA 8121 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [7] & 07LL) rA 8123 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [7] & 01LL) rA 8125 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [7] & 01LL) rA 8127 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [7] ? 1LL:0LL) rA 8129 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [7] & 07LL) rA 8149 src/dps8/dps8_ins.c cpu.rA = 0; rA 8150 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [0] == 2 ? rA 8152 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [1] == 2 ? rA 8154 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [2] == 2 ? rA 8156 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [3] == 2 ? rA 8159 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [4] == 2 ? rA 8161 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [5] == 2 ? rA 8163 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [6] == 2 ? rA 8165 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [7] == 2 ? rA 8179 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); rA 8180 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); rA 8240 src/dps8/dps8_ins.c current_running_cpu_idx, cpu.rA, cpu.rQ); rA 8277 src/dps8/dps8_ins.c cpu_port_num, cpu.rA); rA 8306 src/dps8/dps8_ins.c cpu.rA, cpu.rQ); rA 8321 src/dps8/dps8_ins.c cpu.rA = result; rA 8325 src/dps8/dps8_ins.c SC_I_ZERO (cpu.rA == 0); rA 8326 src/dps8/dps8_ins.c SC_I_NEG (cpu.rA & SIGN36); rA 9209 src/dps8/dps8_ins.c rA 9212 src/dps8/dps8_ins.c rA 9219 src/dps8/dps8_ins.c rA 9228 src/dps8/dps8_ins.c rA 9240 src/dps8/dps8_ins.c rA 9246 src/dps8/dps8_ins.c rA 9251 src/dps8/dps8_ins.c rA 9283 src/dps8/dps8_ins.c rA 9318 src/dps8/dps8_ins.c rA 9320 src/dps8/dps8_ins.c rA 9377 src/dps8/dps8_ins.c rA 76 src/dps8/dps8_math.c word72 Mant = convert_to_word72 (cpu.rA, cpu.rQ); rA 128 src/dps8/dps8_math.c word72 Mant = convert_to_word72 (cpu.rA, cpu.rQ); rA 291 src/dps8/dps8_math.c cpu . rA = 0; rA 333 src/dps8/dps8_math.c cpu . rA = (result >> 36) & MASK36; rA 480 src/dps8/dps8_math.c word72 m1 = convert_to_word72 (cpu.rA, cpu.rQ); rA 673 src/dps8/dps8_math.c convert_to_word36 (m3, & cpu.rA, & cpu.rQ); rA 679 src/dps8/dps8_math.c SC_I_NEG (cpu.rA & SIGN36); // Do this here instead of in Add72b because rA 681 src/dps8/dps8_math.c if (cpu.rA == 0 && cpu.rQ == 0) { rA 689 src/dps8/dps8_math.c fno_ext (& e3, & cpu.rE, & cpu.rA, & cpu.rQ); rA 1078 src/dps8/dps8_math.c word72 m = convert_to_word72 (cpu.rA, cpu.rQ); rA 1110 src/dps8/dps8_math.c convert_to_word36 (m, & cpu.rA, & cpu.rQ); rA 1111 src/dps8/dps8_math.c fno (& cpu.rE, & cpu.rA, & cpu.rQ); // normalize rA 1131 src/dps8/dps8_math.c word72 m1 = convert_to_word72 (cpu.rA, cpu.rQ); rA 1145 src/dps8/dps8_math.c cpu.rA = 0; rA 1209 src/dps8/dps8_math.c convert_to_word36 (m3a, & cpu.rA, & cpu.rQ); rA 1214 src/dps8/dps8_math.c sim_debug (DBG_TRACEEXT, & cpu_dev, "fmp A %012"PRIo64" Q %012"PRIo64" E %03o\n", cpu.rA, cpu.rQ, cpu.rE); rA 1215 src/dps8/dps8_math.c SC_I_NEG (cpu.rA & SIGN36); rA 1217 src/dps8/dps8_math.c if (cpu.rA == 0 && cpu.rQ == 0) { rA 1225 src/dps8/dps8_math.c fno_ext (& e3, & cpu.rE, & cpu.rA, & cpu.rQ); rA 1272 src/dps8/dps8_math.c m1 = convert_to_word72 (cpu.rA, cpu.rQ); rA 1284 src/dps8/dps8_math.c m2 = convert_to_word72 (cpu.rA, cpu.rQ); rA 1319 src/dps8/dps8_math.c cpu.rA = 0; rA 1391 src/dps8/dps8_math.c convert_to_word36 (m1, & cpu.rA, & cpu.rQ); rA 1457 src/dps8/dps8_math.c cpu.rA = rshift_128 (m3, 36u).l & MASK36; rA 1459 src/dps8/dps8_math.c cpu.rA = (m3 >> 36) & MASK36; rA 1466 src/dps8/dps8_math.c SC_I_ZERO (cpu . rA == 0); rA 1467 src/dps8/dps8_math.c SC_I_NEG (cpu . rA & SIGN36); rA 1469 src/dps8/dps8_math.c if (cpu.rA == 0) // set to normalized 0 rA 1549 src/dps8/dps8_math.c word72 m = convert_to_word72 (cpu.rA, cpu.rQ); rA 1590 src/dps8/dps8_math.c convert_to_word36 (m, & cpu.rA, & cpu.rQ); rA 1592 src/dps8/dps8_math.c fno (& cpu.rE, & cpu.rA, & cpu.rQ); rA 1608 src/dps8/dps8_math.c word36 A = cpu . rA, Q = cpu . rQ; rA 1687 src/dps8/dps8_math.c word72 m1= lshift_128 (construct_128 (0, cpu.rA & 0777777777400), 36); rA 1689 src/dps8/dps8_math.c word72 m1 = ((word72)cpu.rA & 0777777777400LL) << 36; rA 1826 src/dps8/dps8_math.c word72 m1 = lshift_128 (construct_128 (0, cpu.rA & 0777777777400), 36); rA 1828 src/dps8/dps8_math.c word72 m1 = ((word72)cpu.rA & 0777777777400LL) << 36; rA 1992 src/dps8/dps8_math.c word72 m1 = convert_to_word72 (cpu.rA, cpu.rQ); rA 2189 src/dps8/dps8_math.c convert_to_word36 (m3, & cpu.rA, & cpu.rQ); rA 2195 src/dps8/dps8_math.c SC_I_NEG (cpu.rA & SIGN36); // Do this here instead of in Add72b because rA 2197 src/dps8/dps8_math.c if (cpu.rA == 0 && cpu.rQ == 0) { rA 2205 src/dps8/dps8_math.c fno_ext (& e3, & cpu.rE, & cpu.rA, & cpu.rQ); rA 2304 src/dps8/dps8_math.c word72 m1 = convert_to_word72 (cpu.rA, cpu.rQ); rA 2331 src/dps8/dps8_math.c cpu.rA = 0; rA 2413 src/dps8/dps8_math.c convert_to_word36 (m3a, & cpu.rA, & cpu.rQ); rA 2419 src/dps8/dps8_math.c SC_I_NEG (cpu.rA & SIGN36); rA 2421 src/dps8/dps8_math.c if (cpu.rA == 0 && cpu.rQ == 0) { rA 2429 src/dps8/dps8_math.c fno_ext (& e3, & cpu.rE, & cpu.rA, & cpu.rQ); rA 2477 src/dps8/dps8_math.c m1 = convert_to_word72 (cpu.rA, cpu.rQ); rA 2491 src/dps8/dps8_math.c m2 = convert_to_word72 (cpu.rA, cpu.rQ); rA 2536 src/dps8/dps8_math.c cpu.rA = 0; rA 2607 src/dps8/dps8_math.c convert_to_word36 (m1, & cpu.rA, & cpu.rQ); rA 2661 src/dps8/dps8_math.c convert_to_word36 (m3, & cpu.rA, & cpu.rQ); rA 2667 src/dps8/dps8_math.c SC_I_ZERO (cpu.rA == 0 && cpu . rQ == 0); rA 2668 src/dps8/dps8_math.c SC_I_NEG (cpu.rA & SIGN36); rA 2670 src/dps8/dps8_math.c if (cpu.rA == 0 && cpu.rQ == 0) // set to normalized 0 rA 2792 src/dps8/dps8_math.c bool dividendNegative = (getbits36_1 (cpu.rA, 0) != 0); rA 2800 src/dps8/dps8_math.c uint128 zFrac = (((uint128) (cpu.rA & MASK35)) << 35) | ((cpu.rQ >> 1) & MASK35); rA 2838 src/dps8/dps8_math.c cpu.rA = (zFrac >> 35) & MASK35; rA 2842 src/dps8/dps8_math.c SC_I_NEG (cpu.rA & SIGN36); rA 2883 src/dps8/dps8_math.c SC_I_ZERO (cpu.rA == 0); rA 2884 src/dps8/dps8_math.c SC_I_NEG (cpu.rA & SIGN36); rA 2888 src/dps8/dps8_math.c cpu.rA = quot & MASK36; rA 2904 src/dps8/dps8_math.c rA 2906 src/dps8/dps8_math.c rA 2921 src/dps8/dps8_math.c bool dividendNegative = (getbits36_1 (cpu . rA, 0) != 0); rA 2930 src/dps8/dps8_math.c uint128 zFrac = lshift_128 (construct_128 (0, cpu.rA & MASK35), 35); rA 2934 src/dps8/dps8_math.c uint128 zFrac = ((uint128) (cpu . rA & MASK35) << 35) | ((cpu . rQ >> 1) & MASK35); rA 3020 src/dps8/dps8_math.c SC_I_NEG (cpu.rA & SIGN36); rA 3057 src/dps8/dps8_math.c bool Aneg = (cpu.rA & SIGN36) != 0; // blood type rA 3058 src/dps8/dps8_math.c bool AQzero = cpu.rA == 0 && cpu.rQ == 0; rA 3059 src/dps8/dps8_math.c if (cpu.rA & SIGN36) rA 3061 src/dps8/dps8_math.c cpu.rA = (~cpu.rA) & MASK36; rA 3067 src/dps8/dps8_math.c cpu.rA = (cpu.rA + 1) & MASK36; rA 3071 src/dps8/dps8_math.c rA 3073 src/dps8/dps8_math.c rA 3113 src/dps8/dps8_math.c cpu.rA = quot.l & MASK36; rA 3116 src/dps8/dps8_math.c cpu . rA = quot & MASK36; rA 3126 src/dps8/dps8_math.c SC_I_ZERO (cpu . rA == 0 && cpu . rQ == 0); rA 3127 src/dps8/dps8_math.c SC_I_NEG (cpu . rA & SIGN36); rA 3153 src/dps8/dps8_math.c float72 m = convert_to_word72 (cpu.rA, cpu.rQ); rA 3194 src/dps8/dps8_math.c convert_to_word36 (m, & cpu.rA, & cpu.rQ); rA 3196 src/dps8/dps8_math.c fno (& cpu.rE, & cpu.rA, & cpu.rQ); rA 3227 src/dps8/dps8_math.c word36 A = cpu . rA, Q = cpu . rQ; rA 3317 src/dps8/dps8_math.c word72 m1 = convert_to_word72 (cpu.rA, cpu.rQ & 0777777777400LL); rA 3452 src/dps8/dps8_math.c word72 m1 = convert_to_word72 (cpu.rA & MASK36, cpu.rQ & 0777777777400LL); rA 1826 src/dps8/dps8_scu.c word16 b0_15 = (word16) getbits36_16 (cpu.rA, 20); rA 2100 src/dps8/dps8_scu.c cpu.rA = (clk >> 36) & 0177777; // upper 16-bits of clock rA 3427 src/dps8/dps8_sys.c sim_msg ("rA %012"PRIo64" (%llu)\n", rA, rA); rA 3465 src/dps8/dps8_sys.c sim_msg ("rA %012"PRIo64" (%llu)\n", rA, rA); rA 3481 src/dps8/dps8_sys.c sim_msg ("rA %012"PRIo64" (%llu)\n", rA, rA); rA 4125 src/dps8/dps8_sys.c { "cpus[].rA", SYM_STRUCT_OFFSET, SYM_UINT64_36, offsetof (cpu_state_t, rA) }, rA 90 src/dps8/hdbg.h # define HDBGRegAR(c) hdbgRegR (hreg_A, cpu.rA, c) rA 91 src/dps8/hdbg.h # define HDBGRegAW(c) hdbgRegW (hreg_A, cpu.rA, c)