pageAddress 73 src/dps8/doAppendCycleIndirectWordFetch.h word24 pageAddress = 0; pageAddress 97 src/dps8/doAppendCycleIndirectWordFetch.h if (! ucCacheCheck (this, cpu.TPR.TSR, cpu.TPR.CA, & bound, & p, & pageAddress, & RSDWH_R1, & paged)) pageAddress 101 src/dps8/doAppendCycleIndirectWordFetch.h finalAddress = pageAddress + (cpu.TPR.CA & OS18MASK); pageAddress 103 src/dps8/doAppendCycleIndirectWordFetch.h finalAddress = pageAddress + cpu.TPR.CA; pageAddress 358 src/dps8/doAppendCycleIndirectWordFetch.h pageAddress = (cpu.SDW->ADDR & 077777760); pageAddress 381 src/dps8/doAppendCycleIndirectWordFetch.h pageAddress = (((word24)cpu.PTW->ADDR & 0777760) << 6); pageAddress 399 src/dps8/doAppendCycleIndirectWordFetch.h ucCacheSave (this, cpu.TPR.TSR, cpu.TPR.CA, bound, p, pageAddress, RSDWH_R1, paged); pageAddress 84 src/dps8/doAppendCycleInstructionFetch.h word24 pageAddress = 0; pageAddress 151 src/dps8/doAppendCycleInstructionFetch.h if (! ucCacheCheck (this, cpu.TPR.TSR, cpu.TPR.CA, & bound, & p, & pageAddress, & RSDWH_R1, & paged)) pageAddress 156 src/dps8/doAppendCycleInstructionFetch.h finalAddress = pageAddress + (cpu.TPR.CA & OS18MASK); pageAddress 158 src/dps8/doAppendCycleInstructionFetch.h finalAddress = pageAddress + cpu.TPR.CA; pageAddress 489 src/dps8/doAppendCycleInstructionFetch.h pageAddress = (cpu.SDW->ADDR & 077777760); pageAddress 512 src/dps8/doAppendCycleInstructionFetch.h pageAddress = (((word24)cpu.PTW->ADDR & 0777760) << 6); pageAddress 531 src/dps8/doAppendCycleInstructionFetch.h if (cachedAddress != pageAddress) { pageAddress 532 src/dps8/doAppendCycleInstructionFetch.h sim_printf ("cachedAddress %08o != pageAddress %08o\r\n", cachedAddress, pageAddress); pageAddress 576 src/dps8/doAppendCycleInstructionFetch.h ucCacheSave (this, cpu.TPR.TSR, cpu.TPR.CA, bound, p, pageAddress, RSDWH_R1, paged); pageAddress 83 src/dps8/doAppendCycleOperandRead.h word24 pageAddress = 0; pageAddress 143 src/dps8/doAppendCycleOperandRead.h if (! ucCacheCheck (this, cpu.TPR.TSR, cpu.TPR.CA, & bound, & p, & pageAddress, & RSDWH_R1, & paged)) { pageAddress 152 src/dps8/doAppendCycleOperandRead.h finalAddress = pageAddress + (cpu.TPR.CA & OS18MASK); pageAddress 154 src/dps8/doAppendCycleOperandRead.h finalAddress = pageAddress + cpu.TPR.CA; pageAddress 593 src/dps8/doAppendCycleOperandRead.h pageAddress = (cpu.SDW->ADDR & 077777760); pageAddress 619 src/dps8/doAppendCycleOperandRead.h pageAddress = (((word24)cpu.PTW->ADDR & 0777760) << 6); pageAddress 640 src/dps8/doAppendCycleOperandRead.h if (cachedAddress != pageAddress) { pageAddress 641 src/dps8/doAppendCycleOperandRead.h sim_printf ("cachedAddress %08o != pageAddress %08o\r\n", cachedAddress, pageAddress); pageAddress 675 src/dps8/doAppendCycleOperandRead.h ucCacheSave (this, cpu.TPR.TSR, cpu.TPR.CA, bound, p, pageAddress, RSDWH_R1, paged); pageAddress 678 src/dps8/doAppendCycleOperandRead.h hdbgNote ("doAppendCycleOperandRead.h", "cache %d %u %05o:%06o %05o %o %08o %o %o", evcnt, this, cpu.TPR.TSR, cpu.TPR.CA, bound, p, pageAddress, RSDWH_R1, paged);