interlace 199 src/dps8/dps8_cpu.c 'A' + i, cpus[cpu_unit_idx].switches.interlace [i]); interlace 539 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [port_num] = (uint) v; interlace 636 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [0] = false; interlace 642 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [1] = false; interlace 648 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [2] = false; interlace 654 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [3] = false; interlace 661 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [4] = false; interlace 667 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [5] = false; interlace 673 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [6] = false; interlace 679 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [7] = false; interlace 837 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; interlace 844 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; interlace 862 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; interlace 869 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; interlace 713 src/dps8/dps8_cpu.h uint interlace [N_CPU_PORTS]; // 0/2/4 interlace 7871 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [0] ? 1LL:0LL) interlace 7882 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [1] ? 1LL:0LL) interlace 7893 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [2] ? 1LL:0LL) interlace 7904 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [3] ? 1LL:0LL) interlace 7979 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[0] == 2 ? interlace 7981 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[1] == 2 ? interlace 7983 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[2] == 2 ? interlace 7985 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[3] == 2 ? interlace 8094 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [4] ? 1LL:0LL) interlace 8105 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [5] ? 1LL:0LL) interlace 8116 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [6] ? 1LL:0LL) interlace 8127 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [7] ? 1LL:0LL) interlace 8150 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [0] == 2 ? interlace 8152 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [1] == 2 ? interlace 8154 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [2] == 2 ? interlace 8156 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [3] == 2 ? interlace 8159 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [4] == 2 ? interlace 8161 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [5] == 2 ? interlace 8163 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [6] == 2 ? interlace 8165 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [7] == 2 ? interlace 598 src/dps8/dps8_scu.c uint interlace; // 1 bit interlace 677 src/dps8/dps8_scu.c sim_printf("Interlace: %o\n", scup -> interlace); interlace 923 src/dps8/dps8_scu.c sw -> interlace = (uint) v; interlace 1123 src/dps8/dps8_scu.c up -> interlace = sw -> interlace; interlace 1686 src/dps8/dps8_scu.c up -> interlace = (rega >> 5) & 1; interlace 1996 src/dps8/dps8_scu.c putbits36_1 (& a, 30, (word1) up -> interlace); interlace 52 src/dps8/dps8_scu.h uint interlace; // 1 bit