evcnt              67 src/dps8/doAppendCycleInstructionFetch.h static int evcnt = 0;
evcnt              69 src/dps8/doAppendCycleInstructionFetch.h   (void)evcnt;
evcnt             551 src/dps8/doAppendCycleInstructionFetch.h       sim_printf ("ins fetch err  %d %05o:%06o\r\n", evcnt, cpu.TPR.TSR, cpu.TPR.CA);
evcnt             556 src/dps8/doAppendCycleInstructionFetch.h     hdbgNote ("doAppendCycleOperandRead.h", "test hit %d %05o:%06o\r\n", evcnt, cpu.TPR.TSR, cpu.TPR.CA);
evcnt             561 src/dps8/doAppendCycleInstructionFetch.h     hdbgNote ("doAppendCycleOperandRead.h", "test miss %d %05o:%06o\r\n", evcnt, cpu.TPR.TSR, cpu.TPR.CA);
evcnt             577 src/dps8/doAppendCycleInstructionFetch.h evcnt ++;
evcnt              62 src/dps8/doAppendCycleOperandRead.h static int evcnt = 0;
evcnt              64 src/dps8/doAppendCycleOperandRead.h   (void)evcnt;
evcnt             139 src/dps8/doAppendCycleOperandRead.h   hdbgNote ("doAppendCycleOperandRead.h", "test cache check %s %d %u %05o:%06o %05o %o %08o %o %o", cacheHit ? "hit" : "miss", evcnt, this, cpu.TPR.TSR, cpu.TPR.CA, cachedBound, cachedP, cachedAddress, cachedR1, cachedPaged);
evcnt             145 src/dps8/doAppendCycleOperandRead.h     hdbgNote ("doAppendCycleOperandRead.h", "miss %d %05o:%06o\r\n", evcnt, cpu.TPR.TSR, cpu.TPR.CA);
evcnt             161 src/dps8/doAppendCycleOperandRead.h   hdbgNote ("doAppendCycleOperandRead.h", "hit  %d %05o:%06o\r\n", evcnt, cpu.TPR.TSR, cpu.TPR.CA);
evcnt             171 src/dps8/doAppendCycleOperandRead.h   hdbgNote ("doAppendCycleOperandRead.h", "skip %d %05o:%06o\r\n", evcnt, cpu.TPR.TSR, cpu.TPR.CA);
evcnt             660 src/dps8/doAppendCycleOperandRead.h       sim_printf ("oprnd read err  %d %05o:%06o\r\n", evcnt, cpu.TPR.TSR, cpu.TPR.CA);
evcnt             665 src/dps8/doAppendCycleOperandRead.h     hdbgNote ("doAppendCycleOperandRead.h", "test hit %d %05o:%06o\r\n", evcnt, cpu.TPR.TSR, cpu.TPR.CA);
evcnt             670 src/dps8/doAppendCycleOperandRead.h     hdbgNote ("doAppendCycleOperandRead.h", "test miss %d %05o:%06o\r\n", evcnt, cpu.TPR.TSR, cpu.TPR.CA);
evcnt             678 src/dps8/doAppendCycleOperandRead.h   hdbgNote ("doAppendCycleOperandRead.h", "cache %d %u %05o:%06o %05o %o %08o %o %o", evcnt, this, cpu.TPR.TSR, cpu.TPR.CA, bound, p, pageAddress, RSDWH_R1, paged);
evcnt             681 src/dps8/doAppendCycleOperandRead.h evcnt ++;