cpuNo            2018 src/dps8/dps8_cpu.c     for (uint cpuNo = 0; cpuNo < N_CPU_UNITS_MAX; cpuNo ++) {
cpuNo            2019 src/dps8/dps8_cpu.c       cpuStats (cpuNo);
cpuNo            4590 src/dps8/dps8_cpu.c void setupPROM (uint cpuNo, unsigned char * PROM) {
cpuNo            4651 src/dps8/dps8_cpu.c   putbits36_1 (& rsw2,  20,  cpus[cpuNo].options.cache_installed ? 1 : 0);
cpuNo            4661 src/dps8/dps8_cpu.c   putbits36_4 (& rsw2,  29,  cpus[cpuNo].options.proc_speed & 017LL);
cpuNo            4663 src/dps8/dps8_cpu.c   putbits36_3 (& rsw2,  33,  cpus[cpuNo].switches.cpu_num & 07LL);
cpuNo            4666 src/dps8/dps8_cpu.c   if (cpus[cpuNo].options.hex_mode_installed)
cpuNo            4668 src/dps8/dps8_cpu.c   if (cpus[cpuNo].options.clock_slave_installed)
cpuNo            4673 src/dps8/dps8_cpu.c   sprintf (serial, "%-11u", cpus[cpuNo].switches.serno);
cpuNo            4921 src/dps8/dps8_cpu.c void cpuStats (uint cpuNo) {
cpuNo            4922 src/dps8/dps8_cpu.c   if (! cpus[cpuNo].cycleCnt)
cpuNo            4931 src/dps8/dps8_cpu.c   sim_msg ("\r|         CPU %c Statistics        |\r\n", 'A' + cpuNo);
cpuNo            4936 src/dps8/dps8_cpu.c   sim_msg ("\r|  cycles        %15llu  |\r\n", (unsigned long long)cpus[cpuNo].cycleCnt);
cpuNo            4937 src/dps8/dps8_cpu.c   sim_msg ("\r|  instructions  %15llu  |\r\n", (unsigned long long)cpus[cpuNo].instrCnt);
cpuNo            4941 src/dps8/dps8_cpu.c   sim_msg ("\r|  lockCnt       %15llu  |\r\n", (unsigned long long)cpus[cpuNo].lockCnt);
cpuNo            4942 src/dps8/dps8_cpu.c   sim_msg ("\r|  lockImmediate %15llu  |\r\n", (unsigned long long)cpus[cpuNo].lockImmediate);
cpuNo            4946 src/dps8/dps8_cpu.c   sim_msg ("\r|  lockWait      %15llu  |\r\n", (unsigned long long)cpus[cpuNo].lockWait);
cpuNo            4947 src/dps8/dps8_cpu.c   sim_msg ("\r|  lockWaitMax   %15llu  |\r\n", (unsigned long long)cpus[cpuNo].lockWaitMax);
cpuNo            4951 src/dps8/dps8_cpu.c   sim_msg ("\r|  lockYield     %15llu  |\r\n", (unsigned long long)cpus[cpuNo].lockYield);
cpuNo            4970 src/dps8/dps8_cpu.c   sim_msg ("\r|  cycles        %'15llu  |\r\n", (unsigned long long)cpus[cpuNo].cycleCnt);
cpuNo            4971 src/dps8/dps8_cpu.c   sim_msg ("\r|  instructions  %'15llu  |\r\n", (unsigned long long)cpus[cpuNo].instrCnt);
cpuNo            4975 src/dps8/dps8_cpu.c   sim_msg ("\r|  lockCnt       %'15llu  |\r\n", (unsigned long long)cpus[cpuNo].lockCnt);
cpuNo            4976 src/dps8/dps8_cpu.c   sim_msg ("\r|  lockImmediate %'15llu  |\r\n", (unsigned long long)cpus[cpuNo].lockImmediate);
cpuNo            4980 src/dps8/dps8_cpu.c   sim_msg ("\r|  lockWait      %'15llu  |\r\n", (unsigned long long)cpus[cpuNo].lockWait);
cpuNo            4981 src/dps8/dps8_cpu.c   sim_msg ("\r|  lockWaitMax   %'15llu  |\r\n", (unsigned long long)cpus[cpuNo].lockWaitMax);
cpuNo            4985 src/dps8/dps8_cpu.c   sim_msg ("\r|  lockYield     %'15llu  |\r\n", (unsigned long long)cpus[cpuNo].lockYield);
cpuNo            5006 src/dps8/dps8_cpu.c   ucacheStats (cpuNo);
cpuNo            5011 src/dps8/dps8_cpu.c 
cpuNo            5012 src/dps8/dps8_cpu.c 
cpuNo            2392 src/dps8/dps8_cpu.h void setupPROM (uint cpuNo, unsigned char * PROM);
cpuNo            2393 src/dps8/dps8_cpu.h void cpuStats (uint cpuNo);
cpuNo             895 src/dps8/dps8_faults.c void setG7fault (uint cpuNo, _fault faultNo, _fault_subtype subFault)
cpuNo             898 src/dps8/dps8_faults.c                cpuNo, faultNo, faultNo, subFault.bits, subFault.bits);
cpuNo             899 src/dps8/dps8_faults.c     cpus[cpuNo].g7FaultsPreset |= (1u << faultNo);
cpuNo             901 src/dps8/dps8_faults.c     cpus[cpuNo].g7SubFaults [faultNo] = subFault;
cpuNo             903 src/dps8/dps8_faults.c     wakeCPU(cpuNo);
cpuNo             131 src/dps8/dps8_faults.h void setG7fault (uint cpuNo, _fault faultNo, _fault_subtype subFault);
cpuNo             123 src/dps8/ucache.c void ucacheStats (int cpuNo) {
cpuNo             127 src/dps8/ucache.c   sim_msg ("\r\n|   CPU %c Micro-cache Statistics  |", 'A' + cpuNo);
cpuNo             131 src/dps8/ucache.c # define stats(n) args ( (long long unsigned)cpus[cpuNo].uCache.hits  [n], \
cpuNo             132 src/dps8/ucache.c                          (long long unsigned)cpus[cpuNo].uCache.misses[n], \
cpuNo             133 src/dps8/ucache.c                          (long long unsigned)cpus[cpuNo].uCache.skips [n] )
cpuNo             152 src/dps8/ucache.c   sim_msg ("\r|    RALR        %15llu  |\r\n", (long long unsigned)cpus[cpuNo].uCache.ralrSkips);
cpuNo             153 src/dps8/ucache.c   sim_msg ("\r|    CALL6       %15llu  |\r\n", (long long unsigned)cpus[cpuNo].uCache.call6Skips);
cpuNo             154 src/dps8/ucache.c   sim_msg ("\r|    Segno       %15llu  |\r\n", (long long unsigned)cpus[cpuNo].uCache.segnoSkips);
cpuNo             173 src/dps8/ucache.c   sim_msg ("\r|    RALR        %'15llu  |\r\n", (long long unsigned)cpus[cpuNo].uCache.ralrSkips);
cpuNo             174 src/dps8/ucache.c   sim_msg ("\r|    CALL6       %'15llu  |\r\n", (long long unsigned)cpus[cpuNo].uCache.call6Skips);
cpuNo             175 src/dps8/ucache.c   sim_msg ("\r|    Segno       %'15llu  |\r\n", (long long unsigned)cpus[cpuNo].uCache.segnoSkips);
cpuNo              67 src/dps8/ucache.h void ucacheStats (int cpuNo);