stats             137 src/dps8/ucache.c   sim_msg ("\r|  Instruction Fetch:             |\r\n|    Hits        %15llu  |\r\n|    Misses      %15llu  |\r\n|    Skipped     %15llu  |\r\n|    Effectiveness   %10.2f%%  |\r\n", stats (UC_INSTRUCTION_FETCH));
stats             141 src/dps8/ucache.c   sim_msg ("\r|  Operand Read:                  |\r\n|    Hits        %15llu  |\r\n|    Misses      %15llu  |\r\n|    Skipped     %15llu  |\r\n|    Effectiveness   %10.2f%%  |\r\n", stats (UC_OPERAND_READ));
stats             146 src/dps8/ucache.c   sim_msg ("\r|  Indirect Word Fetch:           |\r\n|    Hits        %15llu  |\r\n|    Misses      %15llu  |\r\n|    Skipped     %15llu  |\r\n|    Effectiveness   %10.2f%%  |\r\n", stats (UC_INDIRECT_WORD_FETCH));
stats             158 src/dps8/ucache.c   sim_msg ("\r|  Instruction Fetch:             |\r\n|    Hits        %'15llu  |\r\n|    Misses      %'15llu  |\r\n|    Skipped     %'15llu  |\r\n|    Effectiveness   %'10.2f%%  |\r\n", stats (UC_INSTRUCTION_FETCH));
stats             162 src/dps8/ucache.c   sim_msg ("\r|  Operand Read:                  |\r\n|    Hits        %'15llu  |\r\n|    Misses      %'15llu  |\r\n|    Skipped     %'15llu  |\r\n|    Effectiveness   %'10.2f%%  |\r\n", stats (UC_OPERAND_READ));
stats             167 src/dps8/ucache.c   sim_msg ("\r|  Indirect Word Fetch:           |\r\n|    Hits        %'15llu  |\r\n|    Misses      %'15llu  |\r\n|    Skipped     %'15llu  |\r\n|    Effectiveness   %'10.2f%%  |\r\n", stats (UC_INDIRECT_WORD_FETCH));