TSR 224 src/dps8/dps8_addrmods.c cpu.TPR.TSR = cpu.PR[n].SNR; TSR 260 src/dps8/dps8_addrmods.c cpu.TPR.TSR = GET_ITS_SEGNO (cpu.itxPair); TSR 1159 src/dps8/dps8_append.c cpu.TPR.TRR, cpu.TPR.TSR); TSR 1227 src/dps8/dps8_append.c cpu.TPR.TSR = 0; TSR 1229 src/dps8/dps8_append.c cpu.TPR.TSR, cpu.TPR.TRR); TSR 1252 src/dps8/dps8_append.c if (nomatch || ! fetch_sdw_from_sdwam (cpu.TPR.TSR)) TSR 1256 src/dps8/dps8_append.c cpu.TPR.TSR); TSR 1263 src/dps8/dps8_append.c fetch_dsptw (cpu.TPR.TSR); TSR 1270 src/dps8/dps8_append.c modify_dsptw (cpu.TPR.TSR); TSR 1272 src/dps8/dps8_append.c fetch_psdw (cpu.TPR.TSR); TSR 1275 src/dps8/dps8_append.c fetch_nsdw (cpu.TPR.TSR); // load SDW0 from descriptor segment table. TSR 1288 src/dps8/dps8_append.c load_sdwam (cpu.TPR.TSR, nomatch); TSR 1400 src/dps8/dps8_append.c if (cpu.PPR.PSR != cpu.TPR.TSR) TSR 1430 src/dps8/dps8_append.c if (cpu.TPR.TSR == cpu.PPR.PSR) TSR 1550 src/dps8/dps8_append.c cpu.SDW->E, cpu.SDW->G, cpu.PPR.PSR, cpu.TPR.TSR, cpu.TPR.CA, TSR 1570 src/dps8/dps8_append.c if (cpu.PPR.PSR == cpu.TPR.TSR && ! TST_I_ABS) TSR 1796 src/dps8/dps8_append.c cpu.TPR.TSR, cpu.TPR.CA, finalAddress); TSR 1833 src/dps8/dps8_append.c cpu.TPR.TSR, cpu.TPR.CA, finalAddress); TSR 1980 src/dps8/dps8_append.c cpu.TPR.TSR = GET_ITS_SEGNO (data); TSR 2066 src/dps8/dps8_append.c cpu.PPR.PSR = cpu.TPR.TSR; TSR 2120 src/dps8/dps8_append.c cpu.PPR.PSR = cpu.TPR.TSR; TSR 2170 src/dps8/dps8_append.c cpu.TPR.TRR, cpu.TPR.TSR, cpu.TPR.TBR, cpu.TPR.CA); TSR 2590 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; TSR 2605 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; TSR 2673 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; TSR 2966 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; TSR 4296 src/dps8/dps8_cpu.c putbits36_15 (& w0, 0, cpu.TPR.TSR); TSR 83 src/dps8/dps8_cpu.h word15 TSR; // The current effective segment number TSR 570 src/dps8/dps8_eis.c cpu.TPR.TSR = p -> SNR; TSR 583 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Write8 TRR %o TSR %05o\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } TSR 596 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; TSR 607 src/dps8/dps8_eis.c __func__, p -> cachedParagraph [i], cpu.TPR.TSR, p -> cachedAddr + i); TSR 611 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Write8 NO PR TRR %o TSR %05o\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } TSR 647 src/dps8/dps8_eis.c cpu.TPR.TSR = p -> SNR; TSR 650 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Read8 TRR %o TSR %05o\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } TSR 666 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; TSR 671 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Read8 NO PR TRR %o TSR %05o\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } TSR 678 src/dps8/dps8_eis.c __func__, p -> cachedParagraph [i], cpu.TPR.TSR, paragraphAddress + i); TSR 811 src/dps8/dps8_eis.c cpu.TPR.TSR = p -> SNR; TSR 821 src/dps8/dps8_eis.c __func__, data [i], cpu.TPR.TSR, addressN + i); TSR 834 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; TSR 844 src/dps8/dps8_eis.c __func__, data [i], cpu.TPR.TSR, addressN + i); TSR 873 src/dps8/dps8_eis.c cpu.TPR.TSR = p -> SNR; TSR 883 src/dps8/dps8_eis.c __func__, data [i], cpu.TPR.TSR, addressN + i); TSR 896 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; TSR 906 src/dps8/dps8_eis.c __func__, data [i], cpu.TPR.TSR, addressN + i); TSR 119 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; TSR 127 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_read, cpu.TPR.TSR, address, "Read BAR"); TSR 128 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "Read BAR"); TSR 144 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_read, cpu.TPR.TSR, address, "Read"); TSR 145 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "Read"); TSR 224 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; TSR 236 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_read, cpu.TPR.TSR, address, "Read2 BR"); TSR 237 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "Read2 BR evn"); TSR 238 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, * (result+1), "Read2 BR odd"); TSR 265 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_read, cpu.TPR.TSR, address, "Read2"); TSR 266 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "Read2 evn"); TSR 267 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, * (result+1), "Read2 odd"); TSR 341 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; TSR 354 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_read, cpu.TPR.TSR, address, "Read8 BAR"); TSR 356 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, result[i], "Read8 BAR"); TSR 376 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_read, cpu.TPR.TSR, address, "Read8"); TSR 378 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, result [i], "Read8"); TSR 466 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; TSR 479 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_read, cpu.TPR.TSR, address, "ReadPage B"); TSR 481 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, result [i], "ReadPage B"); TSR 502 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_read, cpu.TPR.TSR, address, "ReadPage"); TSR 504 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, result [i], "ReadPage"); TSR 579 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; TSR 587 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_write, cpu.TPR.TSR, address, "Write BR"); TSR 588 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data, "Write BR"); TSR 600 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_write, cpu.TPR.TSR, address, "Write"); TSR 601 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data, "Write"); TSR 664 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; TSR 672 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_write, cpu.TPR.TSR, address, "Write2 BR"); TSR 673 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data[0], "Write2 BR evn"); TSR 674 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, data[1], "Write2 BR odd"); TSR 685 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_write, cpu.TPR.TSR, address, "Write2"); TSR 686 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data[0], "Write2 evn"); TSR 687 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, data[1], "Write2 odd"); TSR 745 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; TSR 754 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_write, cpu.TPR.TSR, address, "Write1 BR"); TSR 755 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data, "Write1 BR"); TSR 768 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_write, cpu.TPR.TSR, address, "Write1"); TSR 769 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data, "Write1"); TSR 841 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; TSR 854 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_write, cpu.TPR.TSR, address, "Write8 BR"); TSR 856 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, data [i], "Write8 BR"); TSR 874 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_write, cpu.TPR.TSR, address, "Write8"); TSR 876 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, data [i], "Write8"); TSR 973 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; TSR 987 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_write, cpu.TPR.TSR, address, "WritePage BR"); TSR 989 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, data [i], "WritePage BR"); TSR 1006 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_write, cpu.TPR.TSR, address, "WritePage"); TSR 1008 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, data [i], "WritePage"); TSR 380 src/dps8/dps8_ins.c putbits36_15 (& words[2], 3, cpu.TPR.TSR); TSR 634 src/dps8/dps8_ins.c cpu.TPR.TSR = getbits36_15 (words[2], 3); TSR 1825 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PPR.PSR; TSR 1864 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PAR[n].SNR; TSR 1870 src/dps8/dps8_ins.c sim_debug (DBG_APPENDING, &cpu_dev, "doPtrReg: n=%o offset=%05o TPR.CA=%06o " "TPR.TBR=%o TPR.TSR=%05o TPR.TRR=%o\n", n, offset, cpu.TPR.CA, cpu.TPR.TBR, cpu.TPR.TSR, cpu.TPR.TRR); TSR 1887 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PPR.PSR; TSR 1979 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PPR.PSR; TSR 2611 src/dps8/dps8_ins.c cpu.PR[n].SNR = cpu.TPR.TSR; TSR 2923 src/dps8/dps8_ins.c cpu.PR[n].SNR = cpu.TPR.TSR; TSR 3332 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.TPR.TSR & MASK15) << 18; TSR 32 src/dps8/dps8_mp.h word15 TSR; TSR 4118 src/dps8/dps8_sys.c { "cpus[].TPR.TSR", SYM_STRUCT_OFFSET, SYM_UINT16_15, offsetof (struct tpr_s, TSR) },