TPR 224 src/dps8/dps8_addrmods.c cpu.TPR.TSR = cpu.PR[n].SNR; TPR 225 src/dps8/dps8_addrmods.c cpu.TPR.TRR = max3 (cpu.PR[n].RNR, cpu.RSDWH_R1, cpu.TPR.TRR); TPR 226 src/dps8/dps8_addrmods.c cpu.TPR.TBR = GET_ITP_BITNO (cpu.itxPair); TPR 227 src/dps8/dps8_addrmods.c cpu.TPR.CA = cpu.PAR[n].WORDNO + GET_ITP_WORDNO (cpu.itxPair); TPR 228 src/dps8/dps8_addrmods.c cpu.TPR.CA &= AMASK; TPR 229 src/dps8/dps8_addrmods.c cpu.rY = cpu.TPR.CA; TPR 260 src/dps8/dps8_addrmods.c cpu.TPR.TSR = GET_ITS_SEGNO (cpu.itxPair); TPR 264 src/dps8/dps8_addrmods.c GET_ITS_RN (cpu.itxPair), cpu.RSDWH_R1, cpu.TPR.TRR, TPR 265 src/dps8/dps8_addrmods.c max3 (GET_ITS_RN (cpu.itxPair), cpu.RSDWH_R1, cpu.TPR.TRR)); TPR 267 src/dps8/dps8_addrmods.c cpu.TPR.TRR = max3 (GET_ITS_RN (cpu.itxPair), cpu.RSDWH_R1, cpu.TPR.TRR); TPR 268 src/dps8/dps8_addrmods.c cpu.TPR.TBR = GET_ITS_BITNO (cpu.itxPair); TPR 269 src/dps8/dps8_addrmods.c cpu.TPR.CA = GET_ITS_WORDNO (cpu.itxPair); TPR 270 src/dps8/dps8_addrmods.c cpu.TPR.CA &= AMASK; TPR 272 src/dps8/dps8_addrmods.c cpu.rY = cpu.TPR.CA; TPR 364 src/dps8/dps8_addrmods.c cpu.TPR.CA = GET_ADDR (IWB_IRODD); TPR 373 src/dps8/dps8_addrmods.c cpu.TPR.CA = (cpu.PAR[n].WORDNO + SIGNEXT15_18 (offset)) TPR 379 src/dps8/dps8_addrmods.c __func__, op_desc_str (buf), cpu.TPR.CA); TPR 422 src/dps8/dps8_addrmods.c cpu.cu.pot == 1 && GET_ADDR (IWB_IRODD) == cpu.TPR.CA) TPR 424 src/dps8/dps8_addrmods.c cpu.TPR.CA--; TPR 494 src/dps8/dps8_addrmods.c cpu.TPR.CA = Cr + cpu.PR [PRn].WORDNO; TPR 495 src/dps8/dps8_addrmods.c cpu.TPR.CA &= AMASK; TPR 499 src/dps8/dps8_addrmods.c cpu.TPR.CA = Cr; TPR 504 src/dps8/dps8_addrmods.c cpu.TPR.CA += Cr; TPR 505 src/dps8/dps8_addrmods.c cpu.TPR.CA &= MASK18; // keep to 18-bits TPR 508 src/dps8/dps8_addrmods.c cpu.TPR.CA); TPR 530 src/dps8/dps8_addrmods.c "RI_MOD: Cr=%06o CA(Before)=%06o\n", Cr, cpu.TPR.CA); TPR 541 src/dps8/dps8_addrmods.c cpu.TPR.CA = Cr + cpu.PR [PRn].WORDNO; TPR 545 src/dps8/dps8_addrmods.c cpu.TPR.CA = Cr; TPR 547 src/dps8/dps8_addrmods.c cpu.TPR.CA &= AMASK; TPR 551 src/dps8/dps8_addrmods.c cpu.TPR.CA += Cr; TPR 552 src/dps8/dps8_addrmods.c cpu.TPR.CA &= MASK18; // keep to 18-bits TPR 555 src/dps8/dps8_addrmods.c "RI_MOD: CA(After)=%06o\n", cpu.TPR.CA); TPR 569 src/dps8/dps8_addrmods.c word18 saveCA = cpu.TPR.CA; TPR 575 src/dps8/dps8_addrmods.c updateIWB (cpu.TPR.CA, cpu.rTAG); TPR 603 src/dps8/dps8_addrmods.c cpu.TPR.CA = GETHI (cpu.itxPair[0]); TPR 604 src/dps8/dps8_addrmods.c cpu.rY = cpu.TPR.CA; TPR 618 src/dps8/dps8_addrmods.c cpu.itxPair[0], cpu.TPR.CA, cpu.rTAG); TPR 645 src/dps8/dps8_addrmods.c cpu.TPR.CA); TPR 647 src/dps8/dps8_addrmods.c word18 saveCA = cpu.TPR.CA; TPR 667 src/dps8/dps8_addrmods.c cpu.TPR.CA = GETHI (cpu.itxPair[0]); TPR 668 src/dps8/dps8_addrmods.c cpu.rY = cpu.TPR.CA; TPR 680 src/dps8/dps8_addrmods.c cpu.itxPair[0], cpu.TPR.CA, Tm, Td, TPR 693 src/dps8/dps8_addrmods.c updateIWB(cpu.TPR.CA, cpu.rTAG); TPR 698 src/dps8/dps8_addrmods.c cpu.TPR.CA = saveCA; TPR 703 src/dps8/dps8_addrmods.c cpu.TPR.CA = saveCA; TPR 730 src/dps8/dps8_addrmods.c updateIWB (cpu.TPR.CA, cpu.rTAG); TPR 744 src/dps8/dps8_addrmods.c Td, Cr, cpu.TPR.CA); TPR 746 src/dps8/dps8_addrmods.c cpu.TPR.CA += Cr; TPR 747 src/dps8/dps8_addrmods.c cpu.TPR.CA &= MASK18; // keep to 18-bits TPR 750 src/dps8/dps8_addrmods.c "IR_MOD(TM_RI): TPR.CA=%06o\n", cpu.TPR.CA); TPR 754 src/dps8/dps8_addrmods.c cpu.TPR.CA); TPR 757 src/dps8/dps8_addrmods.c updateIWB (cpu.TPR.CA, (TM_RI|TD_N)); TPR 763 src/dps8/dps8_addrmods.c updateIWB (cpu.TPR.CA, cpu.rTAG); // XXX guessing here... TPR 842 src/dps8/dps8_addrmods.c cpu.TPR.CA); TPR 849 src/dps8/dps8_addrmods.c word18 indaddr = cpu.TPR.CA; TPR 883 src/dps8/dps8_addrmods.c cpu.TPR.CA = Yi; TPR 931 src/dps8/dps8_addrmods.c cpu.TPR.CA = Yi; TPR 954 src/dps8/dps8_addrmods.c Read (cpu.TPR.CA, & cpu.ou.character_data, (i->info->flags & RMW) == \ TPR 957 src/dps8/dps8_addrmods.c Read (cpu.TPR.CA, & cpu.ou.character_data, OPERAND_READ); TPR 1029 src/dps8/dps8_addrmods.c indword, cpu.TPR.CA); TPR 1034 src/dps8/dps8_addrmods.c cpu.TPR.CA = cpu.ou.character_address; TPR 1042 src/dps8/dps8_addrmods.c cpu.TPR.CA); TPR 1051 src/dps8/dps8_addrmods.c cpu.TPR.CA = GET_ADDR (cpu.itxPair[0]); TPR 1052 src/dps8/dps8_addrmods.c updateIWB (cpu.TPR.CA, (TM_R|TD_N)); TPR 1070 src/dps8/dps8_addrmods.c cpu.TPR.CA); TPR 1076 src/dps8/dps8_addrmods.c word18 saveCA = cpu.TPR.CA; TPR 1078 src/dps8/dps8_addrmods.c Read (cpu.TPR.CA, & indword, APU_DATA_RMW); TPR 1092 src/dps8/dps8_addrmods.c cpu.TPR.CA = Yi; TPR 1093 src/dps8/dps8_addrmods.c word18 computedAddress = cpu.TPR.CA; TPR 1122 src/dps8/dps8_addrmods.c cpu.TPR.CA = computedAddress; TPR 1123 src/dps8/dps8_addrmods.c updateIWB (cpu.TPR.CA, (TM_R|TD_N)); TPR 1143 src/dps8/dps8_addrmods.c word18 saveCA = cpu.TPR.CA; TPR 1145 src/dps8/dps8_addrmods.c Read (cpu.TPR.CA, & indword, APU_DATA_RMW); TPR 1149 src/dps8/dps8_addrmods.c cpu.TPR.CA); TPR 1164 src/dps8/dps8_addrmods.c cpu.TPR.CA = Yi; TPR 1190 src/dps8/dps8_addrmods.c cpu.TPR.CA = Yi; TPR 1191 src/dps8/dps8_addrmods.c updateIWB (cpu.TPR.CA, (TM_R|TD_N)); TPR 1208 src/dps8/dps8_addrmods.c cpu.TPR.CA); TPR 1214 src/dps8/dps8_addrmods.c word18 saveCA = cpu.TPR.CA; TPR 1216 src/dps8/dps8_addrmods.c Read (cpu.TPR.CA, & indword, APU_DATA_RMW); TPR 1231 src/dps8/dps8_addrmods.c cpu.TPR.CA = Yi; TPR 1239 src/dps8/dps8_addrmods.c indword = (word36) (((word36) cpu.TPR.CA << 18) | TPR 1257 src/dps8/dps8_addrmods.c cpu.TPR.CA = Yi; TPR 1258 src/dps8/dps8_addrmods.c updateIWB (cpu.TPR.CA, (TM_R|TD_N)); TPR 1273 src/dps8/dps8_addrmods.c word18 saveCA = cpu.TPR.CA; TPR 1277 src/dps8/dps8_addrmods.c cpu.TPR.CA); TPR 1284 src/dps8/dps8_addrmods.c Read (cpu.TPR.CA, & indword, APU_DATA_RMW); TPR 1295 src/dps8/dps8_addrmods.c cpu.TPR.CA = Yi; TPR 1296 src/dps8/dps8_addrmods.c word18 computedAddress = cpu.TPR.CA; TPR 1329 src/dps8/dps8_addrmods.c cpu.TPR.CA = computedAddress; TPR 1330 src/dps8/dps8_addrmods.c updateIWB (cpu.TPR.CA, (TM_R|TD_N)); TPR 1359 src/dps8/dps8_addrmods.c cpu.TPR.CA); TPR 1365 src/dps8/dps8_addrmods.c word18 saveCA = cpu.TPR.CA; TPR 1367 src/dps8/dps8_addrmods.c Read (cpu.TPR.CA, & indword, APU_DATA_RMW); TPR 1418 src/dps8/dps8_addrmods.c cpu.TPR.CA = Yi; TPR 1442 src/dps8/dps8_addrmods.c updateIWB (cpu.TPR.CA, cpu.rTAG); TPR 1471 src/dps8/dps8_addrmods.c cpu.TPR.CA); TPR 1477 src/dps8/dps8_addrmods.c word18 saveCA = cpu.TPR.CA; TPR 1479 src/dps8/dps8_addrmods.c Read (cpu.TPR.CA, & indword, APU_DATA_RMW); TPR 1532 src/dps8/dps8_addrmods.c cpu.TPR.CA = YiSafe; TPR 1553 src/dps8/dps8_addrmods.c updateIWB (cpu.TPR.CA, cpu.rTAG); TPR 1153 src/dps8/dps8_append.c cpu.TPR.CA); TPR 1159 src/dps8/dps8_append.c cpu.TPR.TRR, cpu.TPR.TSR); TPR 1227 src/dps8/dps8_append.c cpu.TPR.TSR = 0; TPR 1229 src/dps8/dps8_append.c cpu.TPR.TSR, cpu.TPR.TRR); TPR 1247 src/dps8/dps8_append.c PNL (cpu.APUMemAddr = cpu.TPR.CA;) TPR 1252 src/dps8/dps8_append.c if (nomatch || ! fetch_sdw_from_sdwam (cpu.TPR.TSR)) TPR 1256 src/dps8/dps8_append.c cpu.TPR.TSR); TPR 1263 src/dps8/dps8_append.c fetch_dsptw (cpu.TPR.TSR); TPR 1270 src/dps8/dps8_append.c modify_dsptw (cpu.TPR.TSR); TPR 1272 src/dps8/dps8_append.c fetch_psdw (cpu.TPR.TSR); TPR 1275 src/dps8/dps8_append.c fetch_nsdw (cpu.TPR.TSR); // load SDW0 from descriptor segment table. TPR 1288 src/dps8/dps8_append.c load_sdwam (cpu.TPR.TSR, nomatch); TPR 1384 src/dps8/dps8_append.c if (cpu.TPR.TRR > cpu.SDW->R2) TPR 1397 src/dps8/dps8_append.c cpu.TPR.TRR = cpu.PPR.PRR; TPR 1400 src/dps8/dps8_append.c if (cpu.PPR.PSR != cpu.TPR.TSR) TPR 1430 src/dps8/dps8_append.c if (cpu.TPR.TSR == cpu.PPR.PSR) TPR 1431 src/dps8/dps8_append.c cpu.TPR.TRR = cpu.PPR.PRR; TPR 1434 src/dps8/dps8_append.c if (cpu.TPR.TRR > cpu.SDW->R1) TPR 1437 src/dps8/dps8_append.c cpu.TPR.TRR, cpu.SDW->R1); TPR 1447 src/dps8/dps8_append.c cpu.TPR.TRR = cpu.PPR.PRR; TPR 1476 src/dps8/dps8_append.c if (cpu.TPR.TRR < cpu.SDW->R1 || TPR 1477 src/dps8/dps8_append.c cpu.TPR.TRR > cpu.SDW->R2) TPR 1481 src/dps8/dps8_append.c cpu.SDW->R1, cpu.TPR.TRR, cpu.SDW->R2); TPR 1497 src/dps8/dps8_append.c if (cpu.TPR.TRR > cpu.PPR.PRR) TPR 1499 src/dps8/dps8_append.c cpu.TPR.TRR, cpu.PPR.PRR); TPR 1501 src/dps8/dps8_append.c if (cpu.TPR.TRR < cpu.PPR.PRR) TPR 1550 src/dps8/dps8_append.c cpu.SDW->E, cpu.SDW->G, cpu.PPR.PSR, cpu.TPR.TSR, cpu.TPR.CA, TPR 1552 src/dps8/dps8_append.c cpu.TPR.TRR, cpu.PPR.PRR); TPR 1570 src/dps8/dps8_append.c if (cpu.PPR.PSR == cpu.TPR.TSR && ! TST_I_ABS) TPR 1576 src/dps8/dps8_append.c if (cpu.TPR.CA >= (word18) cpu.SDW->EB) TPR 1590 src/dps8/dps8_append.c if (cpu.TPR.TRR > cpu.SDW->R3) TPR 1601 src/dps8/dps8_append.c if (cpu.TPR.TRR < cpu.SDW->R1) TPR 1612 src/dps8/dps8_append.c if (cpu.TPR.TRR > cpu.PPR.PRR) TPR 1628 src/dps8/dps8_append.c cpu.TPR.TRR, cpu.SDW->R2); TPR 1631 src/dps8/dps8_append.c if (cpu.TPR.TRR > cpu.SDW->R2) TPR 1634 src/dps8/dps8_append.c cpu.TPR.TRR = cpu.SDW->R2; TPR 1637 src/dps8/dps8_append.c DBGAPP ("do_append_cycle(E1): CALL6 TPR.TRR %o\n", cpu.TPR.TRR); TPR 1657 src/dps8/dps8_append.c if (cpu.TPR.TRR < cpu.SDW->R1 || TPR 1658 src/dps8/dps8_append.c cpu.TPR.TRR > cpu.SDW->R2) TPR 1662 src/dps8/dps8_append.c cpu.SDW->R1, cpu.TPR.TRR, cpu.SDW->R2); TPR 1678 src/dps8/dps8_append.c if (cpu.PPR.PRR != cpu.TPR.TRR) TPR 1701 src/dps8/dps8_append.c if (((cpu.TPR.CA >> 4) & 037777) > cpu.SDW->BOUND) TPR 1710 src/dps8/dps8_append.c cpu.TPR.CA, ((cpu.TPR.CA >> 4) & 037777), cpu.SDW->BOUND); TPR 1729 src/dps8/dps8_append.c DBGAPP ("do_append_cycle(G) CA %06o\n", cpu.TPR.CA); TPR 1731 src/dps8/dps8_append.c ! fetch_ptw_from_ptwam (cpu.SDW->POINTER, cpu.TPR.CA)) //TPR.CA)) TPR 1733 src/dps8/dps8_append.c fetch_ptw (cpu.SDW, cpu.TPR.CA); TPR 1743 src/dps8/dps8_append.c loadPTWAM (cpu.SDW->POINTER, cpu.TPR.CA, nomatch); // load PTW0 to PTWAM TPR 1754 src/dps8/dps8_append.c do_ptw2 (cpu.SDW, cpu.TPR.CA); TPR 1780 src/dps8/dps8_append.c cpu.SDW->ADDR, cpu.TPR.CA); TPR 1786 src/dps8/dps8_append.c finalAddress = cpu.TPR.CA; TPR 1790 src/dps8/dps8_append.c finalAddress = (cpu.SDW->ADDR & 077777760) + cpu.TPR.CA; TPR 1796 src/dps8/dps8_append.c cpu.TPR.TSR, cpu.TPR.CA, finalAddress); TPR 1815 src/dps8/dps8_append.c modify_ptw (cpu.SDW, cpu.TPR.CA); TPR 1822 src/dps8/dps8_append.c word24 y2 = cpu.TPR.CA % 1024; TPR 1833 src/dps8/dps8_append.c cpu.TPR.TSR, cpu.TPR.CA, finalAddress); TPR 1912 src/dps8/dps8_append.c (cpu.TPR.CA & 1) == 0) TPR 1980 src/dps8/dps8_append.c cpu.TPR.TSR = GET_ITS_SEGNO (data); TPR 1985 src/dps8/dps8_append.c cpu.PPR.PRR = cpu.TPR.TRR = max3 (y, cpu.TPR.TRR, cpu.RSDWH_R1); TPR 1989 src/dps8/dps8_append.c cpu.TPR.CA = GET_ITS_WORDNO (data); TPR 2048 src/dps8/dps8_append.c cpu.PR[7].RNR = cpu.TPR.TRR; TPR 2066 src/dps8/dps8_append.c cpu.PPR.PSR = cpu.TPR.TSR; TPR 2068 src/dps8/dps8_append.c cpu.PPR.IC = cpu.TPR.CA; TPR 2076 src/dps8/dps8_append.c if (cpu.TPR.TRR == 0) TPR 2093 src/dps8/dps8_append.c if (cpu.TPR.TRR == cpu.PPR.PRR) TPR 2102 src/dps8/dps8_append.c cpu.PR[7].SNR = ((word15) (cpu.DSBR.STACK << 3)) | cpu.TPR.TRR; TPR 2104 src/dps8/dps8_append.c cpu.DSBR.STACK, cpu.TPR.TRR); TPR 2109 src/dps8/dps8_append.c cpu.PR[7].RNR = cpu.TPR.TRR; TPR 2118 src/dps8/dps8_append.c cpu.PPR.PRR = cpu.TPR.TRR; TPR 2120 src/dps8/dps8_append.c cpu.PPR.PSR = cpu.TPR.TSR; TPR 2122 src/dps8/dps8_append.c cpu.PPR.IC = cpu.TPR.CA; TPR 2136 src/dps8/dps8_append.c cpu.TPR.TRR, cpu.RSDWH_R1, its_RNR); TPR 2140 src/dps8/dps8_append.c cpu.TPR.TRR = max3 (its_RNR, cpu.TPR.TRR, cpu.RSDWH_R1); TPR 2141 src/dps8/dps8_append.c DBGAPP ("do_append_cycle(O) Set TRR to %o\n", cpu.TPR.TRR); TPR 2151 src/dps8/dps8_append.c cpu.TPR.TRR, cpu.RSDWH_R1, cpu.PR[n].RNR); TPR 2155 src/dps8/dps8_append.c cpu.TPR.TRR = max3 (cpu.PR[n].RNR, cpu.TPR.TRR, cpu.RSDWH_R1); TPR 2156 src/dps8/dps8_append.c DBGAPP ("do_append_cycle(P) Set TRR to %o\n", cpu.TPR.TRR); TPR 2162 src/dps8/dps8_append.c PNL (cpu.APUDataBusOffset = cpu.TPR.CA;) TPR 2170 src/dps8/dps8_append.c cpu.TPR.TRR, cpu.TPR.TSR, cpu.TPR.TBR, cpu.TPR.CA); TPR 2314 src/dps8/dps8_cpu.c cpu.TPR.TRR = 0; TPR 2590 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; TPR 2591 src/dps8/dps8_cpu.c cpu.TPR.TRR = cpu.PPR.PRR; TPR 2605 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; TPR 2606 src/dps8/dps8_cpu.c cpu.TPR.TRR = cpu.PPR.PRR; TPR 2673 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; TPR 2674 src/dps8/dps8_cpu.c cpu.TPR.TRR = cpu.PPR.PRR; TPR 2966 src/dps8/dps8_cpu.c cpu.TPR.TSR = cpu.PPR.PSR; TPR 2967 src/dps8/dps8_cpu.c cpu.TPR.TRR = cpu.PPR.PRR; TPR 3094 src/dps8/dps8_cpu.c cpu.TPR.TRR = 0; TPR 4100 src/dps8/dps8_cpu.c putbits36_18 (& w1, 0, cpu.TPR.CA); TPR 4296 src/dps8/dps8_cpu.c putbits36_15 (& w0, 0, cpu.TPR.TSR); TPR 4314 src/dps8/dps8_cpu.c putbits36_3 (& w1, 24, cpu.TPR.TRR); TPR 1655 src/dps8/dps8_cpu.h struct tpr_s TPR; // Temporary Pointer Register TPR 563 src/dps8/dps8_eis.c word3 saveTRR = cpu.TPR.TRR; TPR 569 src/dps8/dps8_eis.c cpu.TPR.TRR = p -> RNR; TPR 570 src/dps8/dps8_eis.c cpu.TPR.TSR = p -> SNR; TPR 583 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Write8 TRR %o TSR %05o\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } TPR 595 src/dps8/dps8_eis.c cpu.TPR.TRR = cpu.PPR.PRR; TPR 596 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; TPR 607 src/dps8/dps8_eis.c __func__, p -> cachedParagraph [i], cpu.TPR.TSR, p -> cachedAddr + i); TPR 611 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Write8 NO PR TRR %o TSR %05o\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } TPR 621 src/dps8/dps8_eis.c cpu.TPR.TRR = saveTRR; TPR 627 src/dps8/dps8_eis.c word3 saveTRR = cpu.TPR.TRR; TPR 646 src/dps8/dps8_eis.c cpu.TPR.TRR = p -> RNR; TPR 647 src/dps8/dps8_eis.c cpu.TPR.TSR = p -> SNR; TPR 650 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Read8 TRR %o TSR %05o\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } TPR 665 src/dps8/dps8_eis.c cpu.TPR.TRR = cpu.PPR.PRR; TPR 666 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; TPR 671 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Read8 NO PR TRR %o TSR %05o\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } TPR 678 src/dps8/dps8_eis.c __func__, p -> cachedParagraph [i], cpu.TPR.TSR, paragraphAddress + i); TPR 686 src/dps8/dps8_eis.c cpu.TPR.TRR = saveTRR; TPR 806 src/dps8/dps8_eis.c word3 saveTRR = cpu.TPR.TRR; TPR 810 src/dps8/dps8_eis.c cpu.TPR.TRR = p -> RNR; TPR 811 src/dps8/dps8_eis.c cpu.TPR.TSR = p -> SNR; TPR 821 src/dps8/dps8_eis.c __func__, data [i], cpu.TPR.TSR, addressN + i); TPR 833 src/dps8/dps8_eis.c cpu.TPR.TRR = cpu.PPR.PRR; TPR 834 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; TPR 844 src/dps8/dps8_eis.c __func__, data [i], cpu.TPR.TSR, addressN + i); TPR 847 src/dps8/dps8_eis.c cpu.TPR.TRR = saveTRR; TPR 868 src/dps8/dps8_eis.c word3 saveTRR = cpu.TPR.TRR; TPR 872 src/dps8/dps8_eis.c cpu.TPR.TRR = p -> RNR; TPR 873 src/dps8/dps8_eis.c cpu.TPR.TSR = p -> SNR; TPR 883 src/dps8/dps8_eis.c __func__, data [i], cpu.TPR.TSR, addressN + i); TPR 895 src/dps8/dps8_eis.c cpu.TPR.TRR = cpu.PPR.PRR; TPR 896 src/dps8/dps8_eis.c cpu.TPR.TSR = cpu.PPR.PSR; TPR 906 src/dps8/dps8_eis.c __func__, data [i], cpu.TPR.TSR, addressN + i); TPR 909 src/dps8/dps8_eis.c cpu.TPR.TRR = saveTRR; TPR 1277 src/dps8/dps8_eis.c cpu.TPR.TRR, TPR 1426 src/dps8/dps8_eis.c e -> addr [k - 1].RNR = max3 (cpu.PR [n].RNR, cpu.TPR.TRR, cpu.PPR.PRR); TPR 1631 src/dps8/dps8_eis.c e -> addr [k - 1].RNR = max3 (cpu.PR [n].RNR, cpu.TPR.TRR, cpu.PPR.PRR); TPR 1683 src/dps8/dps8_eis.c e->addr[k-1].RNR = max3(cpu.PR[n].RNR, cpu.TPR.TRR, cpu.PPR.PRR); TPR 1865 src/dps8/dps8_eis.c e->addr[k-1].RNR = max3(cpu.PR[n].RNR, cpu.TPR.TRR, cpu.PPR.PRR); TPR 55 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; TPR 118 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (address); TPR 119 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; TPR 120 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; TPR 127 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_read, cpu.TPR.TSR, address, "Read BAR"); TPR 128 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "Read BAR"); TPR 144 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_read, cpu.TPR.TSR, address, "Read"); TPR 145 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "Read"); TPR 157 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; TPR 223 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (address); TPR 224 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; TPR 225 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; TPR 236 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_read, cpu.TPR.TSR, address, "Read2 BR"); TPR 237 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "Read2 BR evn"); TPR 238 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, * (result+1), "Read2 BR odd"); TPR 265 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_read, cpu.TPR.TSR, address, "Read2"); TPR 266 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, * result, "Read2 evn"); TPR 267 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, * (result+1), "Read2 odd"); TPR 278 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; TPR 340 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (address); TPR 341 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; TPR 342 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; TPR 354 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_read, cpu.TPR.TSR, address, "Read8 BAR"); TPR 356 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, result[i], "Read8 BAR"); TPR 376 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_read, cpu.TPR.TSR, address, "Read8"); TPR 378 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, result [i], "Read8"); TPR 403 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; TPR 465 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (address); TPR 466 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; TPR 467 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; TPR 479 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_read, cpu.TPR.TSR, address, "ReadPage B"); TPR 481 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, result [i], "ReadPage B"); TPR 502 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_read, cpu.TPR.TSR, address, "ReadPage"); TPR 504 src/dps8/dps8_iefp.c HDBGAPURead (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, result [i], "ReadPage"); TPR 516 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; TPR 578 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (address); TPR 579 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; TPR 580 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; TPR 587 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_write, cpu.TPR.TSR, address, "Write BR"); TPR 588 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data, "Write BR"); TPR 600 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_write, cpu.TPR.TSR, address, "Write"); TPR 601 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data, "Write"); TPR 613 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; TPR 663 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (address); TPR 664 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; TPR 665 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; TPR 672 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_write, cpu.TPR.TSR, address, "Write2 BR"); TPR 673 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data[0], "Write2 BR evn"); TPR 674 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, data[1], "Write2 BR odd"); TPR 685 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_write, cpu.TPR.TSR, address, "Write2"); TPR 686 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data[0], "Write2 evn"); TPR 687 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA + 1, cpu.iefpFinalAddress + 1, data[1], "Write2 odd"); TPR 698 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; TPR 744 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (address); TPR 745 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; TPR 746 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; TPR 754 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_write, cpu.TPR.TSR, address, "Write1 BR"); TPR 755 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data, "Write1 BR"); TPR 768 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_write, cpu.TPR.TSR, address, "Write1"); TPR 769 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA, cpu.iefpFinalAddress, data, "Write1"); TPR 781 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; TPR 840 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (address); TPR 841 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; TPR 842 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; TPR 854 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_write, cpu.TPR.TSR, address, "Write8 BR"); TPR 856 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, data [i], "Write8 BR"); TPR 874 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_write, cpu.TPR.TSR, address, "Write8"); TPR 876 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, data [i], "Write8"); TPR 913 src/dps8/dps8_iefp.c cpu.TPR.CA = cpu.iefpFinalAddress = address; TPR 972 src/dps8/dps8_iefp.c cpu.TPR.CA = get_BAR_address (address); TPR 973 src/dps8/dps8_iefp.c cpu.TPR.TSR = cpu.PPR.PSR; TPR 974 src/dps8/dps8_iefp.c cpu.TPR.TRR = cpu.PPR.PRR; TPR 987 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_bar_write, cpu.TPR.TSR, address, "WritePage BR"); TPR 989 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, data [i], "WritePage BR"); TPR 1006 src/dps8/dps8_iefp.c HDBGIEFP (hdbgIEFP_write, cpu.TPR.TSR, address, "WritePage"); TPR 1008 src/dps8/dps8_iefp.c HDBGAPUWrite (cpu.TPR.TSR, cpu.TPR.CA + i, cpu.iefpFinalAddress + i, data [i], "WritePage"); TPR 1020 src/dps8/dps8_iefp.c if (cpu.TPR.CA & 1) // is odd? TPR 1022 src/dps8/dps8_iefp.c Read (cpu.TPR.CA, cpu.itxPair, INDIRECT_WORD_FETCH); TPR 1027 src/dps8/dps8_iefp.c Read2 (cpu.TPR.CA, cpu.itxPair, INDIRECT_WORD_FETCH); TPR 155 src/dps8/dps8_ins.c cpu.TPR.CA = cpu.ou.character_address; TPR 159 src/dps8/dps8_ins.c write_operand (cpu.TPR.CA, OPERAND_STORE); TPR 175 src/dps8/dps8_ins.c "%s a %d address %08o\n", __func__, i->b29, cpu.TPR.CA); TPR 192 src/dps8/dps8_ins.c SETHI (cpu.CY, cpu.TPR.CA); TPR 205 src/dps8/dps8_ins.c SETLO (cpu.CY, cpu.TPR.CA); TPR 238 src/dps8/dps8_ins.c cpu.TPR.CA = cpu.ou.character_address; TPR 243 src/dps8/dps8_ins.c read_operand (cpu.TPR.CA, ((i->info->flags & RMW) == RMW) ? OPERAND_RMW : OPERAND_READ); TPR 245 src/dps8/dps8_ins.c read_operand (cpu.TPR.CA, OPERAND_READ); TPR 253 src/dps8/dps8_ins.c if (cpu.TPR.CA & 1) TPR 254 src/dps8/dps8_ins.c Read (cpu.TPR.CA, &cpu.CY, OPERAND_READ); TPR 256 src/dps8/dps8_ins.c Read2 (cpu.TPR.CA, cpu.Ypair, OPERAND_READ); TPR 283 src/dps8/dps8_ins.c cpu.PPR.IC = cpu.TPR.CA; TPR 379 src/dps8/dps8_ins.c putbits36_3 (& words[2], 0, cpu.TPR.TRR); TPR 380 src/dps8/dps8_ins.c putbits36_15 (& words[2], 3, cpu.TPR.TSR); TPR 395 src/dps8/dps8_ins.c putbits36_6 (& words[3], 30, cpu.TPR.TBR); TPR 440 src/dps8/dps8_ins.c putbits36 (& words[5], 0, 18, cpu.TPR.CA); TPR 633 src/dps8/dps8_ins.c cpu.TPR.TRR = getbits36_3 (words[2], 0); TPR 634 src/dps8/dps8_ins.c cpu.TPR.TSR = getbits36_15 (words[2], 3); TPR 651 src/dps8/dps8_ins.c cpu.TPR.TBR = getbits36_6 (words[3], 30); TPR 1093 src/dps8/dps8_ins.c cpu.TPR.TRR = 0; TPR 1754 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "RPT/RPD CA %06o\n", cpu.TPR.CA); TPR 1786 src/dps8/dps8_ins.c cpu.TPR.CA = (cpu.rX[Xn] + offset) & AMASK; TPR 1787 src/dps8/dps8_ins.c cpu.rX[Xn] = cpu.TPR.CA; TPR 1824 src/dps8/dps8_ins.c cpu.TPR.TRR = cpu.PPR.PRR; TPR 1825 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PPR.PSR; TPR 1862 src/dps8/dps8_ins.c cpu.TPR.TBR = GET_PR_BITNO (n); TPR 1864 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PAR[n].SNR; TPR 1866 src/dps8/dps8_ins.c cpu.TPR.TRR = max (cpu.PAR[n].RNR, cpu.PPR.PRR); TPR 1868 src/dps8/dps8_ins.c cpu.TPR.TRR = max3 (cpu.PAR[n].RNR, cpu.TPR.TRR, cpu.PPR.PRR); TPR 1870 src/dps8/dps8_ins.c sim_debug (DBG_APPENDING, &cpu_dev, "doPtrReg: n=%o offset=%05o TPR.CA=%06o " "TPR.TBR=%o TPR.TSR=%05o TPR.TRR=%o\n", n, offset, cpu.TPR.CA, cpu.TPR.TBR, cpu.TPR.TSR, cpu.TPR.TRR); TPR 1885 src/dps8/dps8_ins.c cpu.TPR.TBR = 0; TPR 1887 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PPR.PSR; TPR 1888 src/dps8/dps8_ins.c cpu.TPR.TRR = 0; TPR 1909 src/dps8/dps8_ins.c cpu.iefpFinalAddress = cpu.TPR.CA; TPR 1956 src/dps8/dps8_ins.c cpu.last_write = cpu.TPR.CA; TPR 1978 src/dps8/dps8_ins.c cpu.TPR.TRR = cpu.PPR.PRR; TPR 1979 src/dps8/dps8_ins.c cpu.TPR.TSR = cpu.PPR.PSR; TPR 1980 src/dps8/dps8_ins.c cpu.TPR.TBR = 0; TPR 2020 src/dps8/dps8_ins.c cpu.TPR.CA = (cpu.rX[Xn] + cpu.cu.delta) & AMASK; TPR 2021 src/dps8/dps8_ins.c cpu.rX[Xn] = cpu.TPR.CA; TPR 2036 src/dps8/dps8_ins.c cpu.TPR.CA = (cpu.rX[Xn] + cpu.cu.delta) & AMASK; TPR 2037 src/dps8/dps8_ins.c cpu.rX[Xn] = cpu.TPR.CA; TPR 2048 src/dps8/dps8_ins.c cpu.TPR.CA = (cpu.rX[Xn] + cpu.cu.delta) & AMASK; TPR 2049 src/dps8/dps8_ins.c cpu.rX[Xn] = cpu.TPR.CA; TPR 2610 src/dps8/dps8_ins.c cpu.PR[n].RNR = cpu.TPR.TRR; TPR 2611 src/dps8/dps8_ins.c cpu.PR[n].SNR = cpu.TPR.TSR; TPR 2612 src/dps8/dps8_ins.c cpu.PR[n].WORDNO = cpu.TPR.CA; TPR 2613 src/dps8/dps8_ins.c SET_PR_BITNO (n, cpu.TPR.TBR); TPR 2788 src/dps8/dps8_ins.c cpu.PR[n].RNR = cpu.TPR.TRR; TPR 2856 src/dps8/dps8_ins.c cpu.rX[n] = cpu.TPR.CA; TPR 2861 src/dps8/dps8_ins.c SC_I_ZERO (cpu.TPR.CA == 0); TPR 2862 src/dps8/dps8_ins.c SC_I_NEG (cpu.TPR.CA & SIGN18); TPR 2922 src/dps8/dps8_ins.c cpu.PR[n].RNR = cpu.TPR.TRR; TPR 2923 src/dps8/dps8_ins.c cpu.PR[n].SNR = cpu.TPR.TSR; TPR 3053 src/dps8/dps8_ins.c word36 tmp36 = cpu.TPR.CA & 0177; // CY bits 11-17 TPR 3079 src/dps8/dps8_ins.c Read2 (cpu.TPR.CA, cpu.Ypair, RTCD_OPERAND_FETCH); TPR 3331 src/dps8/dps8_ins.c cpu.rA = cpu.TPR.TRR & MASK3; TPR 3332 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.TPR.TSR & MASK15) << 18; TPR 3337 src/dps8/dps8_ins.c cpu.rQ = cpu.TPR.TBR & MASK6; TPR 3338 src/dps8/dps8_ins.c cpu.rQ |= (word36) (cpu.TPR.CA & MASK18) << 18; TPR 3354 src/dps8/dps8_ins.c word36 tmp36 = cpu.TPR.CA & 0177; // CY bits 11-17 TPR 3407 src/dps8/dps8_ins.c SETHI (cpu.rA, cpu.TPR.CA); TPR 3411 src/dps8/dps8_ins.c SC_I_ZERO (cpu.TPR.CA == 0); TPR 3412 src/dps8/dps8_ins.c SC_I_NEG (cpu.TPR.CA & SIGN18); TPR 3418 src/dps8/dps8_ins.c SETHI (cpu.rQ, cpu.TPR.CA); TPR 3423 src/dps8/dps8_ins.c SC_I_ZERO (cpu.TPR.CA == 0); TPR 3424 src/dps8/dps8_ins.c SC_I_NEG (cpu.TPR.CA & SIGN18); TPR 3916 src/dps8/dps8_ins.c word36 tmp36 = cpu.TPR.CA & 0177; // CY bits 11-17 TPR 3945 src/dps8/dps8_ins.c word36 tmp36 = cpu.TPR.CA & 0177; // CY bits 11-17 TPR 3967 src/dps8/dps8_ins.c word18 tmp18 = cpu.TPR.CA & 0177; // CY bits 11-17 TPR 3995 src/dps8/dps8_ins.c word36 tmp36 = cpu.TPR.CA & 0177; // CY bits 11-17 TPR 4035 src/dps8/dps8_ins.c word36 tmp36 = cpu.TPR.CA & 0177; // CY bits 11-17 TPR 4073 src/dps8/dps8_ins.c word36 tmp36 = cpu.TPR.CA & 0177; // CY bits 11-17 TPR 4105 src/dps8/dps8_ins.c word36 tmp36 = cpu.TPR.CA & 0177; // CY bits 11-17 TPR 4141 src/dps8/dps8_ins.c word36 tmp36 = cpu.TPR.CA & 0177; // CY bits 11-17 TPR 4169 src/dps8/dps8_ins.c word36 tmp36 = cpu.TPR.CA & 0177; // CY bits 11-17 TPR 4193 src/dps8/dps8_ins.c word36 tmp36 = cpu.TPR.CA & 0177; // CY bits 11-17 TPR 6121 src/dps8/dps8_ins.c Read (cpu.TPR.CA, &cpu.CY, OPERAND_READ); TPR 6305 src/dps8/dps8_ins.c cpu.TPR.CA = get_BAR_address (cpu.TPR.CA); TPR 6360 src/dps8/dps8_ins.c cpu.PR[0].SNR = cpu.TPR.CA & MASK15; TPR 6369 src/dps8/dps8_ins.c cpu.PR[1].SNR = cpu.TPR.CA & MASK15; TPR 6378 src/dps8/dps8_ins.c cpu.PR[2].SNR = cpu.TPR.CA & MASK15; TPR 6387 src/dps8/dps8_ins.c cpu.PR[3].SNR = cpu.TPR.CA & MASK15; TPR 6396 src/dps8/dps8_ins.c cpu.PR[4].SNR = cpu.TPR.CA & MASK15; TPR 6405 src/dps8/dps8_ins.c cpu.PR[5].SNR = cpu.TPR.CA & MASK15; TPR 6414 src/dps8/dps8_ins.c cpu.PR[6].SNR = cpu.TPR.CA & MASK15; TPR 6423 src/dps8/dps8_ins.c cpu.PR[7].SNR = cpu.TPR.CA & MASK15; TPR 6436 src/dps8/dps8_ins.c cpu.PR[0].WORDNO = cpu.TPR.CA; TPR 6437 src/dps8/dps8_ins.c SET_PR_BITNO (0, cpu.TPR.TBR); TPR 6448 src/dps8/dps8_ins.c cpu.PR[1].WORDNO = cpu.TPR.CA; TPR 6449 src/dps8/dps8_ins.c SET_PR_BITNO (1, cpu.TPR.TBR); TPR 6460 src/dps8/dps8_ins.c cpu.PR[2].WORDNO = cpu.TPR.CA; TPR 6461 src/dps8/dps8_ins.c SET_PR_BITNO (2, cpu.TPR.TBR); TPR 6472 src/dps8/dps8_ins.c cpu.PR[3].WORDNO = cpu.TPR.CA; TPR 6473 src/dps8/dps8_ins.c SET_PR_BITNO (3, cpu.TPR.TBR); TPR 6484 src/dps8/dps8_ins.c cpu.PR[4].WORDNO = cpu.TPR.CA; TPR 6485 src/dps8/dps8_ins.c SET_PR_BITNO (4, cpu.TPR.TBR); TPR 6496 src/dps8/dps8_ins.c cpu.PR[5].WORDNO = cpu.TPR.CA; TPR 6497 src/dps8/dps8_ins.c SET_PR_BITNO (5, cpu.TPR.TBR); TPR 6508 src/dps8/dps8_ins.c cpu.PR[6].WORDNO = cpu.TPR.CA; TPR 6509 src/dps8/dps8_ins.c SET_PR_BITNO (6, cpu.TPR.TBR); TPR 6520 src/dps8/dps8_ins.c cpu.PR[7].WORDNO = cpu.TPR.CA; TPR 6521 src/dps8/dps8_ins.c SET_PR_BITNO (7, cpu.TPR.TBR); TPR 6566 src/dps8/dps8_ins.c cpu.PR[n].RNR = max3 (Crr, cpu.SDW->R1, cpu.TPR.TRR); TPR 6739 src/dps8/dps8_ins.c cpu_port_num = (cpu.TPR.CA >> 15) & 07; TPR 6741 src/dps8/dps8_ins.c cpu_port_num = (cpu.TPR.CA >> 15) & 03; TPR 7464 src/dps8/dps8_ins.c DPS8M_ (level = (cpu.TPR.CA >> 4) & 03;) TPR 7502 src/dps8/dps8_ins.c DPS8M_ (level = (cpu.TPR.CA >> 4) & 03;) TPR 7522 src/dps8/dps8_ins.c DPS8M_ (level = (cpu.TPR.CA >> 4) & 03;) TPR 7560 src/dps8/dps8_ins.c DPS8M_ (level = (cpu.TPR.CA >> 5) & 03;) TPR 7628 src/dps8/dps8_ins.c DPS8M_ (if (cpu.TPR.CA != 0000002 && (cpu.TPR.CA & 3) != 0) TPR 7629 src/dps8/dps8_ins.c sim_warn ("CAMP ignores enable/disable %06o\n", cpu.TPR.CA);) TPR 7630 src/dps8/dps8_ins.c if ((cpu.TPR.CA & 3) == 02) TPR 7632 src/dps8/dps8_ins.c else if ((cpu.TPR.CA & 3) == 01) TPR 7672 src/dps8/dps8_ins.c DPS8M_ (if (cpu.TPR.CA != 0000006 && (cpu.TPR.CA & 3) != 0) TPR 7673 src/dps8/dps8_ins.c sim_warn ("CAMS ignores enable/disable %06o\n", cpu.TPR.CA);) TPR 7674 src/dps8/dps8_ins.c if ((cpu.TPR.CA & 3) == 02) TPR 7676 src/dps8/dps8_ins.c else if ((cpu.TPR.CA & 3) == 01) TPR 7695 src/dps8/dps8_ins.c DPS8M_ (cpu_port_num = (cpu.TPR.CA >> 15) & 03;) TPR 7696 src/dps8/dps8_ins.c L68_ (cpu_port_num = (cpu.TPR.CA >> 15) & 07;) TPR 7754 src/dps8/dps8_ins.c DPS8M_ (cpu_port_num = (cpu.TPR.CA >> 10) & 03;) TPR 7755 src/dps8/dps8_ins.c L68_ (cpu_port_num = (cpu.TPR.CA >> 10) & 07;) TPR 7804 src/dps8/dps8_ins.c cpu.rA = PROM[cpu.TPR.CA & 1023]; TPR 7808 src/dps8/dps8_ins.c uint select = cpu.TPR.CA & 0x7; TPR 8207 src/dps8/dps8_ins.c DPS8M_ (cpu_port_num = (cpu.TPR.CA >> 15) & 03;) TPR 8208 src/dps8/dps8_ins.c L68_ (cpu_port_num = (cpu.TPR.CA >> 15) & 07;) TPR 8235 src/dps8/dps8_ins.c DPS8M_ (cpu_port_num = (cpu.TPR.CA >> 15) & 03;) TPR 8236 src/dps8/dps8_ins.c L68_ (cpu_port_num = (cpu.TPR.CA >> 15) & 07;) TPR 8266 src/dps8/dps8_ins.c DPS8M_ (cpu_port_num = (cpu.TPR.CA >> 10) & 03;) TPR 8267 src/dps8/dps8_ins.c L68_ (cpu_port_num = (cpu.TPR.CA >> 10) & 07;) TPR 9379 src/dps8/dps8_ins.c sim_debug (DBG_APPENDING, & cpu_dev, "absa CA:%08o\n", cpu.TPR.CA); TPR 9385 src/dps8/dps8_ins.c * result = ((word36) (cpu.TPR.CA & MASK18)) << 12; // 24:12 format TPR 4116 src/dps8/dps8_sys.c { "cpus[].TPR", SYM_STRUCT_OFFSET, SYM_PTR, offsetof (cpu_state_t, TPR) },