1 " ***********************************************************
2 " * *
3 " * Copyright, C Honeywell Information Systems Inc., 1986 *
4 " * *
5 " ***********************************************************
6
7 " HISTORY COMMENTS:
8 " 1) change86-07-15Ginter, approve86-07-15MCR7287,
9 " audit86-07-16Mabey:
10 " Bug fixes for the MR12.0 release of the compiler
11 " END HISTORY COMMENTS
12
13 " pl/1 macro definition segment
14 "
15 " Modified: 15 Feb 1978 by PCK to implement optionsmain and the stop statement
16 " Modified: 29 Mar 1978 by PCK to implement macro for storing sp
17 " Modified: 16 June 1978 by PCK to implement size checking for unsigned binary
18 " Modified: 25 Aug 1978 by RAB to help fix 1780
19 " Modified: 19 Dec 1978 by RAB to improve ref cnt in bound_ck op
20 " Modified: 24 Apr 1979 by PCK to implement 4-bit decimal
21 " Modified: 16 Jul 1979 by RAB to remove absfx1_atm
22 " Modified: 26 Jul 1979 by PCK to implement rank and byte builtins
23 " Modified 790801 by PG to remove dvfx2, dvfx3, j_3_way*, and validate_pic.
24 " Modified 790817 by RAB to improve code for a & ^ b where a and b are long strings.
25 " Modified 790821 by RAB so that move test_andnot_1 use a fill of 1 to take care of source
26 " being shorter than the target.
27 " Modified December '79 by BSG for index_rev_* ops, and removing some superfluous
28 " indications of sr erasing.
29 " Modified 18 June 1980 by M. N. Davidoff to indicate that ix_chars and ix_rev_chars erase sr.
30 " This turns out not to be superfluous. bug 1970
31 " Modified 11 September 81 by EBush to add prepare_call_long and
32 " prepare_quick_call_long.
33 " Modified 26 July 82 BIM wordno and segno
34 " Modified 04 January 85 Keith Loepere to get ringno in baseptr right
35 " Modified 20 June 86 MM unpack_fl1 modifies A and Q regs
36 "
37 name macro_table
38 segdef macro_table
39 segdef macro_count
40 segdef eax_array
41 "
42 bool op_vec,551 from assembly of pl1_operators
43 bool mod2_tab,543
44 bool mod4_tab,545
45 bool tct_mask_,242
46 bool ptr_mask_,460
47 bool fx1_to_fl2_,465 ..
48 bool fx2_to_fl2_,466 ..
49 bool blanks_,440 ..
50 bool r_l_a_,474 ..
51 bool r_g_s_,477 ..
52 bool r_g_a_,503 ..
53 bool r_l_s_,507 ..
54 bool r_e_as_,512 ..
55 bool r_ne_as_,515 ..
56 bool r_le_a_,520 ..
57 bool r_ge_s_,524 ..
58 bool r_ge_a_,527 ..
59 bool r_le_s_,532 ..
60 bool set_stack_,540 ..
61 bool ones,110 ..
62 equ lg1,50
63 "
64 equ ops_ptr,28
65 equ csl_vector,-114
66 equ bitno_to_charno_,-790
67 "
68 equ ps_ptr,42
69 "
70 " The following bits are used to indicate which register are changed by a macro
71 "
72 bool a,400000
73 bool q,200000
74 bool aq,a+q
75 bool sr,100000
76 bool cr,040000
77 bool dr,020000
78 bool x0,010000
79 bool x1,004000
80 bool x2,002000
81 bool x3,001000
82 bool x4,000400
83 bool x5,000200
84 bool x6,000100
85 bool x7,000040
86 bool bp,000020
87 bool lp,000010
88 bool indices,x0+x1+x2+x3+x4+x5+x6+x7
89 bool bases,bp+lp
90 bool all,aq+indices+bases+cr+dr+sr
91 "
92 " The following bits indicate if a particular type of address modification
93 " is not allowed on arg1 of a macro
94 "
95 bool no_al,000004
96 bool no_ql,000002
97 bool perm,000001
98 "
99 " The following bits are used for expanding EIS macros
100 "
101 bool cat,400000
102 bool l_in_q,200000
103 bool compare,100000
104 bool xec_eis,40000
105 "
106 eax_array:
107 eax0 0,ql
108 eax1 0,ql
109 eax2 0,ql
110 eax3 0,ql
111 eax4 0,ql
112 eax5 0,ql
113 eax6 0,ql
114 eax7 0,ql
115 eax0 0,al
116 eax1 0,al
117 eax2 0,al
118 eax3 0,al
119 eax4 0,al
120 eax5 0,al
121 eax6 0,al
122 eax7 0,al
123 eax0 0,au
124 eax1 0,au
125 eax2 0,au
126 eax3 0,au
127 eax4 0,au
128 eax5 0,au
129 eax6 0,au
130 eax7 0,au
131 "
132 equ arg1,1*4096
133 equ arg2,2*4096
134 equ arg3,3*4096
135 equ arg4,4*4096
136 "
137 " The following symbols are used to define the types of operands for EIS instructions
138 "
139 bool addr,000000
140 bool dec,010000
141 bool char,020000
142 bool bit,030000
143 bool char4,040000
144 "
145 " The following bits are used to define the bool values for csl and csr instructions
146 "
147 bool move,03
148 bool and,01
149 bool or,07
150 bool xor,06
151 bool not,14
152 "
153 bool blank,040
154 bool plus,053
155 "
156 macro_table:
157 lda 0 lda 1
158 zero a
159 zero lda_ldq,2 lda_ldq 2
160 zero aq+no_al
161 ldaq 0 ldaq 3
162 zero aq
163 sta 0 sta 4
164 zero 0
165 zero sta_stq,2 sta_stq 5
166 zero 0
167 staq 0 staq 6
168 zero 0
169 ldq 0 ldfx1 7
170 zero q
171 ldaq 0 ldfx2 8
172 zero aq
173 fld 0 ldfl1 9
174 zero aq
175 dfld 0 ldfl2 10
176 zero aq
177 lcq 0 lcfx1 11
178 zero q
179 lcaq 0 lcfx2 12
180 zero aq
181 zero lcfl1,2 lcfl1 13
182 zero aq
183 zero lcfl2,2 lcfl2 14
184 zero aq
185 stq 0 stfx1 15
186 zero 0
187 staq 0 stfx2 16
188 zero 0
189 fst 0 stfl1 17
190 zero 0
191 dfst 0 stfl2 18
192 zero 0
193 adq 0 adfx1 19
194 zero q
195 adaq 0 adfx2 20
196 zero aq
197 adl 0 adfx3 21
198 zero aq
199 sbq 0 sbfx1 22
200 zero q
201 sbaq 0 sbfx2 23
202 zero aq
203 zero sbfx3,2 sbfx3 24
204 zero aq
205 mpy 0 mpfx1 25
206 zero aq
207 div 0 dvfx1 26
208 zero aq
209 fad 0 adfl1 27
210 zero aq
211 dfad 0 adfl2 28
212 zero aq
213 fsb 0 sbfl1 29
214 zero aq
215 dfsb 0 sbfl2 30
216 zero aq
217 fmp 0 mpfl1 31
218 zero aq
219 dfmp 0 mpfl2 32
220 zero aq
221 fdv 0 dvfl1 33
222 zero aq
223 dfdv 0 dvfl2 34
224 zero aq
225 fdi 0 difl1 35
226 zero aq
227 dfdi 0 difl2 36
228 zero aq
229 zero neg,1 neg 37
230 zero a
231 zero negl,1 negl 38
232 zero aq
233 zero fneg,1 fneg 39
234 zero aq
235 ana 0 ana 40
236 zero a
237 zero ana_anq,2 ana_anq 41
238 zero aq
239 anaq 0 anaq 42
240 zero aq
241 ansa 0 ansa 43
242 zero 0
243 zero ansa_ansq,2 ansa_ansq 44
244 zero 0
245 zero ansa_ansq,2 ansaq 45
246 zero 0
247 ora 0 ora 46
248 zero a
249 zero ora_orq,2 ora_orq 47
250 zero aq
251 oraq 0 oraq 48
252 zero aq
253 orsa 0 orsa 49
254 zero 0
255 zero orsa_orsq,2 orsa_orsq 50
256 zero 0
257 zero orsa_orsq,2 orsaq 51
258 zero 0
259 era 0 era 52
260 zero a
261 zero era_erq,2 era_erq 53
262 zero aq
263 eraq 0 eraq 54
264 zero aq
265 ersa 0 ersa 55
266 zero 0
267 zero ersa_ersq,2 ersa_ersq 56
268 zero 0
269 zero ersa_ersq,2 ersaq 57
270 zero 0
271 zero clear_aq,1 clear_aq 58
272 zero aq
273 zero clear_q,1 clear_q 59
274 zero q
275 eppbp 0 load_pt 60
276 zero 0
277 spribp 0 store_pt 61
278 zero 0
279 lrl 0 lrl 62
280 zero q
281 lls 0 lls 63
282 zero q
283 lxl0 0 lxl0 64
284 zero 0
285 lxl1 0 lxl1 65
286 zero 0
287 lxl2 0 lxl2 66
288 zero 0
289 lxl3 0 lxl3 67
290 zero 0
291 lxl4 0 lxl4 68
292 zero 0
293 lxl5 0 lxl5 69
294 zero 0
295 lxl6 0 lxl6 70
296 zero 0
297 lxl7 0 lxl7 71
298 zero 0
299 ldx0 0 ldx0 72
300 zero 0
301 ldx1 0 ldx1 73
302 zero 0
303 ldx2 0 ldx2 74
304 zero 0
305 ldx3 0 ldx3 75
306 zero 0
307 ldx4 0 ldx4 76
308 zero 0
309 ldx5 0 ldx5 77
310 zero 0
311 ldx6 0 ldx6 78
312 zero 0
313 ldx7 0 ldx7 79
314 zero 0
315 adx0 0 adx0 80
316 zero 0
317 adx1 0 adx1 81
318 zero 0
319 adx2 0 adx2 82
320 zero 0
321 adx3 0 adx3 83
322 zero 0
323 adx4 0 adx4 84
324 zero 0
325 adx5 0 adx5 85
326 zero 0
327 adx6 0 adx6 86
328 zero 0
329 adx7 0 adx7 87
330 zero 0
331 zero fx1_to_fx2,2 fx1_to_fx2 88
332 zero aq
333 zero alloc_char_temp,1 alloc_char_temp 89
334 zero a+bp+sr
335 zero alloc_bit_temp,1 alloc_bit_temp 90
336 zero a+bp+sr
337 zero alloc_temp,1 alloc_temp 91
338 zero aq+bp
339 zero realloc_char_temp,1 realloc_char_temp 92
340 zero aq+bp+sr
341 zero realloc_bit_temp,1 realloc_bit_temp 93
342 zero aq+bp+sr
343 zero sqrt_mac,1 sqrt_mac 94
344 zero 0
345 zero dsqrt_mac,1 dsqrt_mac 95
346 zero 0
347 zero test_bits,3 test_bits 96
348 zero 0,compare
349 zero leave_begin_block,1 leave_begin_block 97
350 zero all
351 zero move_chars,3 move_chars 98
352 zero 0
353 zero move_bits,3 move_bits 99
354 zero 0
355 zero move_cs_load_1,3 move_cs_load_1 100
356 zero 0
357 zero move_bs_load_1,3 move_bs_load_1 101
358 zero 0
359 zero move_cs_load_2,3 move_cs_load_2 102
360 zero 0
361 zero move_bs_load_2,3 move_bs_load_2 103
362 zero 0
363 zero translate_2,1 translate_2 104
364 zero sr+cr+bp+aq
365 zero translate_3,1 translate_3 105
366 zero sr+cr+bp+aq
367 zero shift_and_mask_1,3 shift_and_mask_1 106
368 zero a
369 zero shift_and_mask_2,3 shift_and_mask_2 107
370 zero aq
371 zero b2c_mac,2 b2c_mac 108
372 zero aq
373 zero b2w_mac,2 b2w_mac 109
374 zero aq
375 zero c2b_mac,1 c2b_mac 110
376 zero aq
377 zero inline_translate inline_translate 111
378 zero 0
379 zero c2w_mac,2 c2w_mac 112
380 zero aq
381 zero pf_mac,2 pf_mac 113
382 zero aq
383 zero so_mac,2 so_mac 114
384 zero aq+bp
385 zero mod_bit_mac,1 mod_bit_mac 115
386 zero aq
387 zero mod2_mac,2 mod2_mac 116
388 zero q
389 zero mod4_mac,2 mod4_mac 117
390 zero q
391 zero mod8_mac,2 mod8_mac 118
392 zero q
393 zero mod16_mac,2 mod16_mac 119
394 zero q
395 zero ext_and_1,1 ext_and_1 120
396 zero aq+bp
397 zero ext_and_2,1 ext_and_2 121
398 zero aq+bp
399 zero fx1_to_fl2,1 fx1_to_fl2 122
400 zero aq
401 zero fx2_to_fl2,2 fx2_to_fl2 123
402 zero aq
403 zero fl2_to_fx1,1 fl2_to_fx1 124
404 zero aq
405 zero fl2_to_fx2,1 fl2_to_fx2 125
406 zero aq
407 zero absfx1,3 absfx1 126
408 zero q
409 zero absfx2,2 absfx2 127
410 zero aq
411 zero absfl1,2 absfl1 128
412 zero aq
413 zero absfl2,2 absfl2 129
414 zero aq
415 zero 0 fx2_to_fx1 130
416 zero 0
417 zero longbs_to_bs18,1 longbs_to_bs18 131
418 zero aq+bp
419 zero longbs_to_fx2,1 longbs_to_fx2 132
420 zero aq+bp
421 zero longbs_to_fl2,3 longbs_to_fl2 133
422 zero aq+bp
423 als 0 als 134
424 zero 0
425 zero blank_q,1 blank_q 135
426 zero aq
427 cmpq 0 cpfx1 136
428 zero 0
429 cmpaq 0 cpfx2 137
430 zero 0
431 fcmp 0 cpfl1 138
432 zero 0
433 dfcmp 0 cpfl2 139
434 zero 0
435 cmpa 0 cpcs1 140
436 zero 0
437 zero cpcs1_odd,3 cpcs1+1 141
438 zero 0
439 cmpaq 0 cpcs1+2 142
440 zero 0
441 cmpa 0 cpcs1+3 143
442 zero 0
443 zero cpcs1_odd,3 cpcs1+4 144
444 zero 0
445 cmpaq 0 cpcs1+5 145
446 zero 0
447 zero cpcs_ext1,1 cpcs1+6 146
448 zero aq+bp
449 zero cpcs_ext2,1 cpcs1+7 147
450 zero aq+bp
451 zero comp_bits,1 comp_bits 148
452 zero aq+bp
453 cmpa 0 cpbs1 149
454 zero 0
455 zero cpbs1_odd,3 cpbs1+1 150
456 zero 0
457 zero cpbs1_even,2 cpbs1+2 151
458 zero 0
459 zero cpbs2,3 cpbs1+3 152
460 zero 0
461 zero cpbs2_odd,3 cpbs1+4 153
462 zero 0
463 cmpaq 0 cpbs1+5 154
464 zero 0
465 zero cpbs_ext1,1 cpbs1+6 155
466 zero aq+bp
467 zero cpbs_ext2,1 cpbs1+7 156
468 zero aq+bp
469 zero test_translate,9 test_translate 157
470 zero q,compare
471 zero test_trans_rev,9 test_trans_rev 158
472 zero q,compare
473 zero r_l_a,1 r_l_a 159
474 zero a
475 zero r_l_s,1 r_l_s 160
476 zero a
477 zero r_g_a,1 r_g_a 161
478 zero a
479 zero r_g_s,1 r_g_s 162
480 zero a
481 zero r_e_as,1 r_e_as 163
482 zero a
483 zero r_ne_as,1 r_ne_as 164
484 zero a
485 zero r_le_a,1 r_le_a 165
486 zero a
487 zero r_le_s,1 r_le_s 166
488 zero a
489 zero r_ge_a,1 r_ge_a 167
490 zero a
491 zero r_ge_s,1 r_ge_s 168
492 zero a
493 tra 0 tra 169
494 zero 0
495 zero tra_ext_1,1 tra_ext_1 170
496 zero 0
497 zero tra_ext_2,1 tra_ext_2 171
498 zero 0
499 zero load_pt_reg,2 load_pt_reg 172
500 zero 0
501 zero make_lv,3 make_lv 173
502 zero bp+cr+aq
503 zero store_lv,2 store_lv 174
504 zero aq+bp
505 zero set_stack,2 set_stack 175
506 zero aq+bp
507 tmi 0 j_l_a 176
508 zero 0
509 tnc 0 j_l_s 177
510 zero 0
511 tpnz 0 j_g_a 178
512 zero 0
513 zero j_g_s,2 j_g_s 179
514 zero 0
515 tze 0 j_e_as 180
516 zero 0
517 tnz 0 j_ne_as 181
518 zero 0
519 tmoz 0 j_le_a 182
520 zero 0
521 zero j_le_s,2 j_le_s 183
522 zero 0
523 tpl 0 j_ge_a 184
524 zero 0
525 trc 0 j_ge_s 185
526 zero 0
527 zero cp_chars,3 cp_chars 186
528 zero 0,compare
529 zero cp_bits,3 cp_bits 187
530 zero 0,compare
531 zero ftn_read,1 ftn_read 188
532 zero all
533 zero ftn_write,1 ftn_write 189
534 zero all
535 zero ftn_manip,1 ftn_manip 190
536 zero all
537 zero ftn_scalar_xmit,2 ftn_scalar_xmit 191
538 zero x6+bases
539 zero ftn_array_xmit,2 ftn_array_xmit 192
540 zero x6+bases
541 zero ftn_term,1 ftn_term 193
542 zero all
543 zero reset_stack,1 reset_stack 194
544 zero x0
545 zero get_ops_mac,4 get_ops_mac 195
546 zero 0
547 zero entry_macro,3 entry_macro 196
548 zero all
549 zero enter_begin_block,2 enter_begin_block 197
550 zero 0
551 zero return_mac,1 return_mac 198
552 zero 0
553 zero inline_search,7 inline_search 199
554 zero q,compare
555 zero cat_realloc_char,1 cat_realloc_char 200
556 zero aq+bp
557 zero cat_realloc_bit,1 cat_realloc_bit 201
558 zero aq+bp
559 zero enter_prologue,1 enter_prologue 202
560 zero 0
561 zero leave_prologue,2 leave_prologue 203
562 zero x0
563 zero call_prologue,1 call_prologue 204
564 zero all
565 zero load_offsets,2 load_offsets 205
566 zero q
567 zero store_offsets,2 store_offsets 206
568 zero q
569 zero inline_verify,7 inline_verify 207
570 zero q,compare
571 zero stac_mac,1 stac_mac 208
572 zero aq+bp
573 zero sign_mac,1 sign_mac 209
574 zero aq
575 zero qls_9,1 qls_9 210
576 zero 0
577 zero set_bit_addr,1 set_bit_addr 211
578 zero 0
579 zero pointer_mac_bs,1 pointer_mac_bs 212
580 zero bp
581 zero pointer_mac_fx,1 pointer_mac_fx 213
582 zero bp
583 zero addrel_mac_bs,1 addrel_mac_bs 214
584 zero bp
585 zero addrel_mac_fx,1 addrel_mac_fx 215
586 zero bp
587 zero baseptr_mac_bs,2 baseptr_mac_bs 216
588 zero bp
589 zero baseptr_mac_fx,2 baseptr_mac_fx 217
590 zero bp
591 zero cat_move_chars,3 cat_move_chars 218
592 zero 0,cat
593 zero cat_move_bits,3 cat_move_bits 219
594 zero 0,cat
595 zero cmp_suffix_1,2 cmp_suffix_1 220
596 zero 0
597 zero move_numeric_edit,4 move_numeric_edit 221
598 zero 0
599 zero dtb_1,3 dtb_1 222
600 zero 0
601 zero dtb_2,3 dtb_2 223
602 zero 0
603 zero btd_1,3 btd_1 224
604 zero 0
605 zero btd_2,3 btd_2 225
606 zero 0
607 zero cpbs3,3 cpbs3 226
608 zero 0,compare
609 zero sin_mac,1 sin_mac 227
610 zero 0
611 zero dsin_mac,1 dsin_mac 228
612 zero 0
613 zero save_string_aq,3 save_string_aq 229
614 zero 0
615 zero call_ent_var,1 call_ent_var 230
616 zero 0
617 zero call_ent_var_d,1 call_ent_var_desc 231
618 zero 0
619 zero call_ext_in,1 call_ext_in 232
620 zero 0
621 zero call_ext_in_d,1 call_ext_in_desc 233
622 zero 0
623 zero call_ext_out,1 call_ext_out 234
624 zero 0
625 zero call_ext_out_d,1 call_ext_out_desc 235
626 zero 0
627 zero call_int_this,1 call_int_this 236
628 zero 0
629 zero call_int_this_d,1 call_int_this_desc 237
630 zero 0
631 zero call_int_other,1 call_int_other 238
632 zero 0
633 zero call_int_other_d,1 call_int_other_desc 239
634 zero 0
635 zero segno_mac,2 segno_mac 240
636 zero q
637 zero baseno_mac,1 baseno_mac 241
638 zero a
639 zero off_mac_easy,2 off_mac_easy 242
640 zero aq
641 zero off_mac_easy_pk,2 off_mac_easy_pk 243
642 zero aq
643 zero args_by_2_mac,2 args_by_2_mac 244
644 zero q
645 arl 0 arl 245
646 zero 0
647 zero bound_ck_mac bound_ck_mac 246
648 zero aq
649 zero min_fx1,3 min_fx1 247
650 zero q
651 zero min_fx2,3 min_fx2 248
652 zero aq
653 zero min_fl1,3 min_fl1 249
654 zero aq
655 zero min_fl2,3 min_fl2 250
656 zero aq
657 zero max_fx1,3 max_fx1 251
658 zero q
659 zero max_fx2,3 max_fx2 252
660 zero aq
661 zero max_fl1,3 max_fl1 253
662 zero aq
663 zero max_fl2,3 max_fl2 254
664 zero aq
665 zero neg_q,2 neg_q 255
666 zero q
667 zero ix_rev_chars,1 ix_rev_chars 256
668 zero aq+sr
669 zero copy_mac,3 copy_mac 257
670 zero 0,l_in_q
671 zero mpfx2,2 mpfx2 258
672 zero aq+perm
673 zero mpfx3,2 mpfx3 259
674 zero aq+perm
675 div 0 dvfx1 260
676 zero aq
677 zero test_andnot_0,3 test_andnot_0 261
678 zero 0,compare
679 zero test_andnot_1,3 test_andnot_1 262
680 zero 0,compare
681 zero substr_ck_mac substr_ck_mac 263
682 zero aq
683 zero move_and,3 move_and 264
684 zero 0
685 zero sind_mac,1 sind_mac 265
686 zero 0
687 zero dsind_mac,1 dsind_mac 266
688 zero 0
689 zero test_and,3 test_and 267
690 zero 0,compare
691 zero set_ptr_to,2 set_ptr_to 268
692 zero 0
693 zero mdfl1,2 mdfl1 269
694 zero aq+sr+perm
695 zero mdfl2,2 mdfl2 270
696 zero aq+sr+perm
697 zero mdfx1,2 mdfx1 271
698 zero aq+sr+perm
699 zero mdfx2,2 mdfx2 272
700 zero aq+sr+perm
701 zero mdfx3,2 mdfx3 273
702 zero aq+sr+perm
703 zero mdfx4,2 mdfx4 274
704 zero aq+sr+perm
705 zero make_desc_mac,2 make_desc_mac 275
706 zero q
707 stcq 0 set_desc_size 276
708 zero 0
709 orsq 0 insert_adj 277
710 zero q
711 zero pic_test,4 pic_test 278
712 zero dr,compare
713 zero quick_desc_size,2 quick_desc_size 279
714 zero q
715 zero compare_files,3 compare_files 280
716 zero aq
717 zero pad_chars,1 pad_chars 281
718 zero aq
719 zero pad_bits,1 pad_bits 282
720 zero aq
721 zero load_link_pt,1 load_link_pt 283
722 zero 0
723 zero get_desc_size,4 get_desc_size 284
724 zero q
725 zero assign_label_const,2 assign_label_const 285
726 zero 0
727 zero load_display_ptr,1 load_display_ptr 286
728 zero 0
729 zero walk_display_ptr,1 walk_display_ptr 287
730 zero 0
731 zero begin_return,2 begin_return_mac 288
732 zero all
733 zero signal_mac,2 signal_mac 289
734 zero aq
735 zero revert_mac,1 revert_mac 290
736 zero 0
737 zero enable_mac,4 enable_mac 291
738 zero all
739 zero get_area_mod_8,5 get_area_mod_8 292
740 zero q
741 zero fx1_to_bs,4 fx1_to_bs 293
742 zero a
743 zero fx2_to_bs,4 fx2_to_bs 294
744 zero aq
745 stba 0 stba 295
746 zero 0
747 stbq 0 stbq 296
748 zero 0
749 stca 0 stca 297
750 zero 0
751 stcq 0 stcq 298
752 zero 0
753 zero quick_return,1 quick_return 299
754 zero 0
755 zero fetch_chars,1 fetch_chars 300
756 zero aq
757 zero fetch_bits,1 fetch_bits 301
758 zero aq
759 zero mod_byte_mac,3 mod_byte_mac 302
760 zero aq
761 zero mod_byte_mac_exp,3 mod_byte_mac_exp 303
762 zero aq
763 zero move_or,3 move_or 304
764 zero 0
765 zero support_mac,1 support_mac 305
766 zero a
767 zero a_to_x0,1 a_to_x0 306
768 zero x0
769 zero zero_mac_p_1,1 zero_mac_p_1 307
770 zero 0
771 stz 0 zero_mac 308
772 zero 0
773 aos 0 aos_mac 309
774 zero 0
775 asq 0 incr_mac 310
776 zero 0
777 ssq 0 diff_mac 311
778 zero 0
779 nop 0 nop_mac 312
780 zero 0
781 zero get_term_mac,1 get_term_mac 313
782 zero bases+x6
783 zero put_term_mac,1 put_term_mac 314
784 zero bases+x6
785 zero is_label_const,2 is_label_const 315
786 zero 0
787 zero mod_half_mac,3 mod_half_mac 316
788 zero aq
789 zero mod_half_mac_exp,3 mod_half_mac_exp 317
790 zero aq
791 zero beg_ev_proc,5 beg_ev_proc 318
792 zero 0
793 zero end_ev_proc,2 end_ev_proc 319
794 zero 0
795 zero symtab_mac,4 symtab_mac 320
796 zero 0
797 zero io_signal_mac,2 io_signal_mac 321
798 zero aq
799 zero end_ev_label,3 end_ev_label 322
800 zero 0
801 cana 0 cana 323
802 zero 0
803 canaq 0 canaq 324
804 zero 0
805 zero compare_labels,7 compare_labels 325
806 zero aq
807 zero pointer_mac_const,1 point_mac_const 326
808 zero bp
809 zero addrel_mac_const,1 addrel_mac_const 327
810 zero bp
811 zero put_data,1 put_data 328
812 zero x6+bases
813 zero cos_mac,1 cos_mac,1 329
814 zero 0
815 zero dcos_mac,1 dcos_mac 330
816 zero 0
817 zero test_or,3 test_or 331
818 zero 0,compare
819 lda 0 test_lda 332
820 zero a
821 zero test_lda_ldq,3 test_lda_ldq 333
822 zero aq+no_al
823 ldaq 0 test_ldaq 334
824 zero aq
825 zero move_not,3 move_not 335
826 zero 0
827 zero cosd_mac,1 cosd_mac 336
828 zero 0
829 zero dcosd_mac,1 dcosd_mac 337
830 zero 0
831 zero test_not,3 test_not 338
832 zero 0,compare
833 zero init_ps_mac,3 init_ps_mac 339
834 zero 0
835 zero init_sslp,2 init_sslp 340
836 zero 0
837 zero move_xor,3 move_xor 341
838 zero 0
839 zero tan_mac,1 tan_mac 342
840 zero 0
841 zero dtan_mac,1 dtan_mac 343
842 zero 0
843 zero test_xor,3 test_xor 344
844 zero 0,compare
845 sxl0 0 sxl0 345
846 zero 0
847 sxl1 0 sxl1 346
848 zero 0
849 sxl2 0 sxl2 347
850 zero 0
851 sxl3 0 sxl3 348
852 zero 0
853 sxl4 0 sxl4 349
854 zero 0
855 sxl5 0 sxl5 350
856 zero 0
857 sxl6 0 sxl6 351
858 zero 0
859 sxl7 0 sxl7 352
860 zero 7
861 eax0 0 eax0 353
862 zero 0
863 eax1 0 eax1 354
864 zero 0
865 eax2 0 eax2 355
866 zero 0
867 eax3 0 eax3 356
868 zero 0
869 eax4 0 eax4 357
870 zero 0
871 eax5 0 eax5 358
872 zero 0
873 eax6 0 eax6 359
874 zero 0
875 eax7 0 eax7 360
876 zero 0
877 epplp 0 load_lp 361
878 zero 0
879 zero prepare_call,2 prepare_call 362
880 zero aq
881 zero prepare_quick_call,3 prepare_quick_call 363
882 zero bp+aq
883 zero quick_entry,1 quick_entry 364
884 zero 0
885 zero quick_entry_args,2 quick_entry_args 365
886 zero 0
887 zero quick_entry_desc,4 quick_entry_desc 366
888 zero 0
889 zero quick_call,1 quick_call 367
890 zero 0
891 zero verify_rev_chars,1 verify_rev_chars 368
892 zero aq+sr
893 zero search_rev_chars,1 search_rev_chars 369
894 zero aq+sr
895 eaa 0 eaa 371
896 zero a
897 eaq 0 eaq 371
898 zero q
899 llr 0 llr 372
900 zero aq
901 a9bdx 0|0 setcharno_mac 373
902 zero 0
903 abdx 0|0 setbitno_mac 374
904 zero 0
905 zero 0 UNUSED 375
906 zero 0
907 epaq 0 epaq 376
908 zero aq
909 zero 0 UNUSED 377
910 zero 0
911 zero 0 UNUSED 378
912 zero 0
913 zero assign_lab_to_int,2 assign_lab_to_int 379
914 zero q
915 zero load_logical,2 load_logical 380
916 zero a
917 zero store_logical,3 store_logical 381
918 zero 0
919 zero not_logical,1 not_logical 382
920 zero a
921 zero mask_logical,1 mask_logical 383
922 zero a
923 zero trunc_fl,1 trunc_fl 384
924 zero aq
925 zero tran_sign_fx1,2 tran_sign_fx1 385
926 zero aq+perm
927 zero tran_sign_fl,2 tran_sign_fl 386
928 zero aq+perm
929 zero fort_mod_fx1,2 fort_mod_fx1 387
930 zero aq
931 zero fort_mod_fl1,2 fort_mod_fl1 388
932 zero aq+perm
933 zero 0 UNUSED 389
934 zero 0
935 zero rflb1_to_cflb1,3 rflb1_to_cflb1 390
936 zero aq
937 zero move_andnot_0,3 move_andnot_0 391
938 zero 0,0
939 zero move_andnot_1,3 move_andnot_1 392
940 zero 0,0
941 zero store_bp_hard,3 store_bp_hard 393
942 zero aq
943 zero atm_rflb1_to_cflb1,2 atm_rflb1_to_cflb1 394
944 zero aq
945 zero rfb1_to_cflb1,1 rfb1_to_cflb1 395
946 zero aq
947 zero stream_prep_mac,3 stream_prep_mac 396
948 zero a+bases+x6
949 zero loop_end_var,4 loop_end_var 397
950 zero aq
951 zero rfb2_to_cflb1,1 rfb2_to_cflb1 398
952 zero aq
953 zero complex_mac complex_mac 399
954 zero aq
955 zero conjg_mac conjg_mac 400
956 zero aq
957 zero real_mac real_mac 401
958 zero aq
959 zero imag_mac imag_mac 402
960 zero aq
961 zero square_fx1,2 square_fx1 403
962 zero aq
963 zero h2w_mac,2 h2w_mac 404
964 zero aq
965 zero square_fl1,2 square_fl1 405
966 zero aq
967 zero square_fl2,2 square_fl2 406
968 zero aq
969 zero unpk_to_pk,1 unpk_to_pk 407
970 zero aq
971 zero pk_to_unpk,1 pk_to_unpk 408
972 zero aq
973 sprilp 0 store_lp 409
974 zero 0
975 zero bp_to_aq,2 bp_to_aq 410
976 zero aq
977 zero lp_to_aq,2 lp_to_aq 411
978 zero aq
979 zero real_to_real_tr,1 real_to_real_tr 412
980 zero all-sr
981 zero real_to_real_rd,1 real_to_real_rd 413
982 zero all-sr
983 zero any_to_any_tr,1 any_to_any_tr 414
984 zero all-sr
985 zero any_to_any_rd,1 any_to_any_rd 415
986 zero all-sr
987 zero unpack_pic,1 unpack_pic 416
988 zero all
989 zero edit_pic,1 edit_pic 417
990 zero all
991 qrl 0 qrl 418
992 zero q
993 zero zero_chars,3 zero_chars 419
994 zero 0
995 zero chars_move,3 chars_move 420
996 zero 0
997 zero bits_move,3 bits_move 421
998 zero 0
999 zero tand_mac,1 tand_mac 422
1000 zero 0
1001 zero dtand_mac,1 dtand_mac 423
1002 zero 0
1003 zero asin_mac,1 asin_mac 424
1004 zero 0
1005 zero dasin_mac,1 dasin_mac 425
1006 zero 0
1007 zero asind_mac,1 asind_mac 426
1008 zero 0
1009 zero dasind_mac,1 dasind_mac 427
1010 zero 0
1011 zero acos_mac,1 acos_mac 428
1012 zero 0
1013 zero dacos_mac,1 dacos_mac 429
1014 zero 0
1015 zero acosd_mac,1 acosd_mac 430
1016 zero 0
1017 zero dacosd_mac,1 dacosd_mac 431
1018 zero 0
1019 zero atan_mac,1 atan_mac 432
1020 zero 0
1021 zero datan_mac,1 datan_mac 433
1022 zero 0
1023 zero atand_mac,1 atand_mac 434
1024 zero 0
1025 zero datand_mac,1 datand_mac 435
1026 zero 0
1027 zero set_chars,1 set_chars 436
1028 zero a+sr
1029 zero set_bits,1 set_bits 437
1030 zero a+sr
1031 zero move_decimal,3 move_decimal 438
1032 zero dr
1033 zero move_decimal_rd,3 move_decimal_rd 439
1034 zero dr
1035 zero add_decimal,4 add_decimal 440
1036 zero dr
1037 zero add_decimal_rd,4 add_decimal_rd 441
1038 zero dr
1039 zero add_decimal_2,3 add_decimal_2 442
1040 zero dr
1041 zero add_decimal_2_rd,3 add_decimal_2_rd 443
1042 zero dr
1043 zero chars_move_vt,3 chars_move_vt 444
1044 zero 0,l_in_q
1045 zero bits_move_vt,3 bits_move_vt 445
1046 zero 0,l_in_q
1047 zero sub_decimal,4 sub_decimal 446
1048 zero dr
1049 zero sub_decimal_rd,4 sub_decimal_rd 447
1050 zero dr
1051 zero sub_decimal_2,3 sub_decimal_2 448
1052 zero dr
1053 zero sub_decimal_2_rd,3 sub_decimal_2_rd 449
1054 zero dr
1055 zero mult_decimal,4 mult_decimal 450
1056 zero dr
1057 zero mult_decimal_rd,4 mult_decimal_rd 451
1058 zero dr
1059 zero ix_chars,1 ix_chars 452
1060 zero aq+sr
1061 zero ix_bits,1 ix_bits 453
1062 zero aq+bp+sr
1063 zero mult_decimal_2,3 mult_decimal_2 454
1064 zero dr
1065 zero mult_decimal_2_rd,3 mult_decimal_2_rd 455
1066 zero dr
1067 zero div_decimal,4 div_decimal 456
1068 zero dr
1069 zero div_decimal_rd,4 div_decimal_rd 457
1070 zero dr
1071 zero div_decimal_2,3 div_decimal_2 458
1072 zero dr
1073 zero div_decimal_2_rd,3 div_decimal_2_rd 459
1074 zero dr
1075 zero ix_chars_1,8 ix_chars_1 460
1076 zero q,compare
1077 zero ix_bits_1,1 ix_bits_1 461
1078 zero aq+bp+sr
1079 zero ix_chars_2,8 ix_chars_2 462
1080 zero q,compare
1081 zero ix_rev_chars_1,8 ix_rev_chars_1 463
1082 zero q,compare
1083 zero ix_rev_chars_2,8 ix_rev_chars_2 464
1084 zero q,compare
1085 zero mpcdec,2 mpcdec 465
1086 zero a+x1+x2+x3+x4
1087 zero dvcdec,2 dvcdec 466
1088 zero a+x1+x2+x3+x4
1089 zero dvrcdec,2 dvrcdec 467
1090 zero a+x1+x2+x3+x4
1091 zero zero_bits,3 zero_bits 468
1092 zero 0
1093 zero one_bits,3 one_bits 469
1094 zero 0
1095 zero bool_mac_1,3 bool_mac_1 470
1096 zero 0,xec_eis
1097 zero bool_mac_2,3 bool_mac_2 471
1098 zero 0,xec_eis
1099 zero blank_chars,3 blank_chars 472
1100 zero 0
1101 zero abs_decimal,3 abs_decimal 473
1102 zero dr
1103 zero min_dec,4 min_dec 474
1104 zero dr
1105 zero max_dec,4 max_dec 475
1106 zero dr
1107 zero copy_bits,3 copy_bits 476
1108 zero 0,cat
1109 zero log2_mac,1 log2_mac 477
1110 zero 0
1111 zero dlog2_mac,1 dlog2_mac 478
1112 zero 0
1113 zero zero_chars_q,3 zero_chars_q 479
1114 zero 0,l_in_q
1115 zero return_words,2 return_words 480
1116 zero 0
1117 zero move_words,3 move_words 481
1118 zero 0,cat
1119 zero log_mac,1 log_mac 482
1120 zero 0
1121 zero dlog_mac,1 dlog_mac 483
1122 zero 0
1123 zero one_chars,3 one_chars 484
1124 zero 0
1125 zero recio_mac,2 recio_mac 485
1126 zero aq+x6+bases
1127 zero unpack_fl1,2 unpack_fl1 486
1128 zero aq
1129 zero unpack_fl2,2 unpack_fl2 487
1130 zero 0
1131 zero unpack_cfl1,2 unpack_cfl1 488
1132 zero 0
1133 zero pack_fl1,2 pack_fl1 489
1134 zero 0
1135 zero pack_fl2,2 pack_fl2 490
1136 zero 0
1137 zero pack_cfl1,2 pack_cfl1 491
1138 zero 0
1139 lrs 0 lrs 492
1140 zero aq
1141 zero open_mac,1 open_mac 493
1142 zero x6+bases
1143 zero close_mac,1 close_mac 494
1144 zero x6+bases
1145 zero get_list,1 get_list 495
1146 zero x6+bases
1147 zero log10_mac,1 log10_mac 496
1148 zero 0
1149 zero dlog10_mac,1 dlog10_mac 497
1150 zero 0
1151 zero put_field,1 put_field 498
1152 zero bases+x6
1153 zero get_edit,1 get_edit 499
1154 zero x6+bases
1155 zero exp_mac,1 exp_mac 500
1156 zero 0
1157 zero dexp_mac,1 dexp_mac 501
1158 zero 0
1159 zero alloc_based_area,2 alloc_based_area 502
1160 zero 0
1161 zero put_list,1 put_list 503
1162 zero x6+bases
1163 zero atan2_mac,1 atan2_mac 504
1164 zero 0
1165 zero datan2_mac,1 datan2_mac 505
1166 zero 0
1167 zero put_field_chk,1 put_field_chk 506
1168 zero bases+x6
1169 zero put_edit,1 put_edit 507
1170 zero x6+bases
1171 zero testfx1,1 testfx1 508
1172 zero 0
1173 zero testfx2,1 testfx2 509
1174 zero 0
1175 zero testfl1,1 testfl1 510
1176 zero 0
1177 zero testfl2,1 testfl2 511
1178 zero 0
1179 zero ss_enter_begin_block,2 ss_enter_begin_block 512
1180 zero 0
1181 orq 0 form_desc 513
1182 zero q
1183 qrs 0 qrs 514
1184 zero q
1185 qls 0 qls 515
1186 zero q
1187 zero fetch_pp,2 fetch_pp 516
1188 zero aq
1189 zero store_pp,2 store_pp 517
1190 zero 0
1191 zero fxscaled_to_fl2,2 fxscaled_to_fl2 518
1192 zero aq
1193 zero fl2_to_fxscaled,1 fl2_to_fxscaled 519
1194 zero aq
1195 zero trunc_fx1,1 trunc_fx1 520
1196 zero q
1197 zero trunc_fx2,1 trunc_fx2 521
1198 zero aq
1199 zero ceil_fx1,1 ceil_fx1 522
1200 zero q
1201 zero ceil_fx2,1 ceil_fx2 523
1202 zero aq
1203 zero ceil_fl,1 ceil_fl 524
1204 zero aq
1205 zero floor_fx1,1 floor_fx1 525
1206 zero q
1207 zero floor_fx2,1 floor_fx2 526
1208 zero aq
1209 zero floor_fl,1 floor_fl 527
1210 zero aq
1211 zero nop_mac,1 nop_mac 528
1212 zero 0
1213 zero round_fx1,1 round_fx1 529
1214 zero q
1215 zero round_fx2,1 round_fx2 530
1216 zero aq
1217 zero round_fl,2 round_fl 531
1218 zero aq+bp+sr
1219 zero compare_decimal,3 compare_decimal 532
1220 zero dr,compare
1221 sprisp 0 stack_ptr 533
1222 zero 0
1223 zero repeat,1 repeat 534
1224 zero aq+bp+sr
1225 zero divide_fx1,2 divide_fx1 535
1226 zero aq+sr+perm
1227 zero divide_fx2,2 divide_fx2 536
1228 zero aq+sr+perm
1229 zero divide_fx3,2 divide_fx3 537
1230 zero aq+sr+perm
1231 zero divide_fx4,2 divide_fx4 538
1232 zero aq+sr+perm
1233 zero verify,1 verify 539
1234 zero q+sr
1235 zero search,1 search 540
1236 zero q+sr
1237 zero ceil_dec,2 ceil_dec 541
1238 zero aq+x1+x2
1239 zero floor_dec,2 floor_dec 542
1240 zero aq+x1+x2
1241 zero sign_dec,2 sign_dec 543
1242 zero q
1243 zero abs_cdec,2 abs_cdec 544
1244 zero aq+x1+x2+x3+x4
1245 zero trunc_dec,2 trunc_dec 545
1246 zero aq+x1+x2
1247 zero mod_dec,2 mod_dec 546
1248 zero aq+x1+x2
1249 zero reverse_cs,1 reverse_cs 547
1250 zero aq+bp+sr
1251 zero reverse_bs,1 reverse_bs 548
1252 zero aq+bp+sr
1253 zero scaled_mdfx1,2 scaled_mdfx1 549
1254 zero aq+sr+perm
1255 zero scaled_mdfx2,2 scaled_mdfx2 550
1256 zero aq+sr+perm
1257 zero scaled_mdfx3,2 scaled_mdfx3 551
1258 zero aq+sr+perm
1259 zero scaled_mdfx4,2 scaled_mdfx4 552
1260 zero aq+sr+perm
1261 zero size_check_fx1,1 size_check_fx1 553
1262 zero 0
1263 zero size_check_fx2,1 size_check_fx2 554
1264 zero 0
1265 zero chars_move_ck,3 chars_move_ck 555
1266 zero 0
1267 zero bits_move_ck,3 bits_move_ck 556
1268 zero 0
1269 zero atan2d_mac,1 atan2d_mac 557
1270 zero 0
1271 zero datan2d_mac,1 datan2d_mac 558
1272 zero 0
1273 zero int_p_real,1 int_p_real 559
1274 zero 0
1275 zero int_p_dbl,1 int_p_dbl 560
1276 zero 0
1277 zero dbl_p_real,1 dbl_p_real 561
1278 zero 0
1279 zero dbl_p_dbl,1 dbl_p_dbl 562
1280 zero 0
1281 zero signal_stringsize,1 signal_stringsize 563
1282 zero 0
1283 zero dbl_p_int,1 dbl_p_int 564
1284 zero 0
1285 zero real_p_real,1 real_p_real 565
1286 zero 0
1287 zero size_ck_varying,4 size_ck_varying 566
1288 zero q
1289 zero size_ck_suffix,5 size_ck_suffix 567
1290 zero q
1291 zero move_3,6 move_3 568
1292 zero a
1293 zero move_odd_odd_3,4 move_odd_odd_3 569
1294 zero aq
1295 zero move_odd_odd_4,6 move_odd_odd_4 570
1296 zero aq
1297 zero move_odd_odd_5,6 move_odd_odd_5 571
1298 zero aq
1299 zero move_odd_even_3,5 move_odd_even_3 572
1300 zero aq
1301 zero move_odd_even_4,6 move_odd_even_4 573
1302 zero aq
1303 zero move_even_odd_3,5 move_even_odd_3 574
1304 zero aq
1305 zero move_even_odd_4,6 move_even_odd_4 575
1306 zero aq
1307 zero move_even_even_3,4 move_even_even_3 576
1308 zero aq
1309 zero move_even_even_4,4 move_even_even_4 577
1310 zero aq
1311 zero move_even_even_5,6 move_even_even_5 578
1312 zero aq
1313 zero move_even_even_6,6 move_even_even_6 579
1314 zero aq
1315 zero move_odd,2 move_odd 580
1316 zero a
1317 zero move_even,2 move_even 581
1318 zero aq
1319 zero size_ck_decimal,2 size_ck_decimal 582
1320 zero all
1321 zero xr_to_q,2 xr_to_q 583
1322 zero q
1323 zero packed_to_bp,2 packed_to_bp 584
1324 zero bp
1325 zero packed_bit_offset,1 packed_bit_offset 585
1326 zero q
1327 zero return_chars,1 return_chars 586
1328 zero 0
1329 zero put_control,1 put_control 587
1330 zero bases+x6
1331 zero fetch_chars_eis,1 fetch_chars_eis 588
1332 zero aq
1333 zero fetch_bits_eis,1 fetch_bits_eis 589
1334 zero aq
1335 zero return_bits,1 return_bits 590
1336 zero 0
1337 zero real_p_int,1 real_p_int 591
1338 zero 0
1339 zero int_p_int,1 int_p_int 592
1340 zero 0
1341 zero enable_file_2,5 enable_file_2 593
1342 zero aq see macro
1343 zero ext_entry,3 ext_entry 594
1344 zero all
1345 zero ext_entry_desc,3 ext_entry_desc 595
1346 zero all
1347 zero int_entry,3 int_entry 596
1348 zero all
1349 zero int_entry_desc,3 int_entry_desc 597
1350 zero all
1351 zero val_entry,3 val_entry 598
1352 zero all
1353 zero val_entry_desc,3 val_entry_desc 599
1354 zero all
1355 zero off_mac_hard,2 off_mac_hard 600
1356 zero aq
1357 zero off_mac_hard_pk,2 off_mac_hard_pk 601
1358 zero aq
1359 zero pl1_ptr_easy,1 pl1_ptr_easy 602
1360 zero aq+bp
1361 zero pl1_ptr_easy_pk,1 pl1_ptr_easy_pk 603
1362 zero aq+bp
1363 zero pl1_ptr_hard,1 pl1_ptr_hard 604
1364 zero aq+bp
1365 zero pl1_ptr_hard_pk,1 pl1_ptr_hard_pk 605
1366 zero aq+bp
1367 zero enable_file,4 enable_file 606
1368 zero aq see macro
1369 zero revert_file,3 revert_file 607
1370 zero bp+lp+aq
1371 zero alloc_block,2 alloc_block 608
1372 zero bp+lp+aq+cr
1373 zero free_block,2 free_block 609
1374 zero bp+lp+aq+cr
1375 zero push_ctl_data,2 push_ctl_data 610
1376 zero bp+lp+aq+cr
1377 zero push_ctl_desc,2 push_ctl_desc 611
1378 zero bp+lp+aq+cr
1379 zero pop_ctl_data,2 pop_ctl_data 612
1380 zero bp+lp+aq+cr
1381 zero pop_ctl_desc,2 pop_ctl_desc 613
1382 zero bp+lp+aq+cr
1383 zero allocation,2 allocation 614
1384 zero bp+aq
1385 cana 0 and_for_test 615
1386 zero 0
1387 zero ana_anq,2 and_for_test_odd 616
1388 zero aq
1389 canaq 0 and_for_test_even 617
1390 zero 0
1391 epp1 0 load_ab 618
1392 zero 0
1393 epp3 0 load_bb 619
1394 zero 0
1395 epp5 0 load_lb 620
1396 zero 0
1397 epp7 0 load_sb 621
1398 zero 0
1399 spri1 0 store_ab 622
1400 zero 0
1401 spri3 0 store_bb 623
1402 zero 0
1403 spri5 0 store_lb 624
1404 zero 0
1405 spri7 0 store_sb 625
1406 zero 0
1407 zero ab_to_aq,2 ab_to_aq 626
1408 zero aq
1409 zero bb_to_aq,2 bb_to_aq 627
1410 zero aq
1411 zero lb_to_aq,2 lb_to_aq 628
1412 zero aq
1413 zero sb_to_aq,2 sb_to_aq 629
1414 zero aq
1415 sprpbp 0 store_packed_bp 630
1416 zero 0
1417 sprplp 0 store_packed_lp 631
1418 zero 0
1419 sprp1 0 store_packed_ab 632
1420 zero 0
1421 sprp3 0 store_packed_bb 633
1422 zero 0
1423 sprp5 0 store_packed_lb 634
1424 zero 0
1425 sprp7 0 store_packed_sb 635
1426 zero 0
1427 lprpbp 0 load_packed_bp 636
1428 zero 0
1429 lprplp 0 load_packed_lp 637
1430 zero 0
1431 lprp1 0 load_packed_ab 638
1432 zero 0
1433 lprp3 0 load_packed_bb 639
1434 zero 0
1435 lprp5 0 load_packed_lb 640
1436 zero 0
1437 lprp7 0 load_packed_sb 641
1438 zero 0
1439 zero zero_bo_bp,1 zero_bo_bp 642
1440 zero bp
1441 zero abd,1 abd 643
1442 zero 0
1443 zero a9bd,1 a9bd 644
1444 zero 0
1445 ada 0 ada 645
1446 zero a
1447 zero ss_ext_entry,3 ss_ext_entry 646
1448 zero all
1449 zero ss_ext_entry_desc,3 ss_ext_entry_desc 647
1450 zero all
1451 zero ss_int_entry,3 ss_int_entry 648
1452 zero all
1453 zero ss_int_entry_desc,3 ss_int_entry_desc 649
1454 zero all
1455 zero ss_val_entry,3 ss_val_entry 650
1456 zero all
1457 zero ss_val_entry_desc,3 ss_val_entry_desc 651
1458 zero all
1459 zero pointer_mac_c_ab,1 pointer_mac_c_ab 652
1460 zero 0
1461 zero pointer_mac_c_bb,1 pointer_mac_c_bb 653
1462 zero 0
1463 zero pointer_mac_c_lb,1 pointer_mac_c_lb 654
1464 zero 0
1465 zero pointer_mac_c_sb,1 pointer_mac_c_sb 655
1466 zero 0
1467 zero addrel_mac_c_ab,1 addrel_mac_c_ab 656
1468 zero 0
1469 zero addrel_mac_c_bb,1 addrel_mac_c_bb 657
1470 zero 0
1471 zero addrel_mac_c_lb,1 addrel_mac_c_lb 658
1472 zero 0
1473 zero addrel_mac_c_sb,1 addrel_mac_c_sb 659
1474 zero 0
1475 zero pointer_mac_bs_ab,1 pointer_mac_bs_ab 660
1476 zero 0
1477 zero pointer_mac_fx_ab,1 pointer_mac_fx_ab 661
1478 zero 0
1479 zero pointer_mac_bs_bb,1 pointer_mac_bs_bb 662
1480 zero 0
1481 zero pointer_mac_fx_bb,1 pointer_mac_fx_bb 663
1482 zero 0
1483 zero pointer_mac_bs_lb,1 pointer_mac_bs_lb 664
1484 zero 0
1485 zero pointer_mac_fx_lb,1 pointer_mac_fx_lb 665
1486 zero 0
1487 zero pointer_mac_bs_sb,1 pointer_mac_bs_sb 666
1488 zero 0
1489 zero pointer_mac_fx_sb,1 pointer_mac_fx_sb 667
1490 zero 0
1491 zero addrel_mac_bs_ab,1 addrel_mac_bs_ab 668
1492 zero 0
1493 zero addrel_mac_fx_ab,1 addrel_mac_fx_ab 669
1494 zero 0
1495 zero addrel_mac_bs_bb,1 addrel_mac_bs_bb 670
1496 zero 0
1497 zero addrel_mac_fx_bb,1 addrel_mac_fx_bb 671
1498 zero 0
1499 zero addrel_mac_bs_lb,1 addrel_mac_bs_lb 672
1500 zero 0
1501 zero addrel_mac_fx_lb,1 addrel_mac_fx_lb 673
1502 zero 0
1503 zero addrel_mac_bs_sb,1 addrel_mac_bs_sb 674
1504 zero 0
1505 zero addrel_mac_fx_sb,1 addrel_mac_fx_sb 675
1506 zero 0
1507 zero baseptr_mac_bs_ab,2 baseptr_mac_bs_ab 676
1508 zero 0
1509 zero baseptr_mac_fx_ab,2 baseptr_mac_fx_ab 677
1510 zero 0
1511 zero baseptr_mac_bs_bb,2 baseptr_mac_bs_bb 678
1512 zero 0
1513 zero baseptr_mac_fx_bb,2 baseptr_mac_fx_bb 679
1514 zero 0
1515 zero baseptr_mac_bs_lb,2 baseptr_mac_bs_lb 680
1516 zero 0
1517 zero baseptr_mac_fx_lb,2 baseptr_mac_fx_lb 681
1518 zero 0
1519 zero baseptr_mac_bs_sb,2 baseptr_mac_bs_sb 682
1520 zero 0
1521 zero baseptr_mac_fx_sb,2 baseptr_mac_fx_sb 683
1522 zero 0
1523 zero zero_bo_ab,1 zero_bo_ab 684
1524 zero 0
1525 zero zero_bo_bb,1 zero_bo_bb 685
1526 zero 0
1527 zero zero_bo_lb,1 zero_bo_lb 686
1528 zero 0
1529 zero zero_bo_sb,1 zero_bo_sb 687
1530 zero 0
1531 anq 0 anq 688
1532 zero q
1533 erq 0 erq 689
1534 zero q
1535 ersq 0 ersq 690
1536 zero 0
1537 zero charno_mac,5 charno_mac 691
1538 zero aq
1539 zero bitno_mac,6 bitno_mac 692
1540 zero aq
1541 zero 0 UNUSED 693
1542 zero 0
1543 zero 0 UNUSED 694
1544 zero 0
1545 zero alloc_based_mac,2 alloc_based_mac 695
1546 zero 0
1547 zero free_based_mac,1 free_based_mac 696
1548 zero 0
1549 zero empty_area_mac,1 empty_area_mac 697
1550 zero 0
1551 zero size_ck_suffix_1,4 size_ck_suffix_1 698
1552 zero 0
1553 zero long_profile_mac,1 long_profile_mac 699
1554 zero 0
1555 zero ix_before_chars,1 ix_before_chars 700
1556 zero aq+bp+sr
1557 zero ix_before_bits,1 ix_before_bits 701
1558 zero aq+bp+sr
1559 zero ix_after_chars,1 ix_after_chars 702
1560 zero aq+bp+sr
1561 zero ix_after_bits,1 ix_after_bits 703
1562 zero aq+bp+sr
1563 zero ix_before_chars_1,5 ix_before_chars_1 704
1564 zero q,compare
1565 zero ix_before_bits_1,1 ix_before_bits_1 705
1566 zero aq+bp+sr
1567 zero ix_after_chars_1,7 ix_after_chars_1 706
1568 zero q,compare
1569 zero ix_after_bits_1,1 ix_after_bits_1 707
1570 zero aq+bp+sr
1571 zero ix_before_chars_2,7 ix_before_chars_2 708
1572 zero q,compare
1573 zero ix_after_chars_2,8 ix_after_chars_2 709
1574 zero q,compare
1575 zero verify_ltrim,1 verify_ltrim 710
1576 zero q+sr
1577 zero verify_rtrim,1 verify_rtrim 711
1578 zero q+sr
1579 zero verify_ltrim_inline,6 verify_ltrim_inline 712
1580 zero q,compare
1581 zero verify_rtrim_inline,6 verify_rtrim_inline 713
1582 zero q,compare
1583 stx0 0 stx0 714
1584 zero 0
1585 stx1 0 stx1 715
1586 zero 0
1587 stx2 0 stx2 716
1588 zero 0
1589 stx3 0 stx3 717
1590 zero 0
1591 stx4 0 stx4 718
1592 zero 0
1593 stx5 0 stx5 719
1594 zero 0
1595 stx6 0 stx6 720
1596 zero 0
1597 stx7 0 stx7 721
1598 zero 0
1599 zero stacq_mac,2 stacq_mac 722
1600 zero aq
1601 zero clock_mac,1 clock_mac 723
1602 zero aq+lp also pr7
1603 zero vclock_mac,1 vclock_mac 724
1604 zero aq+bp+lp also pr7
1605 ars 0 ars 725
1606 zero a
1607 zero stop_mac,1 stop_mac 726
1608 zero 0
1609 zero return_main_mac,1 return_main_mac 727
1610 zero 0
1611 zero set_main_mac,1 set_main_mac 728
1612 zero 0
1613 zero begin_return_main,2 begin_return_main 729
1614 zero all
1615 sprp6 0 store_packed_sp 730
1616 zero 0
1617 zero size_check_uns_fx1,1 size_check_uns_fx1 731
1618 zero 0
1619 zero size_check_uns_fx2,1 size_check_uns_fx2 732
1620 zero 0
1621 zero uns_fx1_to_bs,2 uns_fx1_to_bs 733
1622 zero a
1623 zero uns_fx2_to_bs,2 uns_fx2_to_bs 734
1624 zero aq
1625 zero xr18_to_q,2 xr18_to_q 735
1626 zero q
1627 zero a4bd,1 a4bd 736
1628 zero 0
1629 zero abs_decimal_4bit,3 abs_decimal_4bit 737
1630 zero dr
1631 zero digit_to_bit,2 digit_to_bit 738
1632 zero aq
1633 zero zero_4bcs,3 zero_4bcs 739
1634 zero dr
1635 zero rank_eis_mac,3 rank_eis_mac 740
1636 zero 0
1637 zero prepare_call_long,3 prepare_call_long 741
1638 zero aq
1639 zero prepare_quick_call_long,4 prepare_quick_call_long 742
1640 zero bp+aq
1641 "
1642 macro_count:
1643 vfd 36/*-macro_table/2 all macros must precede this line
1644 "
1645 " definitions of multi_word macros
1646 "
1647 lda_ldq:
1648 lda arg1
1649 ldq arg1+1
1650 sta_stq:
1651 sta arg1
1652 stq arg1+1
1653 lcfl1:
1654 fld arg1
1655 fneg:
1656 fneg
1657 lcfl2:
1658 dfld arg1
1659 fneg
1660 sbfx3:
1661 adl arg1
1662 negl:
1663 negl
1664 neg:
1665 neg
1666 ana_anq:
1667 ana arg1
1668 anq arg1+1
1669 ansa_ansq:
1670 ansa arg1
1671 ansq arg1+1
1672 ora_orq:
1673 ora arg1
1674 orq arg1+1
1675 orsa_orsq:
1676 orsa arg1
1677 orsq arg1+1
1678 era_erq:
1679 era arg1
1680 erq arg1+1
1681 ersa_ersq:
1682 ersa arg1
1683 ersq arg1+1
1684 clear_aq:
1685 fld 0,dl
1686 clear_q:
1687 ldq 0,dl
1688 fx1_to_fx2:
1689 llr 36
1690 lrs 36
1691 alloc_char_temp:
1692 tsx0 ap|op_vec+0
1693 alloc_bit_temp:
1694 tsx0 ap|op_vec+1
1695 alloc_temp:
1696 tsx0 ap|op_vec+2
1697 realloc_char_temp:
1698 tsx0 ap|op_vec+3
1699 realloc_bit_temp:
1700 tsx0 ap|op_vec+4
1701 store_string:
1702 tsx0 ap|op_vec+28
1703 cat_realloc_char:
1704 tsx0 ap|op_vec+29
1705 cat_realloc_bit:
1706 tsx0 ap|op_vec+30
1707 chars_move_vt:
1708 chars_move:
1709 move_chars:
1710 cat_move_chars:
1711 mlr 0,0,fillblank
1712 zero arg2,char
1713 zero arg1,char
1714 bits_move_vt:
1715 bits_move:
1716 copy_bits:
1717 move_bits:
1718 cat_move_bits:
1719 csl 0,0,boolmove
1720 zero arg2,bit
1721 zero arg1,bit
1722 move_cs_load_1:
1723 mlr 0,0,fill0
1724 zero arg2,char
1725 zero arg1,char+4
1726 move_bs_load_1:
1727 csl 0,0,boolmove
1728 zero arg2,bit
1729 zero arg1,bit+36
1730 move_cs_load_2:
1731 mlr 0,0,fill0
1732 zero arg2,char
1733 zero arg1,char+8
1734 move_bs_load_2:
1735 csl 0,0,boolmove
1736 zero arg2,bit
1737 zero arg1,bit+72
1738 save_string_aq:
1739 mlr pr,0,fill0
1740 desc9a sp|40,8
1741 zero arg1,char+8
1742 move_not:
1743 csl 0,0,boolnot
1744 zero arg2,bit
1745 zero arg1,bit
1746 move_and:
1747 csl 0,0,booland
1748 zero arg2,bit
1749 zero arg1,bit
1750 move_or:
1751 csl 0,0,boolor
1752 zero arg2,bit
1753 zero arg1,bit
1754 move_andnot_0:
1755 csl 0,0,bool02
1756 zero arg2,bit
1757 zero arg1,bit
1758 move_andnot_1:
1759 csl 0,0,bool04,fill1 "forces zeroes in result if source shorter
1760 zero arg2,bit
1761 zero arg1,bit
1762 test_bits:
1763 sztl 0,0,boolmove
1764 zero arg2,bit
1765 zero arg1,bit
1766 test_not:
1767 sztl 0,0,boolnot
1768 zero arg2,bit
1769 zero arg1,bit
1770 test_and:
1771 sztl 0,0,booland
1772 zero arg2,bit
1773 zero arg1,bit
1774 test_or:
1775 sztl 0,0,boolor
1776 zero arg2,bit
1777 zero arg1,bit
1778 test_xor:
1779 sztl 0,0,boolxor
1780 zero arg2,bit
1781 zero arg1,bit
1782 test_andnot_0:
1783 sztl 0,0,bool02
1784 zero arg2,bit
1785 zero arg1,bit
1786 test_andnot_1:
1787 sztl 0,0,bool04,fill1 "forces zeroes in result if source shorter
1788 zero arg2,bit
1789 zero arg1,bit
1790 move_decimal:
1791 move_numeric:
1792 mvn 0,0
1793 zero arg2,dec
1794 zero arg1,dec
1795 move_decimal_rd:
1796 mvn 0,0,round
1797 zero arg2,dec
1798 zero arg1,dec
1799 add_decimal:
1800 ad3d 0,0,0
1801 zero arg2,dec
1802 zero arg3,dec
1803 zero arg1,dec
1804 add_decimal_rd:
1805 ad3d 0,0,0,round
1806 zero arg2,dec
1807 zero arg3,dec
1808 zero arg1,dec
1809 add_decimal_2:
1810 ad2d 0,0
1811 zero arg2,dec
1812 zero arg1,dec
1813 add_decimal_2_rd:
1814 ad2d 0,0,round
1815 zero arg2,dec
1816 zero arg1,dec
1817 sub_decimal:
1818 sb3d 0,0,0
1819 zero arg3,dec
1820 zero arg2,dec
1821 zero arg1,dec
1822 sub_decimal_rd:
1823 sb3d 0,0,0,round
1824 zero arg3,dec
1825 zero arg2,dec
1826 zero arg1,dec
1827 sub_decimal_2:
1828 sb2d 0,0
1829 zero arg2,dec
1830 zero arg1,dec
1831 sub_decimal_2_rd:
1832 sb2d 0,0,round
1833 zero arg2,dec
1834 zero arg1,dec
1835 mult_decimal:
1836 mp3d 0,0,0
1837 zero arg2,dec
1838 zero arg3,dec
1839 zero arg1,dec
1840 mult_decimal_rd:
1841 mp3d 0,0,0,round
1842 zero arg2,dec
1843 zero arg3,dec
1844 zero arg1,dec
1845 mult_decimal_2:
1846 mp2d 0,0
1847 zero arg2,dec
1848 zero arg1,dec
1849 mult_decimal_2_rd:
1850 mp2d 0,0,round
1851 zero arg2,dec
1852 zero arg1,dec
1853 "
1854 " At present, the hardware does rounding on floating point decimal division incorrectly,
1855 " so we don't actually generate a divide with the round bit on.
1856 "
1857 div_decimal:
1858 div_decimal_rd:
1859 dv3d 0,0,0
1860 zero arg3,dec
1861 zero arg2,dec
1862 zero arg1,dec
1863 div_decimal_2:
1864 div_decimal_2_rd:
1865 dv2d 0,0
1866 zero arg2,dec
1867 zero arg1,dec
1868 compare_decimal:
1869 cmpn 0,0
1870 zero arg2,dec
1871 zero arg1,dec
1872 move_numeric_edit:
1873 mvne 0,0,0
1874 zero arg2,dec
1875 zero arg3,char
1876 zero arg1,char
1877 pic_test:
1878 cmpn 0,0
1879 zero arg1,dec
1880 zero arg2,dec
1881 tze arg3
1882 dtb_1:
1883 dtb 0,0
1884 zero arg2,dec
1885 zero arg1,char+4
1886 dtb_2:
1887 dtb 0,0
1888 zero arg2,dec
1889 zero arg1,char+8
1890 btd_1:
1891 btd 0,0
1892 zero arg2,char+4
1893 zero arg1,dec
1894 btd_2:
1895 btd 0,0
1896 zero arg2,char+8
1897 zero arg1,dec
1898 mpcdec:
1899 epp2 arg1
1900 tsx0 ap|op_vec+392
1901 dvcdec:
1902 epp2 arg1
1903 tsx0 ap|op_vec+393
1904 dvrcdec:
1905 epp2 arg1
1906 tsx0 ap|op_vec+394
1907 abs_decimal:
1908 mlr 0,0,fillplus
1909 zero 0
1910 zero arg1,char+1
1911 abs_decimal_4bit:
1912 mlr 0,0,fillplus
1913 zero 0
1914 zero arg1,char4+1
1915 min_dec:
1916 cmpn 0,0
1917 zero arg2,dec
1918 zero arg1,dec
1919 tmoz 4,ic
1920 max_dec:
1921 cmpn 0,0
1922 zero arg2,dec
1923 zero arg1,dec
1924 tpl 4,ic
1925 ceil_dec:
1926 epp2 arg1
1927 tsx0 ap|op_vec+395
1928 floor_dec:
1929 epp2 arg1
1930 tsx0 ap|op_vec+396
1931 sign_dec:
1932 epp2 arg1
1933 tsx0 ap|op_vec+397
1934 abs_cdec:
1935 epp2 arg1
1936 tsx0 ap|op_vec+398
1937 trunc_dec:
1938 epp2 arg1
1939 tsx0 ap|op_vec+399
1940 mod_dec:
1941 epp2 arg1
1942 tsx0 ap|op_vec+400
1943 comp_bits:
1944 tsx0 ap|op_vec+20
1945 support_mac:
1946 tsx0 ap|op_vec+401
1947 a_to_x0:
1948 eax0 0,al
1949 b2c_mac:
1950 adq 8,dl
1951 div 9,dl
1952 b2w_mac:
1953 adq 35,dl
1954 div 36,dl
1955 c2b_mac:
1956 mpy 9,dl
1957 c2w_mac:
1958 adq 3,dl
1959 qrs 2
1960 digit_to_bit:
1961 mpy 9,dl
1962 qrs 1
1963 pf_mac:
1964 qrs 9
1965 anq =o777,dl
1966 so_mac:
1967 tsx0 ap|op_vec+72
1968 spribp arg1
1969 longbs_to_bs18:
1970 tsx0 ap|op_vec+73
1971 mod_bit_mac:
1972 div 36,dl
1973 mod2_mac:
1974 adq 1,dl
1975 anq =o777776,dl
1976 mod4_mac:
1977 adq 3,dl
1978 anq =o777774,dl
1979 mod8_mac:
1980 adq 7,dl
1981 anq =o777770,dl
1982 mod16_mac:
1983 adq 15,dl
1984 anq =o777760,dl
1985 translate_2:
1986 tsx0 ap|op_vec+337
1987 translate_3:
1988 tsx0 ap|op_vec+338
1989 inline_translate:
1990 mvt 0,0,fillblank
1991 zero arg2,char
1992 zero arg1,char
1993 zero arg3,addr
1994 ext_and_1:
1995 tsx0 ap|op_vec+18
1996 ext_and_2:
1997 tsx0 ap|op_vec+19
1998 fx1_to_fl2:
1999 tsx0 ap|fx1_to_fl2_
2000 trunc_fl:
2001 tsx0 ap|op_vec+235
2002 fl2_to_fx1:
2003 tsx0 ap|op_vec+67
2004 fx2_to_fl2:
2005 lde =71b25,du
2006 fad =0.,du
2007 fl2_to_fx2:
2008 tsx0 ap|op_vec+68
2009 longbs_to_fx2:
2010 tsx0 ap|op_vec+69
2011 longbs_to_fl2:
2012 tsx0 ap|op_vec+69
2013 llr 36
2014 lrs 36
2015 blank_q:
2016 ldq ap|blanks_
2017 cpcs1_odd:
2018 cpbs2_odd:
2019 cmpa arg1
2020 tnz 2,ic
2021 cmpq arg1+1
2022 cpcs_ext1:
2023 tsx0 ap|op_vec+24
2024 cpcs_ext2:
2025 tsx0 ap|op_vec+25
2026 cpbs1_odd:
2027 cmpa arg1
2028 tnz 2,ic
2029 szn arg1+1
2030 cpbs1_even:
2031 ldq 0,du
2032 cmpaq arg1
2033 cpbs2:
2034 cmpa arg1
2035 tnz 2,ic
2036 cmpq 0,du
2037 cpbs_ext1:
2038 tsx0 ap|op_vec+26
2039 cpbs_ext2:
2040 tsx0 ap|op_vec+27
2041 cpbs3:
2042 cmpb 0,0
2043 zero arg1,bit
2044 zero 0
2045 cp_chars:
2046 cmpc 0,0,fillblank
2047 zero arg1,char
2048 zero arg2,char
2049 cp_bits:
2050 cmpb 0,0,fill0
2051 zero arg1,bit
2052 zero arg2,bit
2053 r_l_a:
2054 tsx0 ap|r_l_a_
2055 r_l_s:
2056 tsx0 ap|r_l_s_
2057 r_g_a:
2058 tsx0 ap|r_g_a_
2059 r_g_s:
2060 tsx0 ap|r_g_s_
2061 r_e_as:
2062 tsx0 ap|r_e_as_
2063 r_ne_as:
2064 tsx0 ap|r_ne_as_
2065 r_le_a:
2066 tsx0 ap|r_le_a_
2067 r_le_s:
2068 tsx0 ap|r_le_s_
2069 r_ge_a:
2070 tsx0 ap|r_ge_a_
2071 r_ge_s:
2072 tsx0 ap|r_ge_s_
2073 tra_ext_1:
2074 tra ap|op_vec+70
2075 tra_ext_2:
2076 tra ap|op_vec+71
2077 load_pt_reg:
2078 eppbp arg1
2079 spribp sp|40
2080 make_lv:
2081 eppbp arg1
2082 ldq arg2
2083 tsx0 ap|op_vec+66
2084 store_lv:
2085 eppbp arg1
2086 tsx0 ap|op_vec+65
2087 set_stack:
2088 ldq arg1
2089 tsx0 ap|set_stack_
2090 j_g_s:
2091 tze 2,ic
2092 trc arg1
2093 j_le_s:
2094 tnc arg1
2095 tze arg1
2096 reset_stack:
2097 tsx0 ap|op_vec+163
2098 get_ops_mac:
2099 epaq 0,ic
2100 lprplp sb|22,*au
2101 eppbp arg1
2102 tra 0,0
2103 ss_enter_begin_block:
2104 eax7 0
2105 tspbp ap|op_vec+405
2106 enter_begin_block:
2107 eax7 0
2108 tspbp ap|op_vec+35
2109 leave_begin_block:
2110 tsx0 ap|op_vec+36
2111 return_mac:
2112 tra ap|op_vec+48
2113 entry_macro:
2114 eax7 0
2115 tsx0 arg2
2116 tspbp arg1
2117 enter_prologue:
2118 sxl0 arg1
2119 leave_prologue:
2120 lxl0 arg1
2121 tra 0,0
2122 call_prologue:
2123 tsx0 arg1
2124 call_ent_var_d:
2125 tsx0 ap|op_vec+37
2126 call_ent_var:
2127 tsx0 ap|op_vec+38
2128 call_ext_in_d:
2129 tsx0 ap|op_vec+39
2130 call_ext_in:
2131 tsx0 ap|op_vec+40
2132 call_ext_out_d:
2133 tsx0 ap|op_vec+41
2134 call_ext_out:
2135 tsx0 ap|op_vec+42
2136 call_int_this_d:
2137 tsx0 ap|op_vec+43
2138 call_int_this:
2139 tsx0 ap|op_vec+44
2140 call_int_other_d:
2141 tsx0 ap|op_vec+45
2142 call_int_other:
2143 tsx0 ap|op_vec+46
2144 prepare_call:
2145 eax1 arg1
2146 fld arg2
2147 qls_9:
2148 qls 9
2149 set_bit_addr:
2150 sxl1 arg1+1
2151 pointer_mac_bs:
2152 eawpbp 0,au
2153 pointer_mac_fx:
2154 eawpbp 0,ql
2155 addrel_mac_bs:
2156 awd bp|0,au
2157 addrel_mac_fx:
2158 awd bp|0,ql
2159 baseptr_mac_bs:
2160 epbpbp sp|0
2161 easpbp 0,au
2162 baseptr_mac_fx:
2163 epbpbp sp|0
2164 easpbp 0,ql
2165 pointer_mac_bs_ab:
2166 eawpab 0,au
2167 pointer_mac_fx_ab:
2168 eawpab 0,ql
2169 pointer_mac_bs_bb:
2170 eawpbb 0,au
2171 pointer_mac_fx_bb:
2172 eawpbb 0,ql
2173 pointer_mac_bs_lb:
2174 eawplb 0,au
2175 pointer_mac_fx_lb:
2176 eawplb 0,ql
2177 pointer_mac_bs_sb:
2178 eawpsb 0,au
2179 pointer_mac_fx_sb:
2180 eawpsb 0,ql
2181 addrel_mac_bs_ab:
2182 awd ab|0,au
2183 addrel_mac_fx_ab:
2184 awd ab|0,ql
2185 addrel_mac_bs_bb:
2186 awd bb|0,au
2187 addrel_mac_fx_bb:
2188 awd bb|0,ql
2189 addrel_mac_bs_lb:
2190 awd lb|0,au
2191 addrel_mac_fx_lb:
2192 awd lb|0,ql
2193 addrel_mac_bs_sb:
2194 awd sb|0,au
2195 addrel_mac_fx_sb:
2196 awd sb|0,ql
2197 baseptr_mac_bs_ab:
2198 epbpab sp|0
2199 easpab 0,au
2200 baseptr_mac_fx_ab:
2201 epbpab sp|0
2202 easpab 0,ql
2203 baseptr_mac_bs_bb:
2204 epbpbb sp|0
2205 easpbb 0,au
2206 baseptr_mac_fx_bb:
2207 epbpbb sp|0
2208 easpbb 0,ql
2209 baseptr_mac_bs_lb:
2210 epbplb sp|0
2211 easplb 0,au
2212 baseptr_mac_fx_lb:
2213 epbplb sp|0
2214 easplb 0,ql
2215 baseptr_mac_bs_sb:
2216 epbpsb sp|0
2217 easpsb 0,au
2218 baseptr_mac_fx_sb:
2219 epbpsb sp|0
2220 easpsb 0,ql
2221 set_chars:
2222 tsx0 ap|op_vec+302
2223 set_bits:
2224 tsx0 ap|op_vec+303
2225 absfx1:
2226 tpl 3,ic
2227 erq ap|ones
2228 adq 1,dl
2229 absfx2:
2230 tpl 2,ic
2231 negl
2232 absfl1:
2233 absfl2:
2234 tpl 2,ic
2235 fneg
2236 load_offsets:
2237 ldq arg1+1
2238 sbq arg2
2239 store_offsets:
2240 ldq arg1
2241 asq arg2+1
2242 stac_mac:
2243 tsx0 ap|op_vec+74
2244 sign_mac:
2245 tsx0 ap|op_vec+75
2246 baseno_mac:
2247 ana =o077777,du
2248 segno_mac:
2249 llr 18 " segno to QL
2250 anq =o077777,dl " by itself
2251 mod_byte_mac:
2252 lda arg1
2253 lrs 2
2254 qrl 34
2255 mod_byte_mac_exp:
2256 lda 0,dl
2257 lls 34
2258 qrl 34
2259 mod_half_mac:
2260 lda arg1
2261 lrs 1
2262 qrl 35
2263 mod_half_mac_exp:
2264 lda 0,dl
2265 lls 35
2266 qrl 35
2267 "
2268 bound_ck_mac:
2269 ifnot atm2
2270 cplsave arg2
2271 *
2272 ifnot atm3
2273 cplsave arg3
2274 *
2275 fetch arg4
2276 lda arg3
2277 switch 1,type2
2278 jump bnd_ck_fx1
2279 jump bnd_ck_fx2
2280 bnd_ck_fx1:
2281 bump arg2 "we don't want cwl to drop count to zero
2282 cwl arg2
2283 tze 2,ic
2284 tsx0 ap|op_vec+76
2285 erase q+lp
2286 ldq arg2
2287 drop arg2 "only 1st use of arg2 dropped the count
2288 **
2289 bnd_ck_fx2:
2290 cwl arg2+1
2291 tze 2,ic
2292 tsx0 ap|op_vec+76
2293 erase q+lp
2294 ldq arg2+1
2295 drop arg2
2296 **
2297 "
2298 args_by_2_mac:
2299 ldq sp|26,*
2300 qrs 18
2301 min_fx1:
2302 cmpq arg1
2303 tmi 2,ic
2304 ldq arg1
2305 min_fx2:
2306 cmpaq arg1
2307 tmi 2,ic
2308 ldaq arg1
2309 min_fl1:
2310 fcmp arg1
2311 tmi 2,ic
2312 fld arg1
2313 min_fl2:
2314 dfcmp arg1
2315 tmi 2,ic
2316 dfld arg1
2317 max_fx1:
2318 cmpq arg1
2319 tpl 2,ic
2320 ldq arg1
2321 max_fx2:
2322 cmpaq arg1
2323 tpl 2,ic
2324 ldaq arg1
2325 max_fl1:
2326 fcmp arg1
2327 tpl 2,ic
2328 fld arg1
2329 max_fl2:
2330 dfcmp arg1
2331 tpl 2,ic
2332 dfld arg1
2333 neg_q:
2334 erq ap|ones
2335 adq 1,dl
2336 mpfx2:
2337 eppbp arg1
2338 tsx0 ap|op_vec+80
2339 mpfx3:
2340 eppbp arg1
2341 tsx0 ap|op_vec+81
2342 substr_ck_mac:
2343 ifnot atm2
2344 cplsave arg2
2345 *
2346 ifnot atm3
2347 cplsave arg3
2348 *
2349 fetch arg4
2350 lda arg3
2351 switch 1,type2
2352 jump range_ck_fx1
2353 jump range_ck_fx2
2354 range_ck_fx1:
2355 bump arg2
2356 cwl arg2
2357 tze 2,ic
2358 tsx0 ap|op_vec+404
2359 erase q+lp
2360 ldq arg2
2361 drop arg2 second use of arg2 in non-macro.
2362 **
2363 range_ck_fx2:
2364 cwl arg2+1
2365 tze 2,ic
2366 tsx0 ap|op_vec+404
2367 erase q+lp
2368 ldq arg2+1
2369 drop arg2
2370 **
2371 "
2372 set_ptr_to:
2373 eppbp arg1
2374 spribp arg2
2375 mdfl1:
2376 eppbp arg1
2377 tsx0 ap|op_vec+89
2378 mdfl2:
2379 eppbp arg1
2380 tsx0 ap|op_vec+90
2381 mdfx1:
2382 eppbp arg1
2383 tsx0 ap|op_vec+91
2384 mdfx2:
2385 eppbp arg1
2386 tsx0 ap|op_vec+92
2387 mdfx3:
2388 eppbp arg1
2389 tsx0 ap|op_vec+93
2390 mdfx4:
2391 eppbp arg1
2392 tsx0 ap|op_vec+94
2393 divide_fx1:
2394 epp2 arg1
2395 tsx0 ap|op_vec+329
2396 divide_fx2:
2397 epp2 arg1
2398 tsx0 ap|op_vec+330
2399 divide_fx3:
2400 epp2 arg1
2401 tsx0 ap|op_vec+331
2402 divide_fx4:
2403 epp2 arg1
2404 tsx0 ap|op_vec+332
2405 scaled_mdfx1:
2406 epp2 arg1
2407 tsx0 ap|op_vec+333
2408 scaled_mdfx2:
2409 epp2 arg1
2410 tsx0 ap|op_vec+334
2411 scaled_mdfx3:
2412 epp2 arg1
2413 tsx0 ap|op_vec+335
2414 scaled_mdfx4:
2415 epp2 arg1
2416 tsx0 ap|op_vec+336
2417 make_desc_mac:
2418 orq arg2
2419 stq arg1
2420 quick_desc_size:
2421 ldq arg1
2422 anq ap|168 =o000077777777
2423 get_desc_size:
2424 ldq arg1
2425 tmi 2,ic
2426 anq =o777777,dl
2427 anq ap|168 =o000077777777
2428 pad_chars:
2429 tsx0 ap|op_vec+99
2430 pad_bits:
2431 tsx0 ap|op_vec+100
2432 load_link_pt:
2433 epplp sp|36,*
2434 assign_label_const:
2435 sprilp arg1
2436 sprisp arg1+2
2437 is_label_const:
2438 spribp arg1
2439 sprisp arg1+2
2440 load_display_ptr:
2441 epplp sp|32,*
2442 walk_display_ptr:
2443 epplp lp|32,*
2444 begin_return:
2445 ldq arg1
2446 tra ap|op_vec+47
2447 begin_return_main:
2448 ldq arg1
2449 tra ap|op_vec+443
2450 revert_mac:
2451 stz arg1+4
2452 signal_mac:
2453 eppbp arg1 string
2454 tsx0 ap|op_vec+101
2455 enable_mac:
2456 eppbp arg1 string
2457 tsx0 ap|op_vec+102
2458 tra arg3 body of on_unit
2459 arg arg2 stack loc of on_unit
2460 get_area_mod_8:
2461 eppbp arg1
2462 eaq bp|7
2463 anq =o777770,du
2464 eawpbp 0,qu
2465 spribp arg2
2466 fx1_to_bs:
2467 lda arg1
2468 tpl 2,ic
2469 neg 0
2470 als arg2
2471 fx2_to_bs:
2472 ldaq arg1
2473 tpl 2,ic
2474 negl 0
2475 lls arg2
2476 uns_fx1_to_bs:
2477 lda arg1
2478 als arg2
2479 uns_fx2_to_bs:
2480 ldaq arg1
2481 lls arg2
2482 ix_chars:
2483 tsx0 ap|op_vec+304
2484 ix_rev_chars:
2485 tsx0 ap|op_vec+448
2486 verify_rev_chars:
2487 tsx0 ap|op_vec+449
2488 search_rev_chars:
2489 tsx0 ap|op_vec+450
2490 ix_bits:
2491 tsx0 ap|op_vec+305
2492 move_xor:
2493 csl 0,0,boolxor
2494 zero arg2,bit
2495 zero arg1,bit
2496 beg_ev_proc:
2497 lxl7 0,dl
2498 eppbp sb|ops_ptr,*
2499 tspbp bp|op_vec+190
2500 vfd 18/2,18/0
2501 vfd 36/0
2502 end_ev_proc:
2503 stq arg1
2504 tra ap|op_vec+48
2505 symtab_mac:
2506 eppbp arg2
2507 spribp arg1+2
2508 adwpbp arg3
2509 spribp arg1+4
2510 init_ps_mac:
2511 sprisp arg1
2512 eppbp arg1
2513 spribp sp|ps_ptr
2514 init_sslp:
2515 eppbp arg2
2516 spribp arg1+8
2517 io_signal_mac:
2518 eppbp arg1
2519 tsx0 ap|op_vec+139
2520 end_ev_label:
2521 eppbp arg1
2522 tsx0 ap|op_vec+65 move_label_variable
2523 tra ap|op_vec+48 return
2524 pointer_mac_const:
2525 eawpbp 0
2526 addrel_mac_const:
2527 adwpbp 0,du
2528 pointer_mac_c_ab:
2529 eawpab 0
2530 pointer_mac_c_bb:
2531 eawpbb 0
2532 pointer_mac_c_lb:
2533 eawplb 0
2534 pointer_mac_c_sb:
2535 eawpsb 0
2536 addrel_mac_c_ab:
2537 adwpab 0,du
2538 addrel_mac_c_bb:
2539 adwpbb 0,du
2540 addrel_mac_c_lb:
2541 adwplb 0,du
2542 addrel_mac_c_sb:
2543 adwpsb 0,du
2544 test_lda_ldq:
2545 lda arg1
2546 ldq arg1+1
2547 cmpaq ap|0
2548 testfx1:
2549 cmpq 0,dl
2550 testfx2:
2551 cmpaq ap|0
2552 testfl1:
2553 fcmp ap|2
2554 testfl2:
2555 dfcmp ap|2
2556 ix_before_chars_1:
2557 ix_chars_1:
2558 scm 0,0
2559 zero arg1,char
2560 zero arg2,char
2561 arg sp|46
2562 ldq sp|46
2563 ttf 2,ic
2564 lcq 1,dl
2565 adq 1,dl
2566 ix_chars_2:
2567 scd 0,0
2568 zero arg1,char
2569 zero arg2,char
2570 arg sp|46
2571 ldq sp|46
2572 ttf 2,ic
2573 lcq 1,dl
2574 adq 1,dl
2575 ix_rev_chars_1:
2576 scmr 0,0
2577 zero arg1,char
2578 zero arg2,char
2579 arg sp|46
2580 ldq sp|46
2581 ttf 2,ic
2582 lcq 1,dl
2583 adq 1,dl
2584 ix_rev_chars_2:
2585 scdr 0,0
2586 zero arg1,char
2587 zero arg2,char
2588 arg sp|46
2589 ldq sp|46
2590 ttf 2,ic
2591 lcq 1,dl
2592 adq 1,dl
2593 ix_bits_1:
2594 tsx0 ap|op_vec+307
2595 zero_bits:
2596 csl 0,0,boolmove,fill0
2597 zero 0
2598 zero arg1,bit
2599 one_bits:
2600 csl 0,0,boolmove,fill1
2601 zero 0
2602 zero arg1,bit
2603 bool_mac_1:
2604 xec ap|csl_vector,al
2605 zero arg2,bit
2606 zero arg1,bit
2607 bool_mac_2:
2608 xec ap|csl_vector,0
2609 zero arg2,bit
2610 zero arg1,bit
2611 blank_chars:
2612 mlr 0,0,fillblank
2613 zero 0
2614 zero arg1,char
2615 zero_chars_q:
2616 zero_chars:
2617 mlr 0,0
2618 zero 0
2619 zero arg1,char
2620 one_chars:
2621 mlr 0,0,fill777
2622 zero 0
2623 zero arg1,char
2624 off_mac_easy:
2625 eppbp arg1
2626 tsx0 ap|op_vec+285
2627 off_mac_easy_pk:
2628 eppbp arg1
2629 tsx0 ap|op_vec+286
2630 off_mac_hard:
2631 eppbp arg1
2632 tsx0 ap|op_vec+287
2633 off_mac_hard_pk:
2634 eppbp arg1
2635 tsx0 ap|op_vec+288
2636 quick_return:
2637 rtcd arg1
2638 quick_entry:
2639 quick_entry_args:
2640 quick_entry_desc:
2641 sprilp arg1
2642 spribp arg1+2
2643 eppbp bp|2,au
2644 spribp arg1+4
2645 quick_call:
2646 tsplp arg1
2647 prepare_quick_call:
2648 eppbp arg1
2649 fld arg2
2650 staq bp|0
2651 assign_lab_to_int:
2652 eax0 arg2
2653 sxl0 arg1
2654 load_logical:
2655 lda arg1
2656 mask_logical:
2657 ana =o400000,du
2658 store_logical:
2659 era arg1
2660 ana =o400000,du
2661 ersa arg1
2662 not_logical:
2663 era =o400000,du
2664 tran_sign_fx1:
2665 eppbp arg1
2666 tsx0 ap|op_vec+77
2667 tran_sign_fl:
2668 eppbp arg1
2669 tsx0 ap|op_vec+78
2670 fort_mod_fx1:
2671 div arg1
2672 lrs 36
2673 fort_mod_fl1:
2674 eppbp arg1
2675 tsx0 ap|op_vec+142
2676 "unused_389:
2677 "unused_391:
2678 "unused_392:
2679 rflb1_to_cflb1:
2680 fst sp|44
2681 lda sp|44
2682 ldq =0.0,du
2683 atm_rflb1_to_cflb1:
2684 lda arg1
2685 ldq =0.0,du
2686 rfb1_to_cflb1:
2687 tsx0 ap|op_vec+143
2688 rfb2_to_cflb1:
2689 tsx0 ap|op_vec+144
2690 loop_end_var:
2691 ldq arg2
2692 aos arg2
2693 cmpq arg3
2694 tmi arg1
2695 store_bp_hard:
2696 spribp sp|46
2697 ldaq sp|46
2698 staq arg1
2699 complex_mac:
2700 bump arg1
2701 fetch arg2
2702 fst arg1
2703 drop arg1
2704 fetch arg3
2705 fst arg1+1
2706 **
2707 conjg_mac:
2708 bump arg1
2709 bump arg2
2710 ifnot atm2
2711 cplalt arg2
2712 *
2713 fld arg2
2714 fst arg1
2715 fld arg2+1
2716 fneg 0
2717 fst arg1+1
2718 drop arg1
2719 drop arg2
2720 **
2721 real_mac:
2722 ifnot atm2
2723 cplalt arg2
2724 *
2725 fld arg2
2726 **
2727 imag_mac:
2728 ifnot atm2
2729 cplalt arg2
2730 *
2731 fld arg2+1
2732 drop arg2
2733 **
2734 square_fx1:
2735 stq sp|46
2736 mpy sp|46
2737 square_fl1:
2738 fst sp|46
2739 fmp sp|46
2740 square_fl2:
2741 dfst sp|46
2742 dfmp sp|46
2743 h2w_mac:
2744 adq 1,dl
2745 qrs 1
2746 unpk_to_pk:
2747 tsx0 ap|op_vec+7
2748 pk_to_unpk:
2749 tsx0 ap|op_vec+6
2750 bp_to_aq:
2751 spribp sp|46
2752 ldaq sp|46
2753 lp_to_aq:
2754 sprilp sp|46
2755 ldaq sp|46
2756 real_to_real_rd:
2757 tsx0 ap|op_vec+323
2758 real_to_real_tr:
2759 tsx0 ap|op_vec+324
2760 any_to_any_rd:
2761 tsx0 ap|op_vec+325
2762 any_to_any_tr:
2763 tsx0 ap|op_vec+326
2764 unpack_pic:
2765 tsx0 ap|op_vec+327
2766 edit_pic:
2767 tsx0 ap|op_vec+328
2768 shift_and_mask_1:
2769 als arg1
2770 ana arg2
2771 arl arg1
2772 shift_and_mask_2:
2773 lls arg1
2774 anaq arg2
2775 lrl arg1
2776 return_words:
2777 lxl0 arg1
2778 tra ap|op_vec+183
2779 return_bits:
2780 tra ap|op_vec+309
2781 return_chars:
2782 tra ap|op_vec+308
2783 fetch_chars:
2784 tsx0 ap|op_vec+196
2785 fetch_bits:
2786 fetch_bits_eis:
2787 tsx0 ap|op_vec+197
2788 fetch_chars_eis:
2789 tsx0 ap|op_vec+403
2790 get_term_mac:
2791 tsx0 ap|op_vec+198
2792 put_term_mac:
2793 tsx0 ap|op_vec+199
2794 put_data:
2795 tsx0 ap|op_vec+310
2796 get_list:
2797 tsx0 ap|op_vec+314
2798 get_edit:
2799 tsx0 ap|op_vec+313
2800 put_list:
2801 tsx0 ap|op_vec+312
2802 put_edit:
2803 tsx0 ap|op_vec+311
2804 put_field:
2805 tsx0 ap|op_vec+406
2806 put_field_chk:
2807 tsx0 ap|op_vec+407
2808 put_control:
2809 tsx0 ap|op_vec+408
2810 ftn_read:
2811 tsx0 ap|op_vec+317
2812 ftn_write:
2813 tsx0 ap|op_vec+318
2814 ftn_manip:
2815 tsx0 ap|op_vec+319
2816 ftn_scalar_xmit:
2817 epp2 arg1
2818 tsx0 ap|op_vec+320
2819 ftn_array_xmit:
2820 epp2 arg1
2821 tsx0 ap|op_vec+321
2822 ftn_term:
2823 tsx0 ap|op_vec+322
2824 stream_prep_mac:
2825 lda arg1
2826 eppbp arg2
2827 tsx0 ap|op_vec+205
2828 recio_mac:
2829 lda arg1
2830 tsx0 ap|op_vec+206
2831 unpack_fl1:
2832 sta sp|44
2833 fld sp|44
2834 unpack_fl2:
2835 staq sp|44
2836 dfld sp|44
2837 unpack_cfl1:
2838 lrl arg1
2839 als arg1
2840 pack_fl1:
2841 fst sp|44
2842 lda sp|44
2843 pack_fl2:
2844 dfst sp|44
2845 ldaq sp|44
2846 pack_cfl1:
2847 arl arg1
2848 lls arg1
2849 open_mac:
2850 tsx0 ap|op_vec+207
2851 close_mac:
2852 tsx0 ap|op_vec+208
2853 compare_labels:
2854 ldaq arg1
2855 eraq arg2
2856 anaq ap|ptr_mask_
2857 tnz arg3
2858 compare_files:
2859 ldaq arg1+2
2860 eraq arg2+2
2861 anaq ap|ptr_mask_
2862 fetch_pp:
2863 ldaq arg1
2864 lda sp|46
2865 store_pp:
2866 spribp arg1
2867 stq arg1+1
2868 fxscaled_to_fl2:
2869 lde arg1
2870 fad =0.,du
2871 fl2_to_fxscaled:
2872 tsx0 ap|op_vec+226
2873 "
2874 trunc_fx1:
2875 tsx0 ap|op_vec+227
2876 trunc_fx2:
2877 tsx0 ap|op_vec+228
2878 ceil_fx1:
2879 tsx0 ap|op_vec+229
2880 ceil_fx2:
2881 tsx0 ap|op_vec+230
2882 ceil_fl:
2883 tsx0 ap|op_vec+231
2884 floor_fx1:
2885 tsx0 ap|op_vec+232
2886 floor_fx2:
2887 tsx0 ap|op_vec+233
2888 floor_fl:
2889 tsx0 ap|op_vec+234
2890 nop_mac:
2891 nop 0,du
2892 round_fx1:
2893 tsx0 ap|op_vec+236
2894 round_fx2:
2895 tsx0 ap|op_vec+237
2896 round_fl:
2897 tsx0 ap|op_vec+292
2898 arg arg1
2899 repeat:
2900 tsx0 ap|op_vec+238
2901 verify:
2902 tsx0 ap|op_vec+315
2903 search:
2904 tsx0 ap|op_vec+316
2905 reverse_cs:
2906 tsx0 ap|op_vec+251
2907 reverse_bs:
2908 tsx0 ap|op_vec+252
2909 chars_move_ck:
2910 mlr 0,0,fillblank,enablefault
2911 zero arg2,char
2912 zero arg1,char
2913 bits_move_ck:
2914 csl 0,0,boolmove,enablefault
2915 zero arg2,bit
2916 zero arg1,bit
2917 signal_stringsize:
2918 tsx0 ap|op_vec+267
2919 size_check_fx1:
2920 tsx0 ap|op_vec+265
2921 size_check_fx2:
2922 tsx0 ap|op_vec+266
2923 size_check_uns_fx1:
2924 tsx0 ap|op_vec+444
2925 size_check_uns_fx2:
2926 tsx0 ap|op_vec+445
2927 size_ck_varying:
2928 cmpq arg1
2929 tmoz 3,ic
2930 tsx0 ap|op_vec+267
2931 ldq arg1
2932 size_ck_suffix:
2933 cmpq arg1
2934 tpl 3,ic
2935 tsx0 ap|op_vec+267
2936 tra 2,ic
2937 ldq arg1
2938 cmp_suffix_1:
2939 cmpq arg1
2940 tpl 5,ic
2941 size_ck_suffix_1:
2942 cmpq arg1
2943 tmi 3,ic
2944 tsx0 ap|op_vec+267
2945 tra 5,ic
2946 size_ck_decimal:
2947 eax0 2,ic
2948 tov ap|op_vec+385
2949 move_3:
2950 move_odd:
2951 lda arg2
2952 sta arg1
2953 lda arg2+1
2954 sta arg1+1
2955 lda arg2+2
2956 sta arg1+2
2957 move_odd_odd_3:
2958 move_odd_odd_5:
2959 lda arg2
2960 sta arg1
2961 ldaq arg2+1
2962 staq arg1+1
2963 ldaq arg2+3
2964 staq arg1+3
2965 move_odd_odd_4:
2966 lda arg2
2967 sta arg1
2968 ldaq arg2+1
2969 staq arg1+1
2970 lda arg2+3
2971 sta arg1+3
2972 move_odd_even_3:
2973 ldaq arg2
2974 sta arg1
2975 stq arg1+1
2976 lda arg2+2
2977 sta arg1+2
2978 move_odd_even_4:
2979 ldaq arg2
2980 sta arg1
2981 stq arg1+1
2982 ldaq arg2+2
2983 sta arg1+2
2984 stq arg1+3
2985 move_even_odd_3:
2986 lda arg2
2987 ldq arg2+1
2988 staq arg1
2989 lda arg2+2
2990 sta arg1+2
2991 move_even_odd_4:
2992 lda arg2
2993 ldq arg2+1
2994 staq arg1
2995 lda arg2+2
2996 ldq arg2+3
2997 staq arg1+2
2998 move_even:
2999 move_even_even_3:
3000 ldaq arg2
3001 staq arg1
3002 lda arg2+2
3003 sta arg1+2
3004 move_even_even_4:
3005 move_even_even_6:
3006 ldaq arg2
3007 staq arg1
3008 ldaq arg2+2
3009 staq arg1+2
3010 ldaq arg2+4
3011 staq arg1+4
3012 move_even_even_5:
3013 ldaq arg2
3014 staq arg1
3015 ldaq arg2+2
3016 staq arg1+2
3017 lda arg2+4
3018 sta arg1+4
3019 pl1_ptr_hard:
3020 tsx0 ap|op_vec+270
3021 pl1_ptr_hard_pk:
3022 tsx0 ap|op_vec+289
3023 pl1_ptr_easy:
3024 tsx0 ap|op_vec+290
3025 pl1_ptr_easy_pk:
3026 tsx0 ap|op_vec+291
3027 xr_to_q:
3028 eaq arg1
3029 qrs 18
3030 xr18_to_q:
3031 eaq arg1
3032 qrl 18
3033 packed_to_bp:
3034 stq sp|46
3035 lprpbp sp|46
3036 packed_bit_offset:
3037 qrl 30
3038 move_words:
3039 copy_mac:
3040 mlr 0,0
3041 zero arg2,char
3042 zero arg1,char
3043 ext_entry:
3044 eax7 0
3045 eppbp sb|ops_ptr,*
3046 tspbp bp|op_vec+188
3047 ext_entry_desc:
3048 eax7 0
3049 eppbp sb|ops_ptr,*
3050 tspbp bp|op_vec+189
3051 int_entry:
3052 eax7 0
3053 eppbp sb|ops_ptr,*
3054 tspbp bp|op_vec+190
3055 int_entry_desc:
3056 eax7 0
3057 eppbp sb|ops_ptr,*
3058 tspbp bp|op_vec+191
3059 val_entry:
3060 eax7 0
3061 eppbp sb|ops_ptr,*
3062 tspbp bp|op_vec+192
3063 val_entry_desc:
3064 eax7 0
3065 eppbp sb|ops_ptr,*
3066 tspbp bp|op_vec+193
3067 ss_ext_entry:
3068 eax7 0
3069 eppbp sb|ops_ptr,*
3070 tspbp bp|op_vec+386
3071 ss_ext_entry_desc:
3072 eax7 0
3073 eppbp sb|ops_ptr,*
3074 tspbp bp|op_vec+387
3075 ss_int_entry:
3076 eax7 0
3077 eppbp sb|ops_ptr,*
3078 tspbp bp|op_vec+388
3079 ss_int_entry_desc:
3080 eax7 0
3081 eppbp sb|ops_ptr,*
3082 tspbp bp|op_vec+389
3083 ss_val_entry:
3084 eax7 0
3085 eppbp sb|ops_ptr,*
3086 tspbp bp|op_vec+390
3087 ss_val_entry_desc:
3088 eax7 0
3089 eppbp sb|ops_ptr,*
3090 tspbp bp|op_vec+391
3091 inline_verify:
3092 scm 0,0
3093 zero arg2,char
3094 zero arg1,char
3095 arg sp|46
3096 ldq 1,dl
3097 ttn 2,ic
3098 ldq 0,dl
3099 inline_search:
3100 scm 0,0
3101 zero arg2,char
3102 zero arg1,char
3103 arg sp|46
3104 ldq 1,dl
3105 ttf 2,ic
3106 ldq 0,dl
3107 verify_ltrim_inline:
3108 test_translate:
3109 tct 0
3110 zero arg1,char
3111 zero arg2,addr
3112 arg sp|46
3113 ldq sp|46
3114 anq ap|tct_mask_
3115 ttf 2,ic
3116 lcq 1,dl
3117 adq 1,dl
3118 verify_rtrim_inline:
3119 test_trans_rev:
3120 tctr 0
3121 zero arg1,char
3122 zero arg2,addr
3123 arg sp|46
3124 ldq sp|46
3125 anq ap|tct_mask_
3126 ttf 2,ic
3127 lcq 1,dl
3128 adq 1,dl
3129 "
3130 sqrt_mac:
3131 tsp3 ap|op_vec+339
3132 sin_mac:
3133 tsp3 ap|op_vec+340
3134 sind_mac:
3135 tsp3 ap|op_vec+341
3136 cos_mac:
3137 tsp3 ap|op_vec+342
3138 cosd_mac:
3139 tsp3 ap|op_vec+343
3140 tan_mac:
3141 tsp3 ap|op_vec+344
3142 tand_mac:
3143 tsp3 ap|op_vec+345
3144 asin_mac:
3145 tsp3 ap|op_vec+346
3146 asind_mac:
3147 tsp3 ap|op_vec+347
3148 acos_mac:
3149 tsp3 ap|op_vec+348
3150 acosd_mac:
3151 tsp3 ap|op_vec+349
3152 atan_mac:
3153 tsp3 ap|op_vec+350
3154 atand_mac:
3155 tsp3 ap|op_vec+351
3156 log2_mac:
3157 tsp3 ap|op_vec+352
3158 log_mac:
3159 tsp3 ap|op_vec+353
3160 log10_mac:
3161 tsp3 ap|op_vec+354
3162 exp_mac:
3163 tsp3 ap|op_vec+355
3164 dsqrt_mac:
3165 tsp3 ap|op_vec+356
3166 dsin_mac:
3167 tsp3 ap|op_vec+357
3168 dsind_mac:
3169 tsp3 ap|op_vec+358
3170 dcos_mac:
3171 tsp3 ap|op_vec+359
3172 dcosd_mac:
3173 tsp3 ap|op_vec+360
3174 dtan_mac:
3175 tsp3 ap|op_vec+361
3176 dtand_mac:
3177 tsp3 ap|op_vec+362
3178 dasin_mac:
3179 tsp3 ap|op_vec+363
3180 dasind_mac:
3181 tsp3 ap|op_vec+364
3182 dacos_mac:
3183 tsp3 ap|op_vec+365
3184 dacosd_mac:
3185 tsp3 ap|op_vec+366
3186 datan_mac:
3187 tsp3 ap|op_vec+367
3188 datand_mac:
3189 tsp3 ap|op_vec+368
3190 dlog2_mac:
3191 tsp3 ap|op_vec+369
3192 dlog_mac:
3193 tsp3 ap|op_vec+370
3194 dlog10_mac:
3195 tsp3 ap|op_vec+371
3196 dexp_mac:
3197 tsp3 ap|op_vec+372
3198 atan2_mac:
3199 tsp3 ap|op_vec+373
3200 atan2d_mac:
3201 tsp3 ap|op_vec+374
3202 datan2_mac:
3203 tsp3 ap|op_vec+375
3204 datan2d_mac:
3205 tsp3 ap|op_vec+376
3206 int_p_real:
3207 tsp3 ap|op_vec+377
3208 int_p_dbl:
3209 tsp3 ap|op_vec+378
3210 dbl_p_real:
3211 tsp3 ap|op_vec+379
3212 dbl_p_dbl:
3213 tsp3 ap|op_vec+380
3214 dbl_p_int:
3215 tsp3 ap|op_vec+381
3216 real_p_real:
3217 tsp3 ap|op_vec+382
3218 real_p_int:
3219 tsp3 ap|op_vec+383
3220 int_p_int:
3221 tsp3 ap|op_vec+384
3222 " state_man$flush called after this macro
3223 enable_file:
3224 eppbp arg2
3225 eaa arg1
3226 tsx0 ap|op_vec+293
3227 tra arg3
3228 " state_man$flush called after this macro
3229 enable_file_2:
3230 eppbp arg2
3231 eaa arg1
3232 ora arg4
3233 tsx0 ap|op_vec+293
3234 tra arg3
3235 "
3236 revert_file:
3237 eppbp arg2
3238 eaa arg1
3239 tsx0 ap|op_vec+294
3240 "
3241 alloc_block:
3242 eppbp arg1
3243 tsx0 ap|op_vec+295
3244 "
3245 free_block:
3246 eppbp arg1
3247 tsx0 ap|op_vec+296
3248 "
3249 push_ctl_data:
3250 eppbp arg1
3251 tsx0 ap|op_vec+297
3252 "
3253 push_ctl_desc:
3254 eppbp arg1
3255 tsx0 ap|op_vec+298
3256 "
3257 pop_ctl_data:
3258 eppbp arg1
3259 tsx0 ap|op_vec+299
3260 "
3261 pop_ctl_desc:
3262 eppbp arg1
3263 tsx0 ap|op_vec+300
3264 "
3265 allocation:
3266 eppbp arg1
3267 tsx0 ap|op_vec+301
3268 "
3269 ab_to_aq:
3270 spri1 sp|46
3271 ldaq sp|46
3272 "
3273 bb_to_aq:
3274 spri3 sp|46
3275 ldaq sp|46
3276 "
3277 lb_to_aq:
3278 spri5 sp|46
3279 ldaq sp|46
3280 "
3281 sb_to_aq:
3282 spri7 sp|46
3283 ldaq sp|46
3284 "
3285 zero_bo_bp:
3286 adwpbp 0,du
3287 zero_bo_ab:
3288 adwpab 0,du
3289 zero_bo_bb:
3290 adwpbb 0,du
3291 zero_bo_lb:
3292 adwplb 0,du
3293 zero_bo_sb:
3294 adwpsb 0,du
3295 "
3296 abd:
3297 abd ap|arg1
3298 "
3299 a9bd:
3300 a9bd ap|arg1
3301 "
3302 a4bd:
3303 a4bd ap|arg1
3304 "
3305 zero_mac_p_1:
3306 stz arg1+1
3307 "
3308 alloc_based_area:
3309 tsx0 pr0|op_vec+409
3310 tra arg1
3311 alloc_based_mac:
3312 tsx0 pr0|op_vec+410
3313 tra arg1
3314 free_based_mac:
3315 tsx0 pr0|op_vec+411
3316 empty_area_mac:
3317 tsx0 pr0|op_vec+412
3318 "
3319 long_profile_mac:
3320 tsx0 pr0|op_vec+426
3321 "
3322 ix_before_chars:
3323 tsx0 ap|op_vec+427
3324 ix_before_bits:
3325 tsx0 ap|op_vec+428
3326 ix_after_chars:
3327 tsx0 ap|op_vec+429
3328 ix_after_bits:
3329 tsx0 ap|op_vec+430
3330 ix_before_bits_1:
3331 tsx0 ap|op_vec+431
3332 ix_after_chars_1:
3333 scm 0,0
3334 zero arg1,char
3335 zero arg2,char
3336 arg sp|46
3337 ldq sp|46
3338 ttn 2,ic
3339 adq 1,dl
3340 ix_after_bits_1:
3341 tsx0 ap|op_vec+432
3342 ix_before_chars_2:
3343 scd 0,0
3344 zero arg1,char
3345 zero arg2,char
3346 arg sp|46
3347 ldq sp|46
3348 ttf 2,ic
3349 adq 1,dl
3350 ix_after_chars_2:
3351 scd 0,0
3352 zero arg1,char
3353 zero arg2,char
3354 arg sp|46
3355 ldq sp|46
3356 adq 1,dl
3357 ttn 2,ic
3358 adq 1,dl
3359 verify_ltrim:
3360 tsx0 ap|op_vec+433
3361 verify_rtrim:
3362 tsx0 ap|op_vec+434
3363 "
3364 stacq_mac:
3365 ldq arg1
3366 tsx0 ap|op_vec+435
3367 "
3368 clock_mac:
3369 tsx0 ap|op_vec+436
3370 "
3371 vclock_mac:
3372 tsx0 ap|op_vec+437
3373 "
3374 stop_mac:
3375 tra ap|op_vec+440
3376 "
3377 return_main_mac:
3378 tra ap|op_vec+441
3379 "
3380 set_main_mac:
3381 tsx0 ap|op_vec+442
3382 "
3383 zero_4bcs:
3384 mlr 0,0,fill0
3385 zero 0
3386 zero arg1,char4+2
3387 "
3388 rank_eis_mac:
3389 mrl 0,0,fill0
3390 zero arg2,char+1
3391 zero arg1,char+4
3392 "
3393 prepare_call_long:
3394 eax1 arg1
3395 lda arg2
3396 ldq 0,du
3397 "
3398 prepare_quick_call_long:
3399 eppbp arg1
3400 lda arg2
3401 ldq 0,du
3402 staq bp|0
3403
3404 charno_mac:
3405 llr 18 " word count in AL, bit in QU
3406 ana =o777777,dl " flush ringno from AU
3407 als 2 " char count
3408 ada ap|bitno_to_charno_,qu " bitno is in QU
3409 lrl 36 " back to the Q
3410 bitno_mac:
3411 " S R
3412 " W B
3413 llr 54 " B S
3414 " R W
3415 ars 18 " 0 B
3416 " R W
3417 sta sp|46 " stash
3418 anq =o777777,dl " 0 B
3419 " 0 W
3420 mpy 36,dl " 0 0
3421 " W*36
3422 adq sp|46 " 0 0
3423 " W*36+B
3424
3425 end