1 " ***********************************************************
2 " * *
3 " * Copyright, C Honeywell Information Systems Inc., 1982 *
4 " * *
5 " * Copyright c 1972 by Massachusetts Institute of *
6 " * Technology and Honeywell Information Systems, Inc. *
7 " * *
8 " ***********************************************************
9
10 " " " " " " " " " "
11 "
12 " This is the I/O switch transfer vector for the nstd_dim outer module
13 "
14 " " " " " " " " " "
15
16 entry nstd_module
17 nstd_module:
18 tra *+1,6 go to proper transfer instruction
19
20 tra <nstd_dim>|nstd_attach
21 tra <nstd_dim>|nstd_detach
22 tra <nstd_dim>|nstd_read
23 tra <nstd_dim>|nstd_write
24 tra <ios_>|no_entry
25 tra <nstd_dim>|nstd_order
26 tra <ios_>|no_entry
27 tra <ios_>|no_entry
28 tra <ios_>|no_entry
29 tra <nstd_dim>|nstd_getsize
30 tra <ios_>|no_entry
31 tra <ios_>|no_entry
32 tra <ios_>|no_entry
33 tra <ios_>|no_entry
34 tra <nstd_dim>|nstd_cmode
35 tra <ios_>|no_entry
36 tra <ios_>|no_entry
37 tra <ios_>|no_entry
38 tra <ios_>|no_entry
39 tra <ios_>|no_entry
40 tra <ios_>|no_entry
41
42 end