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38 start_cpu:
39 proc (tag, rcode);
40
41 dcl tag fixed bin (3),
42 rcode fixed bin (35);
43
44 dcl abs_ptr ptr,
45 prds_sdwp ptr,
46 prds_sdw bit (72) aligned,
47 prds_astep ptr,
48 prds_no fixed bin (18),
49 pdp ptr,
50 old_pdp ptr,
51 old_tag fixed bin (3),
52 found_mask bit (1) aligned,
53 ptp ptr,
54 mask_temp fixed bin (71),
55 int_vec_save bit (36) aligned,
56 trouble_save bit (36) aligned,
57 startup_save bit (36) aligned,
58 onc_save bit (36) aligned,
59 lockup_save bit (36) aligned,
60 i fixed bin,
61 abs_seg_p ptr,
62 fv_iv_p ptr,
63 switch_rel fixed bin (18),
64 switchp ptr,
65 rsw1_68p ptr,
66 rsw1_8p ptr,
67 rsw4p ptr,
68 cmpp ptr,
69 trgp ptr,
70 (tbase, tsize) fixed bin (24),
71 L68_prt_sze fixed bin (24),
72 found bit (1) aligned,
73 dps8_add bit (1) aligned,
74 remember (0:7) fixed bin,
75 base fixed bin,
76 tcode fixed bin (35),
77 cpu_mask bit (8) aligned,
78 cpu_model char (11) aligned,
79 cpu_serial char (11) aligned,
80 cpu_ship_date char (6) aligned;
81
82 dcl 1 tsdw (0:7) aligned like sdw,
83 1 tsdw1 aligned like sdw,
84 fv_iv_copy (2048) fixed bin based (fv_iv_p),
85
86 based_switches (0:4) bit (36) aligned based (switchp);
87
88
89
90 dcl LETTERS char (8) static options (constant) init ("ABCDEFGH");
91
92 dcl abs_seg$ ext,
93 sst_seg$ ext,
94 idle_dsegs$ (0:8 * 1024 - 1 ) bit (72) aligned ext,
95 prds$ ext,
96 dseg$ ext,
97 fault_vector$ ext,
98 pds$processid bit (36) aligned ext,
99 prds$idle_ptr ptr ext,
100 prds$processor_tag fixed bin (3) ext,
101 prds$processor_pattern bit (8) aligned ext,
102 tc_data$prds_length fixed bin (18) ext,
103 tc_data$ncpu fixed bin ext,
104 fv_iv_template$fv_iv_template
105 ext,
106 fv_iv_template$rsw_data
107 (4) bit (36) aligned ext,
108 init_processor$wait_flag
109 fixed bin (35) ext,
110 init_processor$new_dbr fixed bin (71) ext,
111 init_processor$first_tra
112 bit (36) aligned ext,
113 init_processor$trouble_tra
114 bit (36) aligned ext,
115 init_processor$startup_tra
116 bit (36) aligned ext,
117 init_processor$onc_tra bit (36) aligned ext,
118 init_processor$lockup_tra
119 bit (36) aligned ext,
120 init_processor$controller_data
121 bit (8) aligned ext,
122 sys_info$system_type fixed bin ext;
123
124 dcl init_processor$start_bootload_cpu
125 entry,
126 stop_cpu$destroy_1 entry (fixed bin (3), fixed bin (35)),
127 scr_util$reassign_mask entry (fixed bin (3), fixed bin (3)),
128 scr_util$set_mask entry (fixed bin (3), fixed bin (3), bit (72) aligned),
129 scr_util$set_port_enable
130 entry (fixed bin (3), bit (1) unal),
131 scr_util$update_export_xipmsk
132 entry (fixed bin (3)),
133 scr_util$set_export_enable
134 entry (fixed bin (3), fixed bin (3), bit (1) aligned),
135 mask_instruction$smcm entry returns (bit (36) aligned),
136 mask_instruction$rmcm entry returns (bit (36) aligned),
137 config_$find_2 entry (char (4) aligned, fixed bin, ptr),
138 config_$update entry (),
139 syserr entry options (variable),
140 syserr$error_code entry options (variable),
141 privileged_mode_ut$swap_sdw
142 entry (ptr, ptr),
143 privileged_mode_ut$smic
144 entry (bit (36) aligned),
145 privileged_mode_ut$cioc
146 entry (ptr),
147 privileged_mode_ut$wire_and_mask
148 entry (fixed bin (71), ptr),
149 privileged_mode_ut$unwire_unmask
150 entry (fixed bin (71), ptr),
151 privileged_mode_ut$read_id_prom
152 entry (char (*) aligned, fixed bin),
153 validate_cpu_card entry (fixed bin (3), ptr),
154 wire_proc$wire_me entry,
155 get_ptrs_$given_astep entry (ptr) returns (bit (72)),
156 wire_proc$unwire_me entry,
157 set_procs_required entry (bit (8) aligned, fixed bin (35)),
158 pc_wired$wire_wait entry (ptr, fixed bin, fixed bin),
159 pc_abs$remove_core entry (fixed bin, fixed bin, fixed bin (35)),
160 freecore entry (fixed bin),
161 prds_init entry (ptr, fixed bin (3), ptr),
162 pxss$thread_in_idle entry (ptr);
163
164 dcl 1 pdata like scs$processor_data based (pdp) aligned;
165
166 dcl 1 opdata like scs$processor_data based (old_pdp) aligned;
167
168
169 dcl (addr, baseno, bin, bit, bool, divide, fixed, ptr, rel, stac, stacq, string, substr, unspec)
170 builtin;
171 %page;
172 abs_ptr = addr (abs_seg$);
173 prds_sdwp = addr (prds_sdw);
174
175 fgbxp = addr (flagbox$);
176
177
178
179
180 aptep = scs$idle_aptep (tag);
181 apte.processid = rel (aptep) || (6)"101"b;
182 apte.flags.loaded = "1"b;
183 apte.flags.eligible = "1"b;
184 apte.flags.idle = "1"b;
185 apte.flags.default_procs_required = "0"b;
186 apte.procs_required = "0"b;
187 substr (apte.procs_required, tag + 1, 1) = "1"b;
188 apte.flags.state = bit (bin (2, 18));
189 apte.timax = 16000000;
190 call pxss$thread_in_idle (aptep);
191
192
193
194
195 if tag = scs$bos_processor_tag then
196 prds$idle_ptr = aptep;
197 else do;
198 prds_astep = ptr (addr (sst_seg$), apte.prds);
199 prds_sdw = get_ptrs_$given_astep (prds_astep);
200 addr (prds_sdw) -> sdw.access = addr (dseg$) -> sdwa.access (fixed (baseno (addr (prds$)), 18));
201 addr (prds_sdw) -> sdw.bound = bit (divide (tc_data$prds_length - 1, 16, 14), 14);
202 call pc_wired$wire_wait (prds_astep, 0, divide (tc_data$prds_length + 1023, 1024, 17, 0));
203
204 prds_no = bin (baseno (addr (prds$)), 18);
205 do i = 0 to tag - 1;
206 if scs$processor_data (i).offline | scs$processor_data (i).online then
207 if sys_info$system_type = ADP_SYSTEM then
208 prds_no = prds_no + 1024;
209 else prds_no = prds_no + 512;
210 end;
211 idle_dsegs$ (prds_no) = prds_sdw;
212 call privileged_mode_ut$swap_sdw (abs_ptr, prds_sdwp);
213
214 call prds_init (abs_ptr, tag, aptep);
215 end;
216 %page;
217
218
219 pdp = addr (scs$processor_data (tag));
220 found_mask = "0"b;
221 if ^pdata.interrupt_cpu then do;
222 do old_tag = 0 to 7 while (^found_mask);
223 old_pdp = addr (scs$processor_data (old_tag));
224
225 if opdata.interrupt_cpu &
226 (old_tag ^= scs$bos_processor_tag) then do;
227 found_mask = "1"b;
228
229 if opdata.online then do;
230 cpu_mask = "0"b;
231 substr (cpu_mask, old_tag + 1, 1) = "1"b;
232 call set_procs_required (cpu_mask, tcode);
233
234 if tcode ^= 0 then do;
235 rcode = rcerr_sprq_failed;
236 return;
237 end;
238 call wire_proc$wire_me;
239 call privileged_mode_ut$wire_and_mask (mask_temp, ptp);
240 end;
241 opdata.interrupt_cpu = "0"b;
242 scs$mask_ptr (old_tag) = scs$mask_ptr (tag);
243
244 scs$set_mask (old_tag) = scs$set_mask (tag);
245
246 scs$read_mask (old_tag) = scs$read_mask (tag);
247
248 if opdata.online then do;
249 call privileged_mode_ut$unwire_unmask (mask_temp, ptp);
250 call wire_proc$unwire_me;
251 call set_procs_required ("0"b, (0));
252 end;
253 if opdata.expanded_port & opdata.online then
254 call scr_util$update_export_xipmsk ((opdata.controller_port));
255 call scr_util$reassign_mask (old_tag, tag);
256
257 end;
258 end;
259
260 if ^found_mask then
261 call scr_util$reassign_mask (-1, tag);
262
263 scs$mask_ptr (tag) = addr (scs$port_addressing_word (scs$interrupt_controller));
264
265 scs$set_mask (tag) = mask_instruction$smcm ();
266
267 scs$read_mask (tag) = mask_instruction$rmcm ();
268
269 pdata.interrupt_cpu = "1"b;
270 end;
271
272
273
274 rswp = addr (scs$processor_switch_template (2));
275 dps_rsw_2.cpu_num = tag;
276 %page;
277
278
279 init_processor$new_dbr = apte.dbr;
280
281 if tag ^= scs$bos_processor_tag then do;
282
283
284
285 remember = 0;
286 string (tsdw1) = "0"b;
287 tsdw1.df = "1"b;
288 tsdw1.read = "1"b;
289 tsdw1.write = "1"b;
290 tsdw1.bound = bit (bin (127, 14), 14);
291 tsdw1.unpaged = "1"b;
292 abs_seg_p = addr (abs_seg$);
293 fv_iv_p = addr (fv_iv_template$fv_iv_template);
294
295 do i = 0 to 7;
296 base = scs$controller_data (i).base;
297 if (base ^= 0) & scs$controller_data (i).online then do;
298 call pc_abs$remove_core (base, 2, tcode);
299 if tcode = 0 then do;
300 tsdw (i) = tsdw1;
301 tsdw (i).add = bit (bin (base * 1024, 24), 24);
302 call privileged_mode_ut$swap_sdw (abs_seg_p, addr (tsdw (i)));
303 abs_seg_p -> fv_iv_copy = fv_iv_p -> fv_iv_copy;
304 remember (i) = base;
305 end;
306 end;
307 end;
308
309
310
311 call scr_util$set_mask (scs$interrupt_controller, (pdata.controller_port), scs$sys_level);
312
313 call scr_util$set_port_enable ((pdata.controller_port), "1"b);
314
315 if pdata.expanded_port then do;
316 call scr_util$set_export_enable ((pdata.controller_port), (pdata.expander_port), "1"b);
317 call scr_util$update_export_xipmsk ((pdata.controller_port));
318
319 end;
320 %page;
321
322
323 init_processor$wait_flag = rcerr_addcpu_no_response;
324
325 init_processor$controller_data = "0"b;
326 do i = 0 to 7;
327 substr (init_processor$controller_data, i + 1, 1) = scs$controller_data (i).online;
328 end;
329
330
331
332 call privileged_mode_ut$wire_and_mask (mask_temp, ptp);
333 call wire_proc$wire_me;
334
335 do while (^stac (addr (scs$connect_lock), pds$processid));
336 end;
337
338 scs$processor_start_wait = scs$processor & ^prds$processor_pattern;
339
340 do i = 0 to 7;
341 old_pdp = addr (scs$processor_data (i));
342 if (i ^= prds$processor_tag) & old_pdp -> pdata.online then
343 call privileged_mode_ut$cioc (addr (scs$cow (i).cow));
344
345 end;
346
347 do while (scs$processor_start_wait);
348 end;
349
350
351
352 fvp = addr (fault_vector$);
353 int_vec_save = fv.ipair (scs$processor_start_int_no).scu;
354 fv.ipair (scs$processor_start_int_no).scu = init_processor$first_tra;
355
356 trouble_save = fv.fpair (FAULT_NO_TRB).scu;
357 fv.fpair (FAULT_NO_TRB).scu = init_processor$trouble_tra;
358
359 startup_save = fv.fpair (FAULT_NO_SUF).scu;
360 fv.fpair (FAULT_NO_SUF).scu = init_processor$startup_tra;
361
362 onc_save = fv.fpair (FAULT_NO_ONC).scu;
363 fv.fpair (FAULT_NO_ONC).scu = init_processor$onc_tra;
364
365 lockup_save = fv.fpair (FAULT_NO_LUF).scu;
366 fv.fpair (FAULT_NO_LUF).scu = init_processor$lockup_tra;
367
368 %page;
369
370
371 call privileged_mode_ut$smic (scs$processor_start_pattern);
372
373 call scr_util$set_mask (scs$interrupt_controller, (pdata.controller_port), scs$processor_start_mask);
374
375 to_loop:
376 do i = 1 to 5000 while (init_processor$wait_flag = rcerr_addcpu_no_response);
377 end;
378 rcode = init_processor$wait_flag;
379
380
381
382
383
384
385
386 if rcode = rcerr_addcpu_bad_switches then do;
387 scs$processor_switch_compare = scs$processor_switch_compare & scs$processor_switch_mask;
388 cmpp = addr (scs$processor_switch_compare (2));
389
390 if cmpp -> dps8_rsw_2.cpu_type ^= 0 &
391 scs$processor_switch_compare (3) = "0"b then do;
392
393 if dps_rsw_2.cpu_type = 0 then do;
394 dps8_add = "1"b;
395 rsw4p = addr (scs$processor_switch_template (4));
396
397 rsw1_68p = addr (scs$processor_switch_template (1));
398
399 rsw1_8p = addr (scs$processor_switch_data (1));
400
401 switchp = addr (scs$processor_switch_data (2));
402
403 end;
404 else do;
405 dps8_add = "0"b;
406 rsw4p = addr (scs$processor_switch_data (4));
407
408 rsw1_68p = addr (scs$processor_switch_data (1));
409
410 rsw1_8p = addr (scs$processor_switch_template (1));
411
412 switchp = addr (scs$processor_switch_template (2));
413
414 rswp = addr (scs$processor_switch_data (2));
415
416 end;
417 cmpp = addr (scs$processor_switch_compare (1));
418
419 trgp = addr (scs$processor_switch_data (1));
420
421 found = "0"b;
422 do i = 0 to 3;
423 if scs$controller_data (i).online |
424
425 scs$controller_data (i).offline then do;
426
427 L68_prt_sze = dps_mem_size_table (rsw1_68p -> rsw_1_3.port_info (i).mem_size);
428 if rsw4p -> rsw_4.port_info (i).half then
429
430 L68_prt_sze = divide (L68_prt_sze, 2, 24, 0);
431
432 if L68_prt_sze ^= dps8_mem_size_table (rsw1_8p -> rsw_1_3.port_info (i).mem_size) then
433 found = "1"b;
434 else cmpp -> rsw_1_3.port_info (i).mem_size = 0;
435
436 tbase = scs$controller_data (i).base * 1024;
437
438 if dps8_add then
439 tsize = dps8_mem_size_table (trgp -> rsw_1_3.port_info (i).mem_size);
440 else tsize = dps_mem_size_table (trgp -> rsw_1_3.port_info (i).mem_size);
441
442 if trgp -> rsw_1_3.port_info (i).port_assignment
443 ^= bit (divide (tbase, tsize, 3, 0), 3) then
444 found = "1"b;
445 else cmpp -> rsw_1_3.port_info (i).port_assignment = "0"b;
446
447 end;
448 else do;
449 cmpp -> rsw_1_3.port_info (i).mem_size = 0;
450 cmpp -> rsw_1_3.port_info (i).port_assignment = "0"b;
451 end;
452 if cmpp -> rsw_1_3.port_info (i).port_enable then
453 found = "1"b;
454 if cmpp -> rsw_1_3.port_info (i).initialize_enable then
455 found = "1"b;
456 if cmpp -> rsw_1_3.port_info (i).interlace_enable then
457 found = "1"b;
458 if rsw1_68p -> rsw_1_3.port_info (i).interlace_enable then
459 if rsw4p -> rsw_4.port_info (i).four ^= switchp -> dps8_rsw_2.interlace_info (i) then
460 found = "1"b;
461 end;
462 if ^found then do;
463 init_processor$wait_flag = rcerr_addcpu_no_response;
464
465 go to to_loop;
466 end;
467 end;
468 init_processor$wait_flag = -1;
469 end;
470
471
472
473
474 fv.ipair (scs$processor_start_int_no).scu = int_vec_save;
475 fv.fpair (FAULT_NO_TRB).scu = trouble_save;
476 fv.fpair (FAULT_NO_SUF).scu = startup_save;
477 fv.fpair (FAULT_NO_ONC).scu = onc_save;
478 fv.fpair (FAULT_NO_LUF).scu = lockup_save;
479
480 if ^stacq (scs$connect_lock, (36)"0"b, scs$connect_lock) then
481 ;
482
483 call wire_proc$unwire_me;
484 call privileged_mode_ut$unwire_unmask (mask_temp, ptp);
485
486
487
488 if rcode = rcerr_addcpu_no_response then do;
489 switch_rel = bin (rel (addr (fv_iv_template$rsw_data)), 18) - bin (rel (fv_iv_p), 18);
490 switchp = ptr (abs_seg_p, switch_rel);
491 found = "0"b;
492 do i = 0 to 7 while (^found);
493 if remember (i) ^= 0 then do;
494 call privileged_mode_ut$swap_sdw (abs_seg_p, addr (tsdw (i)));
495 if unspec (based_switches) then do;
496 scs$processor_switch_compare =
497 bool (scs$processor_switch_template, based_switches, "0110"b);
498 scs$processor_switch_compare =
499 scs$processor_switch_compare & scs$processor_switch_mask;
500 rcode = rcerr_addcpu_bad_switches;
501
502 init_processor$wait_flag = -1;
503
504 found = "1"b;
505 end;
506 end;
507 end;
508 end;
509 %page;
510
511
512 do i = 0 to 7;
513 base = remember (i);
514 if base > 0 then do;
515 call freecore (base);
516 call freecore (base + 1);
517 end;
518 end;
519
520 string (tsdw1) = "0"b;
521 call privileged_mode_ut$swap_sdw (abs_seg_p, addr (tsdw1));
522 if rcode ^= 0 then do;
523 call stop_cpu$destroy_1 (tag, tcode);
524 return;
525 end;
526 end;
527
528
529
530 else do;
531 call init_processor$start_bootload_cpu;
532 fgbx.hc_dbr = unspec (apte.dbr);
533 end;
534
535
536
537 call config_$find_2 (CPU_CARD_WORD, tag + 1, cpu_cardp);
538
539 cpu_card.state = "on ";
540 call config_$update ();
541 scs$nprocessors = scs$nprocessors + 1;
542 tc_data$ncpu = tc_data$ncpu + 1;
543 rswp = addr (scs$processor_switch_data (2));
544 pdata.cpu_type = dps_rsw_2.cpu_type;
545 call validate_cpu_card (tag, rswp);
546
547 if tag ^= scs$bos_processor_tag then do;
548 call syserr (ANNOUNCE, "start_cpu: Added CPU ^a.", substr (LETTERS, tag + 1, 1));
549 if pdata.cpu_type > 0 then
550 if addr (scs$processor_switch_data (2)) -> dps8_rsw_2.id_prom then do;
551
552 cpu_mask = "0"b;
553 substr (cpu_mask, tag + 1, 1) = "1"b;
554 call set_procs_required (cpu_mask, tcode);
555
556 if tcode ^= 0 then
557 call syserr$error_code (CRASH, tcode, "start_cpu: Unable to run on CPU ^a",
558 substr (LETTERS, tag + 1, 1));
559 call privileged_mode_ut$read_id_prom (cpu_model, 0);
560
561 call privileged_mode_ut$read_id_prom (cpu_serial, 11);
562
563 call privileged_mode_ut$read_id_prom (cpu_ship_date, 22);
564
565 call set_procs_required ("0"b, (0));
566 call syserr (LOG, "start_cpu: CPU ^a: Model #: ^a; Serial #: ^a; Ship date: ^a.",
567 substr (LETTERS, tag + 1, 1), cpu_model, cpu_serial, cpu_ship_date);
568
569 end;
570 if scs$processor_switch_data (0) ^= scs$processor_data_switch_value then
571 call syserr (ANNOUNCE, "start_cpu: CPU ^a data switches are ^w, should be ^w",
572 substr (LETTERS, tag + 1, 1), scs$processor_switch_data (0), scs$processor_data_switch_value);
573 end;
574 rcode = 0;
575 return;
576 %page;
577 %include rcerr;
578 %page;
579 %include config_cpu_card;
580 %page;
581 %include flagbox;
582 %page;
583 %include scs;
584 %page;
585 %include rsw;
586 %page;
587 %include apte;
588 %page;
589 %include sdw;
590 %page;
591 %include fault_vector;
592 %page;
593 %include syserr_constants;
594 %page;
595 %include system_types;
596 %page;
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653 end start_cpu;