1 /****^  ***********************************************************
  2         *                                                         *
  3         * Copyright, (C) Honeywell Bull Inc., 1987                *
  4         *                                                         *
  5         * Copyright, (C) Honeywell Information Systems Inc., 1982 *
  6         *                                                         *
  7         *********************************************************** */
  8 /* ADD_SCU - Reconfiguration Procedure to Add and Remove a System Controller. */
  9 /* adapted from code originally written by Roger R. Schell in July, 1970 */
 10 /* Modified 3/9/76 by Noel I. Morris */
 11 /* Modified 5/79 by BSG for 8cpu port expander */
 12 /* Modified September 1981 by J. Bongiovanni for set_procs_required */
 13 /* Modified June 1982 by J. A. Bush to clear cache in each cpu before Mem is added */
 14 /* Modified April 1984 by Chris Jones to update config deck to its partition after modifying it. */
 15 
 16 /* format: style4,delnl,insnl,indattr,ifthen,dclind10 */
 17 add_scu:
 18      proc (tag, errtag, rcode);
 19 
 20 dcl       tag                    fixed bin (3),             /* tag of controller to be added */
 21           errtag                 fixed bin (3),             /* tag of CPU or mask in error */
 22           rcode                  fixed bin (35);            /* error code */
 23 
 24 dcl       cdp                    ptr,                       /* pointer to single element of controller data */
 25           i                      fixed bin (3),             /* iteration variable */
 26           enabled                bit (1) aligned,           /* port enabled bit */
 27           base                   fixed bin (17),            /* base address of controller */
 28           size                   fixed bin (17),            /* size of controller */
 29           interlace              fixed bin (3),             /* memory interlace type */
 30           code                   fixed bin (35),            /* error code */
 31           cpu_mask               bit (8) aligned;           /* bit mask for CPUs required */
 32 
 33 
 34 dcl       init_scu               entry (fixed bin (3), fixed bin (3), fixed bin (35)),
 35           init_scu$final_scu     entry (fixed bin (3)),
 36           privileged_mode_ut$clear_cache
 37                                  entry,
 38           scr_util$set_mask      entry (fixed bin (3), fixed bin (3), bit (72) aligned),
 39           scr_util$enable_ports  entry (fixed bin (3)),
 40           scr_util$disable_ports entry (fixed bin (3)),
 41           rsw_util$port_info     entry (fixed bin (3), bit (1) aligned, fixed bin (17), fixed bin (17), fixed bin (3)),
 42           rsw_util$set_rsw_mask  entry (fixed bin (3), bit (1) aligned),
 43           set_procs_required     entry (bit (8) aligned, fixed bin (35)),
 44           config_$find_2         entry (char (4) aligned, fixed bin (3), ptr),
 45           config_$update         entry (),
 46           syserr                 entry options (variable);
 47 
 48 dcl       store                  condition,                 /* store fault */
 49           op_not_complete        condition;                 /* op not complete fault */
 50 
 51 dcl       1 cdata                based (cdp) aligned like scs$controller_data;
 52                                                             /* single element of controller_data */
 53 
 54 dcl       (addr, hbound, lbound, substr)
 55                                  builtin;
 56 ^L
 57 /* The following code adds a system controller. */
 58 
 59           rcode = 0;
 60           cdp = addr (scs$controller_data (tag));           /* Get pointer to data for this controller. */
 61 
 62           on condition (store) go to add_fault;             /* Catch store fault if ports not enabled. */
 63           on condition (op_not_complete) go to add_fault;   /* Catch op not complete if controller not enabled. */
 64 
 65           do i = lbound (scs$processor_data, 1) to hbound (scs$processor_data, 1);/* Run each and every processor. */
 66                if scs$processor_data (i).online then do;    /* If processor online ... */
 67                     cpu_mask = "0"b;
 68                     substr (cpu_mask, i + 1, 1) = "1"b;
 69                     call set_procs_required (cpu_mask, code);
 70                                                             /* Run that processor. */
 71                     if code ^= 0 then do;
 72                          rcode = rcerr_sprq_failed;         /* Shouldn't */
 73                          goto add_err;
 74                     end;
 75 
 76                     call rsw_util$port_info (tag, enabled, base, size, interlace);
 77                                                             /* Get poop on controller. */
 78                     if ^enabled then do;                    /* If port not enabled ... */
 79                          rcode = rcerr_addscu_enable;
 80                          go to add_err;
 81                     end;
 82                     if (base ^= cdata.base) |               /* If some switches are incorrrect ... */
 83                          (size ^= cdata.size) | ((interlace ^= 0) ^= cdata.ext_interlaced)
 84                          | ((interlace ^= 0) & ((interlace = 4) ^= cdata.four_word)) then do;
 85                          rcode = rcerr_addscu_switches;
 86                          go to add_err;
 87                     end;
 88 
 89                     call init_scu (tag, errtag, rcode);     /* Try to get info about the controller. */
 90                     call privileged_mode_ut$clear_cache;    /* clear out this cpus cache, before mem is added */
 91 
 92                     call set_procs_required ("0"b, code);   /* Give up this processor. */
 93 
 94                     if rcode ^= 0 then
 95                          return;                            /* If failure, give up now. */
 96                end;
 97           end;
 98 
 99           do i = 1 to 4;                                    /* Look at each assigned interrupt mask. */
100                if cdata.eima_data (i).mask_assigned then    /* If mask is assigned ... */
101                     call scr_util$set_mask (tag, (cdata.eima_data (i).mask_assignment), scs$sys_level);
102           end;                                              /* Don't allow any interrupts. */
103 
104           call scr_util$enable_ports (tag);                 /* Set correct ports to be enabled. */
105 
106           cdata.online = "1"b;                              /* reflect change in SCS */
107           cdata.offline = "0"b;
108 
109           call config_$find_2 (MEM_CARD_WORD, tag + 1, mem_cardp);
110                                                             /* Find the correct MEM config card. */
111           mem_card.state = "on  ";                          /* Change the config card. */
112 
113           call rsw_util$set_rsw_mask (tag, "1"b);           /* All new processors must have this port enabled. */
114 
115           call config_$update ();
116           call syserr (ANNOUNCE, "addmem: Added MEM ^a.", substr ("ABCDEFGH", tag + 1, 1));
117 
118           return;
119 ^L
120 
121 add_fault:
122           call init_scu$final_scu (tag);                    /* Clear out SCAS entry for controller. */
123           rcode = rcerr_addscu_fault;                       /* Give back an error. */
124 
125 add_err:
126           call set_procs_required ("0"b, code);             /* Unset any required processor. */
127 
128           errtag = i;                                       /* Identify active module in error. */
129 
130           return;
131 ^L
132 
133 /* The following code removes a system controller. */
134 
135 remove_scu:
136      entry (tag);
137 
138 
139           cdp = addr (scs$controller_data (tag));           /* Get pointer to data for this controller. */
140 
141           call scr_util$disable_ports (tag);                /* Disable all ports on controller. */
142 
143           call init_scu$final_scu (tag);                    /* Remove entry from the SCAS. */
144 
145           cdata.offline = "1"b;                             /* reflect change in SCS */
146           cdata.online = "0"b;
147 
148           call config_$find_2 (MEM_CARD_WORD, tag + 1, mem_cardp);
149                                                             /* Find correct MEM config card. */
150           mem_card.state = "off ";                          /* Change the config card. */
151 
152           call rsw_util$set_rsw_mask (tag, "0"b);           /* New processors do not need this port enabled. */
153 
154           call config_$update ();
155           call syserr (ANNOUNCE, "delmem: Removed MEM ^a.", substr ("ABCDEFGH", tag + 1, 1));
156 
157           return;
158 ^L
159 %include rcerr;
160 %page;
161 %include config_mem_card;
162 %page;
163 %include scs;
164 %page;
165 %include syserr_constants;
166 ^L
167 /* BEGIN MESSAGE DOCUMENTATION
168 
169    Message:
170    addmem: Added MEM X.
171 
172    S:     $info
173 
174    T:     $response
175 
176    M:     The system control unit X has been added.
177 
178    A:     $ignore
179 
180 
181    Message:
182    delmem: Removed MEM X.
183 
184    S:     $info
185 
186    T:     $response
187 
188    M:     The system control unit X has been deleted.
189 
190    A:     $ignore
191 
192 
193 
194    END MESSAGE DOCUMENTATION */
195 
196      end add_scu;