1 2 3 "BEGIN INCLUDE FILE slte.incl.alm 4 5 6 "Created 12/12/83 1408.5 est Mon by convert_include_file, 7 " Version of 11/07/82 1445.1 est Sun. 8 9 "Made from >bootload>update>incl>slte.incl.pl1, 10 " modified 12/12/83 1408.5 est Mon 11 12 " 13 " Structure slte_uns 14 " 15 equ slte_uns_size,4 16 17 equ slte_uns.names_ptr,0 " UPPER 18 equ slte_uns.path_ptr,0 " LOWER 19 20 equ slte_uns.access_word,1 21 equ slte_uns.access_shift,32 22 bool slte_uns.access_mask,000017 23 equ slte_uns.cache_word,1 24 bool slte_uns.cache,020000 " DU 25 equ slte_uns.abs_seg_word,1 26 bool slte_uns.abs_seg,010000 " DU 27 equ slte_uns.firmware_seg_word,1 28 bool slte_uns.firmware_seg,004000 " DU 29 equ slte_uns.layout_seg_word,1 30 bool slte_uns.layout_seg,002000 " DU 31 equ slte_uns.breakpointable_word,1 32 bool slte_uns.breakpointable,001000 " DU 33 equ slte_uns.wired_word,1 34 bool slte_uns.wired,000040 " DU 35 equ slte_uns.paged_word,1 36 bool slte_uns.paged,000020 " DU 37 equ slte_uns.per_process_word,1 38 bool slte_uns.per_process,000010 " DU 39 equ slte_uns.acl_provided_word,1 40 bool slte_uns.acl_provided,000001 " DU 41 equ slte_uns.branch_required_word,1 42 bool slte_uns.branch_required,040000 " DL 43 equ slte_uns.init_seg_word,1 44 bool slte_uns.init_seg,020000 " DL 45 equ slte_uns.temp_seg_word,1 46 bool slte_uns.temp_seg,010000 " DL 47 equ slte_uns.link_provided_word,1 48 bool slte_uns.link_provided,004000 " DL 49 equ slte_uns.link_sect_word,1 50 bool slte_uns.link_sect,002000 " DL 51 equ slte_uns.link_sect_wired_word,1 52 bool slte_uns.link_sect_wired,001000 " DL 53 equ slte_uns.combine_link_word,1 54 bool slte_uns.combine_link,000400 " DL 55 equ slte_uns.pre_linked_word,1 56 bool slte_uns.pre_linked,000200 " DL 57 equ slte_uns.defs_word,1 58 bool slte_uns.defs,000100 " DL 59 60 equ slte_uns.cur_length_word,2 61 equ slte_uns.cur_length_shift,27 62 bool slte_uns.cur_length_mask,000777 63 equ slte_uns.ringbrack_word,2 64 equ slte_uns.ringbrack_shift,24 65 bool slte_uns.ringbrack_mask,000007 66 equ slte_uns.segno,2 " LOWER 67 68 equ slte_uns.max_length_word,3 69 equ slte_uns.max_length_shift,24 70 bool slte_uns.max_length_mask,000777 71 equ slte_uns.bit_count_word,3 72 equ slte_uns.bit_count_shift,0 73 74 " 75 " Structure slte 76 " 77 equ slte_size,4 78 79 equ slte.names_ptr,0 " UPPER 80 equ slte.path_ptr,0 " LOWER 81 82 equ slte.access_word,1 83 equ slte.access_shift,32 84 bool slte.access_mask,000017 85 equ slte.cache_word,1 86 bool slte.cache,020000 " DU 87 equ slte.abs_seg_word,1 88 bool slte.abs_seg,010000 " DU 89 equ slte.firmware_seg_word,1 90 bool slte.firmware_seg,004000 " DU 91 equ slte.layout_seg_word,1 92 bool slte.layout_seg,002000 " DU 93 equ slte.breakpointable_word,1 94 bool slte.breakpointable,001000 " DU 95 equ slte.wired_word,1 96 bool slte.wired,000040 " DU 97 equ slte.paged_word,1 98 bool slte.paged,000020 " DU 99 equ slte.per_process_word,1 100 bool slte.per_process,000010 " DU 101 equ slte.acl_provided_word,1 102 bool slte.acl_provided,000001 " DU 103 equ slte.branch_required_word,1 104 bool slte.branch_required,040000 " DL 105 equ slte.init_seg_word,1 106 bool slte.init_seg,020000 " DL 107 equ slte.temp_seg_word,1 108 bool slte.temp_seg,010000 " DL 109 equ slte.link_provided_word,1 110 bool slte.link_provided,004000 " DL 111 equ slte.link_sect_word,1 112 bool slte.link_sect,002000 " DL 113 equ slte.link_sect_wired_word,1 114 bool slte.link_sect_wired,001000 " DL 115 equ slte.combine_link_word,1 116 bool slte.combine_link,000400 " DL 117 equ slte.pre_linked_word,1 118 bool slte.pre_linked,000200 " DL 119 equ slte.defs_word,1 120 bool slte.defs,000100 " DL 121 122 equ slte.cur_length_word,2 123 equ slte.cur_length_shift,27 124 bool slte.cur_length_mask,000777 125 equ slte.ringbrack_word,2 126 equ slte.ringbrack_shift,24 127 bool slte.ringbrack_mask,000007 128 equ slte.segno,2 " LOWER 129 130 equ slte.max_length_word,3 131 equ slte.max_length_shift,24 132 bool slte.max_length_mask,000777 133 equ slte.bit_count_word,3 134 equ slte.bit_count_shift,0 135 136 "END INCLUDE FILE slte.incl.alm