1
2
3
4
5
6
7
8 declare
9 1 status_template aligned based,
10 2 error_code bit (36) aligned,
11 2 detail_info unaligned,
12 3 trans_state,
13 4 successful_logical_initiation bit (1),
14 4 successful_logical_completion bit (1),
15 4 successful_physical_initiation bit (1),
16 4 successful_physical_completion bit (1),
17 4 transaction_terminated bit (1),
18 3 unassigned_bits_42_to_45 (42 : 45) bit (1),
19 3 end_of_logical_data_indicator bit (1),
20 3 end_of_physical_data_indicator bit (1),
21 3 unassigned_bits_48_to_51 (48 : 51) bit (1),
22 3 stream_name_detached bit (1),
23 3 unassigned_bit_53 bit (1),
24 3 transaction_aborted bit (1),
25 3 transaction_index bit (18);
26
27
28