1 /* BEGIN INCLUDE FILE ... mcs_memory_map.incl.pl1 */
  2 
  3 /* This include file descibes MCS memory layout.
  4 
  5    Created 6/2/76 by Mike Grady
  6    Modified 1979 June 1 by Art Beattie to add new cells in comm_reg.
  7    Modified June 1982 by Robert Coren to add some more new cells in comm_reg and
  8     change some of them to fixed bin (18) unsigned.
  9 */
 10 
 11 dcl 1 mem_array aligned based (memp),                       /* as an array of 18 bit words */
 12     2 mem (0:65535) bit (18) unaligned;
 13 
 14 
 15 dcl 1 low_mem aligned based (memp),                         /* detail of low memory */
 16     2 interrupt_vectors (0:255) bit (18) unal,              /* loc 0-377 octal */
 17     2 interrupt_cells (16) bit (18) unal,                   /* loc 400-417 octal */
 18     2 iom_fault_status (16) bit (18) unal,                  /* loc 420-437 octal */
 19     2 processor_fault_vectors (8) bit (18) unal,            /* loc 440-447 octal */
 20     2 chan_mailbox (24) bit (18) unal,                      /* loc 450-477 octal */
 21     2 lsla_mailbox (0:5) like hwcm,                         /* LSLA hardware comm regions, loc 500-637 octal */
 22     2 comm_reg unal,                                        /* software communications region for MCS system */
 23       3 crldt fixed bin (71) aligned,                       /* date and time binder produced this image */
 24       3 crbdt fixed bin (71) aligned,                       /* date and time image was booted into FNP */
 25       3 crbuf fixed bin (17) unal,                          /* base of free buffer pool */
 26       3 crmem fixed bin (18) unsigned unal,                 /* last loc of mem configured */
 27       3 crnbf fixed bin (17) unal,                          /* free buffers in pool now */
 28       3 criom fixed bin (17) unal,                          /* pointer to iom table */
 29       3 crnhs fixed bin (17) unal,                          /* number of HSLAs */
 30       3 crnls fixed bin (17) unal,                          /* number of LSLAs */
 31       3 crcon bit (18) unal,                                /* console enable switch */
 32       3 crmod fixed bin (17) unal,                          /* base of module chain */
 33       3 crnxa fixed bin (17) unal,                          /* pointer to head of free space chain */
 34       3 crtra bit (18) unal,                                /* trace entry enable mask */
 35       3 crtrb fixed bin (18) unsigned unal,                 /* base of trace table */
 36       3 crtrc fixed bin (18) unsigned unal,                 /* next trace table entry pointer */
 37       3 crreg fixed bin (17) unal,                          /* pointer to fault reg storage area */
 38       3 crttb fixed bin (17) unal,                          /* pointer to tib table base */
 39       3 crtte fixed bin (17) unal,                          /* last addr in tib table */
 40       3 crdly fixed bin (17) unal,                          /* pointer to delay table chain */
 41       3 crver char (4) unal,                                /* mcs version number */
 42       3 crbrk fixed bin (17) unal,                          /* pointer to breakpoint control table */
 43       3 crtsw bit (18) unal,                                /* trace switch (zero=trace on) */
 44       3 crnxs fixed bin (17) unal,                          /* pointer to next free small block */
 45       3 crnbs fixed bin (17) unal,                          /* number of buffers devoted to small space */
 46       3 crcct fixed bin (17) unal,                          /* pointer to first cct descriptor */
 47       3 crskd fixed bin (17) unal,                          /* pointer to scheduler data block */
 48       3 cretb fixed bin (17) unal,                          /* pointer to list of echo-negotiation bit tables */
 49       3 crcpt fixed bin (17) unal,                          /* pointer to cpu page table */
 50       3 crpte fixed bin (17) unal,                          /* pointer to variable cpu page table entry */
 51       3 crtsz fixed bin (17) unal,                          /* size of trace data buffer */
 52       3 crmet bit (18) unal,                                /* metering enabled */
 53       3 crtdt bit (18) unal,                                /* 0 if no COLTS channel; set to TIB address if it exists */
 54       3 crbtm bit (18) unal,                                /* address of time meters for buffer allocation/freeing */
 55       3 crnxe fixed bin (18) unsigned unal,                 /* next available space in extended memory */
 56       3 crbpe fixed bin (17) unal,                          /* buffer paging window table entry */
 57       3 pad (39) bit (18) unal,
 58       3 crcpr char (28) unal,                               /* image copyright notice */
 59       3 crash_location bit (18) unal,                       /* offset used for unresolved REF's */
 60       3 crash_opcode bit (18) unal,                         /* crash instruction */
 61     2 hsla_mailbox (0:2),                                   /* loc 1000-3777 octal */
 62       3 subchannel (0:31) like hwcm;                        /* HSLA hardware comm regions */
 63 
 64 dcl 1 icw aligned based,                                    /* Standard FNP Indirect Control Word */
 65     2 xfer_mode bit (3) unal,                               /* transfer mode, bit-36 for dia */
 66     2 fnp_addr bit (15) unal,                               /* address in fnp */
 67     2 pad bit (6) unal,                                     /* padding, exhaust bit */
 68     2 tally bit (12) unal;
 69 ^L
 70 dcl 1 hwcm aligned based (hwcmp),                           /* Standard hardware comm region */
 71     2 ricw0 like icw,                                       /* primary receive icw */
 72     2 ricw1 like icw,                                       /* secondary receive icw */
 73     2 sicw0 like icw,                                       /* primary send icw */
 74     2 sicw1 like icw,                                       /* secondary send icw */
 75     2 baw bit (18) unal,                                    /* base address word */
 76     2 sfcmp bit (18) unal,                                  /* pointer to sfcm for this channel */
 77     2 mask_reg bit (36) unal,                               /* maskregister, subch 0 only */
 78     2 stat_icw like icw,                                    /* status icw */
 79     2 config_pcw bit (36) unal;                             /* subchannel configuration */
 80 
 81 /* Tables used to describe the configuration of the FNP */
 82 
 83 dcl 1 iom_table (0: 15) unaligned based (itblp),            /* FNP IOM table */
 84     2 flags,
 85       3 mpx_chan bit (1) unal,                              /* multiplexed channel */
 86       3 pad bit (6) unal,
 87       3 char_len bit (2) unal,
 88       3 dev_type bit (5) unal,                              /* device type on this channel */
 89       3 dev_speed bit (4) unal,                             /* for those devices with speed (LSLA) */
 90     2 table bit (18) unal;                                  /* pointer to secondary table for mpx_chan */
 91 
 92 dcl 1 lsla_table (0:52) based (tblp) unal,                  /* LSLA table, entry one per slot */
 93     2 flags,
 94       3 pad1 bit (11) unal,
 95       3 ibm_code bit (1) unal,                              /* if 6-bit odd parity */
 96       3 pad2 bit (3) unal,
 97       3 slot_id bit (3) unal,                               /* slot type this slot */
 98     2 tib_addr fixed bin (17) unal;                         /* pointer to tib */
 99 
100 dcl 1 hsla_table (0:31) based (tblp) unal,                  /* HSLA table, entry one per subchannel */
101     2 flags,
102       3 conc_chan bit (1) unal,                             /* concentrator attached to this channnel */
103       3 private_line bit (1) unal,                          /* indicates direct connect or pl modem for sync chan */
104       3 async bit (1) unal,                                 /* on if async channel */
105       3 option1 bit (1) unal,                               /* three option specification bits */
106       3 option2 bit (1) unal,
107       3 modem_type bit (4) unal,                            /* indicator of type of modem on this channel */
108       3 line_type bit (5) unal,                             /* line type of this channel */
109       3 dev_speed bit (4) unal,                             /* speed of this subchannel */
110     2 tib_addr fixed bin (17) unal;                         /* addr of tib for this subchannel */
111 
112 dcl (memp, itblp, tblp, hwcmp) ptr;
113 
114 dcl (DIA init ("00010"b),                                   /* dev_type definitions */
115      HSLA init ("00011"b),
116      LSLA init ("00100"b),
117      CONSOLE init ("00101"b),
118      PRINTER init ("00110"b)) bit (5) int static options (constant);
119 
120 /* END INCLUDE FILE mcs_memory_map.incl.pl1 */