1 /* Begin include file iom_chan_control_words 12/82 BIM */
 2 /* Unsigned and named-constanted pcw, idcw, dcw, tdcw */
 3 /* format: style3 */
 4 
 5 dcl       pcw_ptr             ptr;                          /* pointer to PCW */
 6 
 7 dcl       1 pcw               based (pcw_ptr) aligned,      /* Peripheral Control Word */
 8           ( 2 command         bit (6),                      /* device command */
 9             2 device          fixed bin (6) unsigned,       /* device code */
10             2 ext             fixed bin (6) unsigned,       /* address extension (addr - mod (addr, 256K)) */
11             2 code            bit (3),                      /* must be "111"b for PCW */
12             2 mask            bit (1),                      /* channel mask bit */
13             2 control         bit (2),                      /* terminate/proceed and marker control bits */
14             2 chan_cmd        bit (6),                      /* type of I/O operation */
15             2 count           fixed bin (6) unsigned,       /* record count or control character */
16             2 mbz1            bit (3),
17             2 channel         fixed bin (6) unsigned,       /* channel number */
18             2 mbz2            bit (27)
19             )                 unal;
20 
21 dcl       idcw_ptr            ptr;                          /* pointer to IDCW */
22 
23 dcl       1 idcw              based (idcw_ptr) aligned,     /* Instruction DCW */
24           ( 2 command         bit (6),                      /* device command */
25             2 device          fixed bin (6) unsigned,       /* device code */
26             2 ext             fixed bin (6) unsigned,       /* address extension */
27             2 code            bit (3),                      /* should be "111"b for PCW */
28             2 ext_ctl         bit (1),                      /* "1"b if address extension to be used */
29             2 control         bit (2),                      /* terminate/proceed and marker control bits */
30             2 chan_cmd        bit (6),                      /* type of I/O operation */
31             2 count           fixed bin (6) unsigned
32             )                 unal;                         /* record count or control character */
33 
34 dcl       PCW_INIT_STRING     bit (72) aligned init ("000000700000000000000000"b3) int static options (constant);
35 dcl       IDCW_INIT_STRING    bit (36) aligned init ("000000700000"b3) int static options (constant);
36 
37 /* Values for chan_cmd */
38 
39 dcl       (
40           SINGLE_RECORD       init ("00"b3),
41           NONDATA             init ("02"b3),
42           MULTIRECORD         init ("06"b3),
43           SINGLE_CHARACTER    init ("10"b3)
44           )                   bit (6) int static options (constant);
45 
46 /* Values for control */
47 
48 dcl       (
49           TERMINATE           init ("00"b),
50           PROCEED             init ("10"b),
51           MARKER              init ("11"b)
52           )                   bit (2) int static options (constant);
53 
54 
55 dcl       dcw_ptr             ptr;                          /* pointer to DCW */
56 dcl       tdcw_ptr            ptr;                          /* pointer to TDCW */
57 
58 dcl       1 dcw               based (dcw_ptr) aligned,      /* Data Control Word */
59           ( 2 address         fixed bin (18) unsigned,      /* address for data transfer */
60             2 char_pos        fixed bin (3) unsigned,       /* character position */
61             2 m64             bit (1),                      /* non-zero for mod 64 address */
62             2 type            bit (2),                      /* DCW type */
63             2 tally           fixed bin (12) unsigned
64             )                 unal;                         /* tally for data transfer -- 0 => 4096 */
65 
66 dcl       1 tdcw              based (tdcw_ptr) aligned,     /* Transfer DCW */
67           ( 2 address         fixed bin (18) unsigned,      /* address to transfer to */
68             2 mbz1            bit (4),
69             2 type            bit (2),                      /* should be "10"b for TDCW */
70             2 mbz2            bit (9),
71             2 ec              bit (1),                      /* non-zero to set LPW AE bit */
72             2 res             bit (1),                      /* non-zero to restrict further use of IDCW */
73             2 rel             bit (1)
74             )                 unal;                         /* non-zero to set relative mode after transfer */
75 
76 dcl       IOTD_INIT_STRING    bit (36) init ("000000000000"b3) int static options (constant);
77 dcl       IOTP_INIT_STRING    bit (36) init ("000000010000"b3) int static options (constant);
78 dcl       IONTP_INIT_STRING   bit (36) init ("000000030000"b3) int static options (constant);
79 dcl       TDCW_INIT_STRING    bit (36) init ("000000020000"b3) int static options (constant);
80 
81 dcl       (
82           IOTD                init ("00"b),                 /* Transfer and Disconnect */
83           IOTP                init ("01"b),                 /* Transfer and Proceed */
84           IONTP               init ("11"b),                 /* Discard data and Proceed */
85           TDCW                init ("10"b)                  /* interpret as TDCW */
86           )                   bit (2) aligned int static options (constant);
87 
88 
89 /* End include file iom_chan_control_words.incl.pl1 */