1 /* Begin include file io_manager_dcls.incl.pl1 */
 2 
 3 /* Written by Charles Hornig, late 1980 and early 1981 */
 4 /* Modified for MR10 interface, February 1982 */
 5 /* Channel reconfiguration entries added by Chris Jones, January 1984 */
 6 
 7 /* These entries are callable on unwired stacks. */
 8 
 9 /* call io_manager$assign (Chx, Channel, Handler, Index, Statusp, Code); */
10 dcl  io_manager$assign
11           entry (fixed bin (35), char (8) aligned, entry (fixed bin (35), fixed bin (3), bit (36) aligned),
12           fixed bin (35), ptr, fixed bin (35));
13 
14 /* call io_manager$assign_add (Chx, Channel, Handler, Index, Statusp, Code); */
15 dcl  io_manager$assign_add
16           entry (fixed bin (35), char (8) aligned, entry (fixed bin (35), fixed bin (3), bit (36) aligned),
17           fixed bin (35), ptr, fixed bin (35));
18 
19 /* call io_manager$unassign (Chx, Code); */
20 dcl  io_manager$unassign entry (fixed bin (35), fixed bin (35));
21 
22 /* call io_manager$unassign_delete (Chx, Code); */
23 dcl  io_manager$unassign_delete entry (fixed bin (35), fixed bin (35));
24 
25 /* call io_manager$connect (Io_manager_arg); */
26 dcl  io_manager$connect entry (1 aligned like io_manager_arg);
27 
28 /* call io_manager$connect_abs (Io_manager_arg); */
29 dcl  io_manager$connect_abs entry (1 aligned like io_manager_arg);
30 
31 /* call io_manager$connect_direct (Io_manager_arg); */
32 dcl  io_manager$connect_direct entry (1 aligned like io_manager_arg);
33 
34 /* call io_manager$get_status (Chx, Io_status_entry_ptr); */
35 dcl  io_manager$get_status entry (fixed bin (35), ptr);
36 
37 /* call io_manager$mask (Chx); */
38 dcl  io_manager$mask entry (fixed bin (35));
39 
40 /* call io_manager$ignore_interrupt (); */
41 dcl  io_manager$ignore_interrupt entry (fixed bin (35), fixed bin (3), bit (36) aligned);
42 
43 /* call io_manager$data_tdcw (Io_manager_arg);
44    dcl  io_manager$data_tdcw entry (1 aligned like io_manager_arg);
45 
46    /* call io_manager$workspace_tdcw (Io_manager_arg); */
47 dcl  io_manager$workspace_tdcw entry (1 aligned like io_manager_arg);
48 
49 dcl  io_manager_arg_ptr ptr;
50 dcl  1 io_manager_arg aligned based (io_manager_arg_ptr),
51        2 chx fixed bin (35),                                /* channel index from io_manager$assign */
52        2 bound fixed bin (19),                              /* workspace size */
53        2 pcw bit (36) aligned,                              /* or IDCW */
54        2 listx fixed bin (18),                              /* DCW list offset */
55        2 ptp ptr,                                           /* page table pointer */
56        2 listp ptr,                                         /* DCW list pointer */
57        2 dcw_pair_ptr ptr;                                  /* DCW pair pointer */
58 
59 /* End include file io_manager_dcls.incl.pl1 */