1 /*  START OF:       fim_meters.incl.pl1                       *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  */
  2 
  3 /* Declarations useful for programs which interpret the per-cpu fault and cache
  4    error counter data maintained in wired_hardcore_data$cpu_X_flt_ctr_array and
  5    wired_hardcore_data$cpu_X_cache_err_ctr_array.  The fault counters are an
  6    array of counts by fault number, where the first NO_HARDWARE_FAULTS
  7    fault numbers correspond to hardware faults, and the remaining
  8    correspond to sub-cases of hardware faults, as defined procedurally in
  9    fim.  The per-cpu  cache error counters are simply an array of error counters.
 10    The cache error counter array is defined as: location ZERO contains the
 11    cache size/type and is filled in by init_processor;location 1 thru 12 hold
 12    the error counters as filled in by fim_util or page_fault.
 13 
 14    Written March 1981 by J. Bongiovanni                                                                       */
 15 /* Modified July 1981 by M. Weaver for undefined_pointer
 16    Modified October 1983 by Rich Coppola for support of per-processor fault and cache counters.
 17 */
 18 
 19 dcl  MAX_CPUS fixed bin init (8) int static options (constant);
 20                                                             /* current maximum of CPU numbers */
 21 
 22 dcl  CPU_NAMES (8) char (1) int static options (constant) init (
 23           "A", "B", "C", "D", "E", "F", "G", "H");
 24 dcl  (NO_HARDWARE_FAULTS init (32), NO_TOTAL_FAULTS init (128))
 25           fixed bin int static options (constant);
 26 
 27 dcl  EXTANT_FAULT (32) bit (1) unaligned init ((26) (1)"1"b, (5) (1)"0"b, "1"b)
 28           int static options (constant);                    /* by hardware fault no. "1"=> valid              */
 29 
 30 dcl  LONG_FAULT_NAME (128) char (30) init                   /* full names of faults                           */
 31                                                             /* begin of hardware faults                       */
 32           ("shutdown", "store", "mme1", "fault_tag_1", "timer_runout",
 33            "command", "derail", "lockup", "connect", "parity",
 34            "illegal_procedure", "op_not_complete", "startup",
 35            "overflow", "divide_check", "execute", "segment_fault",
 36            "page_fault", "directed_fault_2", "directed_fault_3",
 37            "access_violation", "mme2", "mme3", "mme4", "linkage_fault",
 38            "fault_tag_3", (5) (1)"<invalid>", "trouble",
 39                                                             /* begin of subordinate faults                    */
 40            "illegal_opcode", "null_pointer", "illegal_modifier", "illegal_ring_order",
 41            "not_in_execute_bracket", "no_execute_permission", "not_in_read_bracket",
 42            "no_read_permission", "not_in_write_bracket", "no_write_permission",
 43            "not_a_gate", "not_in_call_bracket", "outward_call", "bad_outward_call",
 44            "inward_return", "cross_ring_transfer", "ring_alarm_fault", "am_fault",
 45            "out_of_bounds", "fixedoverflow", "overflow", "underflow", "stringsize",
 46            "illegal_procedure", "stack_out_of_bounds", "packed_pointer_fault",
 47            "lot_fault", "isot_fault", "system_packed_pointer", (4) (1)" ",
 48           "size", "neti", "command", "sus_", "trm_", "wkp_", "undefined_pointer", (56) (1)" ")
 49 
 50           int static options (constant);
 51 
 52 dcl  SHORT_FAULT_NAME (32) char (3) init                    /* short names of hardware faults                 */
 53           ("sdf", "str", "mme", "ft1", "tro", "cmd", "drl", "luf",
 54            "con", "par", "ipr", "onc", "suf", "ovf", "div", "exf",
 55            "df0", "df1", "df2", "df3", "acv", (3) (1)" ", "ft2",
 56            "ft3", (5) (1)" ", "trb") int static options (constant);
 57 
 58 
 59 /* The following table is used to thread subordinate (non-hardware known)
 60    faults to primary (hardware known) fault types.  Its existence and
 61    contents depends on the way fim handles faults, and it corresponds
 62    roughly to fault_table in fim.  This table is an array of threads by
 63    fault number.  To follow a thread for a hardware fault, use the
 64    value of this table indexed by hardware fault number to find the
 65    first subordinate fault number (0=>none).  Continue for the subordinate
 66    fault until a thread of 0 is encountered.                                                                  */
 67 
 68 dcl  THREAD_FAULT (128) fixed bin int static options (constant) init (
 69            0, 0, 0, 0, 0, 58, 0, 0, 0, 0,
 70            33, 0, 0, 52, 0, 0, 0, 0, 0, 0,
 71            34, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 72            0, 0, 35, 36, 56, 37, 38, 39, 40, 41,
 73            42, 43, 44, 45, 46, 47, 48, 49, 50, 51,
 74            57, 53, 54, 55, 66, 0, 72, 59, 60, 61,
 75            68, (67) 0);
 76 
 77 
 78 dcl  CACHE_TYPES (0:5) char (9) int static options (constant) init (
 79           "L68_NONE", "  L68_2K", " DPS8_8K", " VSSC_8K", "VSSC_16K", "VSSC_32K");
 80 
 81 
 82 /* The cache size is placed in the first word of the per-processor array
 83 by init_processor. The following declarations list the currently known sizes
 84 and their decodes */
 85 
 86 dcl  L68_NONE fixed bin int static options (constant) init (0),
 87      L68_2K fixed bin int static options (constant) init (1),
 88      DPS8_8K fixed bin int static options (constant) init (2),
 89      VSSC_8K fixed bin int static options (constant) init (3),
 90      VSSC_16K fixed bin int static options (constant) init (4),
 91      VSSC_32K fixed bin int static options (constant) init (5);
 92 
 93 dcl NO_CACHE_ERR_TYPES fixed bin int static options (constant) init (12);
 94 
 95 
 96 /* Note PFR = Primary Fault Reg (L68/DPS8), EFR = Extended Fault Reg (DPS8) */
 97 
 98 dcl  CACHE_ERROR_NAME (12) char (32) var int static options (constant) init (
 99           "Primary Dir Parity/MultiMatch",                  /* Cell 1; PFR Bit 32  */
100           "PT A Buffer OVFL/PAR/SEQ Err",                   /* Cell 2; EFR Bit 36  */
101           "PT B Buffer OVFL/PAR/SEQ Err",                   /* Cell 3; EFR Bit 37  */
102           "PT C Buffer OVFL/PAR/SEQ Err",                   /* Cell 4; EFR Bit 38  */
103           "PT D Buffer OVFL/PAR/SEQ Err",                   /* Cell 5; EFR Bit 39  */
104           "Primary DIR/PT Buffer OVFL",                     /* Cell 6; EFR Bit 40  */
105           "WNO Parity ANY Port",                            /* Cell 7; EFR Bit 41  for DPS8 (cache type = 2) ONLY */
106                                                             /* NOTE: This counter is NOT USED by the VS&SC Cache,
107                                                                ONLY the 8k model CPU */
108           "Level 0 Dup Dir Parity",                         /* Cell 8; EFR Bit 42  */
109           "Level 1 Dup Dir Parity",                         /* Cell 9; EFR Bit 43  */
110           "Level 2 Dup Dir Parity",                         /* Cell 10; EFR Bit 44  */
111           "Level 3 Dup Dir Parity",                         /* Cell 10; EFR Bit 45  */
112           "Dup Dir MultiMatch");
113                                                             /* Cell 11; EFR Bit 46  */
114 
115 
116 /*  END OF:         fim_meters.incl.pl1                       *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  */