1 /*  START OF:       cache_threshold_data.incl.pl1             *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  */
 2 
 3           /*  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  * */
 4           /*                                                                                        */
 5           /* This include file is used by cache_threshold_defaults_ and monitor_cache to provide    */
 6           /* for comparing the acceptable cache memory error rates.                                 */
 7           /* Created: 2/84 by GA Texada                                                             */
 8           /*                                                                                        */
 9           /*  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  * */
10 
11 
12 
13 dcl cache_threshold_datap ptr,
14 
15   1 cache_threshold_data aligned based(cache_threshold_datap),
16 
17     2 pri_dir_parity     fixed bin (35),                    /* All cache types                                */
18                                                             /* PFR bit 32                                     */
19     2 port_buffer(4)     fixed bin (35),                    /* DPS8 cache types all 4 ports                   */
20                                                             /* EFR bits 36-39                                 */
21     2 pri_dir            fixed bin (35),                    /* DPS8 cache types                               */
22                                                             /* EFR bit 40                                     */
23     2 wno_parity_any_port fixed bin (35),                   /* DPS8 NON VS&SC only                            */
24                                                             /* EFR bit 41                                     */
25     2 dup_dir_parity(4)     fixed bin (35),                 /* DPS8 VS&SC only, lvl 0-3                       */
26                                                             /* EFR bits 42-45                                 */
27     2 dup_dir_multimatch fixed bin (35),                    /* DPS8 cache types                               */
28                                                             /* EFR bit 46                                     */
29     2 pad(5) fixed bin(35),                                 /* UNUSED in the error counter array              */
30 
31  cache_threshold_data_array(17) fixed bin(35) aligned based(cache_threshold_datap);
32 
33 
34 /*  END OF:         cache_threshold_data.incl.pl1             *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  *  */