1 :Info: decimal_no_round_:  2022-04-08  decimal_no_round_
 2 
 3 Function:  performs decimal multiply and divide operations without
 4 rounding.
 5 
 6 
 7 :Entry: divide:  2022-04-08  decimal_no_round_$divide
 8 
 9 Function: Performs a decimal division stopping the operation when the
10 required precision of the target has been reached.  The normal PL/I
11 divide operation extends the quotient by two decimal places, then
12 rounds the target quotient using values in these final two digits.
13 This subroutine assigns the unextended quotient value without
14 rounding.
15 
16 
17 Syntax:
18 dcl decimal_no_round_$divide entry (float dec(59), float dec(59),
19    bit(18) aligned) returns (float dec(59));
20 quotient =  decimal_no_round_$divide (dividend, divisor,
21    indicator_bits);
22 
23 
24 Arguments:
25 dividend
26    number to be divided. (Input)
27 divisor
28    number dividing the dividend. (Input)
29 indicator_bits
30    indicator bits set by the division (DV3D) instruction.  See
31    mc.incl.pl1 declaration of scu.ir substructure for order of bits.
32    See Multics Processor Manual (AL39) description of "Indicator
33    Register (IR)" (page 3-5) for meanings of each bit.  The
34    indicator_register,dl (right half-word) of this descriptor are the
35    bits returned in the indicators value. (Output)
36 quotient
37    division result without any extension of precision to permit
38    rounding. (Output)
39 
40 
41 :Entry: multiply:  2022-04-08  decimal_no_round_$multiply
42 
43 Function: Performs a decimal multiply without rounding of the product.
44 The normal PL/I multiply operation rounds the product's final decimal
45 place if it exceeds precision of the mantissa.
46 
47 
48 Syntax:
49 dcl decimal_no_round_$multiply entry (float dec(59), float dec(59),
50    bit(18) aligned) returns (float dec(59));
51 quotient =  decimal_no_round_$multiply (multiplicand, multiplier,
52    indicator_bits);
53 
54 
55 Arguments:
56 multiplicand
57    number to be multiplied. (Input)
58 multiplier
59    number multiplying the multiplicand. (Input)
60 indicator_bits
61    indicator bits set by the multiplication (MP3D) instruction.  See
62    mc.incl.pl1 declaration of scu.ir substructure for order of bits.
63    See Multics Processor Manual (AL39) description of "Indicator
64    Register (IR)" (page 3-5) for meanings of each bit.  The
65    indicator_register,dl (right half-word) of this descriptor are the
66    bits returned in the indicators value. (Output)
67 product
68    multiply operation result without any rounding. (Output
69 
70 
71 :hcom:
72 /****^  HISTORY COMMENTS:
73   1) change(2022-07-13,GDixon), approve(2022-07-13,MCR10101),
74      audit(2022-07-27,Swenson):
75      Initial version of this info segment.
76                                                    END HISTORY COMMENTS */