1 :Info:  al39.errata:  errata.al39: Processor_Manual:
  2 2021-10-29  AL39 (Multics Processor Manual)
  3 
  4           Errata Information for MR12.8
  5 
  6 
  7 pg 3-14:  for the register "PPR.P", change the last part of the   |
  8      last sentence to read                                        |
  9                                                                   |
 10          ...otherwise, its value is 0.                            |
 11 
 12 
 13 pg 4-147: at end:
 14   ADD:
 15 
 16 Coding Format:
 17 
 18 RPD N, I, k1, k2, ... , k7. (A=B=C=1.)
 19 
 20 The command generated by the assembler from this format will cause the
 21 two instructions immediately following the RPD instruction to be
 22 iterated N times and the effective addresses of those two instructions
 23 to be incremented by the value I for each of N iterations.
 24 
 25 The meaning of k1, k2, ..., k7 is the same as for the RPT instruction.
 26 (See item below). Since the repeat double must fall in an odd location,
 27 precede this instruction with the odd pseudo-op.
 28 
 29 
 30  RPDX N, I (A=B=C=0.}
 31 
 32 This instruction operates just as the RPD instruction with the
 33 exception that A, B, N and the conditions for termination are loaded
 34 by the user into index register X0 as an octal value.
 35 
 36  RPDA N, I, k1, k2,..., k7. (A=C=1. B=0.)
 37 
 38 This instruction operates just as the RPD instruction with the
 39 exception that only the effective address of the first instruction
 40 following the RPDA instruction will be incremented by the value of I
 41 for each of N iterations.
 42 
 43 
 44  RPDB N, I, k1, k2,..., k7. (A=0. B=C=1.)
 45 
 46 This instruction operates just as the RPD instruction with the
 47 exception that only the effective address of the second instruction
 48 following the RPDB instruction will be incremented by the value I
 49 for each of N iterations.
 50 
 51 
 52 The following discussion of RPT also applies to RPD and RPL
 53 instructions. It explains how the k1, k2, ..., k7 bits of the Term
 54 Cond. field can be specified in those instructions.
 55 
 56  RPT N, I, k1, k2,..., k7. (Bit C=1.)
 57 
 58 The command generated by the assembler from this format will cause the
 59 instruction immediately following the RPT instruction to be iterated N
 60 times and that instruction's effective address to be incremented by the
 61 value I for each of N iterations. The range for N is 0-255. If N = 0,
 62 the instruction will be iterated 256 times. If N is greater than 256,
 63 the instruction will cause an error flag (A) to be printed on the
 64 assembly listing.
 65 
 66 
 67 The fields k1, k2, ... k7 may or may not be present. They represent
 68 conditions for termination which, when needed, are declared by the
 69 conditional transfer instructions TMI, TNC, TNZ, TOV, TPL, TRC, and
 70 TZE. These instructions affect the termination condition bits in
 71 positions 11-17 of the Repeat instruction.
 72 
 73 It is also possible to use an octal number rather than the transfer
 74 instructions to denote termination conditions. Thus, if the field for
 75 k1, k2,..., k7 is found to be numeric, it will be interpreted as octal
 76 and the low-order 7 bits will be ORed into bit positions 11-17 of the
 77 Repeat instruction. The variable-field scan will be terminated with the
 78 octal field.
 79 
 80 
 81 pg 4-150: at end of RPL section, before RPT:
 82 
 83   ADD:
 84 
 85 Coding Format:
 86 
 87  RPL N, k1, k2, ... k7. (C = 1.)
 88 
 89 This format causes the instruction immediately following the RPL
 90 instruction to be repeated N times or until one of the conditions
 91 specified in k1, ..., k7 is satisfied, or until the link address of
 92 zero is detected. The range of N is 0-255. If N = 0, the instruction
 93 will be iterated 256 times. If N is greater than 255, the instruction
 94 will cause an error flags (A) to be printed on the assembly listing.
 95 
 96 
 97 The fields k1, k2, ..., k7 may or may not be present. They represent
 98 conditions for termination which, when needed, are declared by the
 99 conditional transfer instructions TMI, TNC, TNZ, TOV, TPL, TRC, and
100 TZE. These instructions affect the termination condition bits in
101 position 11-17 of the Repeat instruction.
102 
103 It is also possible to use an octal number rather than the transfer
104 instructions to denote termination conditions. Thus, if the field for
105 k1, k2,..., k7 is found to be numeric, it will be interpreted as octal
106 and the low-order 7 bits will be ORed into bit positions 11-17 of the
107 Repeat instruction. The variable-field scan will be terminated with the
108 octal field.
109 
110 
111  RPLX (C = 0).
112 
113 This instruction operates just as the RPL instruction except that N
114 and the conditions for termination are loaded by the user into index
115 register zero.
116 
117 
118 pg 4-152: at end of RPT section:
119 
120   ADD:
121 
122 Coding Format:
123 
124  RPT N, I, ki, k2, ..., k7. (Bit C=1.)
125 
126 The command generated by the assembler from this format will cause the
127 instruction immediately following the RPT instruction to be iterated N
128 times and that instruction's effective address to be incremented by the
129 value I for each of N iterations. The range for N is 0-255. If N = 0,
130 the instruction will be iterated 256 times. If N is greater than 256,
131 the instruction will cause an error flag (A) to be printed on the
132 assembly listing.
133 
134 
135 The fields k1, k2, ... k7 may or may not be present. They represent
136 conditions for termination which, when needed, are declared by the
137 conditional transfer instructions TMI, TNC, TNZ, TOV, TPL, TRC, and
138 TZE. These instructions affect the termination condition bits in
139 positions 11-17 of the Repeat instruction.
140 
141 It is also possible to use an octal number rather than the transfer
142 instructions to denote termination conditions. Thus, if the field for
143 k1, k2,..., k7 is found to be numeric, it will be interpreted as octal
144 and the low-order 7 bits will be ORed into bit positions 11-17 of the
145 Repeat instruction. The variable-field scan will be terminated with the
146 octal field.
147 
148 
149  RPTX N, I (Bit C=0).
150 
151 This instruction operates just as the RPT instruction with the
152 exception that N and the conditions for termination are loaded by the
153 user into bit positions 0-7 and 11-17, respectively, of index register
154 zero (instead of being embedded in the instruction).
155 
156 
157 pg 8-8:  for Figure 8-1, correct the typos in the decision block. |
158                                                                   |
159      At the bottom middle of the page, replace                    |
160                                                                   |
161          C(TPR.TRR)->SDW.R2?                                      |
162      with                                                         |
163          C(TPR.TRR)>SDW.R2?                                       |
164                                                                   |
165      and in the middle of the page, replace                       |
166                                                                   |
167          C(TPR.TRR)>C(PPR.PPR)                                    |
168      with                                                         |
169          C(TPR.TRR)>C(PPR.PRR)                                    |
170 
171 
172 :hcom:
173 
174 
175 /****^  HISTORY COMMENTS:
176   1) change(2021-11-06,Swenson), approve(2021-11-06,MCR10100),
177      audit(2021-11-07,GDixon), install(2021-11-07,MR12.8-1007):
178      Add more info on RPD, RPL, and RPT instructions.
179                                                    END HISTORY COMMENTS */
180 
181