MR 3155 src/dps8/dps8_cpu.c fltAddress = (cpu.MR.FFV & MASK15) << 3; MR 3575 src/dps8/dps8_cpu.c if (cpu.MR.sdpap) MR 3578 src/dps8/dps8_cpu.c cpu.MR.sdpap = 0; MR 3580 src/dps8/dps8_cpu.c if (cpu.MR.separ) MR 3583 src/dps8/dps8_cpu.c cpu.MR.separ = 0; MR 3654 src/dps8/dps8_cpu.c if (cpu.MR.sdpap) MR 3657 src/dps8/dps8_cpu.c cpu.MR.sdpap = 0; MR 3659 src/dps8/dps8_cpu.c if (cpu.MR.separ) MR 3662 src/dps8/dps8_cpu.c cpu.MR.separ = 0; MR 3801 src/dps8/dps8_cpu.c if (cpu.MR.sdpap) { MR 3803 src/dps8/dps8_cpu.c cpu.MR.sdpap = 0; MR 3805 src/dps8/dps8_cpu.c if (cpu.MR.separ) { MR 3807 src/dps8/dps8_cpu.c cpu.MR.separ = 0; MR 4240 src/dps8/dps8_cpu.c if (cpu.MR.hrhlt && cpu.history_cyclic[CU_HIST_REG] == 0) MR 4243 src/dps8/dps8_cpu.c if (cpu.MR.ihrrs) MR 4245 src/dps8/dps8_cpu.c cpu.MR.ihr = 0; MR 1582 src/dps8/dps8_cpu.h mode_register_s MR; MR 2031 src/dps8/dps8_cpu.h if (cpu.MR.sdpap) MR 2034 src/dps8/dps8_cpu.h cpu.MR.sdpap = 0; MR 2036 src/dps8/dps8_cpu.h if (cpu.MR.separ) MR 2039 src/dps8/dps8_cpu.h cpu.MR.separ = 0; MR 2057 src/dps8/dps8_cpu.h if (cpu.MR.sdpap) MR 2060 src/dps8/dps8_cpu.h cpu.MR.sdpap = 0; MR 2062 src/dps8/dps8_cpu.h if (cpu.MR.separ) MR 2065 src/dps8/dps8_cpu.h cpu.MR.separ = 0; MR 2098 src/dps8/dps8_cpu.h if (cpu.MR.sdpap) MR 2101 src/dps8/dps8_cpu.h cpu.MR.sdpap = 0; MR 2103 src/dps8/dps8_cpu.h if (cpu.MR.separ) MR 2106 src/dps8/dps8_cpu.h cpu.MR.separ = 0; MR 633 src/dps8/dps8_faults.c if (cpu.MR.emr && cpu.MR.ihrrs) MR 635 src/dps8/dps8_faults.c cpu.MR.ihr = 0; MR 649 src/dps8/dps8_faults.c if (cpu.MR.emr && cpu.MR.ihrrs) MR 658 src/dps8/dps8_faults.c cpu.MR.ihr = 0; MR 665 src/dps8/dps8_faults.c cpu.MR.ihr = 0; MR 814 src/dps8/dps8_faults.c if (cpu.MR.emr && cpu.MR.ihrrs) MR 816 src/dps8/dps8_faults.c cpu.MR.ihr = 0; MR 1463 src/dps8/dps8_ins.c if (UNLIKELY (cpu.MR.emr && cpu.MR.OC_TRAP)) { MR 1464 src/dps8/dps8_ins.c if (cpu.MR.OPCODE == opcode && cpu.MR.OPCODEX == opcodeX) { MR 1465 src/dps8/dps8_ins.c if (cpu.MR.ihrrs) { MR 1466 src/dps8/dps8_ins.c cpu.MR.ihr = 0; MR 2396 src/dps8/dps8_ins.c memcpy (& cpu.MR_cache, & cpu.MR, sizeof (cpu.MR_cache)); MR 7462 src/dps8/dps8_ins.c cpu.MR.r = cpu.CY; MR 7464 src/dps8/dps8_ins.c putbits36_1 (& cpu.MR.r, 32, 0); MR 7466 src/dps8/dps8_ins.c putbits36_2 (& cpu.MR.r, 33, 0); MR 7468 src/dps8/dps8_ins.c cpu.MR.FFV = getbits36_15 (cpu.CY, 0); MR 7469 src/dps8/dps8_ins.c cpu.MR.OC_TRAP = getbits36_1 (cpu.CY, 16); MR 7470 src/dps8/dps8_ins.c cpu.MR.ADR_TRAP = getbits36_1 (cpu.CY, 17); MR 7471 src/dps8/dps8_ins.c cpu.MR.OPCODE = getbits36_9 (cpu.CY, 18); MR 7472 src/dps8/dps8_ins.c cpu.MR.OPCODEX = getbits36_1 (cpu.CY, 27); MR 7474 src/dps8/dps8_ins.c cpu.MR.sdpap = getbits36_1 (cpu.CY, 20); MR 7475 src/dps8/dps8_ins.c cpu.MR.separ = getbits36_1 (cpu.CY, 21); MR 7476 src/dps8/dps8_ins.c cpu.MR.hrhlt = getbits36_1 (cpu.CY, 28); MR 7477 src/dps8/dps8_ins.c DPS8M_ (cpu.MR.hrxfr = getbits36_1 (cpu.CY, 29);) MR 7478 src/dps8/dps8_ins.c cpu.MR.ihr = getbits36_1 (cpu.CY, 30); MR 7479 src/dps8/dps8_ins.c cpu.MR.ihrrs = getbits36_1 (cpu.CY, 31); MR 7480 src/dps8/dps8_ins.c cpu.MR.emr = getbits36_1 (cpu.CY, 35); MR 7482 src/dps8/dps8_ins.c cpu.MR.hexfp = getbits36_1 (cpu.CY, 33); MR 7484 src/dps8/dps8_ins.c cpu.MR.hexfp = 0; MR 7490 src/dps8/dps8_ins.c if (cpu.MR.hrhlt) MR 7497 src/dps8/dps8_ins.c MR 7502 src/dps8/dps8_ins.c MR 7700 src/dps8/dps8_ins.c cpu.Ypair[0] = cpu.MR.r; MR 7701 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[0], 20, cpu.MR.sdpap); MR 7702 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[0], 21, cpu.MR.separ); MR 7703 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[0], 30, cpu.MR.ihr); MR 7704 src/dps8/dps8_ins.c DPS8M_ (putbits36_1 (& cpu.Ypair[0], 33, cpu.MR.hexfp);) MR 455 src/dps8/dps8_math.c return (! cpu.tweaks.l68_mode) && (!! cpu.options.hex_mode_installed) && (!! cpu.MR.hexfp) && (!! TST_I_HEX); MR 844 src/dps8/panelScraper.c SETL (bank_d, 0+3, cpu.MR.r, 36);